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src/cpu/x86/vm/c1_Runtime1_x86.cpp@0fbdb4381b99 (annotated)

src/cpu/x86/vm/c1_Runtime1_x86.cpp

Mon, 09 Mar 2009 13:28:46 -0700

author

xdono

date

Mon, 09 Mar 2009 13:28:46 -0700

changeset 1014

0fbdb4381b99

parent 968

dc3ad84615cf

child 1082

bd441136a5ce

permissions

-rw-r--r--

6814575: Update copyright year
Summary: Update copyright for files that have been modified in 2009, up to 03/09
Reviewed-by: katleman, tbell, ohair

duke@435	1	/*
xdono@1014	2	* Copyright 1999-2009 Sun Microsystems, Inc. All Rights Reserved.
duke@435	3	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435	4	*
duke@435	5	* This code is free software; you can redistribute it and/or modify it
duke@435	6	* under the terms of the GNU General Public License version 2 only, as
duke@435	7	* published by the Free Software Foundation.
duke@435	8	*
duke@435	9	* This code is distributed in the hope that it will be useful, but WITHOUT
duke@435	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435	12	* version 2 for more details (a copy is included in the LICENSE file that
duke@435	13	* accompanied this code).
duke@435	14	*
duke@435	15	* You should have received a copy of the GNU General Public License version
duke@435	16	* 2 along with this work; if not, write to the Free Software Foundation,
duke@435	17	* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435	18	*
duke@435	19	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
duke@435	20	* CA 95054 USA or visit www.sun.com if you need additional information or
duke@435	21	* have any questions.
duke@435	22	*
duke@435	23	*/
duke@435	24
duke@435	25	#include "incls/_precompiled.incl"
duke@435	26	#include "incls/_c1_Runtime1_x86.cpp.incl"
duke@435	27
duke@435	28
duke@435	29	// Implementation of StubAssembler
duke@435	30
duke@435	31	int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, int args_size) {
duke@435	32	// setup registers
never@739	33	const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions)
duke@435	34	assert(!(oop_result1->is_valid() || oop_result2->is_valid()) || oop_result1 != oop_result2, "registers must be different");
duke@435	35	assert(oop_result1 != thread && oop_result2 != thread, "registers must be different");
duke@435	36	assert(args_size >= 0, "illegal args_size");
duke@435	37
never@739	38	#ifdef _LP64
never@739	39	mov(c_rarg0, thread);
never@739	40	set_num_rt_args(0); // Nothing on stack
never@739	41	#else
duke@435	42	set_num_rt_args(1 + args_size);
duke@435	43
duke@435	44	// push java thread (becomes first argument of C function)
duke@435	45	get_thread(thread);
never@739	46	push(thread);
never@739	47	#endif // _LP64
duke@435	48
duke@435	49	set_last_Java_frame(thread, noreg, rbp, NULL);
never@739	50
duke@435	51	// do the call
duke@435	52	call(RuntimeAddress(entry));
duke@435	53	int call_offset = offset();
duke@435	54	// verify callee-saved register
duke@435	55	#ifdef ASSERT
duke@435	56	guarantee(thread != rax, "change this code");
never@739	57	push(rax);
duke@435	58	{ Label L;
duke@435	59	get_thread(rax);
never@739	60	cmpptr(thread, rax);
duke@435	61	jcc(Assembler::equal, L);
duke@435	62	int3();
duke@435	63	stop("StubAssembler::call_RT: rdi not callee saved?");
duke@435	64	bind(L);
duke@435	65	}
never@739	66	pop(rax);
duke@435	67	#endif
duke@435	68	reset_last_Java_frame(thread, true, false);
duke@435	69
duke@435	70	// discard thread and arguments
never@739	71	NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord));
duke@435	72
duke@435	73	// check for pending exceptions
duke@435	74	{ Label L;
never@739	75	cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
duke@435	76	jcc(Assembler::equal, L);
duke@435	77	// exception pending => remove activation and forward to exception handler
never@739	78	movptr(rax, Address(thread, Thread::pending_exception_offset()));
duke@435	79	// make sure that the vm_results are cleared
duke@435	80	if (oop_result1->is_valid()) {
xlu@947	81	movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
duke@435	82	}
duke@435	83	if (oop_result2->is_valid()) {
xlu@947	84	movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
duke@435	85	}
duke@435	86	if (frame_size() == no_frame_size) {
duke@435	87	leave();
duke@435	88	jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
duke@435	89	} else if (_stub_id == Runtime1::forward_exception_id) {
duke@435	90	should_not_reach_here();
duke@435	91	} else {
duke@435	92	jump(RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
duke@435	93	}
duke@435	94	bind(L);
duke@435	95	}
duke@435	96	// get oop results if there are any and reset the values in the thread
duke@435	97	if (oop_result1->is_valid()) {
never@739	98	movptr(oop_result1, Address(thread, JavaThread::vm_result_offset()));
xlu@947	99	movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
duke@435	100	verify_oop(oop_result1);
duke@435	101	}
duke@435	102	if (oop_result2->is_valid()) {
never@739	103	movptr(oop_result2, Address(thread, JavaThread::vm_result_2_offset()));
xlu@947	104	movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
duke@435	105	verify_oop(oop_result2);
duke@435	106	}
duke@435	107	return call_offset;
duke@435	108	}
duke@435	109
duke@435	110
duke@435	111	int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1) {
never@739	112	#ifdef _LP64
never@739	113	mov(c_rarg1, arg1);
never@739	114	#else
never@739	115	push(arg1);
never@739	116	#endif // _LP64
duke@435	117	return call_RT(oop_result1, oop_result2, entry, 1);
duke@435	118	}
duke@435	119
duke@435	120
duke@435	121	int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2) {
never@739	122	#ifdef _LP64
never@739	123	if (c_rarg1 == arg2) {
never@739	124	if (c_rarg2 == arg1) {
never@739	125	xchgq(arg1, arg2);
never@739	126	} else {
never@739	127	mov(c_rarg2, arg2);
never@739	128	mov(c_rarg1, arg1);
never@739	129	}
never@739	130	} else {
never@739	131	mov(c_rarg1, arg1);
never@739	132	mov(c_rarg2, arg2);
never@739	133	}
never@739	134	#else
never@739	135	push(arg2);
never@739	136	push(arg1);
never@739	137	#endif // _LP64
duke@435	138	return call_RT(oop_result1, oop_result2, entry, 2);
duke@435	139	}
duke@435	140
duke@435	141
duke@435	142	int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3) {
never@739	143	#ifdef _LP64
never@739	144	// if there is any conflict use the stack
never@739	145	if (arg1 == c_rarg2 || arg1 == c_rarg3 ||
never@739	146	arg2 == c_rarg1 || arg1 == c_rarg3 ||
never@739	147	arg3 == c_rarg1 || arg1 == c_rarg2) {
never@739	148	push(arg3);
never@739	149	push(arg2);
never@739	150	push(arg1);
never@739	151	pop(c_rarg1);
never@739	152	pop(c_rarg2);
never@739	153	pop(c_rarg3);
never@739	154	} else {
never@739	155	mov(c_rarg1, arg1);
never@739	156	mov(c_rarg2, arg2);
never@739	157	mov(c_rarg3, arg3);
never@739	158	}
never@739	159	#else
never@739	160	push(arg3);
never@739	161	push(arg2);
never@739	162	push(arg1);
never@739	163	#endif // _LP64
duke@435	164	return call_RT(oop_result1, oop_result2, entry, 3);
duke@435	165	}
duke@435	166
duke@435	167
duke@435	168	// Implementation of StubFrame
duke@435	169
duke@435	170	class StubFrame: public StackObj {
duke@435	171	private:
duke@435	172	StubAssembler* _sasm;
duke@435	173
duke@435	174	public:
duke@435	175	StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments);
duke@435	176	void load_argument(int offset_in_words, Register reg);
duke@435	177
duke@435	178	~StubFrame();
duke@435	179	};
duke@435	180
duke@435	181
duke@435	182	#define __ _sasm->
duke@435	183
duke@435	184	StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) {
duke@435	185	_sasm = sasm;
duke@435	186	__ set_info(name, must_gc_arguments);
duke@435	187	__ enter();
duke@435	188	}
duke@435	189
duke@435	190	// load parameters that were stored with LIR_Assembler::store_parameter
duke@435	191	// Note: offsets for store_parameter and load_argument must match
duke@435	192	void StubFrame::load_argument(int offset_in_words, Register reg) {
duke@435	193	// rbp, + 0: link
duke@435	194	// + 1: return address
duke@435	195	// + 2: argument with offset 0
duke@435	196	// + 3: argument with offset 1
duke@435	197	// + 4: ...
duke@435	198
never@739	199	__ movptr(reg, Address(rbp, (offset_in_words + 2) * BytesPerWord));
duke@435	200	}
duke@435	201
duke@435	202
duke@435	203	StubFrame::~StubFrame() {
duke@435	204	__ leave();
duke@435	205	__ ret(0);
duke@435	206	}
duke@435	207
duke@435	208	#undef __
duke@435	209
duke@435	210
duke@435	211	// Implementation of Runtime1
duke@435	212
duke@435	213	#define __ sasm->
duke@435	214
never@739	215	const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2;
never@739	216	const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2;
duke@435	217
duke@435	218	// Stack layout for saving/restoring all the registers needed during a runtime
duke@435	219	// call (this includes deoptimization)
duke@435	220	// Note: note that users of this frame may well have arguments to some runtime
duke@435	221	// while these values are on the stack. These positions neglect those arguments
duke@435	222	// but the code in save_live_registers will take the argument count into
duke@435	223	// account.
duke@435	224	//
never@739	225	#ifdef _LP64
never@739	226	#define SLOT2(x) x,
never@739	227	#define SLOT_PER_WORD 2
never@739	228	#else
never@739	229	#define SLOT2(x)
never@739	230	#define SLOT_PER_WORD 1
never@739	231	#endif // _LP64
never@739	232
duke@435	233	enum reg_save_layout {
never@739	234	// 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that
never@739	235	// happen and will assert if the stack size we create is misaligned
never@739	236	#ifdef _LP64
never@739	237	align_dummy_0, align_dummy_1,
never@739	238	#endif // _LP64
never@739	239	dummy1, SLOT2(dummy1H) // 0, 4
never@739	240	dummy2, SLOT2(dummy2H) // 8, 12
duke@435	241	// Two temps to be used as needed by users of save/restore callee registers
never@739	242	temp_2_off, SLOT2(temp_2H_off) // 16, 20
never@739	243	temp_1_off, SLOT2(temp_1H_off) // 24, 28
never@739	244	xmm_regs_as_doubles_off, // 32
never@739	245	float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots, // 160
never@739	246	fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots, // 224
never@739	247	// fpu_state_end_off is exclusive
never@739	248	fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD), // 352
never@739	249	marker = fpu_state_end_off, SLOT2(markerH) // 352, 356
never@739	250	extra_space_offset, // 360
never@739	251	#ifdef _LP64
never@739	252	r15_off = extra_space_offset, r15H_off, // 360, 364
never@739	253	r14_off, r14H_off, // 368, 372
never@739	254	r13_off, r13H_off, // 376, 380
never@739	255	r12_off, r12H_off, // 384, 388
never@739	256	r11_off, r11H_off, // 392, 396
never@739	257	r10_off, r10H_off, // 400, 404
never@739	258	r9_off, r9H_off, // 408, 412
never@739	259	r8_off, r8H_off, // 416, 420
never@739	260	rdi_off, rdiH_off, // 424, 428
never@739	261	#else
duke@435	262	rdi_off = extra_space_offset,
never@739	263	#endif // _LP64
never@739	264	rsi_off, SLOT2(rsiH_off) // 432, 436
never@739	265	rbp_off, SLOT2(rbpH_off) // 440, 444
never@739	266	rsp_off, SLOT2(rspH_off) // 448, 452
never@739	267	rbx_off, SLOT2(rbxH_off) // 456, 460
never@739	268	rdx_off, SLOT2(rdxH_off) // 464, 468
never@739	269	rcx_off, SLOT2(rcxH_off) // 472, 476
never@739	270	rax_off, SLOT2(raxH_off) // 480, 484
never@739	271	saved_rbp_off, SLOT2(saved_rbpH_off) // 488, 492
never@739	272	return_off, SLOT2(returnH_off) // 496, 500
never@739	273	reg_save_frame_size, // As noted: neglects any parameters to runtime // 504
never@739	274
never@739	275	#ifdef _WIN64
never@739	276	c_rarg0_off = rcx_off,
never@739	277	#else
never@739	278	c_rarg0_off = rdi_off,
never@739	279	#endif // WIN64
duke@435	280
duke@435	281	// equates
duke@435	282
duke@435	283	// illegal instruction handler
duke@435	284	continue_dest_off = temp_1_off,
duke@435	285
duke@435	286	// deoptimization equates
duke@435	287	fp0_off = float_regs_as_doubles_off, // slot for java float/double return value
duke@435	288	xmm0_off = xmm_regs_as_doubles_off, // slot for java float/double return value
duke@435	289	deopt_type = temp_2_off, // slot for type of deopt in progress
duke@435	290	ret_type = temp_1_off // slot for return type
duke@435	291	};
duke@435	292
duke@435	293
duke@435	294
duke@435	295	// Save off registers which might be killed by calls into the runtime.
duke@435	296	// Tries to smart of about FP registers. In particular we separate
duke@435	297	// saving and describing the FPU registers for deoptimization since we
duke@435	298	// have to save the FPU registers twice if we describe them and on P4
duke@435	299	// saving FPU registers which don't contain anything appears
duke@435	300	// expensive. The deopt blob is the only thing which needs to
duke@435	301	// describe FPU registers. In all other cases it should be sufficient
duke@435	302	// to simply save their current value.
duke@435	303
duke@435	304	static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args,
duke@435	305	bool save_fpu_registers = true) {
never@739	306
never@739	307	// In 64bit all the args are in regs so there are no additional stack slots
never@739	308	LP64_ONLY(num_rt_args = 0);
never@739	309	LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");)
never@739	310	int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread
never@739	311	sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word );
duke@435	312
duke@435	313	// record saved value locations in an OopMap
duke@435	314	// locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread
never@739	315	OopMap* map = new OopMap(frame_size_in_slots, 0);
duke@435	316	map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg());
duke@435	317	map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg());
duke@435	318	map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg());
duke@435	319	map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg());
duke@435	320	map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg());
duke@435	321	map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg());
never@739	322	#ifdef _LP64
never@739	323	map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args), r8->as_VMReg());
never@739	324	map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args), r9->as_VMReg());
never@739	325	map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg());
never@739	326	map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg());
never@739	327	map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg());
never@739	328	map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg());
never@739	329	map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg());
never@739	330	map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg());
never@739	331
never@739	332	// This is stupid but needed.
never@739	333	map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next());
never@739	334	map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next());
never@739	335	map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next());
never@739	336	map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next());
never@739	337	map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next());
never@739	338	map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next());
never@739	339
never@739	340	map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args), r8->as_VMReg()->next());
never@739	341	map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args), r9->as_VMReg()->next());
never@739	342	map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next());
never@739	343	map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next());
never@739	344	map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next());
never@739	345	map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next());
never@739	346	map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next());
never@739	347	map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next());
never@739	348	#endif // _LP64
duke@435	349
duke@435	350	if (save_fpu_registers) {
duke@435	351	if (UseSSE < 2) {
duke@435	352	int fpu_off = float_regs_as_doubles_off;
duke@435	353	for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
duke@435	354	VMReg fpu_name_0 = FrameMap::fpu_regname(n);
duke@435	355	map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + num_rt_args), fpu_name_0);
duke@435	356	// %%% This is really a waste but we'll keep things as they were for now
duke@435	357	if (true) {
duke@435	358	map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next());
duke@435	359	}
duke@435	360	fpu_off += 2;
duke@435	361	}
duke@435	362	assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots");
duke@435	363	}
duke@435	364
duke@435	365	if (UseSSE >= 2) {
duke@435	366	int xmm_off = xmm_regs_as_doubles_off;
duke@435	367	for (int n = 0; n < FrameMap::nof_xmm_regs; n++) {
duke@435	368	VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
duke@435	369	map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
duke@435	370	// %%% This is really a waste but we'll keep things as they were for now
duke@435	371	if (true) {
duke@435	372	map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next());
duke@435	373	}
duke@435	374	xmm_off += 2;
duke@435	375	}
duke@435	376	assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
duke@435	377
duke@435	378	} else if (UseSSE == 1) {
duke@435	379	int xmm_off = xmm_regs_as_doubles_off;
duke@435	380	for (int n = 0; n < FrameMap::nof_xmm_regs; n++) {
duke@435	381	VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
duke@435	382	map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
duke@435	383	xmm_off += 2;
duke@435	384	}
duke@435	385	assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
duke@435	386	}
duke@435	387	}
duke@435	388
duke@435	389	return map;
duke@435	390	}
duke@435	391
duke@435	392	static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args,
duke@435	393	bool save_fpu_registers = true) {
duke@435	394	__ block_comment("save_live_registers");
duke@435	395
never@739	396	// 64bit passes the args in regs to the c++ runtime
never@739	397	int frame_size_in_slots = reg_save_frame_size NOT_LP64(+ num_rt_args); // args + thread
duke@435	398	// frame_size = round_to(frame_size, 4);
never@739	399	sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word );
duke@435	400
never@739	401	__ pusha(); // integer registers
duke@435	402
duke@435	403	// assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset");
duke@435	404	// assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset");
duke@435	405
never@739	406	__ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
duke@435	407
duke@435	408	#ifdef ASSERT
never@739	409	__ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
duke@435	410	#endif
duke@435	411
duke@435	412	if (save_fpu_registers) {
duke@435	413	if (UseSSE < 2) {
duke@435	414	// save FPU stack
never@739	415	__ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
duke@435	416	__ fwait();
duke@435	417
duke@435	418	#ifdef ASSERT
duke@435	419	Label ok;
never@739	420	__ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std());
duke@435	421	__ jccb(Assembler::equal, ok);
duke@435	422	__ stop("corrupted control word detected");
duke@435	423	__ bind(ok);
duke@435	424	#endif
duke@435	425
duke@435	426	// Reset the control word to guard against exceptions being unmasked
duke@435	427	// since fstp_d can cause FPU stack underflow exceptions. Write it
duke@435	428	// into the on stack copy and then reload that to make sure that the
duke@435	429	// current and future values are correct.
never@739	430	__ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std());
never@739	431	__ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
duke@435	432
duke@435	433	// Save the FPU registers in de-opt-able form
never@739	434	__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0));
never@739	435	__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8));
never@739	436	__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16));
never@739	437	__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24));
never@739	438	__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32));
never@739	439	__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40));
never@739	440	__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48));
never@739	441	__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56));
duke@435	442	}
duke@435	443
duke@435	444	if (UseSSE >= 2) {
duke@435	445	// save XMM registers
duke@435	446	// XMM registers can contain float or double values, but this is not known here,
duke@435	447	// so always save them as doubles.
duke@435	448	// note that float values are _not_ converted automatically, so for float values
duke@435	449	// the second word contains only garbage data.
never@739	450	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0);
never@739	451	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1);
never@739	452	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2);
never@739	453	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3);
never@739	454	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4);
never@739	455	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5);
never@739	456	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6);
never@739	457	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7);
never@739	458	#ifdef _LP64
never@739	459	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64), xmm8);
never@739	460	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72), xmm9);
never@739	461	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80), xmm10);
never@739	462	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88), xmm11);
never@739	463	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96), xmm12);
never@739	464	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104), xmm13);
never@739	465	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112), xmm14);
never@739	466	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120), xmm15);
never@739	467	#endif // _LP64
duke@435	468	} else if (UseSSE == 1) {
duke@435	469	// save XMM registers as float because double not supported without SSE2
never@739	470	__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0);
never@739	471	__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1);
never@739	472	__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2);
never@739	473	__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3);
never@739	474	__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4);
never@739	475	__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5);
never@739	476	__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6);
never@739	477	__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7);
duke@435	478	}
duke@435	479	}
duke@435	480
duke@435	481	// FPU stack must be empty now
duke@435	482	__ verify_FPU(0, "save_live_registers");
duke@435	483
duke@435	484	return generate_oop_map(sasm, num_rt_args, save_fpu_registers);
duke@435	485	}
duke@435	486
duke@435	487
duke@435	488	static void restore_fpu(StubAssembler* sasm, bool restore_fpu_registers = true) {
duke@435	489	if (restore_fpu_registers) {
duke@435	490	if (UseSSE >= 2) {
duke@435	491	// restore XMM registers
never@739	492	__ movdbl(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0));
never@739	493	__ movdbl(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8));
never@739	494	__ movdbl(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16));
never@739	495	__ movdbl(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24));
never@739	496	__ movdbl(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32));
never@739	497	__ movdbl(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40));
never@739	498	__ movdbl(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48));
never@739	499	__ movdbl(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56));
never@739	500	#ifdef _LP64
never@739	501	__ movdbl(xmm8, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64));
never@739	502	__ movdbl(xmm9, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72));
never@739	503	__ movdbl(xmm10, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80));
never@739	504	__ movdbl(xmm11, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88));
never@739	505	__ movdbl(xmm12, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96));
never@739	506	__ movdbl(xmm13, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104));
never@739	507	__ movdbl(xmm14, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112));
never@739	508	__ movdbl(xmm15, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120));
never@739	509	#endif // _LP64
duke@435	510	} else if (UseSSE == 1) {
duke@435	511	// restore XMM registers
never@739	512	__ movflt(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0));
never@739	513	__ movflt(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8));
never@739	514	__ movflt(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16));
never@739	515	__ movflt(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24));
never@739	516	__ movflt(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32));
never@739	517	__ movflt(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40));
never@739	518	__ movflt(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48));
never@739	519	__ movflt(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56));
duke@435	520	}
duke@435	521
duke@435	522	if (UseSSE < 2) {
never@739	523	__ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
duke@435	524	} else {
duke@435	525	// check that FPU stack is really empty
duke@435	526	__ verify_FPU(0, "restore_live_registers");
duke@435	527	}
duke@435	528
duke@435	529	} else {
duke@435	530	// check that FPU stack is really empty
duke@435	531	__ verify_FPU(0, "restore_live_registers");
duke@435	532	}
duke@435	533
duke@435	534	#ifdef ASSERT
duke@435	535	{
duke@435	536	Label ok;
never@739	537	__ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
duke@435	538	__ jcc(Assembler::equal, ok);
duke@435	539	__ stop("bad offsets in frame");
duke@435	540	__ bind(ok);
duke@435	541	}
never@739	542	#endif // ASSERT
duke@435	543
never@739	544	__ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
duke@435	545	}
duke@435	546
duke@435	547
duke@435	548	static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
duke@435	549	__ block_comment("restore_live_registers");
duke@435	550
duke@435	551	restore_fpu(sasm, restore_fpu_registers);
never@739	552	__ popa();
duke@435	553	}
duke@435	554
duke@435	555
duke@435	556	static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) {
duke@435	557	__ block_comment("restore_live_registers_except_rax");
duke@435	558
duke@435	559	restore_fpu(sasm, restore_fpu_registers);
duke@435	560
never@739	561	#ifdef _LP64
never@739	562	__ movptr(r15, Address(rsp, 0));
never@739	563	__ movptr(r14, Address(rsp, wordSize));
never@739	564	__ movptr(r13, Address(rsp, 2 * wordSize));
never@739	565	__ movptr(r12, Address(rsp, 3 * wordSize));
never@739	566	__ movptr(r11, Address(rsp, 4 * wordSize));
never@739	567	__ movptr(r10, Address(rsp, 5 * wordSize));
never@739	568	__ movptr(r9, Address(rsp, 6 * wordSize));
never@739	569	__ movptr(r8, Address(rsp, 7 * wordSize));
never@739	570	__ movptr(rdi, Address(rsp, 8 * wordSize));
never@739	571	__ movptr(rsi, Address(rsp, 9 * wordSize));
never@739	572	__ movptr(rbp, Address(rsp, 10 * wordSize));
never@739	573	// skip rsp
never@739	574	__ movptr(rbx, Address(rsp, 12 * wordSize));
never@739	575	__ movptr(rdx, Address(rsp, 13 * wordSize));
never@739	576	__ movptr(rcx, Address(rsp, 14 * wordSize));
never@739	577
never@739	578	__ addptr(rsp, 16 * wordSize);
never@739	579	#else
never@739	580
never@739	581	__ pop(rdi);
never@739	582	__ pop(rsi);
never@739	583	__ pop(rbp);
never@739	584	__ pop(rbx); // skip this value
never@739	585	__ pop(rbx);
never@739	586	__ pop(rdx);
never@739	587	__ pop(rcx);
never@739	588	__ addptr(rsp, BytesPerWord);
never@739	589	#endif // _LP64
duke@435	590	}
duke@435	591
duke@435	592
duke@435	593	void Runtime1::initialize_pd() {
duke@435	594	// nothing to do
duke@435	595	}
duke@435	596
duke@435	597
duke@435	598	// target: the entry point of the method that creates and posts the exception oop
duke@435	599	// has_argument: true if the exception needs an argument (passed on stack because registers must be preserved)
duke@435	600
duke@435	601	OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
duke@435	602	// preserve all registers
duke@435	603	int num_rt_args = has_argument ? 2 : 1;
duke@435	604	OopMap* oop_map = save_live_registers(sasm, num_rt_args);
duke@435	605
duke@435	606	// now all registers are saved and can be used freely
duke@435	607	// verify that no old value is used accidentally
duke@435	608	__ invalidate_registers(true, true, true, true, true, true);
duke@435	609
duke@435	610	// registers used by this stub
duke@435	611	const Register temp_reg = rbx;
duke@435	612
duke@435	613	// load argument for exception that is passed as an argument into the stub
duke@435	614	if (has_argument) {
never@739	615	#ifdef _LP64
never@739	616	__ movptr(c_rarg1, Address(rbp, 2*BytesPerWord));
never@739	617	#else
never@739	618	__ movptr(temp_reg, Address(rbp, 2*BytesPerWord));
never@739	619	__ push(temp_reg);
never@739	620	#endif // _LP64
duke@435	621	}
duke@435	622	int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1);
duke@435	623
duke@435	624	OopMapSet* oop_maps = new OopMapSet();
duke@435	625	oop_maps->add_gc_map(call_offset, oop_map);
duke@435	626
duke@435	627	__ stop("should not reach here");
duke@435	628
duke@435	629	return oop_maps;
duke@435	630	}
duke@435	631
duke@435	632
duke@435	633	void Runtime1::generate_handle_exception(StubAssembler *sasm, OopMapSet* oop_maps, OopMap* oop_map, bool save_fpu_registers) {
duke@435	634	// incoming parameters
duke@435	635	const Register exception_oop = rax;
duke@435	636	const Register exception_pc = rdx;
duke@435	637	// other registers used in this stub
duke@435	638	const Register real_return_addr = rbx;
never@739	639	const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
duke@435	640
duke@435	641	__ block_comment("generate_handle_exception");
duke@435	642
duke@435	643	#ifdef TIERED
duke@435	644	// C2 can leave the fpu stack dirty
duke@435	645	if (UseSSE < 2 ) {
duke@435	646	__ empty_FPU_stack();
duke@435	647	}
duke@435	648	#endif // TIERED
duke@435	649
duke@435	650	// verify that only rax, and rdx is valid at this time
duke@435	651	__ invalidate_registers(false, true, true, false, true, true);
duke@435	652	// verify that rax, contains a valid exception
duke@435	653	__ verify_not_null_oop(exception_oop);
duke@435	654
duke@435	655	// load address of JavaThread object for thread-local data
never@739	656	NOT_LP64(__ get_thread(thread);)
duke@435	657
duke@435	658	#ifdef ASSERT
duke@435	659	// check that fields in JavaThread for exception oop and issuing pc are
duke@435	660	// empty before writing to them
duke@435	661	Label oop_empty;
never@739	662	__ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD);
duke@435	663	__ jcc(Assembler::equal, oop_empty);
duke@435	664	__ stop("exception oop already set");
duke@435	665	__ bind(oop_empty);
duke@435	666
duke@435	667	Label pc_empty;
never@739	668	__ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
duke@435	669	__ jcc(Assembler::equal, pc_empty);
duke@435	670	__ stop("exception pc already set");
duke@435	671	__ bind(pc_empty);
duke@435	672	#endif
duke@435	673
duke@435	674	// save exception oop and issuing pc into JavaThread
duke@435	675	// (exception handler will load it from here)
never@739	676	__ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop);
never@739	677	__ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc);
duke@435	678
duke@435	679	// save real return address (pc that called this stub)
never@739	680	__ movptr(real_return_addr, Address(rbp, 1*BytesPerWord));
never@739	681	__ movptr(Address(rsp, temp_1_off * VMRegImpl::stack_slot_size), real_return_addr);
duke@435	682
duke@435	683	// patch throwing pc into return address (has bci & oop map)
never@739	684	__ movptr(Address(rbp, 1*BytesPerWord), exception_pc);
duke@435	685
duke@435	686	// compute the exception handler.
duke@435	687	// the exception oop and the throwing pc are read from the fields in JavaThread
duke@435	688	int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
duke@435	689	oop_maps->add_gc_map(call_offset, oop_map);
duke@435	690
duke@435	691	// rax,: handler address or NULL if no handler exists
duke@435	692	// will be the deopt blob if nmethod was deoptimized while we looked up
duke@435	693	// handler regardless of whether handler existed in the nmethod.
duke@435	694
duke@435	695	// only rax, is valid at this time, all other registers have been destroyed by the runtime call
duke@435	696	__ invalidate_registers(false, true, true, true, true, true);
duke@435	697
duke@435	698	// Do we have an exception handler in the nmethod?
duke@435	699	Label no_handler;
duke@435	700	Label done;
never@739	701	__ testptr(rax, rax);
duke@435	702	__ jcc(Assembler::zero, no_handler);
duke@435	703
duke@435	704	// exception handler found
duke@435	705	// patch the return address -> the stub will directly return to the exception handler
never@739	706	__ movptr(Address(rbp, 1*BytesPerWord), rax);
duke@435	707
duke@435	708	// restore registers
duke@435	709	restore_live_registers(sasm, save_fpu_registers);
duke@435	710
duke@435	711	// return to exception handler
duke@435	712	__ leave();
duke@435	713	__ ret(0);
duke@435	714
duke@435	715	__ bind(no_handler);
duke@435	716	// no exception handler found in this method, so the exception is
duke@435	717	// forwarded to the caller (using the unwind code of the nmethod)
duke@435	718	// there is no need to restore the registers
duke@435	719
duke@435	720	// restore the real return address that was saved before the RT-call
never@739	721	__ movptr(real_return_addr, Address(rsp, temp_1_off * VMRegImpl::stack_slot_size));
never@739	722	__ movptr(Address(rbp, 1*BytesPerWord), real_return_addr);
duke@435	723
duke@435	724	// load address of JavaThread object for thread-local data
never@739	725	NOT_LP64(__ get_thread(thread);)
duke@435	726	// restore exception oop into rax, (convention for unwind code)
never@739	727	__ movptr(exception_oop, Address(thread, JavaThread::exception_oop_offset()));
duke@435	728
duke@435	729	// clear exception fields in JavaThread because they are no longer needed
duke@435	730	// (fields must be cleared because they are processed by GC otherwise)
xlu@947	731	__ movptr(Address(thread, JavaThread::exception_oop_offset()), NULL_WORD);
xlu@947	732	__ movptr(Address(thread, JavaThread::exception_pc_offset()), NULL_WORD);
duke@435	733
duke@435	734	// pop the stub frame off
duke@435	735	__ leave();
duke@435	736
duke@435	737	generate_unwind_exception(sasm);
duke@435	738	__ stop("should not reach here");
duke@435	739	}
duke@435	740
duke@435	741
duke@435	742	void Runtime1::generate_unwind_exception(StubAssembler *sasm) {
duke@435	743	// incoming parameters
duke@435	744	const Register exception_oop = rax;
duke@435	745	// other registers used in this stub
duke@435	746	const Register exception_pc = rdx;
duke@435	747	const Register handler_addr = rbx;
never@739	748	const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
duke@435	749
duke@435	750	// verify that only rax, is valid at this time
duke@435	751	__ invalidate_registers(false, true, true, true, true, true);
duke@435	752
duke@435	753	#ifdef ASSERT
duke@435	754	// check that fields in JavaThread for exception oop and issuing pc are empty
never@739	755	NOT_LP64(__ get_thread(thread);)
duke@435	756	Label oop_empty;
never@739	757	__ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0);
duke@435	758	__ jcc(Assembler::equal, oop_empty);
duke@435	759	__ stop("exception oop must be empty");
duke@435	760	__ bind(oop_empty);
duke@435	761
duke@435	762	Label pc_empty;
never@739	763	__ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
duke@435	764	__ jcc(Assembler::equal, pc_empty);
duke@435	765	__ stop("exception pc must be empty");
duke@435	766	__ bind(pc_empty);
duke@435	767	#endif
duke@435	768
duke@435	769	// clear the FPU stack in case any FPU results are left behind
duke@435	770	__ empty_FPU_stack();
duke@435	771
duke@435	772	// leave activation of nmethod
duke@435	773	__ leave();
duke@435	774	// store return address (is on top of stack after leave)
never@739	775	__ movptr(exception_pc, Address(rsp, 0));
duke@435	776
duke@435	777	__ verify_oop(exception_oop);
duke@435	778
duke@435	779	// save exception oop from rax, to stack before call
never@739	780	__ push(exception_oop);
duke@435	781
duke@435	782	// search the exception handler address of the caller (using the return address)
duke@435	783	__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), exception_pc);
duke@435	784	// rax,: exception handler address of the caller
duke@435	785
duke@435	786	// only rax, is valid at this time, all other registers have been destroyed by the call
duke@435	787	__ invalidate_registers(false, true, true, true, true, true);
duke@435	788
duke@435	789	// move result of call into correct register
never@739	790	__ movptr(handler_addr, rax);
duke@435	791
duke@435	792	// restore exception oop in rax, (required convention of exception handler)
never@739	793	__ pop(exception_oop);
duke@435	794
duke@435	795	__ verify_oop(exception_oop);
duke@435	796
duke@435	797	// get throwing pc (= return address).
duke@435	798	// rdx has been destroyed by the call, so it must be set again
duke@435	799	// the pop is also necessary to simulate the effect of a ret(0)
never@739	800	__ pop(exception_pc);
duke@435	801
duke@435	802	// verify that that there is really a valid exception in rax,
duke@435	803	__ verify_not_null_oop(exception_oop);
duke@435	804
duke@435	805	// continue at exception handler (return address removed)
duke@435	806	// note: do *not* remove arguments when unwinding the
duke@435	807	// activation since the caller assumes having
duke@435	808	// all arguments on the stack when entering the
duke@435	809	// runtime to determine the exception handler
duke@435	810	// (GC happens at call site with arguments!)
duke@435	811	// rax,: exception oop
duke@435	812	// rdx: throwing pc
duke@435	813	// rbx,: exception handler
duke@435	814	__ jmp(handler_addr);
duke@435	815	}
duke@435	816
duke@435	817
duke@435	818	OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
duke@435	819	// use the maximum number of runtime-arguments here because it is difficult to
duke@435	820	// distinguish each RT-Call.
duke@435	821	// Note: This number affects also the RT-Call in generate_handle_exception because
duke@435	822	// the oop-map is shared for all calls.
duke@435	823	const int num_rt_args = 2; // thread + dummy
duke@435	824
duke@435	825	DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
duke@435	826	assert(deopt_blob != NULL, "deoptimization blob must have been created");
duke@435	827
duke@435	828	OopMap* oop_map = save_live_registers(sasm, num_rt_args);
duke@435	829
never@739	830	#ifdef _LP64
never@739	831	const Register thread = r15_thread;
never@739	832	// No need to worry about dummy
never@739	833	__ mov(c_rarg0, thread);
never@739	834	#else
never@739	835	__ push(rax); // push dummy
duke@435	836
duke@435	837	const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions)
duke@435	838	// push java thread (becomes first argument of C function)
duke@435	839	__ get_thread(thread);
never@739	840	__ push(thread);
never@739	841	#endif // _LP64
duke@435	842	__ set_last_Java_frame(thread, noreg, rbp, NULL);
duke@435	843	// do the call
duke@435	844	__ call(RuntimeAddress(target));
duke@435	845	OopMapSet* oop_maps = new OopMapSet();
duke@435	846	oop_maps->add_gc_map(__ offset(), oop_map);
duke@435	847	// verify callee-saved register
duke@435	848	#ifdef ASSERT
duke@435	849	guarantee(thread != rax, "change this code");
never@739	850	__ push(rax);
duke@435	851	{ Label L;
duke@435	852	__ get_thread(rax);
never@739	853	__ cmpptr(thread, rax);
duke@435	854	__ jcc(Assembler::equal, L);
never@739	855	__ stop("StubAssembler::call_RT: rdi/r15 not callee saved?");
duke@435	856	__ bind(L);
duke@435	857	}
never@739	858	__ pop(rax);
duke@435	859	#endif
duke@435	860	__ reset_last_Java_frame(thread, true, false);
never@739	861	#ifndef _LP64
never@739	862	__ pop(rcx); // discard thread arg
never@739	863	__ pop(rcx); // discard dummy
never@739	864	#endif // _LP64
duke@435	865
duke@435	866	// check for pending exceptions
duke@435	867	{ Label L;
never@739	868	__ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
duke@435	869	__ jcc(Assembler::equal, L);
duke@435	870	// exception pending => remove activation and forward to exception handler
duke@435	871
never@739	872	__ testptr(rax, rax); // have we deoptimized?
duke@435	873	__ jump_cc(Assembler::equal,
duke@435	874	RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
duke@435	875
duke@435	876	// the deopt blob expects exceptions in the special fields of
duke@435	877	// JavaThread, so copy and clear pending exception.
duke@435	878
duke@435	879	// load and clear pending exception
never@739	880	__ movptr(rax, Address(thread, Thread::pending_exception_offset()));
xlu@947	881	__ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
duke@435	882
duke@435	883	// check that there is really a valid exception
duke@435	884	__ verify_not_null_oop(rax);
duke@435	885
duke@435	886	// load throwing pc: this is the return address of the stub
never@739	887	__ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size));
duke@435	888
duke@435	889	#ifdef ASSERT
duke@435	890	// check that fields in JavaThread for exception oop and issuing pc are empty
duke@435	891	Label oop_empty;
never@739	892	__ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
duke@435	893	__ jcc(Assembler::equal, oop_empty);
duke@435	894	__ stop("exception oop must be empty");
duke@435	895	__ bind(oop_empty);
duke@435	896
duke@435	897	Label pc_empty;
never@739	898	__ cmpptr(Address(thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
duke@435	899	__ jcc(Assembler::equal, pc_empty);
duke@435	900	__ stop("exception pc must be empty");
duke@435	901	__ bind(pc_empty);
duke@435	902	#endif
duke@435	903
duke@435	904	// store exception oop and throwing pc to JavaThread
never@739	905	__ movptr(Address(thread, JavaThread::exception_oop_offset()), rax);
never@739	906	__ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx);
duke@435	907
duke@435	908	restore_live_registers(sasm);
duke@435	909
duke@435	910	__ leave();
never@739	911	__ addptr(rsp, BytesPerWord); // remove return address from stack
duke@435	912
duke@435	913	// Forward the exception directly to deopt blob. We can blow no
duke@435	914	// registers and must leave throwing pc on the stack. A patch may
duke@435	915	// have values live in registers so the entry point with the
duke@435	916	// exception in tls.
duke@435	917	__ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls()));
duke@435	918
duke@435	919	__ bind(L);
duke@435	920	}
duke@435	921
duke@435	922
duke@435	923	// Runtime will return true if the nmethod has been deoptimized during
duke@435	924	// the patching process. In that case we must do a deopt reexecute instead.
duke@435	925
duke@435	926	Label reexecuteEntry, cont;
duke@435	927
never@739	928	__ testptr(rax, rax); // have we deoptimized?
duke@435	929	__ jcc(Assembler::equal, cont); // no
duke@435	930
duke@435	931	// Will reexecute. Proper return address is already on the stack we just restore
duke@435	932	// registers, pop all of our frame but the return address and jump to the deopt blob
duke@435	933	restore_live_registers(sasm);
duke@435	934	__ leave();
duke@435	935	__ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
duke@435	936
duke@435	937	__ bind(cont);
duke@435	938	restore_live_registers(sasm);
duke@435	939	__ leave();
duke@435	940	__ ret(0);
duke@435	941
duke@435	942	return oop_maps;
duke@435	943
duke@435	944	}
duke@435	945
duke@435	946
duke@435	947	OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
duke@435	948
duke@435	949	// for better readability
duke@435	950	const bool must_gc_arguments = true;
duke@435	951	const bool dont_gc_arguments = false;
duke@435	952
duke@435	953	// default value; overwritten for some optimized stubs that are called from methods that do not use the fpu
duke@435	954	bool save_fpu_registers = true;
duke@435	955
duke@435	956	// stub code & info for the different stubs
duke@435	957	OopMapSet* oop_maps = NULL;
duke@435	958	switch (id) {
duke@435	959	case forward_exception_id:
duke@435	960	{
duke@435	961	// we're handling an exception in the context of a compiled
duke@435	962	// frame. The registers have been saved in the standard
duke@435	963	// places. Perform an exception lookup in the caller and
duke@435	964	// dispatch to the handler if found. Otherwise unwind and
duke@435	965	// dispatch to the callers exception handler.
duke@435	966
never@739	967	const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
duke@435	968	const Register exception_oop = rax;
duke@435	969	const Register exception_pc = rdx;
duke@435	970
duke@435	971	// load pending exception oop into rax,
never@739	972	__ movptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
duke@435	973	// clear pending exception
xlu@947	974	__ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
duke@435	975
duke@435	976	// load issuing PC (the return address for this stub) into rdx
never@739	977	__ movptr(exception_pc, Address(rbp, 1*BytesPerWord));
duke@435	978
duke@435	979	// make sure that the vm_results are cleared (may be unnecessary)
xlu@947	980	__ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
xlu@947	981	__ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
duke@435	982
duke@435	983	// verify that that there is really a valid exception in rax,
duke@435	984	__ verify_not_null_oop(exception_oop);
duke@435	985
duke@435	986
duke@435	987	oop_maps = new OopMapSet();
duke@435	988	OopMap* oop_map = generate_oop_map(sasm, 1);
duke@435	989	generate_handle_exception(sasm, oop_maps, oop_map);
duke@435	990	__ stop("should not reach here");
duke@435	991	}
duke@435	992	break;
duke@435	993
duke@435	994	case new_instance_id:
duke@435	995	case fast_new_instance_id:
duke@435	996	case fast_new_instance_init_check_id:
duke@435	997	{
duke@435	998	Register klass = rdx; // Incoming
duke@435	999	Register obj = rax; // Result
duke@435	1000
duke@435	1001	if (id == new_instance_id) {
duke@435	1002	__ set_info("new_instance", dont_gc_arguments);
duke@435	1003	} else if (id == fast_new_instance_id) {
duke@435	1004	__ set_info("fast new_instance", dont_gc_arguments);
duke@435	1005	} else {
duke@435	1006	assert(id == fast_new_instance_init_check_id, "bad StubID");
duke@435	1007	__ set_info("fast new_instance init check", dont_gc_arguments);
duke@435	1008	}
duke@435	1009
duke@435	1010	if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) &&
duke@435	1011	UseTLAB && FastTLABRefill) {
duke@435	1012	Label slow_path;
duke@435	1013	Register obj_size = rcx;
duke@435	1014	Register t1 = rbx;
duke@435	1015	Register t2 = rsi;
duke@435	1016	assert_different_registers(klass, obj, obj_size, t1, t2);
duke@435	1017
never@739	1018	__ push(rdi);
never@739	1019	__ push(rbx);
duke@435	1020
duke@435	1021	if (id == fast_new_instance_init_check_id) {
duke@435	1022	// make sure the klass is initialized
duke@435	1023	__ cmpl(Address(klass, instanceKlass::init_state_offset_in_bytes() + sizeof(oopDesc)), instanceKlass::fully_initialized);
duke@435	1024	__ jcc(Assembler::notEqual, slow_path);
duke@435	1025	}
duke@435	1026
duke@435	1027	#ifdef ASSERT
duke@435	1028	// assert object can be fast path allocated
duke@435	1029	{
duke@435	1030	Label ok, not_ok;
duke@435	1031	__ movl(obj_size, Address(klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc)));
duke@435	1032	__ cmpl(obj_size, 0); // make sure it's an instance (LH > 0)
duke@435	1033	__ jcc(Assembler::lessEqual, not_ok);
duke@435	1034	__ testl(obj_size, Klass::_lh_instance_slow_path_bit);
duke@435	1035	__ jcc(Assembler::zero, ok);
duke@435	1036	__ bind(not_ok);
duke@435	1037	__ stop("assert(can be fast path allocated)");
duke@435	1038	__ should_not_reach_here();
duke@435	1039	__ bind(ok);
duke@435	1040	}
duke@435	1041	#endif // ASSERT
duke@435	1042
duke@435	1043	// if we got here then the TLAB allocation failed, so try
duke@435	1044	// refilling the TLAB or allocating directly from eden.
duke@435	1045	Label retry_tlab, try_eden;
duke@435	1046	__ tlab_refill(retry_tlab, try_eden, slow_path); // does not destroy rdx (klass)
duke@435	1047
duke@435	1048	__ bind(retry_tlab);
duke@435	1049
never@739	1050	// get the instance size (size is postive so movl is fine for 64bit)
duke@435	1051	__ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes()));
duke@435	1052	__ tlab_allocate(obj, obj_size, 0, t1, t2, slow_path);
duke@435	1053	__ initialize_object(obj, klass, obj_size, 0, t1, t2);
duke@435	1054	__ verify_oop(obj);
never@739	1055	__ pop(rbx);
never@739	1056	__ pop(rdi);
duke@435	1057	__ ret(0);
duke@435	1058
duke@435	1059	__ bind(try_eden);
never@739	1060	// get the instance size (size is postive so movl is fine for 64bit)
duke@435	1061	__ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes()));
duke@435	1062	__ eden_allocate(obj, obj_size, 0, t1, slow_path);
duke@435	1063	__ initialize_object(obj, klass, obj_size, 0, t1, t2);
duke@435	1064	__ verify_oop(obj);
never@739	1065	__ pop(rbx);
never@739	1066	__ pop(rdi);
duke@435	1067	__ ret(0);
duke@435	1068
duke@435	1069	__ bind(slow_path);
never@739	1070	__ pop(rbx);
never@739	1071	__ pop(rdi);
duke@435	1072	}
duke@435	1073
duke@435	1074	__ enter();
duke@435	1075	OopMap* map = save_live_registers(sasm, 2);
duke@435	1076	int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
duke@435	1077	oop_maps = new OopMapSet();
duke@435	1078	oop_maps->add_gc_map(call_offset, map);
duke@435	1079	restore_live_registers_except_rax(sasm);
duke@435	1080	__ verify_oop(obj);
duke@435	1081	__ leave();
duke@435	1082	__ ret(0);
duke@435	1083
duke@435	1084	// rax,: new instance
duke@435	1085	}
duke@435	1086
duke@435	1087	break;
duke@435	1088
duke@435	1089	#ifdef TIERED
duke@435	1090	case counter_overflow_id:
duke@435	1091	{
duke@435	1092	Register bci = rax;
duke@435	1093	__ enter();
duke@435	1094	OopMap* map = save_live_registers(sasm, 2);
duke@435	1095	// Retrieve bci
duke@435	1096	__ movl(bci, Address(rbp, 2*BytesPerWord));
duke@435	1097	int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci);
duke@435	1098	oop_maps = new OopMapSet();
duke@435	1099	oop_maps->add_gc_map(call_offset, map);
duke@435	1100	restore_live_registers(sasm);
duke@435	1101	__ leave();
duke@435	1102	__ ret(0);
duke@435	1103	}
duke@435	1104	break;
duke@435	1105	#endif // TIERED
duke@435	1106
duke@435	1107	case new_type_array_id:
duke@435	1108	case new_object_array_id:
duke@435	1109	{
duke@435	1110	Register length = rbx; // Incoming
duke@435	1111	Register klass = rdx; // Incoming
duke@435	1112	Register obj = rax; // Result
duke@435	1113
duke@435	1114	if (id == new_type_array_id) {
duke@435	1115	__ set_info("new_type_array", dont_gc_arguments);
duke@435	1116	} else {
duke@435	1117	__ set_info("new_object_array", dont_gc_arguments);
duke@435	1118	}
duke@435	1119
duke@435	1120	#ifdef ASSERT
duke@435	1121	// assert object type is really an array of the proper kind
duke@435	1122	{
duke@435	1123	Label ok;
duke@435	1124	Register t0 = obj;
duke@435	1125	__ movl(t0, Address(klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc)));
duke@435	1126	__ sarl(t0, Klass::_lh_array_tag_shift);
duke@435	1127	int tag = ((id == new_type_array_id)
duke@435	1128	? Klass::_lh_array_tag_type_value
duke@435	1129	: Klass::_lh_array_tag_obj_value);
duke@435	1130	__ cmpl(t0, tag);
duke@435	1131	__ jcc(Assembler::equal, ok);
duke@435	1132	__ stop("assert(is an array klass)");
duke@435	1133	__ should_not_reach_here();
duke@435	1134	__ bind(ok);
duke@435	1135	}
duke@435	1136	#endif // ASSERT
duke@435	1137
duke@435	1138	if (UseTLAB && FastTLABRefill) {
duke@435	1139	Register arr_size = rsi;
duke@435	1140	Register t1 = rcx; // must be rcx for use as shift count
duke@435	1141	Register t2 = rdi;
duke@435	1142	Label slow_path;
duke@435	1143	assert_different_registers(length, klass, obj, arr_size, t1, t2);
duke@435	1144
duke@435	1145	// check that array length is small enough for fast path.
duke@435	1146	__ cmpl(length, C1_MacroAssembler::max_array_allocation_length);
duke@435	1147	__ jcc(Assembler::above, slow_path);
duke@435	1148
duke@435	1149	// if we got here then the TLAB allocation failed, so try
duke@435	1150	// refilling the TLAB or allocating directly from eden.
duke@435	1151	Label retry_tlab, try_eden;
duke@435	1152	__ tlab_refill(retry_tlab, try_eden, slow_path); // preserves rbx, & rdx
duke@435	1153
duke@435	1154	__ bind(retry_tlab);
duke@435	1155
duke@435	1156	// get the allocation size: round_up(hdr + length << (layout_helper & 0x1F))
never@739	1157	// since size is postive movl does right thing on 64bit
duke@435	1158	__ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes()));
never@739	1159	// since size is postive movl does right thing on 64bit
duke@435	1160	__ movl(arr_size, length);
duke@435	1161	assert(t1 == rcx, "fixed register usage");
never@739	1162	__ shlptr(arr_size /* by t1=rcx, mod 32 */);
never@739	1163	__ shrptr(t1, Klass::_lh_header_size_shift);
never@739	1164	__ andptr(t1, Klass::_lh_header_size_mask);
never@739	1165	__ addptr(arr_size, t1);
never@739	1166	__ addptr(arr_size, MinObjAlignmentInBytesMask); // align up
never@739	1167	__ andptr(arr_size, ~MinObjAlignmentInBytesMask);
duke@435	1168
duke@435	1169	__ tlab_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size
duke@435	1170
duke@435	1171	__ initialize_header(obj, klass, length, t1, t2);
duke@435	1172	__ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte)));
duke@435	1173	assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
duke@435	1174	assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise");
never@739	1175	__ andptr(t1, Klass::_lh_header_size_mask);
never@739	1176	__ subptr(arr_size, t1); // body length
never@739	1177	__ addptr(t1, obj); // body start
duke@435	1178	__ initialize_body(t1, arr_size, 0, t2);
duke@435	1179	__ verify_oop(obj);
duke@435	1180	__ ret(0);
duke@435	1181
duke@435	1182	__ bind(try_eden);
duke@435	1183	// get the allocation size: round_up(hdr + length << (layout_helper & 0x1F))
never@739	1184	// since size is postive movl does right thing on 64bit
duke@435	1185	__ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes()));
never@739	1186	// since size is postive movl does right thing on 64bit
duke@435	1187	__ movl(arr_size, length);
duke@435	1188	assert(t1 == rcx, "fixed register usage");
never@739	1189	__ shlptr(arr_size /* by t1=rcx, mod 32 */);
never@739	1190	__ shrptr(t1, Klass::_lh_header_size_shift);
never@739	1191	__ andptr(t1, Klass::_lh_header_size_mask);
never@739	1192	__ addptr(arr_size, t1);
never@739	1193	__ addptr(arr_size, MinObjAlignmentInBytesMask); // align up
never@739	1194	__ andptr(arr_size, ~MinObjAlignmentInBytesMask);
duke@435	1195
duke@435	1196	__ eden_allocate(obj, arr_size, 0, t1, slow_path); // preserves arr_size
duke@435	1197
duke@435	1198	__ initialize_header(obj, klass, length, t1, t2);
duke@435	1199	__ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte)));
duke@435	1200	assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
duke@435	1201	assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise");
never@739	1202	__ andptr(t1, Klass::_lh_header_size_mask);
never@739	1203	__ subptr(arr_size, t1); // body length
never@739	1204	__ addptr(t1, obj); // body start
duke@435	1205	__ initialize_body(t1, arr_size, 0, t2);
duke@435	1206	__ verify_oop(obj);
duke@435	1207	__ ret(0);
duke@435	1208
duke@435	1209	__ bind(slow_path);
duke@435	1210	}
duke@435	1211
duke@435	1212	__ enter();
duke@435	1213	OopMap* map = save_live_registers(sasm, 3);
duke@435	1214	int call_offset;
duke@435	1215	if (id == new_type_array_id) {
duke@435	1216	call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length);
duke@435	1217	} else {
duke@435	1218	call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length);
duke@435	1219	}
duke@435	1220
duke@435	1221	oop_maps = new OopMapSet();
duke@435	1222	oop_maps->add_gc_map(call_offset, map);
duke@435	1223	restore_live_registers_except_rax(sasm);
duke@435	1224
duke@435	1225	__ verify_oop(obj);
duke@435	1226	__ leave();
duke@435	1227	__ ret(0);
duke@435	1228
duke@435	1229	// rax,: new array
duke@435	1230	}
duke@435	1231	break;
duke@435	1232
duke@435	1233	case new_multi_array_id:
duke@435	1234	{ StubFrame f(sasm, "new_multi_array", dont_gc_arguments);
duke@435	1235	// rax,: klass
duke@435	1236	// rbx,: rank
duke@435	1237	// rcx: address of 1st dimension
duke@435	1238	OopMap* map = save_live_registers(sasm, 4);
duke@435	1239	int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx);
duke@435	1240
duke@435	1241	oop_maps = new OopMapSet();
duke@435	1242	oop_maps->add_gc_map(call_offset, map);
duke@435	1243	restore_live_registers_except_rax(sasm);
duke@435	1244
duke@435	1245	// rax,: new multi array
duke@435	1246	__ verify_oop(rax);
duke@435	1247	}
duke@435	1248	break;
duke@435	1249
duke@435	1250	case register_finalizer_id:
duke@435	1251	{
duke@435	1252	__ set_info("register_finalizer", dont_gc_arguments);
duke@435	1253
never@739	1254	// This is called via call_runtime so the arguments
never@739	1255	// will be place in C abi locations
never@739	1256
never@739	1257	#ifdef _LP64
never@739	1258	__ verify_oop(c_rarg0);
never@739	1259	__ mov(rax, c_rarg0);
never@739	1260	#else
duke@435	1261	// The object is passed on the stack and we haven't pushed a
duke@435	1262	// frame yet so it's one work away from top of stack.
never@739	1263	__ movptr(rax, Address(rsp, 1 * BytesPerWord));
duke@435	1264	__ verify_oop(rax);
never@739	1265	#endif // _LP64
duke@435	1266
duke@435	1267	// load the klass and check the has finalizer flag
duke@435	1268	Label register_finalizer;
duke@435	1269	Register t = rsi;
never@739	1270	__ movptr(t, Address(rax, oopDesc::klass_offset_in_bytes()));
duke@435	1271	__ movl(t, Address(t, Klass::access_flags_offset_in_bytes() + sizeof(oopDesc)));
duke@435	1272	__ testl(t, JVM_ACC_HAS_FINALIZER);
duke@435	1273	__ jcc(Assembler::notZero, register_finalizer);
duke@435	1274	__ ret(0);
duke@435	1275
duke@435	1276	__ bind(register_finalizer);
duke@435	1277	__ enter();
duke@435	1278	OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */);
duke@435	1279	int call_offset = __ call_RT(noreg, noreg,
duke@435	1280	CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax);
duke@435	1281	oop_maps = new OopMapSet();
duke@435	1282	oop_maps->add_gc_map(call_offset, oop_map);
duke@435	1283
duke@435	1284	// Now restore all the live registers
duke@435	1285	restore_live_registers(sasm);
duke@435	1286
duke@435	1287	__ leave();
duke@435	1288	__ ret(0);
duke@435	1289	}
duke@435	1290	break;
duke@435	1291
duke@435	1292	case throw_range_check_failed_id:
duke@435	1293	{ StubFrame f(sasm, "range_check_failed", dont_gc_arguments);
duke@435	1294	oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
duke@435	1295	}
duke@435	1296	break;
duke@435	1297
duke@435	1298	case throw_index_exception_id:
duke@435	1299	{ StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments);
duke@435	1300	oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
duke@435	1301	}
duke@435	1302	break;
duke@435	1303
duke@435	1304	case throw_div0_exception_id:
duke@435	1305	{ StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments);
duke@435	1306	oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
duke@435	1307	}
duke@435	1308	break;
duke@435	1309
duke@435	1310	case throw_null_pointer_exception_id:
duke@435	1311	{ StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments);
duke@435	1312	oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
duke@435	1313	}
duke@435	1314	break;
duke@435	1315
duke@435	1316	case handle_exception_nofpu_id:
duke@435	1317	save_fpu_registers = false;
duke@435	1318	// fall through
duke@435	1319	case handle_exception_id:
duke@435	1320	{ StubFrame f(sasm, "handle_exception", dont_gc_arguments);
duke@435	1321	oop_maps = new OopMapSet();
duke@435	1322	OopMap* oop_map = save_live_registers(sasm, 1, save_fpu_registers);
duke@435	1323	generate_handle_exception(sasm, oop_maps, oop_map, save_fpu_registers);
duke@435	1324	}
duke@435	1325	break;
duke@435	1326
duke@435	1327	case unwind_exception_id:
duke@435	1328	{ __ set_info("unwind_exception", dont_gc_arguments);
duke@435	1329	// note: no stubframe since we are about to leave the current
duke@435	1330	// activation and we are calling a leaf VM function only.
duke@435	1331	generate_unwind_exception(sasm);
duke@435	1332	}
duke@435	1333	break;
duke@435	1334
duke@435	1335	case throw_array_store_exception_id:
duke@435	1336	{ StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments);
duke@435	1337	// tos + 0: link
duke@435	1338	// + 1: return address
duke@435	1339	oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), false);
duke@435	1340	}
duke@435	1341	break;
duke@435	1342
duke@435	1343	case throw_class_cast_exception_id:
duke@435	1344	{ StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments);
duke@435	1345	oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
duke@435	1346	}
duke@435	1347	break;
duke@435	1348
duke@435	1349	case throw_incompatible_class_change_error_id:
duke@435	1350	{ StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments);
duke@435	1351	oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
duke@435	1352	}
duke@435	1353	break;
duke@435	1354
duke@435	1355	case slow_subtype_check_id:
duke@435	1356	{
duke@435	1357	enum layout {
never@739	1358	rax_off, SLOT2(raxH_off)
never@739	1359	rcx_off, SLOT2(rcxH_off)
never@739	1360	rsi_off, SLOT2(rsiH_off)
never@739	1361	rdi_off, SLOT2(rdiH_off)
never@739	1362	// saved_rbp_off, SLOT2(saved_rbpH_off)
never@739	1363	return_off, SLOT2(returnH_off)
never@739	1364	sub_off, SLOT2(subH_off)
never@739	1365	super_off, SLOT2(superH_off)
duke@435	1366	framesize
duke@435	1367	};
duke@435	1368
duke@435	1369	__ set_info("slow_subtype_check", dont_gc_arguments);
never@739	1370	__ push(rdi);
never@739	1371	__ push(rsi);
never@739	1372	__ push(rcx);
never@739	1373	__ push(rax);
duke@435	1374
never@739	1375	// This is called by pushing args and not with C abi
never@739	1376	__ movptr(rsi, Address(rsp, (super_off) * VMRegImpl::stack_slot_size)); // super
never@739	1377	__ movptr(rax, Address(rsp, (sub_off ) * VMRegImpl::stack_slot_size)); // sub
never@739	1378
never@739	1379	__ movptr(rdi,Address(rsi,sizeof(oopDesc) + Klass::secondary_supers_offset_in_bytes()));
never@739	1380	// since size is postive movl does right thing on 64bit
never@739	1381	__ movl(rcx, Address(rdi, arrayOopDesc::length_offset_in_bytes()));
never@739	1382	__ addptr(rdi, arrayOopDesc::base_offset_in_bytes(T_OBJECT));
duke@435	1383
duke@435	1384	Label miss;
duke@435	1385	__ repne_scan();
duke@435	1386	__ jcc(Assembler::notEqual, miss);
never@739	1387	__ movptr(Address(rsi,sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes()), rax);
never@739	1388	__ movptr(Address(rsp, (super_off) * VMRegImpl::stack_slot_size), 1); // result
never@739	1389	__ pop(rax);
never@739	1390	__ pop(rcx);
never@739	1391	__ pop(rsi);
never@739	1392	__ pop(rdi);
duke@435	1393	__ ret(0);
duke@435	1394
duke@435	1395	__ bind(miss);
xlu@968	1396	__ movptr(Address(rsp, (super_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result
never@739	1397	__ pop(rax);
never@739	1398	__ pop(rcx);
never@739	1399	__ pop(rsi);
never@739	1400	__ pop(rdi);
duke@435	1401	__ ret(0);
duke@435	1402	}
duke@435	1403	break;
duke@435	1404
duke@435	1405	case monitorenter_nofpu_id:
duke@435	1406	save_fpu_registers = false;
duke@435	1407	// fall through
duke@435	1408	case monitorenter_id:
duke@435	1409	{
duke@435	1410	StubFrame f(sasm, "monitorenter", dont_gc_arguments);
duke@435	1411	OopMap* map = save_live_registers(sasm, 3, save_fpu_registers);
duke@435	1412
never@739	1413	// Called with store_parameter and not C abi
never@739	1414
duke@435	1415	f.load_argument(1, rax); // rax,: object
duke@435	1416	f.load_argument(0, rbx); // rbx,: lock address
duke@435	1417
duke@435	1418	int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx);
duke@435	1419
duke@435	1420	oop_maps = new OopMapSet();
duke@435	1421	oop_maps->add_gc_map(call_offset, map);
duke@435	1422	restore_live_registers(sasm, save_fpu_registers);
duke@435	1423	}
duke@435	1424	break;
duke@435	1425
duke@435	1426	case monitorexit_nofpu_id:
duke@435	1427	save_fpu_registers = false;
duke@435	1428	// fall through
duke@435	1429	case monitorexit_id:
duke@435	1430	{
duke@435	1431	StubFrame f(sasm, "monitorexit", dont_gc_arguments);
duke@435	1432	OopMap* map = save_live_registers(sasm, 2, save_fpu_registers);
duke@435	1433
never@739	1434	// Called with store_parameter and not C abi
never@739	1435
duke@435	1436	f.load_argument(0, rax); // rax,: lock address
duke@435	1437
duke@435	1438	// note: really a leaf routine but must setup last java sp
duke@435	1439	// => use call_RT for now (speed can be improved by
duke@435	1440	// doing last java sp setup manually)
duke@435	1441	int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax);
duke@435	1442
duke@435	1443	oop_maps = new OopMapSet();
duke@435	1444	oop_maps->add_gc_map(call_offset, map);
duke@435	1445	restore_live_registers(sasm, save_fpu_registers);
duke@435	1446
duke@435	1447	}
duke@435	1448	break;
duke@435	1449
duke@435	1450	case access_field_patching_id:
duke@435	1451	{ StubFrame f(sasm, "access_field_patching", dont_gc_arguments);
duke@435	1452	// we should set up register map
duke@435	1453	oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
duke@435	1454	}
duke@435	1455	break;
duke@435	1456
duke@435	1457	case load_klass_patching_id:
duke@435	1458	{ StubFrame f(sasm, "load_klass_patching", dont_gc_arguments);
duke@435	1459	// we should set up register map
duke@435	1460	oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
duke@435	1461	}
duke@435	1462	break;
duke@435	1463
duke@435	1464	case jvmti_exception_throw_id:
duke@435	1465	{ // rax,: exception oop
duke@435	1466	StubFrame f(sasm, "jvmti_exception_throw", dont_gc_arguments);
duke@435	1467	// Preserve all registers across this potentially blocking call
duke@435	1468	const int num_rt_args = 2; // thread, exception oop
duke@435	1469	OopMap* map = save_live_registers(sasm, num_rt_args);
duke@435	1470	int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, Runtime1::post_jvmti_exception_throw), rax);
duke@435	1471	oop_maps = new OopMapSet();
duke@435	1472	oop_maps->add_gc_map(call_offset, map);
duke@435	1473	restore_live_registers(sasm);
duke@435	1474	}
duke@435	1475	break;
duke@435	1476
duke@435	1477	case dtrace_object_alloc_id:
duke@435	1478	{ // rax,: object
duke@435	1479	StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments);
duke@435	1480	// we can't gc here so skip the oopmap but make sure that all
duke@435	1481	// the live registers get saved.
duke@435	1482	save_live_registers(sasm, 1);
duke@435	1483
never@739	1484	__ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax));
duke@435	1485	__ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc)));
never@739	1486	NOT_LP64(__ pop(rax));
duke@435	1487
duke@435	1488	restore_live_registers(sasm);
duke@435	1489	}
duke@435	1490	break;
duke@435	1491
duke@435	1492	case fpu2long_stub_id:
duke@435	1493	{
duke@435	1494	// rax, and rdx are destroyed, but should be free since the result is returned there
duke@435	1495	// preserve rsi,ecx
never@739	1496	__ push(rsi);
never@739	1497	__ push(rcx);
never@739	1498	LP64_ONLY(__ push(rdx);)
duke@435	1499
duke@435	1500	// check for NaN
duke@435	1501	Label return0, do_return, return_min_jlong, do_convert;
duke@435	1502
never@739	1503	Address value_high_word(rsp, wordSize + 4);
never@739	1504	Address value_low_word(rsp, wordSize);
never@739	1505	Address result_high_word(rsp, 3*wordSize + 4);
never@739	1506	Address result_low_word(rsp, 3*wordSize);
duke@435	1507
never@739	1508	__ subptr(rsp, 32); // more than enough on 32bit
duke@435	1509	__ fst_d(value_low_word);
duke@435	1510	__ movl(rax, value_high_word);
duke@435	1511	__ andl(rax, 0x7ff00000);
duke@435	1512	__ cmpl(rax, 0x7ff00000);
duke@435	1513	__ jcc(Assembler::notEqual, do_convert);
duke@435	1514	__ movl(rax, value_high_word);
duke@435	1515	__ andl(rax, 0xfffff);
duke@435	1516	__ orl(rax, value_low_word);
duke@435	1517	__ jcc(Assembler::notZero, return0);
duke@435	1518
duke@435	1519	__ bind(do_convert);
duke@435	1520	__ fnstcw(Address(rsp, 0));
never@739	1521	__ movzwl(rax, Address(rsp, 0));
duke@435	1522	__ orl(rax, 0xc00);
duke@435	1523	__ movw(Address(rsp, 2), rax);
duke@435	1524	__ fldcw(Address(rsp, 2));
duke@435	1525	__ fwait();
duke@435	1526	__ fistp_d(result_low_word);
duke@435	1527	__ fldcw(Address(rsp, 0));
duke@435	1528	__ fwait();
never@739	1529	// This gets the entire long in rax on 64bit
never@739	1530	__ movptr(rax, result_low_word);
never@739	1531	// testing of high bits
duke@435	1532	__ movl(rdx, result_high_word);
never@739	1533	__ mov(rcx, rax);
duke@435	1534	// What the heck is the point of the next instruction???
duke@435	1535	__ xorl(rcx, 0x0);
duke@435	1536	__ movl(rsi, 0x80000000);
duke@435	1537	__ xorl(rsi, rdx);
duke@435	1538	__ orl(rcx, rsi);
duke@435	1539	__ jcc(Assembler::notEqual, do_return);
duke@435	1540	__ fldz();
duke@435	1541	__ fcomp_d(value_low_word);
duke@435	1542	__ fnstsw_ax();
never@739	1543	#ifdef _LP64
never@739	1544	__ testl(rax, 0x4100); // ZF & CF == 0
never@739	1545	__ jcc(Assembler::equal, return_min_jlong);
never@739	1546	#else
duke@435	1547	__ sahf();
duke@435	1548	__ jcc(Assembler::above, return_min_jlong);
never@739	1549	#endif // _LP64
duke@435	1550	// return max_jlong
never@739	1551	#ifndef _LP64
duke@435	1552	__ movl(rdx, 0x7fffffff);
duke@435	1553	__ movl(rax, 0xffffffff);
never@739	1554	#else
never@739	1555	__ mov64(rax, CONST64(0x7fffffffffffffff));
never@739	1556	#endif // _LP64
duke@435	1557	__ jmp(do_return);
duke@435	1558
duke@435	1559	__ bind(return_min_jlong);
never@739	1560	#ifndef _LP64
duke@435	1561	__ movl(rdx, 0x80000000);
duke@435	1562	__ xorl(rax, rax);
never@739	1563	#else
never@739	1564	__ mov64(rax, CONST64(0x8000000000000000));
never@739	1565	#endif // _LP64
duke@435	1566	__ jmp(do_return);
duke@435	1567
duke@435	1568	__ bind(return0);
duke@435	1569	__ fpop();
never@739	1570	#ifndef _LP64
never@739	1571	__ xorptr(rdx,rdx);
never@739	1572	__ xorptr(rax,rax);
never@739	1573	#else
never@739	1574	__ xorptr(rax, rax);
never@739	1575	#endif // _LP64
duke@435	1576
duke@435	1577	__ bind(do_return);
never@739	1578	__ addptr(rsp, 32);
never@739	1579	LP64_ONLY(__ pop(rdx);)
never@739	1580	__ pop(rcx);
never@739	1581	__ pop(rsi);
duke@435	1582	__ ret(0);
duke@435	1583	}
duke@435	1584	break;
duke@435	1585
ysr@777	1586	#ifndef SERIALGC
ysr@777	1587	case g1_pre_barrier_slow_id:
ysr@777	1588	{
ysr@777	1589	StubFrame f(sasm, "g1_pre_barrier", dont_gc_arguments);
ysr@777	1590	// arg0 : previous value of memory
ysr@777	1591
ysr@777	1592	BarrierSet* bs = Universe::heap()->barrier_set();
ysr@777	1593	if (bs->kind() != BarrierSet::G1SATBCTLogging) {
apetrusenko@797	1594	__ movptr(rax, (int)id);
ysr@777	1595	__ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax);
ysr@777	1596	__ should_not_reach_here();
ysr@777	1597	break;
ysr@777	1598	}
ysr@777	1599
apetrusenko@797	1600	__ push(rax);
apetrusenko@797	1601	__ push(rdx);
ysr@777	1602
ysr@777	1603	const Register pre_val = rax;
apetrusenko@797	1604	const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
ysr@777	1605	const Register tmp = rdx;
ysr@777	1606
apetrusenko@797	1607	NOT_LP64(__ get_thread(thread);)
ysr@777	1608
ysr@777	1609	Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() +
ysr@777	1610	PtrQueue::byte_offset_of_active()));
ysr@777	1611
ysr@777	1612	Address queue_index(thread, in_bytes(JavaThread::satb_mark_queue_offset() +
ysr@777	1613	PtrQueue::byte_offset_of_index()));
ysr@777	1614	Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() +
ysr@777	1615	PtrQueue::byte_offset_of_buf()));
ysr@777	1616
ysr@777	1617
ysr@777	1618	Label done;
ysr@777	1619	Label runtime;
ysr@777	1620
ysr@777	1621	// Can we store original value in the thread's buffer?
ysr@777	1622
apetrusenko@797	1623	LP64_ONLY(__ movslq(tmp, queue_index);)
apetrusenko@797	1624	#ifdef _LP64
apetrusenko@797	1625	__ cmpq(tmp, 0);
apetrusenko@797	1626	#else
ysr@777	1627	__ cmpl(queue_index, 0);
apetrusenko@797	1628	#endif
ysr@777	1629	__ jcc(Assembler::equal, runtime);
apetrusenko@797	1630	#ifdef _LP64
apetrusenko@797	1631	__ subq(tmp, wordSize);
apetrusenko@797	1632	__ movl(queue_index, tmp);
apetrusenko@797	1633	__ addq(tmp, buffer);
apetrusenko@797	1634	#else
ysr@777	1635	__ subl(queue_index, wordSize);
ysr@777	1636	__ movl(tmp, buffer);
ysr@777	1637	__ addl(tmp, queue_index);
apetrusenko@797	1638	#endif
apetrusenko@797	1639
ysr@777	1640	// prev_val (rax)
ysr@777	1641	f.load_argument(0, pre_val);
apetrusenko@797	1642	__ movptr(Address(tmp, 0), pre_val);
ysr@777	1643	__ jmp(done);
ysr@777	1644
ysr@777	1645	__ bind(runtime);
ysr@777	1646	// load the pre-value
apetrusenko@797	1647	__ push(rcx);
ysr@777	1648	f.load_argument(0, rcx);
ysr@777	1649	__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), rcx, thread);
apetrusenko@797	1650	__ pop(rcx);
ysr@777	1651
ysr@777	1652	__ bind(done);
apetrusenko@797	1653	__ pop(rdx);
apetrusenko@797	1654	__ pop(rax);
ysr@777	1655	}
ysr@777	1656	break;
ysr@777	1657
ysr@777	1658	case g1_post_barrier_slow_id:
ysr@777	1659	{
ysr@777	1660	StubFrame f(sasm, "g1_post_barrier", dont_gc_arguments);
ysr@777	1661
ysr@777	1662
ysr@777	1663	// arg0: store_address
ysr@777	1664	Address store_addr(rbp, 2*BytesPerWord);
ysr@777	1665
ysr@777	1666	BarrierSet* bs = Universe::heap()->barrier_set();
ysr@777	1667	CardTableModRefBS* ct = (CardTableModRefBS*)bs;
ysr@777	1668	Label done;
ysr@777	1669	Label runtime;
ysr@777	1670
ysr@777	1671	// At this point we know new_value is non-NULL and the new_value crosses regsion.
ysr@777	1672	// Must check to see if card is already dirty
ysr@777	1673
apetrusenko@797	1674	const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
ysr@777	1675
ysr@777	1676	Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() +
ysr@777	1677	PtrQueue::byte_offset_of_index()));
ysr@777	1678	Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() +
ysr@777	1679	PtrQueue::byte_offset_of_buf()));
ysr@777	1680
apetrusenko@797	1681	__ push(rax);
apetrusenko@797	1682	__ push(rdx);
ysr@777	1683
apetrusenko@797	1684	NOT_LP64(__ get_thread(thread);)
apetrusenko@797	1685	ExternalAddress cardtable((address)ct->byte_map_base);
ysr@777	1686	assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
ysr@777	1687
apetrusenko@797	1688	const Register card_addr = rdx;
apetrusenko@797	1689	#ifdef _LP64
apetrusenko@797	1690	const Register tmp = rscratch1;
apetrusenko@797	1691	f.load_argument(0, card_addr);
apetrusenko@797	1692	__ shrq(card_addr, CardTableModRefBS::card_shift);
apetrusenko@797	1693	__ lea(tmp, cardtable);
apetrusenko@797	1694	// get the address of the card
apetrusenko@797	1695	__ addq(card_addr, tmp);
apetrusenko@797	1696	#else
apetrusenko@797	1697	const Register card_index = rdx;
apetrusenko@797	1698	f.load_argument(0, card_index);
apetrusenko@797	1699	__ shrl(card_index, CardTableModRefBS::card_shift);
apetrusenko@797	1700
ysr@777	1701	Address index(noreg, card_index, Address::times_1);
ysr@777	1702	__ leal(card_addr, __ as_Address(ArrayAddress(cardtable, index)));
apetrusenko@797	1703	#endif
apetrusenko@797	1704
ysr@777	1705	__ cmpb(Address(card_addr, 0), 0);
ysr@777	1706	__ jcc(Assembler::equal, done);
ysr@777	1707
ysr@777	1708	// storing region crossing non-NULL, card is clean.
ysr@777	1709	// dirty card and log.
ysr@777	1710
ysr@777	1711	__ movb(Address(card_addr, 0), 0);
ysr@777	1712
ysr@777	1713	__ cmpl(queue_index, 0);
ysr@777	1714	__ jcc(Assembler::equal, runtime);
ysr@777	1715	__ subl(queue_index, wordSize);
ysr@777	1716
ysr@777	1717	const Register buffer_addr = rbx;
apetrusenko@797	1718	__ push(rbx);
ysr@777	1719
apetrusenko@797	1720	__ movptr(buffer_addr, buffer);
apetrusenko@797	1721
apetrusenko@797	1722	#ifdef _LP64
apetrusenko@797	1723	__ movslq(rscratch1, queue_index);
apetrusenko@797	1724	__ addptr(buffer_addr, rscratch1);
apetrusenko@797	1725	#else
apetrusenko@797	1726	__ addptr(buffer_addr, queue_index);
apetrusenko@797	1727	#endif
apetrusenko@797	1728	__ movptr(Address(buffer_addr, 0), card_addr);
apetrusenko@797	1729
apetrusenko@797	1730	__ pop(rbx);
ysr@777	1731	__ jmp(done);
ysr@777	1732
ysr@777	1733	__ bind(runtime);
apetrusenko@797	1734	NOT_LP64(__ push(rcx);)
ysr@777	1735	__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread);
apetrusenko@797	1736	NOT_LP64(__ pop(rcx);)
ysr@777	1737
ysr@777	1738	__ bind(done);
apetrusenko@797	1739	__ pop(rdx);
apetrusenko@797	1740	__ pop(rax);
ysr@777	1741
ysr@777	1742	}
ysr@777	1743	break;
ysr@777	1744	#endif // !SERIALGC
ysr@777	1745
duke@435	1746	default:
duke@435	1747	{ StubFrame f(sasm, "unimplemented entry", dont_gc_arguments);
never@739	1748	__ movptr(rax, (int)id);
duke@435	1749	__ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax);
duke@435	1750	__ should_not_reach_here();
duke@435	1751	}
duke@435	1752	break;
duke@435	1753	}
duke@435	1754	return oop_maps;
duke@435	1755	}
duke@435	1756
duke@435	1757	#undef __