Mon, 26 Sep 2016 13:56:18 -0400
Mark changes for 3A2000 only with the Use3A2000 flag.
1.1 --- a/src/cpu/mips/vm/mips_64.ad Mon Sep 26 13:04:07 2016 -0400 1.2 +++ b/src/cpu/mips/vm/mips_64.ad Mon Sep 26 13:56:18 2016 -0400 1.3 @@ -1992,7 +1992,7 @@ 1.4 } 1.5 } 1.6 1.7 - __ sync(); 1.8 + if (Use3A2000) __ sync(); 1.9 %} 1.10 1.11 // Load Short (16bit signed)
2.1 --- a/src/cpu/mips/vm/stubGenerator_mips_64.cpp Mon Sep 26 13:04:07 2016 -0400 2.2 +++ b/src/cpu/mips/vm/stubGenerator_mips_64.cpp Mon Sep 26 13:56:18 2016 -0400 2.3 @@ -1280,7 +1280,7 @@ 2.4 __ move(T0, A1); 2.5 2.6 if (is_oop) { 2.7 - __ sync(); 2.8 + if (Use3A2000) __ sync(); 2.9 } 2.10 2.11 if(!aligned) { 2.12 @@ -1335,7 +1335,7 @@ 2.13 __ move(T0, A1); 2.14 __ move(T1, A2); 2.15 array_store_check(); 2.16 - __ sync(); 2.17 + if (Use3A2000) __ sync(); 2.18 } 2.19 2.20 // exit 2.21 @@ -1397,7 +1397,7 @@ 2.22 // T1: element count 2.23 2.24 if (is_oop) { 2.25 - __ sync(); 2.26 + if (Use3A2000) __ sync(); 2.27 } 2.28 2.29 __ sll(AT, T1, Address::times_4); 2.30 @@ -1424,7 +1424,7 @@ 2.31 __ move(T0, A1); 2.32 __ move(T1, A2); 2.33 array_store_check(); 2.34 - __ sync(); 2.35 + if (Use3A2000) __ sync(); 2.36 } 2.37 __ bind(l_4); 2.38 __ pop(T8); 2.39 @@ -1475,7 +1475,7 @@ 2.40 // T1: element count 2.41 2.42 if (is_oop) { 2.43 - __ sync(); 2.44 + if (Use3A2000) __ sync(); 2.45 } 2.46 2.47 __ beq(T1, R0, l_4); 2.48 @@ -1495,7 +1495,7 @@ 2.49 __ move(T0, A1); 2.50 __ move(T1, A2); 2.51 array_store_check(); 2.52 - __ sync(); 2.53 + if (Use3A2000) __ sync(); 2.54 } 2.55 2.56 // exit 2.57 @@ -1553,7 +1553,7 @@ 2.58 __ move(T0, A1); 2.59 2.60 if (is_oop) { 2.61 - __ sync(); 2.62 + if (Use3A2000) __ sync(); 2.63 } 2.64 2.65 __ sll(AT, T1, Address::times_8); 2.66 @@ -1580,7 +1580,7 @@ 2.67 __ move(T0, A1); 2.68 __ move(T1, A2); 2.69 array_store_check(); 2.70 - __ sync(); 2.71 + if (Use3A2000) __ sync(); 2.72 } 2.73 __ bind(l_4); 2.74 __ pop(T8);
3.1 --- a/src/share/vm/gc_implementation/parallelScavenge/cardTableExtension.hpp Mon Sep 26 13:04:07 2016 -0400 3.2 +++ b/src/share/vm/gc_implementation/parallelScavenge/cardTableExtension.hpp Mon Sep 26 13:56:18 2016 -0400 3.3 @@ -86,11 +86,11 @@ 3.4 void inline_write_ref_field_gc(void* field, oop new_val) { 3.5 jbyte* byte = byte_for(field); 3.6 #ifdef MIPS64 3.7 - OrderAccess::fence(); 3.8 + if (Use3A2000) OrderAccess::fence(); 3.9 #endif 3.10 *byte = youngergen_card; 3.11 #ifdef MIPS64 3.12 - OrderAccess::fence(); 3.13 + if (Use3A2000) OrderAccess::fence(); 3.14 #endif 3.15 } 3.16
4.1 --- a/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.cpp Mon Sep 26 13:04:07 2016 -0400 4.2 +++ b/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.cpp Mon Sep 26 13:56:18 2016 -0400 4.3 @@ -3236,11 +3236,11 @@ 4.4 /* 2016/5/4 Jin: On 3A2000-B, when multiple threads write to 4.5 the same memory location without explict synchronization, 4.6 sync is required for access correctness. */ 4.7 - OrderAccess::fence(); 4.8 + if (Use3A2000) OrderAccess::fence(); 4.9 #endif 4.10 sd.block(cur_block)->set_offset(bitmap->bits_to_words(live_bits)); 4.11 #ifdef MIPS64 4.12 - OrderAccess::fence(); 4.13 + if (Use3A2000) OrderAccess::fence(); 4.14 #endif 4.15 } 4.16
5.1 --- a/src/share/vm/memory/barrierSet.hpp Mon Sep 26 13:04:07 2016 -0400 5.2 +++ b/src/share/vm/memory/barrierSet.hpp Mon Sep 26 13:56:18 2016 -0400 5.3 @@ -98,12 +98,12 @@ 5.4 protected: 5.5 virtual void write_ref_field_pre_work( oop* field, oop new_val) { 5.6 #ifdef MIPS64 5.7 - OrderAccess::fence(); 5.8 + if (Use3A2000) OrderAccess::fence(); 5.9 #endif 5.10 }; 5.11 virtual void write_ref_field_pre_work(narrowOop* field, oop new_val) { 5.12 #ifdef MIPS64 5.13 - OrderAccess::fence(); 5.14 + if (Use3A2000) OrderAccess::fence(); 5.15 #endif 5.16 }; 5.17 public: 5.18 @@ -143,13 +143,13 @@ 5.19 virtual void write_ref_array_pre(oop* dst, int length, 5.20 bool dest_uninitialized = false) { 5.21 #ifdef MIPS64 5.22 - OrderAccess::fence(); 5.23 + if (Use3A2000) OrderAccess::fence(); 5.24 #endif 5.25 } 5.26 virtual void write_ref_array_pre(narrowOop* dst, int length, 5.27 bool dest_uninitialized = false) { 5.28 #ifdef MIPS64 5.29 - OrderAccess::fence(); 5.30 + if (Use3A2000) OrderAccess::fence(); 5.31 #endif 5.32 } 5.33 // Below count is the # array elements being written, starting
6.1 --- a/src/share/vm/memory/cardTableModRefBS.hpp Mon Sep 26 13:04:07 2016 -0400 6.2 +++ b/src/share/vm/memory/cardTableModRefBS.hpp Mon Sep 26 13:56:18 2016 -0400 6.3 @@ -310,7 +310,7 @@ 6.4 inline void inline_write_ref_array(MemRegion mr) { 6.5 dirty_MemRegion(mr); 6.6 #ifdef MIPS64 6.7 - OrderAccess::fence(); 6.8 + if (Use3A2000) OrderAccess::fence(); 6.9 #endif 6.10 } 6.11 protected: 6.12 @@ -327,7 +327,7 @@ 6.13 6.14 template <class T> inline void inline_write_ref_field_pre(T* field, oop newVal) { 6.15 #ifdef MIPS64 6.16 - OrderAccess::fence(); 6.17 + if (Use3A2000) OrderAccess::fence(); 6.18 #endif 6.19 } 6.20 6.21 @@ -340,7 +340,7 @@ 6.22 *byte = dirty_card; 6.23 } 6.24 #ifdef MIPS64 6.25 - OrderAccess::fence(); 6.26 + if (Use3A2000) OrderAccess::fence(); 6.27 #endif 6.28 } 6.29
7.1 --- a/src/share/vm/memory/cardTableRS.cpp Mon Sep 26 13:04:07 2016 -0400 7.2 +++ b/src/share/vm/memory/cardTableRS.cpp Mon Sep 26 13:56:18 2016 -0400 7.3 @@ -252,7 +252,7 @@ 7.4 void CardTableRS::write_ref_field_gc_par(void* field, oop new_val) { 7.5 jbyte* entry = ct_bs()->byte_for(field); 7.6 #ifdef MIPS64 7.7 - OrderAccess::fence(); 7.8 + if (Use3A2000) OrderAccess::fence(); 7.9 #endif 7.10 do { 7.11 jbyte entry_val = *entry; 7.12 @@ -270,7 +270,7 @@ 7.13 // Did the CAS succeed? 7.14 if (res == entry_val) { 7.15 #ifdef MIPS64 7.16 - OrderAccess::fence(); 7.17 + if (Use3A2000) OrderAccess::fence(); 7.18 #endif 7.19 return; 7.20 }
8.1 --- a/src/share/vm/memory/cardTableRS.hpp Mon Sep 26 13:04:07 2016 -0400 8.2 +++ b/src/share/vm/memory/cardTableRS.hpp Mon Sep 26 13:56:18 2016 -0400 8.3 @@ -122,11 +122,11 @@ 8.4 void inline_write_ref_field_gc(void* field, oop new_val) { 8.5 jbyte* byte = _ct_bs->byte_for(field); 8.6 #ifdef MIPS64 8.7 - OrderAccess::fence(); 8.8 + if (Use3A2000) OrderAccess::fence(); 8.9 #endif 8.10 *byte = youngergen_card; 8.11 #ifdef MIPS64 8.12 - OrderAccess::fence(); 8.13 + if (Use3A2000) OrderAccess::fence(); 8.14 #endif 8.15 8.16 }