Mercurial > jdk8-mips64-public > hotspot / changeset

     1.1 --- a/src/cpu/mips/vm/assembler_mips.hpp	Wed Jan 09 14:47:56 2019 +0800
     1.2 +++ b/src/cpu/mips/vm/assembler_mips.hpp	Fri Jan 18 16:12:54 2019 +0800
     1.3 @@ -1673,6 +1673,12 @@
     1.4      emit_long((gs_lwc2_op << 26) | ((int)base->encoding() << 21) | ((int)rt->encoding() << 16) | 0 << 15 | (low(off, 9) << 6) | gslq_op | (int)rq->encoding() );
     1.5    }
     1.6  
     1.7 +  void gslqc1(FloatRegister rq, FloatRegister rt, Register base, int off) {
     1.8 +    off = off >> 4;
     1.9 +    assert(is_simm(off, 9),"gslqc1: off exceeds 9 bits");
    1.10 +    emit_long((gs_lwc2_op << 26) | ((int)base->encoding() << 21) | ((int)rt->encoding() << 16) | 1 << 15 | (low(off, 9) << 6) | gslq_op | (int)rq->encoding() );
    1.11 +  }
    1.12 +
    1.13    void gssble(Register rt, Register base, Register bound) {
    1.14      emit_long((gs_swc2_op << 26) | ((int)base->encoding() << 21) | ((int)rt->encoding() << 16) | ((int)bound->encoding() << 11) | 0 << 6 | gssble_op);
    1.15    }
    1.16 @@ -1727,6 +1733,12 @@
    1.17      emit_long((gs_swc2_op << 26) | ((int)base->encoding() << 21) | ((int)rt->encoding() << 16) | 0 << 15 | (low(off, 9) << 6) | gssq_op | (int)rq->encoding() );
    1.18    }
    1.19  
    1.20 +  void gssqc1(FloatRegister rq, FloatRegister rt, Register base, int off) {
    1.21 +    off = off >> 4;
    1.22 +    assert(is_simm(off, 9),"gssqc1: off exceeds 9 bits");
    1.23 +    emit_long((gs_swc2_op << 26) | ((int)base->encoding() << 21) | ((int)rt->encoding() << 16) | 1 << 15 | (low(off, 9) << 6) | gssq_op | (int)rq->encoding() );
    1.24 +  }
    1.25 +
    1.26    //LDC2 & SDC2
    1.27  #define INSN(OPS, OP) \
    1.28      assert(is_simm(off, 8), "NAME: off exceeds 8 bits");                                           \