Refine the implementation of cmpLTMask_immI0.

Tue, 23 Aug 2016 17:00:34 +0800

author
fujie
date
Tue, 23 Aug 2016 17:00:34 +0800
changeset 99
e7f0a5ffef68
parent 98
020159dcfcff
child 100
3df571586c5f

Refine the implementation of cmpLTMask_immI0.

src/cpu/mips/vm/mips_64.ad file | annotate | diff | comparison | revisions
     1.1 --- a/src/cpu/mips/vm/mips_64.ad	Tue Aug 23 15:23:48 2016 +0800
     1.2 +++ b/src/cpu/mips/vm/mips_64.ad	Tue Aug 23 17:00:34 2016 +0800
     1.3 @@ -9590,15 +9590,16 @@
     1.4    ins_pipe( fpu_regF_regF );
     1.5  %}
     1.6  
     1.7 -instruct cmpLTMask_immI0( mRegI dst, immI0 zero ) %{
     1.8 -  match(Set dst (CmpLTMask dst zero));
     1.9 +instruct cmpLTMask_immI0( mRegI dst, mRegI p, immI0 zero ) %{
    1.10 +  match(Set dst (CmpLTMask p zero));
    1.11    ins_cost(100);
    1.12  
    1.13 -  format %{ "sra    $dst, 31 @ cmpLTMask_immI0" %}
    1.14 +  format %{ "sra    $dst, $p, 31 @ cmpLTMask_immI0" %}
    1.15      ins_encode %{
    1.16 +       Register src = $p$$Register;
    1.17         Register dst = $dst$$Register;
    1.18  
    1.19 -       __ sra(dst, dst, 31);
    1.20 +       __ sra(dst, src, 31);
    1.21      %}
    1.22      ins_pipe( pipe_slow );
    1.23  %}

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