Merge

Fri, 14 Feb 2014 17:57:17 +0000

author
coffeys
date
Fri, 14 Feb 2014 17:57:17 +0000
changeset 6300
dd13ef903817
parent 6274
757fe22ae906
parent 6299
1dbaf664a611
child 6301
abdce12c4543

Merge

.hgtags file | annotate | diff | comparison | revisions
make/hotspot_version file | annotate | diff | comparison | revisions
     1.1 --- a/.hgtags	Tue Feb 11 08:49:38 2014 -0800
     1.2 +++ b/.hgtags	Fri Feb 14 17:57:17 2014 +0000
     1.3 @@ -412,6 +412,14 @@
     1.4  c89630a122b43d0eabd78b74f6498a1c3cf04ca3 hs25.20-b00
     1.5  9b9816164447214f21b06ccf646893c281c76a42 hs25-b66
     1.6  df333ee12bba67e2e928f8ce1da37afd9bf95b48 jdk8-b124
     1.7 +3585183c191aa6b4d0375ea659515335e1804417 hs25-b67
     1.8 +df333ee12bba67e2e928f8ce1da37afd9bf95b48 jdk8-b125
     1.9 +c8218f1072a0370f3ce4714469ced0613ee543ab jdk8-b126
    1.10 +d45454002494d147c0761e6b37d8a73064f3cf92 hs25-b68
    1.11 +32f017489ba5dd1bedabb9fa1d26bcc74d0a72b6 hs25-b69
    1.12 +35038da7bb9ddd367a0a6bf926dfb281aee1d554 jdk8-b127
    1.13 +874c0b4a946c362bbf20d37c2a564b39093152e6 jdk8-b128
    1.14 +cb39165c4a65bbff8db356df411e762f9e5423b8 jdk8-b129
    1.15  412d3b5fe90e54c0ff9d9ac7374b98607c561d5a hs25.20-b01
    1.16  4638c4d7ff106db0f29ef7f18b128dd7e69bc470 hs25.20-b02
    1.17  e56d11f8cc2158d4280f80e56d196193349c150a hs25.20-b03
     2.1 --- a/src/cpu/sparc/vm/sparc.ad	Tue Feb 11 08:49:38 2014 -0800
     2.2 +++ b/src/cpu/sparc/vm/sparc.ad	Fri Feb 14 17:57:17 2014 +0000
     2.3 @@ -3355,8 +3355,8 @@
     2.4    interface(CONST_INTER);
     2.5  %}
     2.6  
     2.7 -// Unsigned (positive) Integer Immediate: 13-bit
     2.8 -operand immU13() %{
     2.9 +// Unsigned Integer Immediate: 12-bit (non-negative that fits in simm13)
    2.10 +operand immU12() %{
    2.11    predicate((0 <= n->get_int()) && Assembler::is_simm13(n->get_int()));
    2.12    match(ConI);
    2.13    op_cost(0);
    2.14 @@ -3392,6 +3392,17 @@
    2.15    interface(CONST_INTER);
    2.16  %}
    2.17  
    2.18 +// Int Immediate non-negative
    2.19 +operand immU31()
    2.20 +%{
    2.21 +  predicate(n->get_int() >= 0);
    2.22 +  match(ConI);
    2.23 +
    2.24 +  op_cost(0);
    2.25 +  format %{ %}
    2.26 +  interface(CONST_INTER);
    2.27 +%}
    2.28 +
    2.29  // Integer Immediate: 0-bit
    2.30  operand immI0() %{
    2.31    predicate(n->get_int() == 0);
    2.32 @@ -5720,7 +5731,6 @@
    2.33    effect(TEMP dst, TEMP tmp);
    2.34    ins_cost(MEMORY_REF_COST + 2*DEFAULT_COST);
    2.35  
    2.36 -  size((3+1)*4);  // set may use two instructions.
    2.37    format %{ "LDUH   $mem,$dst\t! ushort/char & 16-bit mask -> long\n\t"
    2.38              "SET    $mask,$tmp\n\t"
    2.39              "AND    $dst,$tmp,$dst" %}
    2.40 @@ -5842,13 +5852,13 @@
    2.41    ins_pipe(iload_mem);
    2.42  %}
    2.43  
    2.44 -// Load Integer with a 13-bit mask into a Long Register
    2.45 -instruct loadI2L_immI13(iRegL dst, memory mem, immI13 mask) %{
    2.46 +// Load Integer with a 12-bit mask into a Long Register
    2.47 +instruct loadI2L_immU12(iRegL dst, memory mem, immU12 mask) %{
    2.48    match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
    2.49    ins_cost(MEMORY_REF_COST + DEFAULT_COST);
    2.50  
    2.51    size(2*4);
    2.52 -  format %{ "LDUW   $mem,$dst\t! int & 13-bit mask -> long\n\t"
    2.53 +  format %{ "LDUW   $mem,$dst\t! int & 12-bit mask -> long\n\t"
    2.54              "AND    $dst,$mask,$dst" %}
    2.55    ins_encode %{
    2.56      Register Rdst = $dst$$Register;
    2.57 @@ -5858,14 +5868,13 @@
    2.58    ins_pipe(iload_mem);
    2.59  %}
    2.60  
    2.61 -// Load Integer with a 32-bit mask into a Long Register
    2.62 -instruct loadI2L_immI(iRegL dst, memory mem, immI mask, iRegL tmp) %{
    2.63 +// Load Integer with a 31-bit mask into a Long Register
    2.64 +instruct loadI2L_immU31(iRegL dst, memory mem, immU31 mask, iRegL tmp) %{
    2.65    match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
    2.66    effect(TEMP dst, TEMP tmp);
    2.67    ins_cost(MEMORY_REF_COST + 2*DEFAULT_COST);
    2.68  
    2.69 -  size((3+1)*4);  // set may use two instructions.
    2.70 -  format %{ "LDUW   $mem,$dst\t! int & 32-bit mask -> long\n\t"
    2.71 +  format %{ "LDUW   $mem,$dst\t! int & 31-bit mask -> long\n\t"
    2.72              "SET    $mask,$tmp\n\t"
    2.73              "AND    $dst,$tmp,$dst" %}
    2.74    ins_encode %{
    2.75 @@ -8960,7 +8969,7 @@
    2.76    ins_pipe(ialu_cconly_reg_reg);
    2.77  %}
    2.78  
    2.79 -instruct compU_iReg_imm13(flagsRegU icc, iRegI op1, immU13 op2 ) %{
    2.80 +instruct compU_iReg_imm13(flagsRegU icc, iRegI op1, immU12 op2 ) %{
    2.81    match(Set icc (CmpU op1 op2));
    2.82  
    2.83    size(4);
     3.1 --- a/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp	Tue Feb 11 08:49:38 2014 -0800
     3.2 +++ b/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp	Fri Feb 14 17:57:17 2014 +0000
     3.3 @@ -38,6 +38,7 @@
     3.4  #include "nativeInst_x86.hpp"
     3.5  #include "oops/objArrayKlass.hpp"
     3.6  #include "runtime/sharedRuntime.hpp"
     3.7 +#include "vmreg_x86.inline.hpp"
     3.8  
     3.9  
    3.10  // These masks are used to provide 128-bit aligned bitmasks to the XMM
    3.11 @@ -1006,6 +1007,9 @@
    3.12      if (UseCompressedOops && !wide) {
    3.13        __ movptr(compressed_src, src->as_register());
    3.14        __ encode_heap_oop(compressed_src);
    3.15 +      if (patch_code != lir_patch_none) {
    3.16 +        info->oop_map()->set_narrowoop(compressed_src->as_VMReg());
    3.17 +      }
    3.18      }
    3.19  #endif
    3.20    }
     4.1 --- a/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp	Tue Feb 11 08:49:38 2014 -0800
     4.2 +++ b/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp	Fri Feb 14 17:57:17 2014 +0000
     4.3 @@ -941,6 +941,8 @@
     4.4      case vmIntrinsics::_updateCRC32: {
     4.5        LIRItem crc(x->argument_at(0), this);
     4.6        LIRItem val(x->argument_at(1), this);
     4.7 +      // val is destroyed by update_crc32
     4.8 +      val.set_destroys_register();
     4.9        crc.load_item();
    4.10        val.load_item();
    4.11        __ update_crc32(crc.result(), val.result(), result);
     5.1 --- a/src/cpu/x86/vm/x86_32.ad	Tue Feb 11 08:49:38 2014 -0800
     5.2 +++ b/src/cpu/x86/vm/x86_32.ad	Fri Feb 14 17:57:17 2014 +0000
     5.3 @@ -3889,6 +3889,17 @@
     5.4    interface(CONST_INTER);
     5.5  %}
     5.6  
     5.7 +// Int Immediate non-negative
     5.8 +operand immU31()
     5.9 +%{
    5.10 +  predicate(n->get_int() >= 0);
    5.11 +  match(ConI);
    5.12 +
    5.13 +  op_cost(0);
    5.14 +  format %{ %}
    5.15 +  interface(CONST_INTER);
    5.16 +%}
    5.17 +
    5.18  // Constant for long shifts
    5.19  operand immI_32() %{
    5.20    predicate( n->get_int() == 32 );
    5.21 @@ -6119,12 +6130,12 @@
    5.22    ins_pipe(ialu_reg_mem);
    5.23  %}
    5.24  
    5.25 -// Load Integer with 32-bit mask into Long Register
    5.26 -instruct loadI2L_immI(eRegL dst, memory mem, immI mask, eFlagsReg cr) %{
    5.27 +// Load Integer with 31-bit mask into Long Register
    5.28 +instruct loadI2L_immU31(eRegL dst, memory mem, immU31 mask, eFlagsReg cr) %{
    5.29    match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
    5.30    effect(KILL cr);
    5.31  
    5.32 -  format %{ "MOV    $dst.lo,$mem\t# int & 32-bit mask -> long\n\t"
    5.33 +  format %{ "MOV    $dst.lo,$mem\t# int & 31-bit mask -> long\n\t"
    5.34              "XOR    $dst.hi,$dst.hi\n\t"
    5.35              "AND    $dst.lo,$mask" %}
    5.36    ins_encode %{
     6.1 --- a/src/cpu/x86/vm/x86_64.ad	Tue Feb 11 08:49:38 2014 -0800
     6.2 +++ b/src/cpu/x86/vm/x86_64.ad	Fri Feb 14 17:57:17 2014 +0000
     6.3 @@ -3086,6 +3086,17 @@
     6.4    interface(CONST_INTER);
     6.5  %}
     6.6  
     6.7 +// Int Immediate non-negative
     6.8 +operand immU31()
     6.9 +%{
    6.10 +  predicate(n->get_int() >= 0);
    6.11 +  match(ConI);
    6.12 +
    6.13 +  op_cost(0);
    6.14 +  format %{ %}
    6.15 +  interface(CONST_INTER);
    6.16 +%}
    6.17 +
    6.18  // Constant for long shifts
    6.19  operand immI_32()
    6.20  %{
    6.21 @@ -5042,12 +5053,12 @@
    6.22    ins_pipe(ialu_reg_mem);
    6.23  %}
    6.24  
    6.25 -// Load Integer with a 32-bit mask into Long Register
    6.26 -instruct loadI2L_immI(rRegL dst, memory mem, immI mask, rFlagsReg cr) %{
    6.27 +// Load Integer with a 31-bit mask into Long Register
    6.28 +instruct loadI2L_immU31(rRegL dst, memory mem, immU31 mask, rFlagsReg cr) %{
    6.29    match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
    6.30    effect(KILL cr);
    6.31  
    6.32 -  format %{ "movl    $dst, $mem\t# int & 32-bit mask -> long\n\t"
    6.33 +  format %{ "movl    $dst, $mem\t# int & 31-bit mask -> long\n\t"
    6.34              "andl    $dst, $mask" %}
    6.35    ins_encode %{
    6.36      Register Rdst = $dst$$Register;
     7.1 --- a/src/share/vm/code/dependencies.cpp	Tue Feb 11 08:49:38 2014 -0800
     7.2 +++ b/src/share/vm/code/dependencies.cpp	Fri Feb 14 17:57:17 2014 +0000
     7.3 @@ -1161,11 +1161,9 @@
     7.4  
     7.5    // We could also return false if m does not yet appear to be
     7.6    // executed, if the VM version supports this distinction also.
     7.7 +  // Default methods are considered "concrete" as well.
     7.8    return !m->is_abstract() &&
     7.9 -         !InstanceKlass::cast(m->method_holder())->is_interface();
    7.10 -         // TODO: investigate whether default methods should be
    7.11 -         // considered as "concrete" in this situation.  For now they
    7.12 -         // are not.
    7.13 +         !m->is_overpass(); // error functions aren't concrete
    7.14  }
    7.15  
    7.16  
     8.1 --- a/src/share/vm/opto/c2_globals.hpp	Tue Feb 11 08:49:38 2014 -0800
     8.2 +++ b/src/share/vm/opto/c2_globals.hpp	Fri Feb 14 17:57:17 2014 +0000
     8.3 @@ -445,7 +445,7 @@
     8.4    notproduct(bool, PrintEliminateLocks, false,                              \
     8.5            "Print out when locks are eliminated")                            \
     8.6                                                                              \
     8.7 -  product(bool, EliminateAutoBox, true,                                     \
     8.8 +  product(bool, EliminateAutoBox, false,                                    \
     8.9            "Control optimizations for autobox elimination")                  \
    8.10                                                                              \
    8.11    experimental(bool, UseImplicitStableValues, false,                        \
     9.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     9.2 +++ b/test/compiler/codegen/LoadWithMask.java	Fri Feb 14 17:57:17 2014 +0000
     9.3 @@ -0,0 +1,44 @@
     9.4 +/*
     9.5 + * Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved.
     9.6 + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     9.7 + *
     9.8 + * This code is free software; you can redistribute it and/or modify it
     9.9 + * under the terms of the GNU General Public License version 2 only, as
    9.10 + * published by the Free Software Foundation.
    9.11 + *
    9.12 + * This code is distributed in the hope that it will be useful, but WITHOUT
    9.13 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    9.14 + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    9.15 + * version 2 for more details (a copy is included in the LICENSE file that
    9.16 + * accompanied this code).
    9.17 + *
    9.18 + * You should have received a copy of the GNU General Public License version
    9.19 + * 2 along with this work; if not, write to the Free Software Foundation,
    9.20 + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
    9.21 + *
    9.22 + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
    9.23 + * or visit www.oracle.com if you need additional information or have any
    9.24 + * questions.
    9.25 + */
    9.26 +
    9.27 +/*
    9.28 + * @test
    9.29 + * @bug 8032207
    9.30 + * @summary Invalid node sizing for loadUS2L_immI16 and loadI2L_immI
    9.31 + * @run main/othervm -server -Xbatch -XX:-TieredCompilation -XX:CompileCommand=compileonly,LoadWithMask.foo LoadWithMask
    9.32 + *
    9.33 + */
    9.34 +public class LoadWithMask {
    9.35 +  static int x[] = new int[1];
    9.36 +  static long foo() {
    9.37 +    return x[0] & 0xfff0ffff;
    9.38 +  }
    9.39 +
    9.40 +  public static void main(String[] args) {
    9.41 +    x[0] = -1;
    9.42 +    long l = 0;
    9.43 +    for (int i = 0; i < 100000; ++i) {
    9.44 +      l = foo();
    9.45 +    }
    9.46 +  }
    9.47 +}
    10.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    10.2 +++ b/test/compiler/codegen/LoadWithMask2.java	Fri Feb 14 17:57:17 2014 +0000
    10.3 @@ -0,0 +1,55 @@
    10.4 +/*
    10.5 + * Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved.
    10.6 + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
    10.7 + *
    10.8 + * This code is free software; you can redistribute it and/or modify it
    10.9 + * under the terms of the GNU General Public License version 2 only, as
   10.10 + * published by the Free Software Foundation.
   10.11 + *
   10.12 + * This code is distributed in the hope that it will be useful, but WITHOUT
   10.13 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
   10.14 + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
   10.15 + * version 2 for more details (a copy is included in the LICENSE file that
   10.16 + * accompanied this code).
   10.17 + *
   10.18 + * You should have received a copy of the GNU General Public License version
   10.19 + * 2 along with this work; if not, write to the Free Software Foundation,
   10.20 + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
   10.21 + *
   10.22 + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
   10.23 + * or visit www.oracle.com if you need additional information or have any
   10.24 + * questions.
   10.25 + */
   10.26 +
   10.27 +/*
   10.28 + * @test
   10.29 + * @bug 8031743
   10.30 + * @summary loadI2L_immI broken for negative memory values
   10.31 + * @run main/othervm -server -Xbatch -XX:-TieredCompilation -XX:CompileCommand=compileonly,*.foo* LoadWithMask2
   10.32 + *
   10.33 + */
   10.34 +public class LoadWithMask2 {
   10.35 +  static int x;
   10.36 +  static long foo1() {
   10.37 +    return x & 0xfffffffe;
   10.38 +  }
   10.39 +  static long foo2() {
   10.40 +    return x & 0xff000000;
   10.41 +  }
   10.42 +  static long foo3() {
   10.43 +    return x & 0x8abcdef1;
   10.44 +  }
   10.45 +
   10.46 +  public static void main(String[] args) {
   10.47 +    x = -1;
   10.48 +    long l = 0;
   10.49 +    for (int i = 0; i < 100000; ++i) {
   10.50 +      l = foo1() & foo2() & foo3();
   10.51 +    }
   10.52 +    if (l > 0) {
   10.53 +      System.out.println("FAILED");
   10.54 +      System.exit(97);
   10.55 +    }
   10.56 +    System.out.println("PASSED");
   10.57 +  }
   10.58 +}
    11.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    11.2 +++ b/test/compiler/inlining/DefaultAndConcreteMethodsCHA.java	Fri Feb 14 17:57:17 2014 +0000
    11.3 @@ -0,0 +1,58 @@
    11.4 +/*
    11.5 + * Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved.
    11.6 + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
    11.7 + *
    11.8 + * This code is free software; you can redistribute it and/or modify it
    11.9 + * under the terms of the GNU General Public License version 2 only, as
   11.10 + * published by the Free Software Foundation.
   11.11 + *
   11.12 + * This code is distributed in the hope that it will be useful, but WITHOUT
   11.13 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
   11.14 + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
   11.15 + * version 2 for more details (a copy is included in the LICENSE file that
   11.16 + * accompanied this code).
   11.17 + *
   11.18 + * You should have received a copy of the GNU General Public License version
   11.19 + * 2 along with this work; if not, write to the Free Software Foundation,
   11.20 + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
   11.21 + *
   11.22 + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
   11.23 + * or visit www.oracle.com if you need additional information or have any
   11.24 + * questions.
   11.25 + */
   11.26 +
   11.27 +/**
   11.28 + * @test
   11.29 + * @bug 8031695
   11.30 + * @summary CHA ignores default methods during analysis leading to incorrect code generation
   11.31 + *
   11.32 + * @run main/othervm -Xbatch DefaultAndConcreteMethodsCHA
   11.33 + */
   11.34 +interface I {
   11.35 +    default int m() { return 0; }
   11.36 +}
   11.37 +
   11.38 +class A implements I {}
   11.39 +
   11.40 +class C extends A { }
   11.41 +class D extends A { public int m() { return 1; } }
   11.42 +
   11.43 +public class DefaultAndConcreteMethodsCHA {
   11.44 +    public static int test(A obj) {
   11.45 +        return obj.m();
   11.46 +    }
   11.47 +    public static void main(String[] args) {
   11.48 +        for (int i = 0; i < 10000; i++) {
   11.49 +            int idC = test(new C());
   11.50 +            if (idC != 0) {
   11.51 +                throw new Error("C.m didn't invoke I.m: id "+idC);
   11.52 +            }
   11.53 +
   11.54 +            int idD = test(new D());
   11.55 +            if (idD != 1) {
   11.56 +                throw new Error("D.m didn't invoke D.m: id "+idD);
   11.57 +            }
   11.58 +        }
   11.59 +
   11.60 +    }
   11.61 +}

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