#7548 [C1] Fix an assert when con_size_in_bytes is not simm16 in MacroAssembler::tlab_allocate and MacroAssembler::eden_allocate.

Thu, 13 Sep 2018 15:14:28 +0800

author
wangxue
date
Thu, 13 Sep 2018 15:14:28 +0800
changeset 9245
aef0606c167c
parent 9244
914de2d5d730
child 9246
66da43f17885

#7548 [C1] Fix an assert when con_size_in_bytes is not simm16 in MacroAssembler::tlab_allocate and MacroAssembler::eden_allocate.
Reviewed-by: fujie

src/cpu/mips/vm/c1_LIRGenerator_mips.cpp file | annotate | diff | comparison | revisions
src/cpu/mips/vm/macroAssembler_mips.cpp file | annotate | diff | comparison | revisions
     1.1 --- a/src/cpu/mips/vm/c1_LIRGenerator_mips.cpp	Thu Sep 13 15:03:14 2018 +0800
     1.2 +++ b/src/cpu/mips/vm/c1_LIRGenerator_mips.cpp	Thu Sep 13 15:14:28 2018 +0800
     1.3 @@ -178,12 +178,8 @@
     1.4    } else {
     1.5  
     1.6      if(disp!=0){
     1.7 -#ifdef _LP64
     1.8 -      LIR_Opr tmp = new_register(T_LONG);
     1.9 -#else
    1.10 -      LIR_Opr tmp = new_register(T_INT);
    1.11 -#endif
    1.12 -      __ move(LIR_OprFact::intConst((int)disp), tmp);
    1.13 +      LIR_Opr tmp = new_pointer_register();
    1.14 +      __ move(LIR_OprFact::intptrConst(disp), tmp);
    1.15        __ add(tmp, base, tmp);
    1.16        return new LIR_Address(tmp, 0, type);
    1.17      }
    1.18 @@ -192,11 +188,7 @@
    1.19      }
    1.20    } else if( index->is_register()) {
    1.21  
    1.22 -#ifdef _LP64
    1.23 -    LIR_Opr tmpa = new_register(T_LONG);
    1.24 -#else
    1.25 -    LIR_Opr tmpa = new_register(T_INT);
    1.26 -#endif
    1.27 +    LIR_Opr tmpa = new_pointer_register();
    1.28      __ move(index, tmpa);
    1.29      __ shift_left(tmpa, shift, tmpa);
    1.30      __ add(tmpa,base, tmpa);
    1.31 @@ -204,13 +196,8 @@
    1.32        return new LIR_Address(tmpa, disp, type);
    1.33      } else {
    1.34        if (disp!=0) {
    1.35 -#ifdef _LP64
    1.36 -        LIR_Opr tmp = new_register(T_LONG);
    1.37 -#else
    1.38 -        LIR_Opr tmp = new_register(T_INT);
    1.39 -#endif
    1.40 -
    1.41 -        __ move(LIR_OprFact::intConst((int)disp), tmp);
    1.42 +        LIR_Opr tmp = new_pointer_register();
    1.43 +        __ move(LIR_OprFact::intptrConst(disp), tmp);
    1.44          __ add(tmp, tmpa, tmp);
    1.45          return new LIR_Address(tmp, 0, type);
    1.46        } else
    1.47 @@ -221,12 +208,8 @@
    1.48        return new LIR_Address(base,disp, type);
    1.49      } else {
    1.50      if (disp!=0) {
    1.51 -#ifdef _LP64
    1.52 -      LIR_Opr tmp = new_register(T_LONG);
    1.53 -#else
    1.54 -      LIR_Opr tmp = new_register(T_INT);
    1.55 -#endif
    1.56 -      __ move(LIR_OprFact::intConst((int)disp), tmp);
    1.57 +      LIR_Opr tmp = new_pointer_register();
    1.58 +      __ move(LIR_OprFact::intptrConst(disp), tmp);
    1.59        __ add(tmp, base, tmp);
    1.60        return new LIR_Address(tmp, 0, type);
    1.61      } else
    1.62 @@ -302,11 +285,7 @@
    1.63  }
    1.64  
    1.65  void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
    1.66 -#ifdef _LP64
    1.67 -  LIR_Opr pointer = new_register(T_LONG);
    1.68 -#else
    1.69 -  LIR_Opr pointer = new_register(T_INT);
    1.70 -#endif
    1.71 +  LIR_Opr pointer = new_pointer_register();
    1.72    __ move(LIR_OprFact::intptrConst(counter), pointer);
    1.73    LIR_Address* addr = new LIR_Address(pointer, type);
    1.74    increment_counter(addr, step);
    1.75 @@ -438,11 +417,7 @@
    1.76    set_no_result(x);
    1.77  
    1.78    // "lock" stores the address of the monitor stack slot, so this is not an oop
    1.79 -#ifdef _LP64
    1.80 -  LIR_Opr lock = new_register(T_LONG);
    1.81 -#else
    1.82    LIR_Opr lock = new_register(T_INT);
    1.83 -#endif
    1.84    // Need a scratch register for biased locking on mips
    1.85    LIR_Opr scratch = LIR_OprFact::illegalOpr;
    1.86    if (UseBiasedLocking) {
    1.87 @@ -1247,17 +1222,11 @@
    1.88  
    1.89  
    1.90  LIR_Opr LIRGenerator::getThreadPointer() {
    1.91 -#ifdef _LP64
    1.92    //FIXME, does as_pointer need to be implemented? or 64bit can use one register.
    1.93    //return FrameMap::as_pointer_opr(r15_thread);
    1.94 -  LIR_Opr result = new_register(T_LONG);
    1.95 +  LIR_Opr result = new_pointer_register();
    1.96    __ get_thread(result);
    1.97    return result;
    1.98 -#else
    1.99 -  LIR_Opr result = new_register(T_INT);
   1.100 -  __ get_thread(result);
   1.101 -  return result;
   1.102 -#endif //
   1.103  }
   1.104  
   1.105  void LIRGenerator::trace_block_entry(BlockBegin* block) {
     2.1 --- a/src/cpu/mips/vm/macroAssembler_mips.cpp	Thu Sep 13 15:03:14 2018 +0800
     2.2 +++ b/src/cpu/mips/vm/macroAssembler_mips.cpp	Thu Sep 13 15:14:28 2018 +0800
     2.3 @@ -1816,9 +1816,8 @@
     2.4    ld_ptr(obj, thread, in_bytes(JavaThread::tlab_top_offset()));
     2.5  
     2.6    if (var_size_in_bytes == NOREG) {
     2.7 -    // i dont think we need move con_size_in_bytes to a register first.
     2.8 -    assert(is_simm16(con_size_in_bytes), "fixme by moving imm to a register first");
     2.9 -    addi(end, obj, con_size_in_bytes);
    2.10 +    set64(AT, con_size_in_bytes);
    2.11 +    add(end, obj, AT);
    2.12    } else {
    2.13      add(end, obj, var_size_in_bytes);
    2.14    }
    2.15 @@ -1859,9 +1858,8 @@
    2.16  
    2.17      bind(retry);
    2.18      if (var_size_in_bytes == NOREG) {
    2.19 -    // i dont think we need move con_size_in_bytes to a register first.
    2.20 -      assert(is_simm16(con_size_in_bytes), "fixme by moving imm to a register first");
    2.21 -      addi(end, obj, con_size_in_bytes);
    2.22 +      set64(AT, con_size_in_bytes);
    2.23 +      add(end, obj, AT);
    2.24      } else {
    2.25        add(end, obj, var_size_in_bytes);
    2.26      }

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