[C2] Remove sync in membar_release for MIPS CPUs.

Sat, 04 Feb 2017 11:15:42 +0800

author
fujie
date
Sat, 04 Feb 2017 11:15:42 +0800
changeset 271
aae7065b13f4
parent 270
ad68b437a644
child 272
7956291294c2

[C2] Remove sync in membar_release for MIPS CPUs.

src/cpu/mips/vm/mips_64.ad file | annotate | diff | comparison | revisions
     1.1 --- a/src/cpu/mips/vm/mips_64.ad	Sat Feb 04 11:06:57 2017 +0800
     1.2 +++ b/src/cpu/mips/vm/mips_64.ad	Sat Feb 04 11:15:42 2017 +0800
     1.3 @@ -7628,7 +7628,6 @@
     1.4    ins_cost(400);
     1.5  
     1.6    format %{ "MEMBAR @ load_fence" %}
     1.7 -//  ins_encode( enc_membar_acquire );
     1.8    ins_encode %{
     1.9      __ sync(); 
    1.10    %}
    1.11 @@ -7648,15 +7647,12 @@
    1.12  
    1.13  instruct membar_release() %{
    1.14    match(MemBarRelease);
    1.15 -  ins_cost(400);
    1.16 -
    1.17 -  format %{ "MEMBAR-release @ membar_release" %}
    1.18 -
    1.19 -  ins_encode %{
    1.20 -    __ sync(); 
    1.21 -  %}
    1.22 -
    1.23 -  ins_pipe(pipe_slow);
    1.24 +  ins_cost(0);
    1.25 +
    1.26 +  size(0);
    1.27 +  format %{ "MEMBAR-release (empty) @ membar_release" %}
    1.28 +  ins_encode();
    1.29 +  ins_pipe(empty);
    1.30  %}
    1.31  
    1.32  instruct store_fence() %{
    1.33 @@ -7689,7 +7685,6 @@
    1.34    ins_cost(400);
    1.35  
    1.36    format %{ "MEMBAR-volatile" %}
    1.37 -/*  ins_encode( enc_membar_volatile ); */
    1.38    ins_encode %{
    1.39      if( !os::is_MP() ) return;     // Not needed on single CPU
    1.40      __ sync();

mercurial