Fri, 11 Nov 2016 13:32:58 +0000
Merge
1.1 --- a/src/cpu/ppc/vm/relocInfo_ppc.cpp Tue Oct 25 08:38:54 2016 -0700 1.2 +++ b/src/cpu/ppc/vm/relocInfo_ppc.cpp Fri Nov 11 13:32:58 2016 +0000 1.3 @@ -62,7 +62,7 @@ 1.4 nativeMovConstReg_at(addr())->set_narrow_oop(no, code()); 1.5 } 1.6 } else { 1.7 - assert((address) (nativeMovConstReg_at(addr())->data()) == x, "data must match"); 1.8 + guarantee((address) (nativeMovConstReg_at(addr())->data()) == x, "data must match"); 1.9 } 1.10 } 1.11
2.1 --- a/src/cpu/sparc/vm/macroAssembler_sparc.cpp Tue Oct 25 08:38:54 2016 -0700 2.2 +++ b/src/cpu/sparc/vm/macroAssembler_sparc.cpp Fri Nov 11 13:32:58 2016 +0000 2.3 @@ -4261,6 +4261,7 @@ 2.4 assert(UseBlockZeroing && VM_Version::has_block_zeroing(), "only works with BIS zeroing"); 2.5 Register end = count; 2.6 int cache_line_size = VM_Version::prefetch_data_size(); 2.7 + assert(cache_line_size > 0, "cache line size should be known for this code"); 2.8 // Minimum count when BIS zeroing can be used since 2.9 // it needs membar which is expensive. 2.10 int block_zero_size = MAX2(cache_line_size*3, (int)BlockZeroingLowLimit);
3.1 --- a/src/cpu/sparc/vm/nativeInst_sparc.cpp Tue Oct 25 08:38:54 2016 -0700 3.2 +++ b/src/cpu/sparc/vm/nativeInst_sparc.cpp Fri Nov 11 13:32:58 2016 +0000 3.3 @@ -64,7 +64,7 @@ 3.4 masm.patchable_sethi(x, destreg); 3.5 int len = buffer - masm.pc(); 3.6 for (int i = 0; i < len; i++) { 3.7 - assert(instaddr[i] == buffer[i], "instructions must match"); 3.8 + guarantee(instaddr[i] == buffer[i], "instructions must match"); 3.9 } 3.10 } 3.11
4.1 --- a/src/cpu/sparc/vm/relocInfo_sparc.cpp Tue Oct 25 08:38:54 2016 -0700 4.2 +++ b/src/cpu/sparc/vm/relocInfo_sparc.cpp Fri Nov 11 13:32:58 2016 +0000 4.3 @@ -83,7 +83,7 @@ 4.4 inst &= ~Assembler::simm( -1, 13); 4.5 inst |= Assembler::simm(simm13, 13); 4.6 if (verify_only) { 4.7 - assert(ip->long_at(0) == inst, "instructions must match"); 4.8 + guarantee(ip->long_at(0) == inst, "instructions must match"); 4.9 } else { 4.10 ip->set_long_at(0, inst); 4.11 } 4.12 @@ -101,15 +101,15 @@ 4.13 inst &= ~Assembler::hi22(-1); 4.14 inst |= Assembler::hi22((intptr_t)np); 4.15 if (verify_only) { 4.16 - assert(ip->long_at(0) == inst, "instructions must match"); 4.17 + guarantee(ip->long_at(0) == inst, "instructions must match"); 4.18 } else { 4.19 ip->set_long_at(0, inst); 4.20 } 4.21 inst2 = ip->long_at( NativeInstruction::nop_instruction_size ); 4.22 guarantee(Assembler::inv_op(inst2)==Assembler::arith_op, "arith op"); 4.23 if (verify_only) { 4.24 - assert(ip->long_at(NativeInstruction::nop_instruction_size) == NativeInstruction::set_data32_simm13( inst2, (intptr_t)np), 4.25 - "instructions must match"); 4.26 + guarantee(ip->long_at(NativeInstruction::nop_instruction_size) == NativeInstruction::set_data32_simm13( inst2, (intptr_t)np), 4.27 + "instructions must match"); 4.28 } else { 4.29 ip->set_long_at(NativeInstruction::nop_instruction_size, NativeInstruction::set_data32_simm13( inst2, (intptr_t)np)); 4.30 } 4.31 @@ -126,7 +126,7 @@ 4.32 inst |= Assembler::hi22((intptr_t)x); 4.33 // (ignore offset; it doesn't play into the sethi) 4.34 if (verify_only) { 4.35 - assert(ip->long_at(0) == inst, "instructions must match"); 4.36 + guarantee(ip->long_at(0) == inst, "instructions must match"); 4.37 } else { 4.38 ip->set_long_at(0, inst); 4.39 }
5.1 --- a/src/cpu/sparc/vm/vm_version_sparc.cpp Tue Oct 25 08:38:54 2016 -0700 5.2 +++ b/src/cpu/sparc/vm/vm_version_sparc.cpp Fri Nov 11 13:32:58 2016 +0000 5.3 @@ -74,7 +74,7 @@ 5.4 AllocatePrefetchDistance = AllocatePrefetchStepSize; 5.5 } 5.6 5.7 - if (AllocatePrefetchStyle == 3 && !has_blk_init()) { 5.8 + if (AllocatePrefetchStyle == 3 && (!has_blk_init() || cache_line_size <= 0)) { 5.9 warning("BIS instructions are not available on this CPU"); 5.10 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 1); 5.11 } 5.12 @@ -138,7 +138,7 @@ 5.13 FLAG_SET_DEFAULT(InteriorEntryAlignment, 4); 5.14 } 5.15 if (is_niagara_plus()) { 5.16 - if (has_blk_init() && UseTLAB && 5.17 + if (has_blk_init() && (cache_line_size > 0) && UseTLAB && 5.18 FLAG_IS_DEFAULT(AllocatePrefetchInstr)) { 5.19 // Use BIS instruction for TLAB allocation prefetch. 5.20 FLAG_SET_ERGO(intx, AllocatePrefetchInstr, 1);
6.1 --- a/src/cpu/x86/vm/relocInfo_x86.cpp Tue Oct 25 08:38:54 2016 -0700 6.2 +++ b/src/cpu/x86/vm/relocInfo_x86.cpp Fri Nov 11 13:32:58 2016 +0000 6.3 @@ -40,7 +40,7 @@ 6.4 which == Assembler::imm_operand, "format unpacks ok"); 6.5 if (which == Assembler::imm_operand) { 6.6 if (verify_only) { 6.7 - assert(*pd_address_in_code() == x, "instructions must match"); 6.8 + guarantee(*pd_address_in_code() == x, "instructions must match"); 6.9 } else { 6.10 *pd_address_in_code() = x; 6.11 } 6.12 @@ -49,13 +49,13 @@ 6.13 // both compressed oops and compressed classes look the same 6.14 if (Universe::heap()->is_in_reserved((oop)x)) { 6.15 if (verify_only) { 6.16 - assert(*(uint32_t*) disp == oopDesc::encode_heap_oop((oop)x), "instructions must match"); 6.17 + guarantee(*(uint32_t*) disp == oopDesc::encode_heap_oop((oop)x), "instructions must match"); 6.18 } else { 6.19 *(int32_t*) disp = oopDesc::encode_heap_oop((oop)x); 6.20 } 6.21 } else { 6.22 if (verify_only) { 6.23 - assert(*(uint32_t*) disp == Klass::encode_klass((Klass*)x), "instructions must match"); 6.24 + guarantee(*(uint32_t*) disp == Klass::encode_klass((Klass*)x), "instructions must match"); 6.25 } else { 6.26 *(int32_t*) disp = Klass::encode_klass((Klass*)x); 6.27 } 6.28 @@ -66,14 +66,14 @@ 6.29 address disp = Assembler::locate_operand(ip, which); 6.30 address next_ip = Assembler::locate_next_instruction(ip); 6.31 if (verify_only) { 6.32 - assert(*(int32_t*) disp == (x - next_ip), "instructions must match"); 6.33 + guarantee(*(int32_t*) disp == (x - next_ip), "instructions must match"); 6.34 } else { 6.35 *(int32_t*) disp = x - next_ip; 6.36 } 6.37 } 6.38 #else 6.39 if (verify_only) { 6.40 - assert(*pd_address_in_code() == (x + o), "instructions must match"); 6.41 + guarantee(*pd_address_in_code() == (x + o), "instructions must match"); 6.42 } else { 6.43 *pd_address_in_code() = x + o; 6.44 }
7.1 --- a/src/share/vm/code/nmethod.cpp Tue Oct 25 08:38:54 2016 -0700 7.2 +++ b/src/share/vm/code/nmethod.cpp Fri Nov 11 13:32:58 2016 +0000 7.3 @@ -2290,7 +2290,7 @@ 7.4 assert(cur != NULL, "not NULL-terminated"); 7.5 nmethod* next = cur->_oops_do_mark_link; 7.6 cur->_oops_do_mark_link = NULL; 7.7 - cur->verify_oop_relocations(); 7.8 + DEBUG_ONLY(cur->verify_oop_relocations()); 7.9 NOT_PRODUCT(if (TraceScavenge) cur->print_on(tty, "oops_do, unmark")); 7.10 cur = next; 7.11 }
8.1 --- a/src/share/vm/opto/cfgnode.hpp Tue Oct 25 08:38:54 2016 -0700 8.2 +++ b/src/share/vm/opto/cfgnode.hpp Fri Nov 11 13:32:58 2016 +0000 8.3 @@ -119,6 +119,9 @@ 8.4 // input in slot 0. 8.5 class PhiNode : public TypeNode { 8.6 const TypePtr* const _adr_type; // non-null only for Type::MEMORY nodes. 8.7 + // The following fields are only used for data PhiNodes to indicate 8.8 + // that the PhiNode represents the value of a known instance field. 8.9 + int _inst_mem_id; // Instance memory id (node index of the memory Phi) 8.10 const int _inst_id; // Instance id of the memory slice. 8.11 const int _inst_index; // Alias index of the instance memory slice. 8.12 // Array elements references have the same alias_idx but different offset. 8.13 @@ -138,11 +141,13 @@ 8.14 }; 8.15 8.16 PhiNode( Node *r, const Type *t, const TypePtr* at = NULL, 8.17 + const int imid = -1, 8.18 const int iid = TypeOopPtr::InstanceTop, 8.19 const int iidx = Compile::AliasIdxTop, 8.20 const int ioffs = Type::OffsetTop ) 8.21 : TypeNode(t,r->req()), 8.22 _adr_type(at), 8.23 + _inst_mem_id(imid), 8.24 _inst_id(iid), 8.25 _inst_index(iidx), 8.26 _inst_offset(ioffs) 8.27 @@ -187,11 +192,14 @@ 8.28 virtual bool pinned() const { return in(0) != 0; } 8.29 virtual const TypePtr *adr_type() const { verify_adr_type(true); return _adr_type; } 8.30 8.31 + void set_inst_mem_id(int inst_mem_id) { _inst_mem_id = inst_mem_id; } 8.32 + const int inst_mem_id() const { return _inst_mem_id; } 8.33 const int inst_id() const { return _inst_id; } 8.34 const int inst_index() const { return _inst_index; } 8.35 const int inst_offset() const { return _inst_offset; } 8.36 - bool is_same_inst_field(const Type* tp, int id, int index, int offset) { 8.37 + bool is_same_inst_field(const Type* tp, int mem_id, int id, int index, int offset) { 8.38 return type()->basic_type() == tp->basic_type() && 8.39 + inst_mem_id() == mem_id && 8.40 inst_id() == id && 8.41 inst_index() == index && 8.42 inst_offset() == offset &&
9.1 --- a/src/share/vm/opto/macro.cpp Tue Oct 25 08:38:54 2016 -0700 9.2 +++ b/src/share/vm/opto/macro.cpp Fri Nov 11 13:32:58 2016 +0000 9.3 @@ -401,7 +401,7 @@ 9.4 for (DUIterator_Fast kmax, k = region->fast_outs(kmax); k < kmax; k++) { 9.5 Node* phi = region->fast_out(k); 9.6 if (phi->is_Phi() && phi != mem && 9.7 - phi->as_Phi()->is_same_inst_field(phi_type, instance_id, alias_idx, offset)) { 9.8 + phi->as_Phi()->is_same_inst_field(phi_type, (int)mem->_idx, instance_id, alias_idx, offset)) { 9.9 return phi; 9.10 } 9.11 } 9.12 @@ -420,7 +420,7 @@ 9.13 GrowableArray <Node *> values(length, length, NULL, false); 9.14 9.15 // create a new Phi for the value 9.16 - PhiNode *phi = new (C) PhiNode(mem->in(0), phi_type, NULL, instance_id, alias_idx, offset); 9.17 + PhiNode *phi = new (C) PhiNode(mem->in(0), phi_type, NULL, mem->_idx, instance_id, alias_idx, offset); 9.18 transform_later(phi); 9.19 value_phis->push(phi, mem->_idx); 9.20
10.1 --- a/src/share/vm/opto/memnode.cpp Tue Oct 25 08:38:54 2016 -0700 10.2 +++ b/src/share/vm/opto/memnode.cpp Fri Nov 11 13:32:58 2016 +0000 10.3 @@ -1155,7 +1155,7 @@ 10.4 for (DUIterator_Fast imax, i = region->fast_outs(imax); i < imax; i++) { 10.5 Node* phi = region->fast_out(i); 10.6 if (phi->is_Phi() && phi != mem && 10.7 - phi->as_Phi()->is_same_inst_field(this_type, this_iid, this_index, this_offset)) { 10.8 + phi->as_Phi()->is_same_inst_field(this_type, (int)mem->_idx, this_iid, this_index, this_offset)) { 10.9 return phi; 10.10 } 10.11 } 10.12 @@ -1400,7 +1400,7 @@ 10.13 this_iid = base->_idx; 10.14 } 10.15 PhaseIterGVN* igvn = phase->is_IterGVN(); 10.16 - Node* phi = new (C) PhiNode(region, this_type, NULL, this_iid, this_index, this_offset); 10.17 + Node* phi = new (C) PhiNode(region, this_type, NULL, mem->_idx, this_iid, this_index, this_offset); 10.18 for (uint i = 1; i < region->req(); i++) { 10.19 Node* x; 10.20 Node* the_clone = NULL;
11.1 --- a/src/share/vm/opto/phaseX.cpp Tue Oct 25 08:38:54 2016 -0700 11.2 +++ b/src/share/vm/opto/phaseX.cpp Fri Nov 11 13:32:58 2016 +0000 11.3 @@ -481,6 +481,8 @@ 11.4 uint current_idx = 0; // The current new node ID. Incremented after every assignment. 11.5 for (uint i = 0; i < _useful.size(); i++) { 11.6 Node* n = _useful.at(i); 11.7 + // Sanity check that fails if we ever decide to execute this phase after EA 11.8 + assert(!n->is_Phi() || n->as_Phi()->inst_mem_id() == -1, "should not be linked to data Phi"); 11.9 const Type* type = gvn->type_or_null(n); 11.10 new_type_array.map(current_idx, type); 11.11 11.12 @@ -1378,6 +1380,18 @@ 11.13 i -= num_edges; // we deleted 1 or more copies of this edge 11.14 } 11.15 11.16 + // Search for instance field data PhiNodes in the same region pointing to the old 11.17 + // memory PhiNode and update their instance memory ids to point to the new node. 11.18 + if (old->is_Phi() && old->as_Phi()->type()->has_memory() && old->in(0) != NULL) { 11.19 + Node* region = old->in(0); 11.20 + for (DUIterator_Fast imax, i = region->fast_outs(imax); i < imax; i++) { 11.21 + PhiNode* phi = region->fast_out(i)->isa_Phi(); 11.22 + if (phi != NULL && phi->inst_mem_id() == (int)old->_idx) { 11.23 + phi->set_inst_mem_id((int)nn->_idx); 11.24 + } 11.25 + } 11.26 + } 11.27 + 11.28 // Smash all inputs to 'old', isolating him completely 11.29 Node *temp = new (C) Node(1); 11.30 temp->init_req(0,nn); // Add a use to nn to prevent him from dying
12.1 --- a/src/share/vm/opto/type.hpp Tue Oct 25 08:38:54 2016 -0700 12.2 +++ b/src/share/vm/opto/type.hpp Fri Nov 11 13:32:58 2016 +0000 12.3 @@ -882,7 +882,7 @@ 12.4 12.5 // If not InstanceTop or InstanceBot, indicates that this is 12.6 // a particular instance of this type which is distinct. 12.7 - // This is the the node index of the allocation node creating this instance. 12.8 + // This is the node index of the allocation node creating this instance. 12.9 int _instance_id; 12.10 12.11 // Extra type information profiling gave us. We propagate it the