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changeset
8042059: Various fixes to linux/sparc
Tue, 29 Apr 2014 22:05:10 -0700
- author
- mikael
- date
- Tue, 29 Apr 2014 22:05:10 -0700
- changeset 6683
- 7f77d17d0f13
- parent 6682
- 0fb5b60ab4a2
- child 6684
- 50e5d560367b
8042059: Various fixes to linux/sparc
Reviewed-by: twisti, kvn
1.1 --- a/agent/src/os/linux/libproc.h Tue Apr 29 22:04:09 2014 -0700 1.2 +++ b/agent/src/os/linux/libproc.h Tue Apr 29 22:05:10 2014 -0700 1.3 @@ -34,19 +34,7 @@ 1.4 #include "libproc_md.h" 1.5 #endif 1.6 1.7 -#if defined(sparc) || defined(sparcv9) 1.8 -/* 1.9 - If _LP64 is defined ptrace.h should be taken from /usr/include/asm-sparc64 1.10 - otherwise it should be from /usr/include/asm-sparc 1.11 - These two files define pt_regs structure differently 1.12 -*/ 1.13 -#ifdef _LP64 1.14 -#include "asm-sparc64/ptrace.h" 1.15 -#else 1.16 -#include "asm-sparc/ptrace.h" 1.17 -#endif 1.18 - 1.19 -#endif //sparc or sparcv9 1.20 +#include <linux/ptrace.h> 1.21 1.22 /************************************************************************************ 1.23
2.1 --- a/src/cpu/sparc/vm/frame_sparc.hpp Tue Apr 29 22:04:09 2014 -0700 2.2 +++ b/src/cpu/sparc/vm/frame_sparc.hpp Tue Apr 29 22:05:10 2014 -0700 2.3 @@ -259,8 +259,8 @@ 2.4 2.5 // next two fns read and write Lmonitors value, 2.6 private: 2.7 - BasicObjectLock* interpreter_frame_monitors() const { return *interpreter_frame_monitors_addr(); } 2.8 - void interpreter_frame_set_monitors(BasicObjectLock* monitors) { *interpreter_frame_monitors_addr() = monitors; } 2.9 + BasicObjectLock* interpreter_frame_monitors() const; 2.10 + void interpreter_frame_set_monitors(BasicObjectLock* monitors); 2.11 #else 2.12 public: 2.13 inline interpreterState get_interpreterState() const {
3.1 --- a/src/cpu/sparc/vm/frame_sparc.inline.hpp Tue Apr 29 22:04:09 2014 -0700 3.2 +++ b/src/cpu/sparc/vm/frame_sparc.inline.hpp Tue Apr 29 22:05:10 2014 -0700 3.3 @@ -226,6 +226,13 @@ 3.4 return (Method**)sp_addr_at( Lmethod->sp_offset_in_saved_window()); 3.5 } 3.6 3.7 +inline BasicObjectLock* frame::interpreter_frame_monitors() const { 3.8 + return *interpreter_frame_monitors_addr(); 3.9 +} 3.10 + 3.11 +inline void frame::interpreter_frame_set_monitors(BasicObjectLock* monitors) { 3.12 + *interpreter_frame_monitors_addr() = monitors; 3.13 +} 3.14 3.15 // Constant pool cache 3.16
4.1 --- a/src/os_cpu/linux_sparc/vm/atomic_linux_sparc.inline.hpp Tue Apr 29 22:04:09 2014 -0700 4.2 +++ b/src/os_cpu/linux_sparc/vm/atomic_linux_sparc.inline.hpp Tue Apr 29 22:05:10 2014 -0700 4.3 @@ -78,12 +78,12 @@ 4.4 __asm__ volatile( 4.5 "1: \n\t" 4.6 " ldx [%2], %%o2\n\t" 4.7 - " add %0, %%o2, %%o3\n\t" 4.8 + " add %1, %%o2, %%o3\n\t" 4.9 " casx [%2], %%o2, %%o3\n\t" 4.10 " cmp %%o2, %%o3\n\t" 4.11 " bne %%xcc, 1b\n\t" 4.12 " nop\n\t" 4.13 - " add %0, %%o2, %0\n\t" 4.14 + " add %1, %%o2, %0\n\t" 4.15 : "=r" (rv) 4.16 : "r" (add_value), "r" (dest) 4.17 : "memory", "o2", "o3");
5.1 --- a/src/os_cpu/linux_sparc/vm/os_linux_sparc.cpp Tue Apr 29 22:04:09 2014 -0700 5.2 +++ b/src/os_cpu/linux_sparc/vm/os_linux_sparc.cpp Tue Apr 29 22:05:10 2014 -0700 5.3 @@ -302,29 +302,30 @@ 5.4 if (context == NULL) return; 5.5 5.6 ucontext_t *uc = (ucontext_t*)context; 5.7 + sigcontext* sc = (sigcontext*)context; 5.8 intptr_t *sp = (intptr_t *)os::Linux::ucontext_get_sp(uc); 5.9 5.10 st->print_cr("Register to memory mapping:"); 5.11 st->cr(); 5.12 5.13 // this is only for the "general purpose" registers 5.14 - st->print("G1="); print_location(st, SIG_REGS(sc).u_regs[CON__G1]); 5.15 - st->print("G2="); print_location(st, SIG_REGS(sc).u_regs[CON__G2]); 5.16 - st->print("G3="); print_location(st, SIG_REGS(sc).u_regs[CON__G3]); 5.17 - st->print("G4="); print_location(st, SIG_REGS(sc).u_regs[CON__G4]); 5.18 - st->print("G5="); print_location(st, SIG_REGS(sc).u_regs[CON__G5]); 5.19 - st->print("G6="); print_location(st, SIG_REGS(sc).u_regs[CON__G6]); 5.20 - st->print("G7="); print_location(st, SIG_REGS(sc).u_regs[CON__G7]); 5.21 + st->print("G1="); print_location(st, SIG_REGS(sc).u_regs[CON_G1]); 5.22 + st->print("G2="); print_location(st, SIG_REGS(sc).u_regs[CON_G2]); 5.23 + st->print("G3="); print_location(st, SIG_REGS(sc).u_regs[CON_G3]); 5.24 + st->print("G4="); print_location(st, SIG_REGS(sc).u_regs[CON_G4]); 5.25 + st->print("G5="); print_location(st, SIG_REGS(sc).u_regs[CON_G5]); 5.26 + st->print("G6="); print_location(st, SIG_REGS(sc).u_regs[CON_G6]); 5.27 + st->print("G7="); print_location(st, SIG_REGS(sc).u_regs[CON_G7]); 5.28 st->cr(); 5.29 5.30 - st->print("O0="); print_location(st, SIG_REGS(sc).u_regs[CON__O0]); 5.31 - st->print("O1="); print_location(st, SIG_REGS(sc).u_regs[CON__O1]); 5.32 - st->print("O2="); print_location(st, SIG_REGS(sc).u_regs[CON__O2]); 5.33 - st->print("O3="); print_location(st, SIG_REGS(sc).u_regs[CON__O3]); 5.34 - st->print("O4="); print_location(st, SIG_REGS(sc).u_regs[CON__O4]); 5.35 - st->print("O5="); print_location(st, SIG_REGS(sc).u_regs[CON__O5]); 5.36 - st->print("O6="); print_location(st, SIG_REGS(sc).u_regs[CON__O6]); 5.37 - st->print("O7="); print_location(st, SIG_REGS(sc).u_regs[CON__O7]); 5.38 + st->print("O0="); print_location(st, SIG_REGS(sc).u_regs[CON_O0]); 5.39 + st->print("O1="); print_location(st, SIG_REGS(sc).u_regs[CON_O1]); 5.40 + st->print("O2="); print_location(st, SIG_REGS(sc).u_regs[CON_O2]); 5.41 + st->print("O3="); print_location(st, SIG_REGS(sc).u_regs[CON_O3]); 5.42 + st->print("O4="); print_location(st, SIG_REGS(sc).u_regs[CON_O4]); 5.43 + st->print("O5="); print_location(st, SIG_REGS(sc).u_regs[CON_O5]); 5.44 + st->print("O6="); print_location(st, SIG_REGS(sc).u_regs[CON_O6]); 5.45 + st->print("O7="); print_location(st, SIG_REGS(sc).u_regs[CON_O7]); 5.46 st->cr(); 5.47 5.48 st->print("L0="); print_location(st, sp[L0->sp_offset_in_saved_window()]); 5.49 @@ -516,7 +517,7 @@ 5.50 if (nativeInstruction_at(*pc)->is_ic_miss_trap()) { 5.51 #ifdef ASSERT 5.52 #ifdef TIERED 5.53 - CodeBlob* cb = CodeCache::find_blob_unsafe(pc); 5.54 + CodeBlob* cb = CodeCache::find_blob_unsafe(*pc); 5.55 assert(cb->is_compiled_by_c2(), "Wrong compiler"); 5.56 #endif // TIERED 5.57 #endif // ASSERT
