Mercurial > jdk8-mips64-public > hotspot / changeset

     1.1 --- a/src/cpu/ppc/vm/assembler_ppc.hpp	Fri Nov 09 12:39:09 2018 +0100
     1.2 +++ b/src/cpu/ppc/vm/assembler_ppc.hpp	Thu Dec 06 13:26:54 2018 -0500
     1.3 @@ -1,6 +1,6 @@
     1.4  /*
     1.5 - * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
     1.6 - * Copyright 2012, 2013 SAP AG. All rights reserved.
     1.7 + * Copyright (c) 2002, 2018, Oracle and/or its affiliates. All rights reserved.
     1.8 + * Copyright (c) 2012, 2018, SAP SE. All rights reserved.
     1.9   * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
    1.10   *
    1.11   * This code is free software; you can redistribute it and/or modify it
    1.12 @@ -1838,7 +1838,7 @@
    1.13    inline void vperm(    VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
    1.14    inline void vsel(     VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
    1.15    inline void vsl(      VectorRegister d, VectorRegister a, VectorRegister b);
    1.16 -  inline void vsldoi(   VectorRegister d, VectorRegister a, VectorRegister b, int si4);
    1.17 +  inline void vsldoi(   VectorRegister d, VectorRegister a, VectorRegister b, int ui4);
    1.18    inline void vslo(     VectorRegister d, VectorRegister a, VectorRegister b);
    1.19    inline void vsr(      VectorRegister d, VectorRegister a, VectorRegister b);
    1.20    inline void vsro(     VectorRegister d, VectorRegister a, VectorRegister b);

     2.1 --- a/src/cpu/ppc/vm/assembler_ppc.inline.hpp	Fri Nov 09 12:39:09 2018 +0100
     2.2 +++ b/src/cpu/ppc/vm/assembler_ppc.inline.hpp	Thu Dec 06 13:26:54 2018 -0500
     2.3 @@ -1,6 +1,6 @@
     2.4  /*
     2.5 - * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
     2.6 - * Copyright 2012, 2014 SAP AG. All rights reserved.
     2.7 + * Copyright (c) 2002, 2018, Oracle and/or its affiliates. All rights reserved.
     2.8 + * Copyright (c) 2012, 2018, SAP SE. All rights reserved.
     2.9   * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
    2.10   *
    2.11   * This code is free software; you can redistribute it and/or modify it
    2.12 @@ -657,7 +657,7 @@
    2.13  inline void Assembler::vperm(   VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c){ emit_int32( VPERM_OPCODE | vrt(d) | vra(a) | vrb(b) | vrc(c)); }
    2.14  inline void Assembler::vsel(    VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c){ emit_int32( VSEL_OPCODE  | vrt(d) | vra(a) | vrb(b) | vrc(c)); }
    2.15  inline void Assembler::vsl(     VectorRegister d, VectorRegister a, VectorRegister b)                  { emit_int32( VSL_OPCODE   | vrt(d) | vra(a) | vrb(b)); }
    2.16 -inline void Assembler::vsldoi(  VectorRegister d, VectorRegister a, VectorRegister b, int si4)         { emit_int32( VSLDOI_OPCODE| vrt(d) | vra(a) | vrb(b) | vsldoi_shb(simm(si4,4))); }
    2.17 +inline void Assembler::vsldoi(  VectorRegister d, VectorRegister a, VectorRegister b, int ui4)         { emit_int32( VSLDOI_OPCODE| vrt(d) | vra(a) | vrb(b) | vsldoi_shb(uimm(ui4,4))); }
    2.18  inline void Assembler::vslo(    VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSLO_OPCODE    | vrt(d) | vra(a) | vrb(b)); }
    2.19  inline void Assembler::vsr(     VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSR_OPCODE     | vrt(d) | vra(a) | vrb(b)); }
    2.20  inline void Assembler::vsro(    VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSRO_OPCODE    | vrt(d) | vra(a) | vrb(b)); }

     3.1 --- a/src/cpu/ppc/vm/macroAssembler_ppc.cpp	Fri Nov 09 12:39:09 2018 +0100
     3.2 +++ b/src/cpu/ppc/vm/macroAssembler_ppc.cpp	Thu Dec 06 13:26:54 2018 -0500
     3.3 @@ -1,6 +1,6 @@
     3.4  /*
     3.5 - * Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved.
     3.6 - * Copyright 2012, 2017 SAP AG. All rights reserved.
     3.7 + * Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
     3.8 + * Copyright (c) 2012, 2018, SAP SE. All rights reserved.
     3.9   * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
    3.10   *
    3.11   * This code is free software; you can redistribute it and/or modify it
    3.12 @@ -3570,12 +3570,12 @@
    3.13    vspltisw(VR0, -1);
    3.14  
    3.15    vsldoi(mask_32bit, zeroes, VR0, 4);
    3.16 -  vsldoi(mask_64bit, zeroes, VR0, -8);
    3.17 +  vsldoi(mask_64bit, zeroes, VR0, 8);
    3.18  
    3.19    // Get the initial value into v8
    3.20    vxor(VR8, VR8, VR8);
    3.21    mtvrd(VR8, crc);
    3.22 -  vsldoi(VR8, zeroes, VR8, -8); // shift into bottom 32 bits
    3.23 +  vsldoi(VR8, zeroes, VR8, 8); // shift into bottom 32 bits
    3.24  
    3.25    li (rLoaded, 0);
    3.26  
    3.27 @@ -3924,7 +3924,7 @@
    3.28    addi(barretConstants, barretConstants, 16);
    3.29    lvx(const2, barretConstants);
    3.30  
    3.31 -  vsldoi(VR1, VR0, VR0, -8);
    3.32 +  vsldoi(VR1, VR0, VR0, 8);
    3.33    vxor(VR0, VR0, VR1);    // xor two 64 bit results together
    3.34  
    3.35    // shift left one bit

     4.1 --- a/src/cpu/ppc/vm/stubGenerator_ppc.cpp	Fri Nov 09 12:39:09 2018 +0100
     4.2 +++ b/src/cpu/ppc/vm/stubGenerator_ppc.cpp	Thu Dec 06 13:26:54 2018 -0500
     4.3 @@ -1,6 +1,6 @@
     4.4  /*
     4.5 - * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
     4.6 - * Copyright 2012, 2014 SAP AG. All rights reserved.
     4.7 + * Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
     4.8 + * Copyright (c) 2012, 2018, SAP SE. All rights reserved.
     4.9   * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
    4.10   *
    4.11   * This code is free software; you can redistribute it and/or modify it
    4.12 @@ -2023,7 +2023,7 @@
    4.13      __ vspltisb        (vTmp2, -16);
    4.14      __ vrld            (keyPerm, keyPerm, vTmp2);
    4.15      __ vrld            (keyPerm, keyPerm, vTmp2);
    4.16 -    __ vsldoi          (keyPerm, keyPerm, keyPerm, -8);
    4.17 +    __ vsldoi          (keyPerm, keyPerm, keyPerm, 8);
    4.18  
    4.19      // load the 1st round key to vKey1
    4.20      __ li              (keypos, 0);
    4.21 @@ -2223,7 +2223,7 @@
    4.22      __ vspltisb        (vTmp2, -16);
    4.23      __ vrld            (keyPerm, keyPerm, vTmp2);
    4.24      __ vrld            (keyPerm, keyPerm, vTmp2);
    4.25 -    __ vsldoi          (keyPerm, keyPerm, keyPerm, -8);
    4.26 +    __ vsldoi          (keyPerm, keyPerm, keyPerm, 8);
    4.27  
    4.28      __ cmpwi           (CCR0, keylen, 44);
    4.29      __ beq             (CCR0, L_do44);