Mercurial > jdk8-mips64-public > hotspot / changeset

     1.1 --- a/src/cpu/mips/vm/interp_masm_mips_64.cpp	Tue May 21 21:12:18 2019 +0800
     1.2 +++ b/src/cpu/mips/vm/interp_masm_mips_64.cpp	Wed May 08 17:57:33 2019 +0800
     1.3 @@ -119,24 +119,9 @@
     1.4    // super call
     1.5    MacroAssembler::call_VM_leaf_base(entry_point, number_of_arguments);
     1.6    // interpreter specific
     1.7 -#ifdef ASSERT
     1.8 -  {
     1.9 -    Label L;
    1.10 -    ld(T3, FP, frame::interpreter_frame_bcx_offset * wordSize);
    1.11 -    Assembler::beq(BCP, T3, L);
    1.12 -    delayed()->nop();
    1.13 -    stop("InterpreterMacroAssembler::call_VM_leaf_base: BCP not callee saved?");
    1.14 -    bind(L);
    1.15 -  }
    1.16 -  {
    1.17 -    Label L;
    1.18 -    ld(T3, FP, frame::interpreter_frame_locals_offset * wordSize);
    1.19 -    Assembler::beq(LVP, T3, L);
    1.20 -    delayed()->nop();
    1.21 -    stop("InterpreterMacroAssembler::call_VM_leaf_base: LVP not callee saved?");
    1.22 -    bind(L);
    1.23 -  }
    1.24 -  #endif
    1.25 +  // LP64: Used to ASSERT that BCP/LVP were equal to frame's bcp/locals
    1.26 +  // but since they may not have been saved (and we don't want to
    1.27 +  // save them here (see note above) the assert is invalid.
    1.28  }
    1.29  
    1.30  void InterpreterMacroAssembler::call_VM_base(Register oop_result,
    1.31 @@ -2046,14 +2031,14 @@
    1.32    // track stack depth.  If it is possible to enter interp_only_mode we add
    1.33    // the code to check if the event should be sent.
    1.34    Register tempreg = T0;
    1.35 +#ifndef OPT_THREAD
    1.36 +    get_thread(T8);
    1.37 +#else
    1.38 +    move(T8, TREG);
    1.39 +#endif
    1.40    if (JvmtiExport::can_post_interpreter_events()) {
    1.41      Label L;
    1.42 -#ifndef OPT_THREAD
    1.43 -    get_thread(AT);
    1.44 -#else
    1.45 -    move(AT, TREG);
    1.46 -#endif
    1.47 -    lw(tempreg, AT, in_bytes(JavaThread::interp_only_mode_offset()));
    1.48 +    lw(tempreg, T8, in_bytes(JavaThread::interp_only_mode_offset()));
    1.49      beq(tempreg, R0, L);
    1.50      delayed()->nop();
    1.51      call_VM(noreg, CAST_FROM_FN_PTR(address,
    1.52 @@ -2063,9 +2048,10 @@
    1.53  
    1.54    {
    1.55      SkipIfEqual skip_if(this, &DTraceMethodProbes, 0);
    1.56 +    get_method(S3);
    1.57      call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
    1.58                                    //Rthread,
    1.59 -                                  AT,
    1.60 +                                  T8,
    1.61                                    //Rmethod);
    1.62                                    S3);
    1.63    }
    1.64 @@ -2079,14 +2065,14 @@
    1.65    // track stack depth.  If it is possible to enter interp_only_mode we add
    1.66    // the code to check if the event should be sent.
    1.67    Register tempreg = T0;
    1.68 +#ifndef OPT_THREAD
    1.69 +    get_thread(T8);
    1.70 +#else
    1.71 +    move(T8, TREG);
    1.72 +#endif
    1.73    if (mode == NotifyJVMTI && JvmtiExport::can_post_interpreter_events()) {
    1.74      Label skip;
    1.75 -#ifndef OPT_THREAD
    1.76 -    get_thread(AT);
    1.77 -#else
    1.78 -    move(AT, TREG);
    1.79 -#endif
    1.80 -    lw(tempreg, AT, in_bytes(JavaThread::interp_only_mode_offset()));
    1.81 +    lw(tempreg, T8, in_bytes(JavaThread::interp_only_mode_offset()));
    1.82      beq(tempreg, R0, skip);
    1.83      delayed()->nop();
    1.84      // Note: frame::interpreter_frame_result has a dependency on how the
    1.85 @@ -2105,12 +2091,12 @@
    1.86  
    1.87    {
    1.88      // Dtrace notification
    1.89 -    //SkipIfEqual skip_if(this, tempreg, R0, &DTraceMethodProbes, equal);
    1.90      SkipIfEqual skip_if(this, &DTraceMethodProbes, 0);
    1.91      save_return_value(state, is_native_method);
    1.92 +    get_method(S3);
    1.93      call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
    1.94                   //Rthread, Rmethod);
    1.95 -                 AT, S3);
    1.96 +                 T8, S3);
    1.97      restore_return_value(state, is_native_method);
    1.98    }
    1.99  }

     2.1 --- a/src/cpu/mips/vm/macroAssembler_mips.cpp	Tue May 21 21:12:18 2019 +0800
     2.2 +++ b/src/cpu/mips/vm/macroAssembler_mips.cpp	Wed May 08 17:57:33 2019 +0800
     2.3 @@ -3605,9 +3605,9 @@
     2.4      MacroAssembler* masm, const bool* flag_addr, bool value) {
     2.5    _masm = masm;
     2.6    _masm->li(AT, (address)flag_addr);
     2.7 -  _masm->lb(AT,AT,0);
     2.8 -  _masm->addi(AT,AT,-value);
     2.9 -  _masm->beq(AT,R0,_label);
    2.10 +  _masm->lb(AT, AT, 0);
    2.11 +  _masm->addi(AT, AT, -value);
    2.12 +  _masm->beq(AT, R0, _label);
    2.13    _masm->delayed()->nop();
    2.14  }
    2.15  void MacroAssembler::check_klass_subtype_fast_path(Register sub_klass,