Mon, 26 Sep 2016 13:44:12 +0800
Sync in generate_conjoint_int_oop_copy and refine it.
src/cpu/mips/vm/stubGenerator_mips_64.cpp | file | annotate | diff | comparison | revisions |
1.1 --- a/src/cpu/mips/vm/stubGenerator_mips_64.cpp Mon Sep 26 11:52:55 2016 +0800 1.2 +++ b/src/cpu/mips/vm/stubGenerator_mips_64.cpp Mon Sep 26 13:44:12 2016 +0800 1.3 @@ -1253,7 +1253,7 @@ 1.4 // cache line boundaries will still be loaded and stored atomicly. 1.5 // 1.6 address generate_conjoint_int_oop_copy(bool aligned, bool is_oop, const char *name) { 1.7 - Label l_2, l_3, l_4, l_stchk; 1.8 + Label l_2, l_4; 1.9 StubCodeMark mark(this, "StubRoutines", name); 1.10 __ align(CodeEntryAlignment); 1.11 address start = __ pc(); 1.12 @@ -1276,84 +1276,51 @@ 1.13 __ push(T1); 1.14 __ push(T8); 1.15 1.16 - /* 1.17 - __ pushl(esi); 1.18 - __ movl(ecx, Address(esp, 4+12)); // count 1.19 - __ pushl(edi); 1.20 - __ movl(esi, Address(esp, 8+ 4)); // from 1.21 - __ movl(edi, Address(esp, 8+ 8)); // to 1.22 - */ 1.23 __ move(T1, A2); 1.24 __ move(T3, A0); 1.25 __ move(T0, A1); 1.26 + // T3: source array address 1.27 + // T0: destination array address 1.28 + // T1: element count 1.29 1.30 - //__ leal(esi, Address(esi, ecx, Address::times_4, -4)); // from + count*4 - 4 1.31 + if (is_oop) { 1.32 + __ sync(); 1.33 + } 1.34 + 1.35 __ sll(AT, T1, Address::times_4); 1.36 __ add(AT, T3, AT); 1.37 __ lea(T3 , Address(AT, -4)); 1.38 - //__ std(); 1.39 - //__ leal(edi, Address(edi, ecx, Address::times_4, -4)); // to + count*4 - 4 1.40 __ sll(AT, T1, Address::times_4); 1.41 __ add(AT, T0, AT); 1.42 __ lea(T0 , Address(AT, -4)); 1.43 1.44 - // __ cmpl(ecx, 32); 1.45 - // __ jcc(Assembler::above, l_3); // > 32 dwords 1.46 - // __ testl(ecx, ecx); 1.47 - //__ jcc(Assembler::zero, l_4); 1.48 __ beq(T1, R0, l_4); 1.49 __ delayed()->nop(); 1.50 - // __ subl(edi, esi); 1.51 + 1.52 __ align(16); 1.53 __ bind(l_2); 1.54 - // __ movl(edx, Address(esi)); 1.55 __ lw(AT, T3, 0); 1.56 - // __ movl(Address(esi, edi, Address::times_1), edx); 1.57 __ sw(AT, T0, 0); 1.58 - // __ subl(esi, 4); 1.59 __ addi(T3, T3, -4); 1.60 __ addi(T0, T0, -4); 1.61 - // __ decl(ecx); 1.62 __ addi(T1, T1, -1); 1.63 - //__ jcc(Assembler::notEqual, l_2); 1.64 __ bne(T1, R0, l_2); 1.65 __ delayed()->nop(); 1.66 + 1.67 if (is_oop) { 1.68 - // __ jmp(l_stchk); 1.69 - __ b( l_stchk); 1.70 - __ delayed()->nop(); 1.71 + __ move(T0, A1); 1.72 + __ move(T1, A2); 1.73 + array_store_check(); 1.74 + __ sync(); 1.75 } 1.76 __ bind(l_4); 1.77 - // __ cld(); 1.78 - // __ popl(edi); 1.79 - // __ popl(esi); 1.80 - // __ ret(0); 1.81 __ pop(T8); 1.82 __ pop(T1); 1.83 __ pop(T0); 1.84 __ pop(T3); 1.85 __ jr(RA); 1.86 __ delayed()->nop(); 1.87 - __ bind(l_3); 1.88 - // __ rep_movl(); 1.89 - if (is_oop) { 1.90 - __ bind(l_stchk); 1.91 - // __ movl(edi, Address(esp, 8+ 8)); 1.92 - __ move(T0, A1); 1.93 - // __ movl(ecx, Address(esp, 8+ 12)); 1.94 - __ move(T1, A2); 1.95 - array_store_check(); 1.96 - } 1.97 - // __ cld(); 1.98 - // __ popl(edi); 1.99 - // __ popl(esi); 1.100 - // __ ret(0); 1.101 - __ pop(T8); 1.102 - __ pop(T1); 1.103 - __ pop(T0); 1.104 - __ pop(T3); 1.105 - __ jr(RA); 1.106 - __ delayed()->nop(); 1.107 + 1.108 return start; 1.109 } 1.110