Mercurial > jdk8-mips64-public > hotspot / changeset
changeset
6796746: rename LoadC (char) opcode class to LoadUS (unsigned short)
Mon, 26 Jan 2009 16:22:12 +0100
- author
- twisti
- date
- Mon, 26 Jan 2009 16:22:12 +0100
- changeset 993
- 3b5ac9e7e6ea
- parent 992
- 465813e0303a
- child 994
- 7628781568e1
6796746: rename LoadC (char) opcode class to LoadUS (unsigned short)
Summary: Renaming LoadC to LoadUS would round up the planned introduction of LoadUB and LoadUI.
Reviewed-by: phh, kvn
1.1 --- a/src/cpu/sparc/vm/sparc.ad Wed Jan 21 11:18:38 2009 -0800 1.2 +++ b/src/cpu/sparc/vm/sparc.ad Mon Jan 26 16:22:12 2009 +0100 1.3 @@ -762,7 +762,7 @@ 1.4 case Assembler::stdf_op3: st_op = Op_StoreD; break; 1.5 1.6 case Assembler::ldsb_op3: ld_op = Op_LoadB; break; 1.7 - case Assembler::lduh_op3: ld_op = Op_LoadC; break; 1.8 + case Assembler::lduh_op3: ld_op = Op_LoadUS; break; 1.9 case Assembler::ldsh_op3: ld_op = Op_LoadS; break; 1.10 case Assembler::ldx_op3: // may become LoadP or stay LoadI 1.11 case Assembler::ldsw_op3: // may become LoadP or stay LoadI 1.12 @@ -5316,9 +5316,9 @@ 1.13 ins_pipe(iload_mask_mem); 1.14 %} 1.15 1.16 -// Load Char (16bit UNsigned) into a Long Register 1.17 -instruct loadUCL(iRegL dst, memory mem, immL_FFFF bytemask) %{ 1.18 - match(Set dst (AndL (ConvI2L (LoadC mem)) bytemask)); 1.19 +// Load Unsigned Short/Char (16bit UNsigned) into a Long Register 1.20 +instruct loadUS2L(iRegL dst, memory mem, immL_FFFF bytemask) %{ 1.21 + match(Set dst (AndL (ConvI2L (LoadUS mem)) bytemask)); 1.22 ins_cost(MEMORY_REF_COST); 1.23 1.24 size(4); 1.25 @@ -5328,9 +5328,9 @@ 1.26 ins_pipe(iload_mask_mem); 1.27 %} 1.28 1.29 -// Load Char (16bit unsigned) 1.30 -instruct loadC(iRegI dst, memory mem) %{ 1.31 - match(Set dst (LoadC mem)); 1.32 +// Load Unsigned Short/Char (16bit unsigned) 1.33 +instruct loadUS(iRegI dst, memory mem) %{ 1.34 + match(Set dst (LoadUS mem)); 1.35 ins_cost(MEMORY_REF_COST); 1.36 1.37 size(4);
2.1 --- a/src/cpu/x86/vm/x86_32.ad Wed Jan 21 11:18:38 2009 -0800 2.2 +++ b/src/cpu/x86/vm/x86_32.ad Mon Jan 26 16:22:12 2009 +0100 2.3 @@ -6413,9 +6413,9 @@ 2.4 ins_pipe( ialu_reg_mem ); 2.5 %} 2.6 2.7 -// Load Char (16bit unsigned) 2.8 -instruct loadC(eRegI dst, memory mem) %{ 2.9 - match(Set dst (LoadC mem)); 2.10 +// Load Unsigned Short/Char (16bit unsigned) 2.11 +instruct loadUS(eRegI dst, memory mem) %{ 2.12 + match(Set dst (LoadUS mem)); 2.13 2.14 ins_cost(125); 2.15 format %{ "MOVZX $dst,$mem" %}
3.1 --- a/src/cpu/x86/vm/x86_64.ad Wed Jan 21 11:18:38 2009 -0800 3.2 +++ b/src/cpu/x86/vm/x86_64.ad Mon Jan 26 16:22:12 2009 +0100 3.3 @@ -6096,25 +6096,25 @@ 3.4 // ins_pipe(ialu_reg_mem); 3.5 // %} 3.6 3.7 -// Load Char (16 bit UNsigned) 3.8 -instruct loadC(rRegI dst, memory mem) 3.9 -%{ 3.10 - match(Set dst (LoadC mem)); 3.11 +// Load Unsigned Short/Char (16 bit UNsigned) 3.12 +instruct loadUS(rRegI dst, memory mem) 3.13 +%{ 3.14 + match(Set dst (LoadUS mem)); 3.15 3.16 ins_cost(125); 3.17 - format %{ "movzwl $dst, $mem\t# char" %} 3.18 + format %{ "movzwl $dst, $mem\t# ushort/char" %} 3.19 opcode(0x0F, 0xB7); 3.20 ins_encode(REX_reg_mem(dst, mem), OpcP, OpcS, reg_mem(dst, mem)); 3.21 ins_pipe(ialu_reg_mem); 3.22 %} 3.23 3.24 -// Load Char (16 bit UNsigned) into long 3.25 -// instruct loadC2L(rRegL dst, memory mem) 3.26 +// Load Unsigned Short/Char (16 bit UNsigned) into long 3.27 +// instruct loadUS2L(rRegL dst, memory mem) 3.28 // %{ 3.29 -// match(Set dst (ConvI2L (LoadC mem))); 3.30 +// match(Set dst (ConvI2L (LoadUS mem))); 3.31 3.32 // ins_cost(125); 3.33 -// format %{ "movzwl $dst, $mem\t# char -> long" %} 3.34 +// format %{ "movzwl $dst, $mem\t# ushort/char -> long" %} 3.35 // opcode(0x0F, 0xB7); 3.36 // ins_encode(REX_reg_mem(dst, mem), OpcP, OpcS, reg_mem(dst, mem)); 3.37 // ins_pipe(ialu_reg_mem);
4.1 --- a/src/share/vm/adlc/forms.cpp Wed Jan 21 11:18:38 2009 -0800 4.2 +++ b/src/share/vm/adlc/forms.cpp Mon Jan 26 16:22:12 2009 +0100 4.3 @@ -248,7 +248,7 @@ 4.4 // True if 'opType', an ideal name, loads or stores. 4.5 Form::DataType Form::is_load_from_memory(const char *opType) const { 4.6 if( strcmp(opType,"LoadB")==0 ) return Form::idealB; 4.7 - if( strcmp(opType,"LoadC")==0 ) return Form::idealC; 4.8 + if( strcmp(opType,"LoadUS")==0 ) return Form::idealC; 4.9 if( strcmp(opType,"LoadD")==0 ) return Form::idealD; 4.10 if( strcmp(opType,"LoadD_unaligned")==0 ) return Form::idealD; 4.11 if( strcmp(opType,"LoadF")==0 ) return Form::idealF;
5.1 --- a/src/share/vm/adlc/formssel.cpp Wed Jan 21 11:18:38 2009 -0800 5.2 +++ b/src/share/vm/adlc/formssel.cpp Mon Jan 26 16:22:12 2009 +0100 5.3 @@ -3314,7 +3314,7 @@ 5.4 "StoreI","StoreL","StoreP","StoreN","StoreD","StoreF" , 5.5 "StoreB","StoreC","Store" ,"StoreFP", 5.6 "LoadI" ,"LoadL", "LoadP" ,"LoadN", "LoadD" ,"LoadF" , 5.7 - "LoadB" ,"LoadC" ,"LoadS" ,"Load" , 5.8 + "LoadB" ,"LoadUS" ,"LoadS" ,"Load" , 5.9 "Store4I","Store2I","Store2L","Store2D","Store4F","Store2F","Store16B", 5.10 "Store8B","Store4B","Store8C","Store4C","Store2C", 5.11 "Load4I" ,"Load2I" ,"Load2L" ,"Load2D" ,"Load4F" ,"Load2F" ,"Load16B" ,
6.1 --- a/src/share/vm/opto/classes.hpp Wed Jan 21 11:18:38 2009 -0800 6.2 +++ b/src/share/vm/opto/classes.hpp Mon Jan 26 16:22:12 2009 +0100 6.3 @@ -129,7 +129,7 @@ 6.4 macro(LShiftI) 6.5 macro(LShiftL) 6.6 macro(LoadB) 6.7 -macro(LoadC) 6.8 +macro(LoadUS) 6.9 macro(LoadD) 6.10 macro(LoadD_unaligned) 6.11 macro(LoadF)
7.1 --- a/src/share/vm/opto/compile.cpp Wed Jan 21 11:18:38 2009 -0800 7.2 +++ b/src/share/vm/opto/compile.cpp Mon Jan 26 16:22:12 2009 +0100 7.3 @@ -2005,7 +2005,7 @@ 7.4 case Op_StoreP: 7.5 case Op_StoreN: 7.6 case Op_LoadB: 7.7 - case Op_LoadC: 7.8 + case Op_LoadUS: 7.9 case Op_LoadI: 7.10 case Op_LoadKlass: 7.11 case Op_LoadNKlass:
8.1 --- a/src/share/vm/opto/lcm.cpp Wed Jan 21 11:18:38 2009 -0800 8.2 +++ b/src/share/vm/opto/lcm.cpp Mon Jan 26 16:22:12 2009 +0100 8.3 @@ -107,7 +107,7 @@ 8.4 was_store = false; 8.5 switch( mach->ideal_Opcode() ) { 8.6 case Op_LoadB: 8.7 - case Op_LoadC: 8.8 + case Op_LoadUS: 8.9 case Op_LoadD: 8.10 case Op_LoadF: 8.11 case Op_LoadI:
9.1 --- a/src/share/vm/opto/loopnode.cpp Wed Jan 21 11:18:38 2009 -0800 9.2 +++ b/src/share/vm/opto/loopnode.cpp Mon Jan 26 16:22:12 2009 +0100 9.3 @@ -2654,7 +2654,7 @@ 9.4 case Op_ModF: 9.5 case Op_ModD: 9.6 case Op_LoadB: // Same with Loads; they can sink 9.7 - case Op_LoadC: // during loop optimizations. 9.8 + case Op_LoadUS: // during loop optimizations. 9.9 case Op_LoadD: 9.10 case Op_LoadF: 9.11 case Op_LoadI:
10.1 --- a/src/share/vm/opto/matcher.cpp Wed Jan 21 11:18:38 2009 -0800 10.2 +++ b/src/share/vm/opto/matcher.cpp Mon Jan 26 16:22:12 2009 +0100 10.3 @@ -1824,7 +1824,7 @@ 10.4 mem_op = true; 10.5 break; 10.6 case Op_LoadB: 10.7 - case Op_LoadC: 10.8 + case Op_LoadUS: 10.9 case Op_LoadD: 10.10 case Op_LoadF: 10.11 case Op_LoadI:
11.1 --- a/src/share/vm/opto/memnode.cpp Wed Jan 21 11:18:38 2009 -0800 11.2 +++ b/src/share/vm/opto/memnode.cpp Mon Jan 26 16:22:12 2009 +0100 11.3 @@ -779,14 +779,14 @@ 11.4 "use LoadRangeNode instead"); 11.5 switch (bt) { 11.6 case T_BOOLEAN: 11.7 - case T_BYTE: return new (C, 3) LoadBNode(ctl, mem, adr, adr_type, rt->is_int() ); 11.8 - case T_INT: return new (C, 3) LoadINode(ctl, mem, adr, adr_type, rt->is_int() ); 11.9 - case T_CHAR: return new (C, 3) LoadCNode(ctl, mem, adr, adr_type, rt->is_int() ); 11.10 - case T_SHORT: return new (C, 3) LoadSNode(ctl, mem, adr, adr_type, rt->is_int() ); 11.11 - case T_LONG: return new (C, 3) LoadLNode(ctl, mem, adr, adr_type, rt->is_long() ); 11.12 - case T_FLOAT: return new (C, 3) LoadFNode(ctl, mem, adr, adr_type, rt ); 11.13 - case T_DOUBLE: return new (C, 3) LoadDNode(ctl, mem, adr, adr_type, rt ); 11.14 - case T_ADDRESS: return new (C, 3) LoadPNode(ctl, mem, adr, adr_type, rt->is_ptr() ); 11.15 + case T_BYTE: return new (C, 3) LoadBNode (ctl, mem, adr, adr_type, rt->is_int() ); 11.16 + case T_INT: return new (C, 3) LoadINode (ctl, mem, adr, adr_type, rt->is_int() ); 11.17 + case T_CHAR: return new (C, 3) LoadUSNode(ctl, mem, adr, adr_type, rt->is_int() ); 11.18 + case T_SHORT: return new (C, 3) LoadSNode (ctl, mem, adr, adr_type, rt->is_int() ); 11.19 + case T_LONG: return new (C, 3) LoadLNode (ctl, mem, adr, adr_type, rt->is_long() ); 11.20 + case T_FLOAT: return new (C, 3) LoadFNode (ctl, mem, adr, adr_type, rt ); 11.21 + case T_DOUBLE: return new (C, 3) LoadDNode (ctl, mem, adr, adr_type, rt ); 11.22 + case T_ADDRESS: return new (C, 3) LoadPNode (ctl, mem, adr, adr_type, rt->is_ptr() ); 11.23 case T_OBJECT: 11.24 #ifdef _LP64 11.25 if (adr->bottom_type()->is_ptr_to_narrowoop()) { 11.26 @@ -1357,7 +1357,7 @@ 11.27 // Steps (a), (b): Walk past independent stores to find an exact match. 11.28 if (prev_mem != NULL && prev_mem != in(MemNode::Memory)) { 11.29 // (c) See if we can fold up on the spot, but don't fold up here. 11.30 - // Fold-up might require truncation (for LoadB/LoadS/LoadC) or 11.31 + // Fold-up might require truncation (for LoadB/LoadS/LoadUS) or 11.32 // just return a prior value, which is done by Identity calls. 11.33 if (can_see_stored_value(prev_mem, phase)) { 11.34 // Make ready for step (d): 11.35 @@ -1606,14 +1606,14 @@ 11.36 return LoadNode::Ideal(phase, can_reshape); 11.37 } 11.38 11.39 -//--------------------------LoadCNode::Ideal-------------------------------------- 11.40 +//--------------------------LoadUSNode::Ideal------------------------------------- 11.41 // 11.42 // If the previous store is to the same address as this load, 11.43 // and the value stored was larger than a char, replace this load 11.44 // with the value stored truncated to a char. If no truncation is 11.45 // needed, the replacement is done in LoadNode::Identity(). 11.46 // 11.47 -Node *LoadCNode::Ideal(PhaseGVN *phase, bool can_reshape) { 11.48 +Node *LoadUSNode::Ideal(PhaseGVN *phase, bool can_reshape) { 11.49 Node* mem = in(MemNode::Memory); 11.50 Node* value = can_see_stored_value(mem,phase); 11.51 if( value && !phase->type(value)->higher_equal( _type ) )
12.1 --- a/src/share/vm/opto/memnode.hpp Wed Jan 21 11:18:38 2009 -0800 12.2 +++ b/src/share/vm/opto/memnode.hpp Mon Jan 26 16:22:12 2009 +0100 12.3 @@ -207,11 +207,11 @@ 12.4 virtual BasicType memory_type() const { return T_BYTE; } 12.5 }; 12.6 12.7 -//------------------------------LoadCNode-------------------------------------- 12.8 -// Load a char (16bits unsigned) from memory 12.9 -class LoadCNode : public LoadNode { 12.10 +//------------------------------LoadUSNode------------------------------------- 12.11 +// Load an unsigned short/char (16bits unsigned) from memory 12.12 +class LoadUSNode : public LoadNode { 12.13 public: 12.14 - LoadCNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::CHAR ) 12.15 + LoadUSNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::CHAR ) 12.16 : LoadNode(c,mem,adr,at,ti) {} 12.17 virtual int Opcode() const; 12.18 virtual uint ideal_reg() const { return Op_RegI; }
13.1 --- a/src/share/vm/opto/mulnode.cpp Wed Jan 21 11:18:38 2009 -0800 13.2 +++ b/src/share/vm/opto/mulnode.cpp Mon Jan 26 16:22:12 2009 +0100 13.3 @@ -442,7 +442,7 @@ 13.4 return load; 13.5 } 13.6 uint lop = load->Opcode(); 13.7 - if( lop == Op_LoadC && 13.8 + if( lop == Op_LoadUS && 13.9 con == 0x0000FFFF ) // Already zero-extended 13.10 return load; 13.11 // Masking off the high bits of a unsigned-shift-right is not 13.12 @@ -470,19 +470,19 @@ 13.13 uint lop = load->Opcode(); 13.14 13.15 // Masking bits off of a Character? Hi bits are already zero. 13.16 - if( lop == Op_LoadC && 13.17 + if( lop == Op_LoadUS && 13.18 (mask & 0xFFFF0000) ) // Can we make a smaller mask? 13.19 return new (phase->C, 3) AndINode(load,phase->intcon(mask&0xFFFF)); 13.20 13.21 // Masking bits off of a Short? Loading a Character does some masking 13.22 if( lop == Op_LoadS && 13.23 (mask & 0xFFFF0000) == 0 ) { 13.24 - Node *ldc = new (phase->C, 3) LoadCNode(load->in(MemNode::Control), 13.25 + Node *ldus = new (phase->C, 3) LoadUSNode(load->in(MemNode::Control), 13.26 load->in(MemNode::Memory), 13.27 load->in(MemNode::Address), 13.28 load->adr_type()); 13.29 - ldc = phase->transform(ldc); 13.30 - return new (phase->C, 3) AndINode(ldc,phase->intcon(mask&0xFFFF)); 13.31 + ldus = phase->transform(ldus); 13.32 + return new (phase->C, 3) AndINode(ldus, phase->intcon(mask&0xFFFF)); 13.33 } 13.34 13.35 // Masking sign bits off of a Byte? Let the matcher use an unsigned load 13.36 @@ -913,7 +913,7 @@ 13.37 set_req(2, phase->intcon(0)); 13.38 return this; 13.39 } 13.40 - else if( ld->Opcode() == Op_LoadC ) 13.41 + else if( ld->Opcode() == Op_LoadUS ) 13.42 // Replace zero-extension-load with sign-extension-load 13.43 return new (phase->C, 3) LoadSNode( ld->in(MemNode::Control), 13.44 ld->in(MemNode::Memory),
14.1 --- a/src/share/vm/opto/superword.cpp Wed Jan 21 11:18:38 2009 -0800 14.2 +++ b/src/share/vm/opto/superword.cpp Mon Jan 26 16:22:12 2009 +0100 14.3 @@ -1444,7 +1444,7 @@ 14.4 // (Start, end] half-open range defining which operands are vector 14.5 void SuperWord::vector_opd_range(Node* n, uint* start, uint* end) { 14.6 switch (n->Opcode()) { 14.7 - case Op_LoadB: case Op_LoadC: 14.8 + case Op_LoadB: case Op_LoadUS: 14.9 case Op_LoadI: case Op_LoadL: 14.10 case Op_LoadF: case Op_LoadD: 14.11 case Op_LoadP:
15.1 --- a/src/share/vm/opto/vectornode.cpp Wed Jan 21 11:18:38 2009 -0800 15.2 +++ b/src/share/vm/opto/vectornode.cpp Mon Jan 26 16:22:12 2009 +0100 15.3 @@ -239,7 +239,7 @@ 15.4 return Op_XorV; 15.5 15.6 case Op_LoadB: 15.7 - case Op_LoadC: 15.8 + case Op_LoadUS: 15.9 case Op_LoadS: 15.10 case Op_LoadI: 15.11 case Op_LoadL: 15.12 @@ -269,7 +269,7 @@ 15.13 case 16: return Op_Load16B; 15.14 } 15.15 break; 15.16 - case Op_LoadC: 15.17 + case Op_LoadUS: 15.18 switch (vlen) { 15.19 case 2: return Op_Load2C; 15.20 case 4: return Op_Load4C;
