Wed, 08 Mar 2017 05:42:36 -0500
Expand NativeCall::return_address_offset to NativeCall::return_address_offset_short & NativeCall::return_address_offset_long for MIPS.
1.1 --- a/src/cpu/mips/vm/assembler_mips.cpp Wed Mar 08 14:49:50 2017 +0800 1.2 +++ b/src/cpu/mips/vm/assembler_mips.cpp Wed Mar 08 05:42:36 2017 -0500 1.3 @@ -2382,7 +2382,7 @@ 1.4 li48(d, value); 1.5 count += 4; 1.6 } else { // li64 1.7 - tty->print_cr("In MacroAssembler::patchable_set48, value = 0x%x", value); 1.8 + tty->print_cr("value = 0x%x", value); 1.9 guarantee(false, "Not supported yet !"); 1.10 } 1.11 1.12 @@ -2420,7 +2420,7 @@ 1.13 count += 1; 1.14 } 1.15 } else { 1.16 - tty->print_cr("In MacroAssembler::patchable_set32, value = 0x%x", value); 1.17 + tty->print_cr("value = 0x%x", value); 1.18 guarantee(false, "Not supported yet !"); 1.19 } 1.20 1.21 @@ -2429,6 +2429,35 @@ 1.22 } 1.23 } 1.24 1.25 +void MacroAssembler::patchable_call32(Register d, jlong value) { 1.26 + assert_not_delayed(); 1.27 + 1.28 + int hi = (int)(value >> 32); 1.29 + int lo = (int)(value & ~0); 1.30 + 1.31 + int count = 0; 1.32 + 1.33 + if (value == lo) { // 32-bit integer 1.34 + if (is_simm16(value)) { 1.35 + daddiu(d, R0, value); 1.36 + count += 1; 1.37 + } else { 1.38 + lui(d, split_low(value >> 16)); 1.39 + count += 1; 1.40 + if (split_low(value)) { 1.41 + ori(d, d, split_low(value)); 1.42 + count += 1; 1.43 + } 1.44 + } 1.45 + } else { 1.46 + tty->print_cr("value = 0x%x", value); 1.47 + guarantee(false, "Not supported yet !"); 1.48 + } 1.49 + 1.50 + for (count; count < 2; count++) { 1.51 + nop(); 1.52 + } 1.53 +} 1.54 1.55 void MacroAssembler::set_narrow_klass(Register dst, Klass* k) { 1.56 assert(UseCompressedClassPointers, "should only be used for compressed header");
2.1 --- a/src/cpu/mips/vm/assembler_mips.hpp Wed Mar 08 14:49:50 2017 +0800 2.2 +++ b/src/cpu/mips/vm/assembler_mips.hpp Wed Mar 08 05:42:36 2017 -0500 2.3 @@ -2455,6 +2455,8 @@ 2.4 void patchable_set48(Register d, jlong value); 2.5 void patchable_set32(Register d, jlong value); 2.6 2.7 + void patchable_call32(Register d, jlong value); 2.8 + 2.9 void dli(Register rd, long imm) { li(rd, imm); } 2.10 void li64(Register rd, long imm); 2.11 void li48(Register rd, long imm);
3.1 --- a/src/cpu/mips/vm/c1_Runtime1_mips.cpp Wed Mar 08 14:49:50 2017 +0800 3.2 +++ b/src/cpu/mips/vm/c1_Runtime1_mips.cpp Wed Mar 08 05:42:36 2017 -0500 3.3 @@ -73,7 +73,7 @@ 3.4 lui(AT, Assembler::split_high(save_pc)); 3.5 addiu(AT, AT, Assembler::split_low(save_pc)); 3.6 #else 3.7 - uintptr_t save_pc = (uintptr_t)pc() + NativeMovConstReg::instruction_size + 1 * BytesPerInstWord + NativeCall::return_address_offset; 3.8 + uintptr_t save_pc = (uintptr_t)pc() + NativeMovConstReg::instruction_size + 1 * BytesPerInstWord + NativeCall::return_address_offset_long; 3.9 li48(AT, save_pc); 3.10 #endif 3.11 } 3.12 @@ -908,7 +908,7 @@ 3.13 __ lui(AT, Assembler::split_high(save_pc)); 3.14 __ addiu(AT, AT, Assembler::split_low(save_pc)); 3.15 #else 3.16 - uintptr_t save_pc = (uintptr_t)__ pc() + NativeMovConstReg::instruction_size + 1 * BytesPerInstWord + NativeCall::return_address_offset; 3.17 + uintptr_t save_pc = (uintptr_t)__ pc() + NativeMovConstReg::instruction_size + 1 * BytesPerInstWord + NativeCall::return_address_offset_long; 3.18 __ li48(AT, save_pc); 3.19 #endif 3.20 }
4.1 --- a/src/cpu/mips/vm/nativeInst_mips.hpp Wed Mar 08 14:49:50 2017 +0800 4.2 +++ b/src/cpu/mips/vm/nativeInst_mips.hpp Wed Mar 08 05:42:36 2017 -0500 4.3 @@ -162,14 +162,26 @@ 4.4 return_address_offset = 4 * BytesPerInstWord, 4.5 #else 4.6 instruction_size = 6 * BytesPerInstWord, 4.7 - return_address_offset = 6 * BytesPerInstWord, 4.8 + return_address_offset_short = 6 * BytesPerInstWord, 4.9 + return_address_offset_long = 6 * BytesPerInstWord, 4.10 #endif 4.11 - displacement_offset = 0 4.12 + displacement_offset = 0 4.13 }; 4.14 4.15 address instruction_address() const { return addr_at(instruction_offset); } 4.16 - address next_instruction_address() const { return addr_at(return_address_offset); } 4.17 - address return_address() const { return addr_at(return_address_offset); } 4.18 + 4.19 + address next_instruction_address() const { 4.20 + if (is_special_op(int_at(8), Assembler::jalr_op)) { 4.21 + return addr_at(return_address_offset_short); 4.22 + } else { 4.23 + return addr_at(return_address_offset_long); 4.24 + } 4.25 + } 4.26 + 4.27 + address return_address() const { 4.28 + return next_instruction_address(); 4.29 + } 4.30 + 4.31 address destination() const; 4.32 void set_destination(address dest); 4.33 void set_destination_mt_safe(address dest) { set_destination(dest);} 4.34 @@ -190,7 +202,7 @@ 4.35 } 4.36 4.37 static bool is_call_before(address return_address) { 4.38 - return is_call_at(return_address - NativeCall::return_address_offset); 4.39 + return is_call_at(return_address - return_address_offset_short) | is_call_at(return_address - return_address_offset_long); 4.40 } 4.41 4.42 static bool is_call_to(address instr, address target) { 4.43 @@ -213,7 +225,12 @@ 4.44 } 4.45 4.46 inline NativeCall* nativeCall_before(address return_address) { 4.47 - NativeCall* call = (NativeCall*)(return_address - NativeCall::return_address_offset); 4.48 + NativeCall* call = NULL; 4.49 + if (NativeCall::is_call_at(return_address - NativeCall::return_address_offset_long)) { 4.50 + call = (NativeCall*)(return_address - NativeCall::return_address_offset_long); 4.51 + } else { 4.52 + call = (NativeCall*)(return_address - NativeCall::return_address_offset_short); 4.53 + } 4.54 #ifdef ASSERT 4.55 call->verify(); 4.56 #endif 4.57 @@ -596,6 +613,31 @@ 4.58 return true; 4.59 } 4.60 4.61 + 4.62 + //daddiu dst, R0, imm16 4.63 + //nop 4.64 + if ( is_op(Assembler::daddiu_op) && 4.65 + nativeInstruction_at(addr_at(4))->is_nop() && 4.66 + is_special_op(int_at(8), Assembler::jalr_op) ) { 4.67 + return true; 4.68 + } 4.69 + 4.70 + //lui dst, imm16 4.71 + //ori dst, dst, imm16 4.72 + if ( is_op(Assembler::lui_op) && 4.73 + is_op (int_at(4), Assembler::ori_op) && 4.74 + is_special_op(int_at(8), Assembler::jalr_op) ) { 4.75 + return true; 4.76 + } 4.77 + 4.78 + //lui dst, imm16 4.79 + //nop 4.80 + if ( is_op(Assembler::lui_op) && 4.81 + nativeInstruction_at(addr_at(4))->is_nop() && 4.82 + is_special_op(int_at(8), Assembler::jalr_op) ) { 4.83 + return true; 4.84 + } 4.85 + 4.86 return false; 4.87 4.88 #endif
5.1 --- a/src/cpu/mips/vm/runtime_mips_64.cpp Wed Mar 08 14:49:50 2017 +0800 5.2 +++ b/src/cpu/mips/vm/runtime_mips_64.cpp Wed Mar 08 05:42:36 2017 -0500 5.3 @@ -130,13 +130,13 @@ 5.4 __ relocate(relocInfo::internal_pc_type); 5.5 5.6 { 5.7 - long save_pc = (long)__ pc() + 24 + NativeCall::return_address_offset; 5.8 + long save_pc = (long)__ pc() + 48; 5.9 __ patchable_set48(AT, save_pc); 5.10 } 5.11 __ sd(AT, thread, in_bytes(JavaThread::last_Java_pc_offset())); 5.12 5.13 __ move(A0, thread); 5.14 - __ set64(T9, (long)OptoRuntime::handle_exception_C); 5.15 + __ patchable_set48(T9, (long)OptoRuntime::handle_exception_C); 5.16 __ jalr(T9); 5.17 __ delayed()->nop(); 5.18
6.1 --- a/src/cpu/mips/vm/sharedRuntime_mips_64.cpp Wed Mar 08 14:49:50 2017 +0800 6.2 +++ b/src/cpu/mips/vm/sharedRuntime_mips_64.cpp Wed Mar 08 05:42:36 2017 -0500 6.3 @@ -3714,7 +3714,7 @@ 6.4 // Prolog for non exception case! 6.5 // Correct the return address we were given. 6.6 //FIXME, return address is on the tos or Ra? 6.7 - __ addi(RA, RA, - (NativeCall::return_address_offset)); 6.8 + __ addi(RA, RA, - (NativeCall::return_address_offset_short)); 6.9 // Save everything in sight. 6.10 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words); 6.11 // Normal deoptimization 6.12 @@ -3758,7 +3758,7 @@ 6.13 // available now because loading it from memory would destroy registers. 6.14 // Save everything in sight. 6.15 // No need to update map as each call to save_live_registers will produce identical oopmap 6.16 - __ addi(RA, RA, - (NativeCall::return_address_offset)); 6.17 + __ addi(RA, RA, - (NativeCall::return_address_offset_short)); 6.18 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words); 6.19 6.20 // Now it is safe to overwrite any register 6.21 @@ -3795,29 +3795,6 @@ 6.22 __ get_thread(thread); 6.23 #endif 6.24 6.25 -/* 6.26 - * 6.27 - 0x000000555bd82aec: dadd a0, s6, zero ; __ move(A0, thread); 6.28 - 0x000000555bd82af0: daddi sp, sp, 0xfffffff0 ; __ addi(SP, SP, -additional_words * wordSize); 6.29 - 0x000000555bd82af4: sd sp, 0x1c8(s6) ; __ set_last_Java_frame(thread, NOREG, NOREG, NULL); 6.30 - 0x000000555bd82af8: lui at, 0x0 ; __ li64(AT, save_pc); 6.31 - 0x000000555bd82afc: ori at, at, 0x55 6.32 - 0x000000555bd82b00: dsll at, at, 16 6.33 - 0x000000555bd82b04: ori at, at, 0x5bd8 6.34 - 0x000000555bd82b08: dsll at, at, 16 6.35 - 0x000000555bd82b0c: ori at, at, 0x2b34 ; save_pc = pc() + NativeMovConstReg::instruction_size + NativeCall::return_address_offset + 4 6.36 - 0x000000555bd82b10: sd at, 0x1d0(s6) 6.37 - 0x000000555bd82b14: lui t9, 0x0 6.38 - 0x000000555bd82b18: ori t9, t9, 0x55 6.39 - 0x000000555bd82b1c: dsll t9, t9, 16 6.40 - 0x000000555bd82b20: ori t9, t9, 0x5aa6 6.41 - 0x000000555bd82b24: dsll t9, t9, 16 6.42 - 0x000000555bd82b28: ori t9, t9, 0x4074 6.43 - 0x000000555bd82b2c: jalr t9 6.44 - 0x000000555bd82b30: sll zero, zero, 0 6.45 - 6.46 - 0x000000555bd82b34: daddiu sp, sp, 0x10 ; save_pc 6.47 - */ 6.48 __ move(A0, thread); 6.49 __ addi(SP, SP, -additional_words * wordSize); 6.50 6.51 @@ -3828,7 +3805,7 @@ 6.52 6.53 __ relocate(relocInfo::internal_pc_type); 6.54 { 6.55 - intptr_t save_pc = (intptr_t)__ pc() + NativeMovConstReg::instruction_size + NativeCall::return_address_offset + 4; 6.56 + intptr_t save_pc = (intptr_t)__ pc() + NativeMovConstReg::instruction_size + 28; 6.57 __ patchable_set48(AT, save_pc); 6.58 } 6.59 __ sd(AT, thread, in_bytes(JavaThread::frame_anchor_offset() + JavaFrameAnchor::last_Java_pc_offset())); 6.60 @@ -3993,7 +3970,7 @@ 6.61 6.62 __ relocate(relocInfo::internal_pc_type); 6.63 { 6.64 - intptr_t save_pc = (intptr_t)__ pc() + NativeMovConstReg::instruction_size + NativeCall::return_address_offset + 4; 6.65 + intptr_t save_pc = (intptr_t)__ pc() + NativeMovConstReg::instruction_size + 28; 6.66 __ patchable_set48(AT, save_pc); 6.67 } 6.68 __ sd(AT, thread, in_bytes(JavaThread::frame_anchor_offset() + JavaFrameAnchor::last_Java_pc_offset())); 6.69 @@ -4091,9 +4068,8 @@ 6.70 // set last_Java_sp 6.71 __ set_last_Java_frame(NOREG, FP, NULL); 6.72 __ relocate(relocInfo::internal_pc_type); 6.73 - assert(NativeCall::return_address_offset == 24, "in sharedRuntime return_address_offset"); 6.74 { 6.75 - long save_pc = (long)__ pc() + 28 + NativeCall::return_address_offset; 6.76 + long save_pc = (long)__ pc() + 52; 6.77 __ patchable_set48(AT, (long)save_pc); 6.78 __ sd(AT, thread, in_bytes(JavaThread::frame_anchor_offset() + JavaFrameAnchor::last_Java_pc_offset())); 6.79 } 6.80 @@ -4103,7 +4079,7 @@ 6.81 __ move(A0, thread); 6.82 // argument already in T0 6.83 __ move(A1, T0); 6.84 - __ set64(T9, (long)Deoptimization::uncommon_trap); 6.85 + __ patchable_set48(T9, (long)Deoptimization::uncommon_trap); 6.86 __ jalr(T9); 6.87 __ delayed()->nop(); 6.88 6.89 @@ -4215,7 +4191,7 @@ 6.90 6.91 __ relocate(relocInfo::internal_pc_type); 6.92 { 6.93 - long save_pc = (long)__ pc() + 28 + NativeCall::return_address_offset; 6.94 + long save_pc = (long)__ pc() + 52; 6.95 __ patchable_set48(AT, (long)save_pc); 6.96 } 6.97 __ sd(AT, thread,in_bytes(JavaThread::frame_anchor_offset() + JavaFrameAnchor::last_Java_pc_offset())); 6.98 @@ -4225,7 +4201,7 @@ 6.99 // restore return values to their stack-slots with the new SP. 6.100 __ move(A0, thread); 6.101 __ move(A1, Deoptimization::Unpack_uncommon_trap); 6.102 - __ set64(T9, (long)Deoptimization::unpack_frames); 6.103 + __ patchable_set48(T9, (long)Deoptimization::unpack_frames); 6.104 __ jalr(T9); 6.105 __ delayed()->nop(); 6.106 // Set an oopmap for the call site 6.107 @@ -4406,7 +4382,7 @@ 6.108 __ andr(SP, SP, AT); 6.109 __ relocate(relocInfo::internal_pc_type); 6.110 { 6.111 - intptr_t save_pc = (intptr_t)__ pc() + NativeMovConstReg::instruction_size + NativeCall::return_address_offset + 1 * BytesPerInstWord; 6.112 + intptr_t save_pc = (intptr_t)__ pc() + NativeMovConstReg::instruction_size + 24 + 1 * BytesPerInstWord; 6.113 //tty->print_cr(" %s :%d, name:%s, pc: %lx, save_pc: %lx, frame_size_words: %lx", __func__, __LINE__, name, __ pc(), save_pc, frame_size_words); //aoqi_test 6.114 __ patchable_set48(AT, save_pc); 6.115 }
7.1 --- a/src/cpu/mips/vm/stubGenerator_mips_64.cpp Wed Mar 08 14:49:50 2017 +0800 7.2 +++ b/src/cpu/mips/vm/stubGenerator_mips_64.cpp Wed Mar 08 05:42:36 2017 -0500 7.3 @@ -2004,7 +2004,7 @@ 7.4 __ set_last_Java_frame(java_thread, SP, FP, NULL); 7.5 __ relocate(relocInfo::internal_pc_type); 7.6 { 7.7 - intptr_t save_pc = (intptr_t)__ pc() + NativeMovConstReg::instruction_size + NativeCall::return_address_offset + 4; 7.8 + intptr_t save_pc = (intptr_t)__ pc() + NativeMovConstReg::instruction_size + 28; 7.9 __ patchable_set48(AT, save_pc); 7.10 } 7.11 __ sd(AT, java_thread, in_bytes(JavaThread::last_Java_pc_offset()));