Mercurial > jdk8-mips64-public > hotspot / changeset

     1.1 --- a/src/cpu/mips/vm/assembler_mips.cpp	Tue May 21 20:45:26 2019 +0800
     1.2 +++ b/src/cpu/mips/vm/assembler_mips.cpp	Tue May 21 21:12:18 2019 +0800
     1.3 @@ -292,9 +292,72 @@
     1.4    lbu(rt, src.base(), src.disp());
     1.5  }
     1.6  
     1.7 -void Assembler::ld(Register rt, Address src){
     1.8 -  assert(src.index() == NOREG, "index is unimplemented");
     1.9 -  ld(rt, src.base(), src.disp());
    1.10 +void Assembler::ld(Register rt, Address dst){
    1.11 +  Register src   = rt;
    1.12 +  Register base  = dst.base();
    1.13 +  Register index = dst.index();
    1.14 +
    1.15 +  int scale = dst.scale();
    1.16 +  int disp  = dst.disp();
    1.17 +
    1.18 +  if(index != noreg) {
    1.19 +    if( Assembler::is_simm16(disp) ) {
    1.20 +      if( UseLoongsonISA && Assembler::is_simm(disp, 8) ) {
    1.21 +        if (scale == 0) {
    1.22 +          gsldx(src, base, index, disp);
    1.23 +        } else {
    1.24 +          dsll(AT, index, scale);
    1.25 +          gsldx(src, base, AT, disp);
    1.26 +        }
    1.27 +      } else {
    1.28 +        if (scale == 0) {
    1.29 +          daddu(AT, base, index);
    1.30 +        } else {
    1.31 +          dsll(AT, index, scale);
    1.32 +          daddu(AT, base, AT);
    1.33 +        }
    1.34 +        ld(src, AT, disp);
    1.35 +      }
    1.36 +    } else {
    1.37 +      if (scale == 0) {
    1.38 +        lui(AT, split_low(disp >> 16));
    1.39 +        if (split_low(disp)) ori(AT, AT, split_low(disp));
    1.40 +        daddu(AT, AT, base);
    1.41 +        if( UseLoongsonISA ) {
    1.42 +          gsldx(src, AT, index, 0);
    1.43 +        } else {
    1.44 +          daddu(AT, AT, index);
    1.45 +          ld(src, AT, 0);
    1.46 +        }
    1.47 +      } else {
    1.48 +        assert_different_registers(src, AT);
    1.49 +        dsll(AT, index, scale);
    1.50 +        daddu(AT, base, AT);
    1.51 +        lui(src, split_low(disp >> 16));
    1.52 +        if (split_low(disp)) ori(src, src, split_low(disp));
    1.53 +        if( UseLoongsonISA ) {
    1.54 +          gsldx(src, AT, src, 0);
    1.55 +        } else {
    1.56 +          daddu(AT, AT, src);
    1.57 +          ld(src, AT, 0);
    1.58 +        }
    1.59 +      }
    1.60 +    }
    1.61 +  } else {
    1.62 +    if( Assembler::is_simm16(disp) ) {
    1.63 +      ld(src, base, disp);
    1.64 +    } else {
    1.65 +      lui(AT, split_low(disp >> 16));
    1.66 +      if (split_low(disp)) ori(AT, AT, split_low(disp));
    1.67 +
    1.68 +      if( UseLoongsonISA ) {
    1.69 +        gsldx(src, base, AT, 0);
    1.70 +      } else {
    1.71 +        daddu(AT, base, AT);
    1.72 +        ld(src, AT, 0);
    1.73 +      }
    1.74 +    }
    1.75 +  }
    1.76  }
    1.77  
    1.78  void Assembler::ldl(Register rt, Address src){
    1.79 @@ -393,7 +456,6 @@
    1.80        }
    1.81      }
    1.82    }
    1.83 -
    1.84  }
    1.85  
    1.86  void Assembler::lea(Register rt, Address src) {

     2.1 --- a/src/cpu/mips/vm/macroAssembler_mips.hpp	Tue May 21 20:45:26 2019 +0800
     2.2 +++ b/src/cpu/mips/vm/macroAssembler_mips.hpp	Tue May 21 21:12:18 2019 +0800
     2.3 @@ -588,22 +588,11 @@
     2.4  
     2.5    // ld_ptr will perform lw for 32 bit VMs and ld for 64 bit VMs
     2.6    inline void ld_ptr(Register rt, Address a) {
     2.7 -    if (Assembler::is_simm16(a.disp())) {
     2.8  #ifdef _LP64
     2.9 -      ld(rt, a.base(), a.disp());
    2.10 +    ld(rt, a);
    2.11  #else
    2.12 -      lw(rt, a.base(), a.disp());
    2.13 +    lw(rt, a);
    2.14  #endif
    2.15 -    } else {
    2.16 -      Register tmp = AT;
    2.17 -      move(tmp, a.disp());
    2.18 -      daddu(tmp, a.base(), tmp);
    2.19 -#ifdef _LP64
    2.20 -      ld(rt, tmp, 0);
    2.21 -#else
    2.22 -      lw(rt, tmp, 0);
    2.23 -#endif
    2.24 -    }
    2.25    }
    2.26  
    2.27    inline void ld_ptr(Register rt, Register base, int offset16) {
    2.28 @@ -617,23 +606,11 @@
    2.29  
    2.30    // st_ptr will perform sw for 32 bit VMs and sd for 64 bit VMs
    2.31    inline void st_ptr(Register rt, Address a) {
    2.32 -    if (Assembler::is_simm16(a.disp())) {
    2.33  #ifdef _LP64
    2.34 -      sd(rt, a.base(), a.disp());
    2.35 +    sd(rt, a);
    2.36  #else
    2.37 -      sw(rt, a.base(), a.disp());
    2.38 +    sw(rt, a);
    2.39  #endif
    2.40 -    } else {
    2.41 -      Register tmp = AT;
    2.42 -      assert_different_registers(rt, tmp);
    2.43 -      move(tmp, a.disp());
    2.44 -      daddu(tmp, a.base(), tmp);
    2.45 -#ifdef _LP64
    2.46 -      sd(rt, tmp, 0);
    2.47 -#else
    2.48 -      sw(rt, tmp, 0);
    2.49 -#endif
    2.50 -    }
    2.51    }
    2.52  
    2.53    inline void st_ptr(Register rt, Register base, int offset16) {