Fri, 16 Oct 2020 17:11:33 +0800
#15186 Backport of #15095 The value of src will be overwritten if src and T9 are the same register.
Reviewed-by: aoqi
src/cpu/mips/vm/assembler_mips.cpp | file | annotate | diff | comparison | revisions |
1.1 --- a/src/cpu/mips/vm/assembler_mips.cpp Sun Oct 25 03:07:23 2020 +0800 1.2 +++ b/src/cpu/mips/vm/assembler_mips.cpp Fri Oct 16 17:11:33 2020 +0800 1.3 @@ -505,6 +505,7 @@ 1.4 daddu(AT, AT, base); 1.5 daddiu(dst, AT, disp); 1.6 } else { 1.7 + assert_different_registers(dst, AT); 1.8 lui(AT, split_low(disp >> 16)); 1.9 if (split_low(disp)) ori(AT, AT, split_low(disp)); 1.10 daddu(AT, AT, base); 1.11 @@ -586,22 +587,17 @@ 1.12 sd(src, AT, 0); 1.13 } 1.14 } else { 1.15 - sd(T9, SP, -wordSize); 1.16 daddiu(SP, SP, -wordSize); 1.17 + sd(T9, SP, 0); 1.18 1.19 dsll(AT, index, scale); 1.20 daddu(AT, base, AT); 1.21 lui(T9, split_low(disp >> 16)); 1.22 if (split_low(disp)) ori(T9, T9, split_low(disp)); 1.23 - if (UseLEXT1) { 1.24 - gssdx(src, AT, T9, 0); 1.25 - } else { 1.26 - daddu(AT, AT, T9); 1.27 - sd(src, AT, 0); 1.28 - } 1.29 - 1.30 + daddu(AT, AT, T9); 1.31 ld(T9, SP, 0); 1.32 daddiu(SP, SP, wordSize); 1.33 + sd(src, AT, 0); 1.34 } 1.35 } 1.36 } else { 1.37 @@ -678,22 +674,17 @@ 1.38 sw(src, AT, 0); 1.39 } 1.40 } else { 1.41 - sd(T9, SP, -wordSize); 1.42 daddiu(SP, SP, -wordSize); 1.43 + sd(T9, SP, 0); 1.44 1.45 dsll(AT, index, scale); 1.46 daddu(AT, base, AT); 1.47 lui(T9, split_low(disp >> 16)); 1.48 if (split_low(disp)) ori(T9, T9, split_low(disp)); 1.49 - if (UseLEXT1) { 1.50 - gsswx(src, AT, T9, 0); 1.51 - } else { 1.52 - daddu(AT, AT, T9); 1.53 - sw(src, AT, 0); 1.54 - } 1.55 - 1.56 + daddu(AT, AT, T9); 1.57 ld(T9, SP, 0); 1.58 daddiu(SP, SP, wordSize); 1.59 + sw(src, AT, 0); 1.60 } 1.61 } 1.62 } else {