Sat, 29 Oct 2016 17:45:25 +0000
8140584: nmethod::oops_do_marking_epilogue always runs verification code
Reviewed-by: stefank
1.1 --- a/src/cpu/ppc/vm/relocInfo_ppc.cpp Fri Oct 28 22:36:23 2016 +0000 1.2 +++ b/src/cpu/ppc/vm/relocInfo_ppc.cpp Sat Oct 29 17:45:25 2016 +0000 1.3 @@ -62,7 +62,7 @@ 1.4 nativeMovConstReg_at(addr())->set_narrow_oop(no, code()); 1.5 } 1.6 } else { 1.7 - assert((address) (nativeMovConstReg_at(addr())->data()) == x, "data must match"); 1.8 + guarantee((address) (nativeMovConstReg_at(addr())->data()) == x, "data must match"); 1.9 } 1.10 } 1.11
2.1 --- a/src/cpu/sparc/vm/nativeInst_sparc.cpp Fri Oct 28 22:36:23 2016 +0000 2.2 +++ b/src/cpu/sparc/vm/nativeInst_sparc.cpp Sat Oct 29 17:45:25 2016 +0000 2.3 @@ -64,7 +64,7 @@ 2.4 masm.patchable_sethi(x, destreg); 2.5 int len = buffer - masm.pc(); 2.6 for (int i = 0; i < len; i++) { 2.7 - assert(instaddr[i] == buffer[i], "instructions must match"); 2.8 + guarantee(instaddr[i] == buffer[i], "instructions must match"); 2.9 } 2.10 } 2.11
3.1 --- a/src/cpu/sparc/vm/relocInfo_sparc.cpp Fri Oct 28 22:36:23 2016 +0000 3.2 +++ b/src/cpu/sparc/vm/relocInfo_sparc.cpp Sat Oct 29 17:45:25 2016 +0000 3.3 @@ -83,7 +83,7 @@ 3.4 inst &= ~Assembler::simm( -1, 13); 3.5 inst |= Assembler::simm(simm13, 13); 3.6 if (verify_only) { 3.7 - assert(ip->long_at(0) == inst, "instructions must match"); 3.8 + guarantee(ip->long_at(0) == inst, "instructions must match"); 3.9 } else { 3.10 ip->set_long_at(0, inst); 3.11 } 3.12 @@ -101,15 +101,15 @@ 3.13 inst &= ~Assembler::hi22(-1); 3.14 inst |= Assembler::hi22((intptr_t)np); 3.15 if (verify_only) { 3.16 - assert(ip->long_at(0) == inst, "instructions must match"); 3.17 + guarantee(ip->long_at(0) == inst, "instructions must match"); 3.18 } else { 3.19 ip->set_long_at(0, inst); 3.20 } 3.21 inst2 = ip->long_at( NativeInstruction::nop_instruction_size ); 3.22 guarantee(Assembler::inv_op(inst2)==Assembler::arith_op, "arith op"); 3.23 if (verify_only) { 3.24 - assert(ip->long_at(NativeInstruction::nop_instruction_size) == NativeInstruction::set_data32_simm13( inst2, (intptr_t)np), 3.25 - "instructions must match"); 3.26 + guarantee(ip->long_at(NativeInstruction::nop_instruction_size) == NativeInstruction::set_data32_simm13( inst2, (intptr_t)np), 3.27 + "instructions must match"); 3.28 } else { 3.29 ip->set_long_at(NativeInstruction::nop_instruction_size, NativeInstruction::set_data32_simm13( inst2, (intptr_t)np)); 3.30 } 3.31 @@ -126,7 +126,7 @@ 3.32 inst |= Assembler::hi22((intptr_t)x); 3.33 // (ignore offset; it doesn't play into the sethi) 3.34 if (verify_only) { 3.35 - assert(ip->long_at(0) == inst, "instructions must match"); 3.36 + guarantee(ip->long_at(0) == inst, "instructions must match"); 3.37 } else { 3.38 ip->set_long_at(0, inst); 3.39 }
4.1 --- a/src/cpu/x86/vm/relocInfo_x86.cpp Fri Oct 28 22:36:23 2016 +0000 4.2 +++ b/src/cpu/x86/vm/relocInfo_x86.cpp Sat Oct 29 17:45:25 2016 +0000 4.3 @@ -40,7 +40,7 @@ 4.4 which == Assembler::imm_operand, "format unpacks ok"); 4.5 if (which == Assembler::imm_operand) { 4.6 if (verify_only) { 4.7 - assert(*pd_address_in_code() == x, "instructions must match"); 4.8 + guarantee(*pd_address_in_code() == x, "instructions must match"); 4.9 } else { 4.10 *pd_address_in_code() = x; 4.11 } 4.12 @@ -49,13 +49,13 @@ 4.13 // both compressed oops and compressed classes look the same 4.14 if (Universe::heap()->is_in_reserved((oop)x)) { 4.15 if (verify_only) { 4.16 - assert(*(uint32_t*) disp == oopDesc::encode_heap_oop((oop)x), "instructions must match"); 4.17 + guarantee(*(uint32_t*) disp == oopDesc::encode_heap_oop((oop)x), "instructions must match"); 4.18 } else { 4.19 *(int32_t*) disp = oopDesc::encode_heap_oop((oop)x); 4.20 } 4.21 } else { 4.22 if (verify_only) { 4.23 - assert(*(uint32_t*) disp == Klass::encode_klass((Klass*)x), "instructions must match"); 4.24 + guarantee(*(uint32_t*) disp == Klass::encode_klass((Klass*)x), "instructions must match"); 4.25 } else { 4.26 *(int32_t*) disp = Klass::encode_klass((Klass*)x); 4.27 } 4.28 @@ -66,14 +66,14 @@ 4.29 address disp = Assembler::locate_operand(ip, which); 4.30 address next_ip = Assembler::locate_next_instruction(ip); 4.31 if (verify_only) { 4.32 - assert(*(int32_t*) disp == (x - next_ip), "instructions must match"); 4.33 + guarantee(*(int32_t*) disp == (x - next_ip), "instructions must match"); 4.34 } else { 4.35 *(int32_t*) disp = x - next_ip; 4.36 } 4.37 } 4.38 #else 4.39 if (verify_only) { 4.40 - assert(*pd_address_in_code() == (x + o), "instructions must match"); 4.41 + guarantee(*pd_address_in_code() == (x + o), "instructions must match"); 4.42 } else { 4.43 *pd_address_in_code() = x + o; 4.44 }
5.1 --- a/src/share/vm/code/nmethod.cpp Fri Oct 28 22:36:23 2016 +0000 5.2 +++ b/src/share/vm/code/nmethod.cpp Sat Oct 29 17:45:25 2016 +0000 5.3 @@ -2290,7 +2290,7 @@ 5.4 assert(cur != NULL, "not NULL-terminated"); 5.5 nmethod* next = cur->_oops_do_mark_link; 5.6 cur->_oops_do_mark_link = NULL; 5.7 - cur->verify_oop_relocations(); 5.8 + DEBUG_ONLY(cur->verify_oop_relocations()); 5.9 NOT_PRODUCT(if (TraceScavenge) cur->print_on(tty, "oops_do, unmark")); 5.10 cur = next; 5.11 }