Stability enhanced for 3A2000-4way.

Sun, 25 Sep 2016 18:09:10 -0400

author
fujie
date
Sun, 25 Sep 2016 18:09:10 -0400
changeset 116
09e17e497778
parent 115
9f3a515f06ee
child 119
659662477125

Stability enhanced for 3A2000-4way.

src/share/vm/gc_implementation/parallelScavenge/cardTableExtension.hpp file | annotate | diff | comparison | revisions
src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.cpp file | annotate | diff | comparison | revisions
src/share/vm/memory/barrierSet.hpp file | annotate | diff | comparison | revisions
src/share/vm/memory/cardTableModRefBS.hpp file | annotate | diff | comparison | revisions
src/share/vm/memory/cardTableRS.cpp file | annotate | diff | comparison | revisions
src/share/vm/memory/cardTableRS.hpp file | annotate | diff | comparison | revisions
     1.1 --- a/src/share/vm/gc_implementation/parallelScavenge/cardTableExtension.hpp	Sun Sep 25 17:38:33 2016 -0400
     1.2 +++ b/src/share/vm/gc_implementation/parallelScavenge/cardTableExtension.hpp	Sun Sep 25 18:09:10 2016 -0400
     1.3 @@ -85,7 +85,13 @@
     1.4    // Card marking
     1.5    void inline_write_ref_field_gc(void* field, oop new_val) {
     1.6      jbyte* byte = byte_for(field);
     1.7 +#ifdef MIPS64
     1.8 +      OrderAccess::fence();
     1.9 +#endif
    1.10      *byte = youngergen_card;
    1.11 +#ifdef MIPS64
    1.12 +      OrderAccess::fence();
    1.13 +#endif
    1.14    }
    1.15  
    1.16    // Adaptive size policy support
     2.1 --- a/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.cpp	Sun Sep 25 17:38:33 2016 -0400
     2.2 +++ b/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.cpp	Sun Sep 25 18:09:10 2016 -0400
     2.3 @@ -3239,6 +3239,9 @@
     2.4        OrderAccess::fence();
     2.5  #endif
     2.6        sd.block(cur_block)->set_offset(bitmap->bits_to_words(live_bits));
     2.7 +#ifdef MIPS64
     2.8 +      OrderAccess::fence();
     2.9 +#endif
    2.10      }
    2.11  
    2.12      const size_t end_bit = bitmap->find_obj_end(beg_bit, range_end);
     3.1 --- a/src/share/vm/memory/barrierSet.hpp	Sun Sep 25 17:38:33 2016 -0400
     3.2 +++ b/src/share/vm/memory/barrierSet.hpp	Sun Sep 25 18:09:10 2016 -0400
     3.3 @@ -27,6 +27,7 @@
     3.4  
     3.5  #include "memory/memRegion.hpp"
     3.6  #include "oops/oopsHierarchy.hpp"
     3.7 +#include "runtime/orderAccess.hpp"
     3.8  
     3.9  // This class provides the interface between a barrier implementation and
    3.10  // the rest of the system.
    3.11 @@ -95,8 +96,16 @@
    3.12    // Keep this private so as to catch violations at build time.
    3.13    virtual void write_ref_field_pre_work(     void* field, oop new_val) { guarantee(false, "Not needed"); };
    3.14  protected:
    3.15 -  virtual void write_ref_field_pre_work(      oop* field, oop new_val) {};
    3.16 -  virtual void write_ref_field_pre_work(narrowOop* field, oop new_val) {};
    3.17 +  virtual void write_ref_field_pre_work(      oop* field, oop new_val) {
    3.18 +#ifdef MIPS64
    3.19 +      OrderAccess::fence();
    3.20 +#endif
    3.21 +  };
    3.22 +  virtual void write_ref_field_pre_work(narrowOop* field, oop new_val) {
    3.23 +#ifdef MIPS64
    3.24 +      OrderAccess::fence();
    3.25 +#endif
    3.26 +  };
    3.27  public:
    3.28  
    3.29    // ...then the post-write version.
    3.30 @@ -132,9 +141,17 @@
    3.31  
    3.32    // Below length is the # array elements being written
    3.33    virtual void write_ref_array_pre(oop* dst, int length,
    3.34 -                                   bool dest_uninitialized = false) {}
    3.35 +                                   bool dest_uninitialized = false) {
    3.36 +#ifdef MIPS64
    3.37 +      OrderAccess::fence();
    3.38 +#endif
    3.39 +  }
    3.40    virtual void write_ref_array_pre(narrowOop* dst, int length,
    3.41 -                                   bool dest_uninitialized = false) {}
    3.42 +                                   bool dest_uninitialized = false) {
    3.43 +#ifdef MIPS64
    3.44 +      OrderAccess::fence();
    3.45 +#endif
    3.46 +}
    3.47    // Below count is the # array elements being written, starting
    3.48    // at the address "start", which may not necessarily be HeapWord-aligned
    3.49    inline void write_ref_array(HeapWord* start, size_t count);
     4.1 --- a/src/share/vm/memory/cardTableModRefBS.hpp	Sun Sep 25 17:38:33 2016 -0400
     4.2 +++ b/src/share/vm/memory/cardTableModRefBS.hpp	Sun Sep 25 18:09:10 2016 -0400
     4.3 @@ -309,6 +309,9 @@
     4.4  
     4.5    inline void inline_write_ref_array(MemRegion mr) {
     4.6      dirty_MemRegion(mr);
     4.7 +#ifdef MIPS64
     4.8 +    OrderAccess::fence();
     4.9 +#endif
    4.10    }
    4.11  protected:
    4.12    void write_ref_array_work(MemRegion mr) {
    4.13 @@ -322,7 +325,11 @@
    4.14  
    4.15    // *** Card-table-barrier-specific things.
    4.16  
    4.17 -  template <class T> inline void inline_write_ref_field_pre(T* field, oop newVal) {}
    4.18 +  template <class T> inline void inline_write_ref_field_pre(T* field, oop newVal) {
    4.19 +#ifdef MIPS64
    4.20 +    OrderAccess::fence();
    4.21 +#endif
    4.22 +  }
    4.23  
    4.24    template <class T> inline void inline_write_ref_field(T* field, oop newVal, bool release) {
    4.25      jbyte* byte = byte_for((void*)field);
    4.26 @@ -332,6 +339,9 @@
    4.27      } else {
    4.28        *byte = dirty_card;
    4.29      }
    4.30 +#ifdef MIPS64
    4.31 +    OrderAccess::fence();
    4.32 +#endif
    4.33    }
    4.34  
    4.35    // These are used by G1, when it uses the card table as a temporary data
     5.1 --- a/src/share/vm/memory/cardTableRS.cpp	Sun Sep 25 17:38:33 2016 -0400
     5.2 +++ b/src/share/vm/memory/cardTableRS.cpp	Sun Sep 25 18:09:10 2016 -0400
     5.3 @@ -251,6 +251,9 @@
     5.4  // cur_youngergen_and_prev_nonclean_card ==> no change.
     5.5  void CardTableRS::write_ref_field_gc_par(void* field, oop new_val) {
     5.6    jbyte* entry = ct_bs()->byte_for(field);
     5.7 +#ifdef MIPS64
     5.8 +  OrderAccess::fence();
     5.9 +#endif
    5.10    do {
    5.11      jbyte entry_val = *entry;
    5.12      // We put this first because it's probably the most common case.
    5.13 @@ -265,7 +268,12 @@
    5.14        jbyte new_val = cur_youngergen_and_prev_nonclean_card;
    5.15        jbyte res = Atomic::cmpxchg(new_val, entry, entry_val);
    5.16        // Did the CAS succeed?
    5.17 -      if (res == entry_val) return;
    5.18 +      if (res == entry_val) {
    5.19 +      #ifdef MIPS64
    5.20 +         OrderAccess::fence();
    5.21 +      #endif
    5.22 +         return;
    5.23 +      }
    5.24        // Otherwise, retry, to see the new value.
    5.25        continue;
    5.26      } else {
     6.1 --- a/src/share/vm/memory/cardTableRS.hpp	Sun Sep 25 17:38:33 2016 -0400
     6.2 +++ b/src/share/vm/memory/cardTableRS.hpp	Sun Sep 25 18:09:10 2016 -0400
     6.3 @@ -121,7 +121,14 @@
     6.4  
     6.5    void inline_write_ref_field_gc(void* field, oop new_val) {
     6.6      jbyte* byte = _ct_bs->byte_for(field);
     6.7 -    *byte = youngergen_card;
     6.8 +#ifdef MIPS64
     6.9 +    OrderAccess::fence();
    6.10 +#endif
    6.11 +   *byte = youngergen_card;
    6.12 +#ifdef MIPS64
    6.13 +   OrderAccess::fence();
    6.14 +#endif
    6.15 +
    6.16    }
    6.17    void write_ref_field_gc_work(void* field, oop new_val) {
    6.18      inline_write_ref_field_gc(field, new_val);

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