Thu, 18 Aug 2016 11:29:03 +0800
Add gslwxc1 and gsldxc1 instruction.
src/cpu/mips/vm/assembler_mips.cpp | file | annotate | diff | comparison | revisions | |
src/cpu/mips/vm/assembler_mips.hpp | file | annotate | diff | comparison | revisions |
1.1 --- a/src/cpu/mips/vm/assembler_mips.cpp Thu Aug 18 11:16:54 2016 +0800 1.2 +++ b/src/cpu/mips/vm/assembler_mips.cpp Thu Aug 18 11:29:03 2016 +0800 1.3 @@ -230,7 +230,7 @@ 1.4 }; 1.5 1.6 const char* Assembler::gs_ldc2_name[] = { 1.7 - "gslbx", "gslhx", "gslwx", "gsldx", "", "", "", "" 1.8 + "gslbx", "gslhx", "gslwx", "gsldx", "", "", "gslwxc1", "gsldxc1" 1.9 }; 1.10 1.11 const char* Assembler::gs_sdc2_name[] = {
2.1 --- a/src/cpu/mips/vm/assembler_mips.hpp Thu Aug 18 11:16:54 2016 +0800 2.2 +++ b/src/cpu/mips/vm/assembler_mips.hpp Thu Aug 18 11:29:03 2016 +0800 2.3 @@ -618,6 +618,8 @@ 2.4 gslhx_op = 0x1, 2.5 gslwx_op = 0x2, 2.6 gsldx_op = 0x3, 2.7 + gslwxc1_op = 0x6, 2.8 + gsldxc1_op = 0x7, 2.9 }; 2.10 2.11 static const char* gs_ldc2_name[]; 2.12 @@ -1199,6 +1201,16 @@ 2.13 int branch_destination(int inst, int pos); 2.14 2.15 /* Godson3 extension */ 2.16 + void gsldxc1(Register rt, Register base, Register index, int off) { 2.17 + assert(is_simm(off, 8), "gsldxc1: off exceeds 8 bits"); 2.18 + emit_long((gs_ldc2_op << 26) | ((int)base->encoding() << 21) | ((int)rt->encoding() << 16) | ((int)index->encoding() << 11) | (off << 3) | gsldxc1_op); 2.19 + } 2.20 + 2.21 + void gslwxc1(Register rt, Register base, Register index, int off) { 2.22 + assert(is_simm(off, 8), "gslwxc1: off exceeds 8 bits"); 2.23 + emit_long((gs_ldc2_op << 26) | ((int)base->encoding() << 21) | ((int)rt->encoding() << 16) | ((int)index->encoding() << 11) | (off << 3) | gslwxc1_op); 2.24 + } 2.25 + 2.26 void gsldx(Register rt, Register base, Register index, int off) { 2.27 assert(is_simm(off, 8), "gsldx: off exceeds 8 bits"); 2.28 emit_long((gs_ldc2_op << 26) | ((int)base->encoding() << 21) | ((int)rt->encoding() << 16) | ((int)index->encoding() << 11) | (off << 3) | gsldx_op);