# HG changeset patch # User fujie # Date 1490978582 14400 # Node ID 910b77f150c4ede600b4e6ca701c55ebfd135eed # Parent d3aefa77da6c8b4528341a79e7cc1f5e044b76de [C2] Optimize the oop/klass encoding and decoding (Follows a4946a9e94b0). diff -r d3aefa77da6c -r 910b77f150c4 src/cpu/mips/vm/assembler_mips.cpp --- a/src/cpu/mips/vm/assembler_mips.cpp Thu Mar 30 08:45:59 2017 -0400 +++ b/src/cpu/mips/vm/assembler_mips.cpp Fri Mar 31 12:43:02 2017 -0400 @@ -4023,7 +4023,41 @@ movz(r, S5_heapbase, r); dsub(r, r, S5_heapbase); - shr(r, LogMinObjAlignmentInBytes); + if (Universe::narrow_oop_shift() != 0) { + assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); + shr(r, LogMinObjAlignmentInBytes); + } +} + +void MacroAssembler::encode_heap_oop(Register dst, Register src) { +#ifdef ASSERT + verify_heapbase("MacroAssembler::encode_heap_oop:heap base corrupted?"); +#endif + verify_oop(src, "broken oop in encode_heap_oop"); + if (Universe::narrow_oop_base() == NULL) { + if (Universe::narrow_oop_shift() != 0) { + assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); + dsrl(dst, src, LogMinObjAlignmentInBytes); + } else { + if (dst != src) move(dst, src); + } + } else { + if (dst == src) { + movz(dst, S5_heapbase, dst); + dsub(dst, dst, S5_heapbase); + if (Universe::narrow_oop_shift() != 0) { + assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); + shr(dst, LogMinObjAlignmentInBytes); + } + } else { + dsub(dst, src, S5_heapbase); + if (Universe::narrow_oop_shift() != 0) { + assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); + shr(dst, LogMinObjAlignmentInBytes); + } + movz(dst, R0, src); + } + } } void MacroAssembler::encode_heap_oop_not_null(Register r) { @@ -4060,18 +4094,21 @@ } #endif verify_oop(src, "broken oop in encode_heap_oop_not_null2"); - if (dst != src) { - move(dst, src); + + if (Universe::narrow_oop_base() != NULL) { + dsub(dst, src, S5_heapbase); + if (Universe::narrow_oop_shift() != 0) { + assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); + shr(dst, LogMinObjAlignmentInBytes); + } + } else { + if (Universe::narrow_oop_shift() != 0) { + assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); + dsrl(dst, src, LogMinObjAlignmentInBytes); + } else { + if (dst != src) move(dst, src); + } } - - if (Universe::narrow_oop_base() != NULL) { - dsub(dst, dst, S5_heapbase); - } - if (Universe::narrow_oop_shift() != 0) { - assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); - shr(dst, LogMinObjAlignmentInBytes); - } - } void MacroAssembler::decode_heap_oop(Register r) { @@ -4085,13 +4122,50 @@ } } else { move(AT, r); - shl(r, LogMinObjAlignmentInBytes); + if (Universe::narrow_oop_shift() != 0) { + assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); + shl(r, LogMinObjAlignmentInBytes); + } dadd(r, r, S5_heapbase); movz(r, R0, AT); } verify_oop(r, "broken oop in decode_heap_oop"); } +void MacroAssembler::decode_heap_oop(Register dst, Register src) { +#ifdef ASSERT + verify_heapbase("MacroAssembler::decode_heap_oop corrupted?"); +#endif + if (Universe::narrow_oop_base() == NULL) { + if (Universe::narrow_oop_shift() != 0) { + assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); + dsll(dst, src, LogMinObjAlignmentInBytes); + } else { + if (dst != src) move(dst, src); + } + } else { + if (dst == src) { + move(AT, dst); + if (Universe::narrow_oop_shift() != 0) { + assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); + shl(dst, LogMinObjAlignmentInBytes); + } + dadd(dst, dst, S5_heapbase); + movz(dst, R0, AT); + } else { + if (Universe::narrow_oop_shift() != 0) { + assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); + dsll(dst, src, LogMinObjAlignmentInBytes); + daddu(dst, dst, S5_heapbase); + } else { + daddu(dst, src, S5_heapbase); + } + movz(dst, R0, src); + } + } + verify_oop(dst, "broken oop in decode_heap_oop"); +} + void MacroAssembler::decode_heap_oop_not_null(Register r) { // Note: it will change flags assert (UseCompressedOops, "should only be used for compressed headers"); @@ -4124,10 +4198,7 @@ dsll(dst, src, LogMinObjAlignmentInBytes); daddu(dst, dst, S5_heapbase); } else { - if (dst != src) { - move(dst, src); - } - shl(dst, LogMinObjAlignmentInBytes); + dsll(dst, src, LogMinObjAlignmentInBytes); if (Universe::narrow_oop_base() != NULL) { daddu(dst, dst, S5_heapbase); } @@ -4163,12 +4234,17 @@ if (Universe::narrow_klass_base() != NULL) { set64(dst, (int64_t)Universe::narrow_klass_base()); dsub(dst, src, dst); + if (Universe::narrow_klass_shift() != 0) { + assert (LogKlassAlignmentInBytes == Universe::narrow_klass_shift(), "decode alg wrong"); + shr(dst, LogKlassAlignmentInBytes); + } } else { - move(dst, src); - } - if (Universe::narrow_klass_shift() != 0) { - assert (LogKlassAlignmentInBytes == Universe::narrow_klass_shift(), "decode alg wrong"); - shr(dst, LogKlassAlignmentInBytes); + if (Universe::narrow_klass_shift() != 0) { + assert (LogKlassAlignmentInBytes == Universe::narrow_klass_shift(), "decode alg wrong"); + dsrl(dst, src, LogKlassAlignmentInBytes); + } else { + move(dst, src); + } } } } diff -r d3aefa77da6c -r 910b77f150c4 src/cpu/mips/vm/assembler_mips.hpp --- a/src/cpu/mips/vm/assembler_mips.hpp Thu Mar 30 08:45:59 2017 -0400 +++ b/src/cpu/mips/vm/assembler_mips.hpp Fri Mar 31 12:43:02 2017 -0400 @@ -2015,7 +2015,9 @@ void load_heap_oop(Register dst, Address src); void store_heap_oop(Address dst, Register src); void encode_heap_oop(Register r); + void encode_heap_oop(Register dst, Register src); void decode_heap_oop(Register r); + void decode_heap_oop(Register dst, Register src); void encode_heap_oop_not_null(Register r); void decode_heap_oop_not_null(Register r); void encode_heap_oop_not_null(Register dst, Register src); diff -r d3aefa77da6c -r 910b77f150c4 src/cpu/mips/vm/mips_64.ad --- a/src/cpu/mips/vm/mips_64.ad Thu Mar 30 08:45:59 2017 -0400 +++ b/src/cpu/mips/vm/mips_64.ad Fri Mar 31 12:43:02 2017 -0400 @@ -12089,10 +12089,8 @@ ins_encode %{ Register src = $src$$Register; Register dst = $dst$$Register; - if (src != dst) { - __ move(dst, src); - } - __ encode_heap_oop(dst); + + __ encode_heap_oop(dst, src); %} ins_pipe( ialu_regL_regL ); %} @@ -12115,10 +12113,8 @@ ins_encode %{ Register s = $src$$Register; Register d = $dst$$Register; - if (s != d) { - __ move(d, s); - } - __ decode_heap_oop(d); + + __ decode_heap_oop(d, s); %} ins_pipe( ialu_regL_regL ); %}