# HG changeset patch # User aoqi # Date 1510559382 -28800 # Node ID 0477693968a6ffaafc081431055e68352e783ab0 # Parent 2c1fab4a6f4e0a9102b404f27d932714c2834bb2 #5963 wrong frame offset (SP) in StackOverflowError handler Summary: push/pop before/after bang_stack_with_offset is removed. compiler/6865265/StackOverflowBug.java passed. This patch also includes code cleanup and code style fix. diff -r 2c1fab4a6f4e -r 0477693968a6 src/cpu/mips/vm/frame_mips.cpp --- a/src/cpu/mips/vm/frame_mips.cpp Thu Nov 16 17:27:00 2017 +0800 +++ b/src/cpu/mips/vm/frame_mips.cpp Mon Nov 13 15:49:42 2017 +0800 @@ -291,16 +291,13 @@ frame frame::sender_for_compiled_frame(RegisterMap* map) const { assert(map != NULL, "map must be set"); + // frame owned by optimizing compiler + assert(_cb->frame_size() >= 0, "must have non-zero frame size"); + + intptr_t* sender_sp = sender_sp = sp() + _cb->frame_size(); +#ifdef ASSERT const bool c1_compiled = _cb->is_compiled_by_c1(); - // frame owned by optimizing compiler - intptr_t* sender_sp = NULL; bool native = _cb->is_nmethod() && ((nmethod*)_cb)->is_native_method(); - - assert(_cb->frame_size() >= 0, "must have non-zero frame size"); - //FIXME , may be error here , do MIPS have the return address and link address on the stack? - - sender_sp = sp() + _cb->frame_size(); -#ifdef ASSERT if (c1_compiled && native) { assert(sender_sp == fp() + frame::sender_sp_offset, "incorrect frame size"); } @@ -312,29 +309,24 @@ // spark address sender_pc = (address) *(sender_sp-1); - intptr_t *saved_fp = (intptr_t*)*(sender_sp - frame::sender_sp_offset); - - // so getting sender for compiled frame is not same as interpreter frame. - // we hard code here temporarily - // spark + intptr_t** saved_fp_addr = (intptr_t**) (sender_sp - frame::sender_sp_offset); if (map->update_map()) { // Tell GC to use argument oopmaps for some runtime stubs that need it. // For C1, the runtime stub might not have oop maps, so set this flag // outside of update_register_map. - map->set_include_argument_oops(_cb->caller_must_gc_arguments(map->thread())); if (_cb->oop_maps() != NULL) { OopMapSet::update_register_map(this, map); } + // Since the prolog does the save and restore of epb there is no oopmap // for it so we must fill in its location as if there was an oopmap entry // since if our caller was compiled code there could be live jvm state in it. - // map->set_location(ebp->as_VMReg(), (address) (sender_sp - frame::sender_sp_offset)); - map->set_location(FP->as_VMReg(), (address) (sender_sp - frame::sender_sp_offset)); + map->set_location(FP->as_VMReg(), (address) saved_fp_addr); } assert(sender_sp != sp(), "must have changed"); - return frame(sender_sp, saved_fp, sender_pc); + return frame(sender_sp, *saved_fp_addr, sender_pc); } frame frame::sender(RegisterMap* map) const { diff -r 2c1fab4a6f4e -r 0477693968a6 src/cpu/mips/vm/macroAssembler_mips.cpp --- a/src/cpu/mips/vm/macroAssembler_mips.cpp Thu Nov 16 17:27:00 2017 +0800 +++ b/src/cpu/mips/vm/macroAssembler_mips.cpp Mon Nov 13 15:49:42 2017 +0800 @@ -117,13 +117,10 @@ && special(pc[5]) == daddu_op)) { tty->print_cr("Not a branch label patch"); } int offset = target - branch; - if (!is_simm16(offset)) - { + if (!is_simm16(offset)) { pc[3] = (pc[3] & 0xffff0000) | high16(offset - 12); pc[4] = (pc[4] & 0xffff0000) | low16(offset - 12); - } - else - { + } else { /* revert to "beq + nop" */ CodeBuffer cb(branch, 4 * 10); MacroAssembler masm(&cb); @@ -141,12 +138,10 @@ } #ifndef PRODUCT - if (!is_simm16((target - branch - 4) >> 2)) - { + if (!is_simm16((target - branch - 4) >> 2)) { tty->print_cr("Illegal patching: target=0x%lx", target); int *p = (int *)branch; - for (int i = -10; i < 10; i++) - { + for (int i = -10; i < 10; i++) { tty->print("0x%lx, ", p[i]); } tty->print_cr(""); @@ -265,17 +260,13 @@ return 6; } -void MacroAssembler::beq_far(Register rs, Register rt, address entry) -{ +void MacroAssembler::beq_far(Register rs, Register rt, address entry) { u_char * cur_pc = pc(); /* Jin: Near/Far jump */ - if(is_simm16((entry - pc() - 4) / 4)) - { + if(is_simm16((entry - pc() - 4) / 4)) { Assembler::beq(rs, rt, offset(entry)); - } - else - { + } else { Label not_jump; bne(rs, rt, not_jump); delayed()->nop(); @@ -288,8 +279,7 @@ } } -void MacroAssembler::beq_far(Register rs, Register rt, Label& L) -{ +void MacroAssembler::beq_far(Register rs, Register rt, Label& L) { if (L.is_bound()) { beq_far(rs, rt, target(L)); } else { @@ -306,17 +296,13 @@ } } -void MacroAssembler::bne_far(Register rs, Register rt, address entry) -{ +void MacroAssembler::bne_far(Register rs, Register rt, address entry) { u_char * cur_pc = pc(); /* Jin: Near/Far jump */ - if(is_simm16((entry - pc() - 4) / 4)) - { + if(is_simm16((entry - pc() - 4) / 4)) { Assembler::bne(rs, rt, offset(entry)); - } - else - { + } else { Label not_jump; beq(rs, rt, not_jump); delayed()->nop(); @@ -329,8 +315,7 @@ } } -void MacroAssembler::bne_far(Register rs, Register rt, Label& L) -{ +void MacroAssembler::bne_far(Register rs, Register rt, Label& L) { if (L.is_bound()) { bne_far(rs, rt, target(L)); } else { @@ -347,12 +332,11 @@ } } -void MacroAssembler::b_far(Label& L) -{ +void MacroAssembler::b_far(Label& L) { if (L.is_bound()) { b_far(target(L)); } else { - volatile address dest = target(L); + volatile address dest = target(L); /* MacroAssembler::pd_patch_instruction branch=55651ed514, target=55651ef6d8 0x00000055651ed514: dadd at, ra, zero @@ -366,31 +350,27 @@ 0x00000055651ed530: jr t9 0x00000055651ed534: sll zero, zero, 0 */ - move(AT, RA); - emit_long(insn_ORRI(regimm_op, 0, bgezal_op, 1)); - nop(); - lui(T9, 0); // to be patched - ori(T9, T9, 0); - daddu(T9, T9, RA); - move(RA, AT); - jr(T9); + move(AT, RA); + emit_long(insn_ORRI(regimm_op, 0, bgezal_op, 1)); + nop(); + lui(T9, 0); // to be patched + ori(T9, T9, 0); + daddu(T9, T9, RA); + move(RA, AT); + jr(T9); } } -void MacroAssembler::b_far(address entry) -{ +void MacroAssembler::b_far(address entry) { u_char * cur_pc = pc(); /* Jin: Near/Far jump */ - if(is_simm16((entry - pc() - 4) / 4)) - { + if(is_simm16((entry - pc() - 4) / 4)) { b(offset(entry)); - } - else - { + } else { /* address must be bounded */ move(AT, RA); - emit_long(insn_ORRI(regimm_op, 0, bgezal_op, 1)); + emit_long(insn_ORRI(regimm_op, 0, bgezal_op, 1)); nop(); li32(T9, entry - pc()); daddu(T9, T9, RA); @@ -721,13 +701,9 @@ delayed()->nop(); } -// NOTE: we dont increment the SP after call like the x86 version, maybe this is a problem, FIXME. // the stack pointer adjustment is needed. see InterpreterMacroAssembler::super_call_VM_leaf // this method will handle the stack problem, you need not to preserve the stack space for the argument now -void MacroAssembler::call_VM_leaf_base(address entry_point, - int number_of_arguments) { - //call(RuntimeAddress(entry_point)); - //increment(rsp, number_of_arguments * wordSize); +void MacroAssembler::call_VM_leaf_base(address entry_point, int number_of_arguments) { Label L, E; assert(number_of_arguments <= 4, "just check"); @@ -1158,7 +1134,7 @@ Register last_java_sp, address entry_point, int number_of_arguments, - bool check_exceptions) { + bool check_exceptions) { address before_call_pc; // determine java_thread register @@ -1190,6 +1166,7 @@ move(A0, java_thread); call(entry_point, relocInfo::runtime_call_type); delayed()->nop(); + //MacroAssembler::call_VM_leaf_base(entry_point, number_of_arguments); // restore the thread (cannot use the pushed argument since arguments // may be overwritten by C code generated by an optimizing compiler); @@ -1203,7 +1180,7 @@ get_thread(AT); beq(java_thread, AT, L); delayed()->nop(); - stop("MacroAssembler::call_VM_base: edi not callee saved?"); + stop("MacroAssembler::call_VM_base: TREG not callee saved?"); bind(L); } #endif @@ -1474,7 +1451,6 @@ sd(last_java_sp, Address(thread, JavaThread::last_Java_sp_offset())); } - ////////////////////////////////////////////////////////////////////////////////// #if INCLUDE_ALL_GCS @@ -1621,7 +1597,7 @@ dsrl(AT, AT, HeapRegion::LogOfHRGrainBytes); beq(AT, R0, done); nop(); - + // crosses regions, storing NULL? beq(new_val, R0, done); @@ -1652,7 +1628,7 @@ // storing a region crossing, non-NULL oop, card is clean. // dirty card and log. - move(AT, (int)CardTableModRefBS::dirty_card_val()); + move(AT, (int)CardTableModRefBS::dirty_card_val()); sb(AT, card_addr, 0); lw(AT, queue_index); @@ -3219,23 +3195,23 @@ //for UseCompressedOops Option void MacroAssembler::load_klass(Register dst, Register src) { #ifdef _LP64 - if(UseCompressedClassPointers){ - lwu(dst, Address(src, oopDesc::klass_offset_in_bytes())); - decode_klass_not_null(dst); - } else + if(UseCompressedClassPointers){ + lwu(dst, Address(src, oopDesc::klass_offset_in_bytes())); + decode_klass_not_null(dst); + } else #endif - ld(dst, src, oopDesc::klass_offset_in_bytes()); + ld(dst, src, oopDesc::klass_offset_in_bytes()); } void MacroAssembler::store_klass(Register dst, Register src) { #ifdef _LP64 - if(UseCompressedClassPointers){ + if(UseCompressedClassPointers){ encode_klass_not_null(src); sw(src, dst, oopDesc::klass_offset_in_bytes()); - } else { + } else { #endif sd(src, dst, oopDesc::klass_offset_in_bytes()); - } + } } void MacroAssembler::load_prototype_header(Register dst, Register src) { @@ -3251,30 +3227,30 @@ } void MacroAssembler::load_heap_oop(Register dst, Address src) { - if(UseCompressedOops){ - lwu(dst, src); - decode_heap_oop(dst); - } else{ - ld(dst, src); - } + if(UseCompressedOops){ + lwu(dst, src); + decode_heap_oop(dst); + } else { + ld(dst, src); + } } void MacroAssembler::store_heap_oop(Address dst, Register src){ - if(UseCompressedOops){ - assert(!dst.uses(src), "not enough registers"); - encode_heap_oop(src); - sw(src, dst); - } else{ - sd(src, dst); - } + if(UseCompressedOops){ + assert(!dst.uses(src), "not enough registers"); + encode_heap_oop(src); + sw(src, dst); + } else { + sd(src, dst); + } } void MacroAssembler::store_heap_oop_null(Address dst){ - if(UseCompressedOops){ - sw(R0, dst); - } else{ - sd(R0, dst); - } + if(UseCompressedOops){ + sw(R0, dst); + } else { + sd(R0, dst); + } } #ifdef ASSERT @@ -3299,12 +3275,12 @@ return; } - movz(r, S5_heapbase, r); - dsub(r, r, S5_heapbase); - if (Universe::narrow_oop_shift() != 0) { - assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); - shr(r, LogMinObjAlignmentInBytes); - } + movz(r, S5_heapbase, r); + dsub(r, r, S5_heapbase); + if (Universe::narrow_oop_shift() != 0) { + assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); + shr(r, LogMinObjAlignmentInBytes); + } } void MacroAssembler::encode_heap_oop(Register dst, Register src) { @@ -3339,15 +3315,15 @@ } void MacroAssembler::encode_heap_oop_not_null(Register r) { - assert (UseCompressedOops, "should be compressed"); + assert (UseCompressedOops, "should be compressed"); #ifdef ASSERT - if (CheckCompressedOops) { - Label ok; - bne(r, R0, ok); - delayed()->nop(); - stop("null oop passed to encode_heap_oop_not_null"); - bind(ok); - } + if (CheckCompressedOops) { + Label ok; + bne(r, R0, ok); + delayed()->nop(); + stop("null oop passed to encode_heap_oop_not_null"); + bind(ok); + } #endif verify_oop(r, "broken oop in encode_heap_oop_not_null"); if (Universe::narrow_oop_base() != NULL) { @@ -3361,32 +3337,32 @@ } void MacroAssembler::encode_heap_oop_not_null(Register dst, Register src) { - assert (UseCompressedOops, "should be compressed"); + assert (UseCompressedOops, "should be compressed"); #ifdef ASSERT - if (CheckCompressedOops) { - Label ok; - bne(src, R0, ok); - delayed()->nop(); - stop("null oop passed to encode_heap_oop_not_null2"); - bind(ok); + if (CheckCompressedOops) { + Label ok; + bne(src, R0, ok); + delayed()->nop(); + stop("null oop passed to encode_heap_oop_not_null2"); + bind(ok); + } +#endif + verify_oop(src, "broken oop in encode_heap_oop_not_null2"); + + if (Universe::narrow_oop_base() != NULL) { + dsub(dst, src, S5_heapbase); + if (Universe::narrow_oop_shift() != 0) { + assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); + shr(dst, LogMinObjAlignmentInBytes); } -#endif - verify_oop(src, "broken oop in encode_heap_oop_not_null2"); - - if (Universe::narrow_oop_base() != NULL) { - dsub(dst, src, S5_heapbase); - if (Universe::narrow_oop_shift() != 0) { - assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); - shr(dst, LogMinObjAlignmentInBytes); - } + } else { + if (Universe::narrow_oop_shift() != 0) { + assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); + dsrl(dst, src, LogMinObjAlignmentInBytes); } else { - if (Universe::narrow_oop_shift() != 0) { - assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); - dsrl(dst, src, LogMinObjAlignmentInBytes); - } else { - if (dst != src) move(dst, src); - } + if (dst != src) move(dst, src); } + } } void MacroAssembler::decode_heap_oop(Register r) { @@ -3500,10 +3476,6 @@ assert (LogKlassAlignmentInBytes == Universe::narrow_klass_shift(), "decode alg wrong"); shr(r, LogKlassAlignmentInBytes); } - // Not neccessary for MIPS at all. - //if (Universe::narrow_klass_base() != NULL) { - // reinit_heapbase(); - //} } void MacroAssembler::encode_klass_not_null(Register dst, Register src) { @@ -3609,7 +3581,7 @@ if (value < 0) { incrementl(reg, -value); return; } if (value == 0) { ; return; } - if(Assembler::is_simm16(value)) { + if (Assembler::is_simm16(value)) { NOT_LP64(addiu(reg, reg, -value)); LP64_ONLY(move(AT, value); subu32(reg, reg, AT)); } else { @@ -3686,14 +3658,12 @@ // We move this check to the front of the fast path because many // type checks are in fact trivially successful in this manner, // so we get a nicely predicted branch right at the start of the check. - //cmpptr(sub_klass, super_klass); - //local_jcc(Assembler::equal, *L_success); beq(sub_klass, super_klass, *L_success); delayed()->nop(); // Check the supertype display: if (must_load_sco) { // Positive movl does right thing on LP64. - lwu(temp_reg, super_klass, sco_offset); + lwu(temp_reg, super_klass, sco_offset); super_check_offset = RegisterOrConstant(temp_reg); } dsll(AT, super_check_offset.register_or_noreg(), Address::times_1); @@ -3712,39 +3682,39 @@ // Otherwise, it's the slow path for us (no success at this point). if (super_check_offset.is_register()) { - beq(super_klass, AT, *L_success); - delayed()->nop(); - addi(AT, super_check_offset.as_register(), -sc_offset); + beq(super_klass, AT, *L_success); + delayed()->nop(); + addi(AT, super_check_offset.as_register(), -sc_offset); if (L_failure == &L_fallthrough) { - beq(AT, R0, *L_slow_path); - delayed()->nop(); + beq(AT, R0, *L_slow_path); + delayed()->nop(); } else { - bne(AT, R0, *L_failure); - delayed()->nop(); - b(*L_slow_path); - delayed()->nop(); + bne(AT, R0, *L_failure); + delayed()->nop(); + b(*L_slow_path); + delayed()->nop(); } } else if (super_check_offset.as_constant() == sc_offset) { // Need a slow path; fast failure is impossible. if (L_slow_path == &L_fallthrough) { - beq(super_klass, AT, *L_success); - delayed()->nop(); + beq(super_klass, AT, *L_success); + delayed()->nop(); } else { - bne(super_klass, AT, *L_slow_path); - delayed()->nop(); - b(*L_success); - delayed()->nop(); + bne(super_klass, AT, *L_slow_path); + delayed()->nop(); + b(*L_success); + delayed()->nop(); } } else { // No slow path; it's a fast decision. if (L_failure == &L_fallthrough) { - beq(super_klass, AT, *L_success); - delayed()->nop(); + beq(super_klass, AT, *L_success); + delayed()->nop(); } else { - bne(super_klass, AT, *L_failure); - delayed()->nop(); - b(*L_success); - delayed()->nop(); + bne(super_klass, AT, *L_failure); + delayed()->nop(); + b(*L_success); + delayed()->nop(); } } @@ -3784,18 +3754,11 @@ // The repne_scan instruction uses fixed registers, which we must spill. // Don't worry too much about pre-existing connections with the input regs. -#if 0 - assert(sub_klass != T9, "killed reg"); // killed by mov(rax, super) - assert(sub_klass != T1, "killed reg"); // killed by lea(rcx, &pst_counter) -#endif - // Get super_klass value into rax (even if it was in rdi or rcx). #ifndef PRODUCT int* pst_counter = &SharedRuntime::_partial_subtype_ctr; ExternalAddress pst_counter_addr((address) pst_counter); NOT_LP64( incrementl(pst_counter_addr) ); - //LP64_ONLY( lea(rcx, pst_counter_addr) ); - //LP64_ONLY( incrementl(Address(rcx, 0)) ); #endif //PRODUCT // We will consult the secondary-super array. @@ -3834,6 +3797,7 @@ bind(L_fallthrough); } + void MacroAssembler::get_vm_result(Register oop_result, Register java_thread) { ld(oop_result, Address(java_thread, JavaThread::vm_result_offset())); sd(R0, Address(java_thread, JavaThread::vm_result_offset())); @@ -3949,7 +3913,6 @@ // Adjust recv_klass by scaled itable_index, so we can free itable_index. assert(itableMethodEntry::size() * wordSize == wordSize, "adjust the scaling in the code below"); -// lea(recv_klass, Address(recv_klass, itable_index, Address::times_ptr, itentry_off)); if (itable_index.is_constant()) { set64(AT, (int)itable_index.is_constant()); dsll(AT, AT, (int)Address::times_ptr); @@ -3959,11 +3922,6 @@ daddu(AT, AT, recv_klass); daddiu(recv_klass, AT, itentry_off); - // for (scan = klass->itable(); scan->interface() != NULL; scan += scan_step) { - // if (scan->interface() == intf) { - // result = (klass + scan->offset() + itable_index); - // } - // } Label search, found_method; for (int peel = 1; peel >= 0; peel--) { @@ -3994,7 +3952,6 @@ // Got a hit. lw(scan_temp, Address(scan_temp, itableOffsetEntry::offset_offset_in_bytes())); - //ld(method_result, Address(recv_klass, scan_temp, Address::times_1)); if(UseLoongsonISA) { gsldx(method_result, recv_klass, scan_temp, 0); } else { @@ -4003,7 +3960,6 @@ } } - // virtual method calling void MacroAssembler::lookup_virtual_method(Register recv_klass, RegisterOrConstant vtable_index, diff -r 2c1fab4a6f4e -r 0477693968a6 src/cpu/mips/vm/sharedRuntime_mips_64.cpp --- a/src/cpu/mips/vm/sharedRuntime_mips_64.cpp Thu Nov 16 17:27:00 2017 +0800 +++ b/src/cpu/mips/vm/sharedRuntime_mips_64.cpp Mon Nov 13 15:49:42 2017 +0800 @@ -808,7 +808,6 @@ // push the return address on the stack (note that pushing, rather // than storing it, yields the correct frame alignment for the callee) // Put saved SP in another register - // const Register saved_sp = eax; const Register saved_sp = V0; __ move(saved_sp, T9); @@ -1154,15 +1153,15 @@ break; case T_VOID: break; case T_LONG: - __ sd(V0, FP, -wordSize); - break; + __ sd(V0, FP, -wordSize); + break; case T_OBJECT: case T_ARRAY: __ sd(V0, FP, -wordSize); break; default: { - __ sw(V0, FP, -wordSize); - } + __ sw(V0, FP, -wordSize); + } } } @@ -1185,8 +1184,8 @@ __ ld(V0, FP, -wordSize); break; default: { - __ lw(V0, FP, -wordSize); - } + __ lw(V0, FP, -wordSize); + } } } @@ -1577,7 +1576,6 @@ // the 1st six register arguments). It's weird see int_stk_helper. // int out_arg_slots; - //out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); // Compute framesize for the wrapper. We need to handlize all oops in @@ -1765,10 +1763,7 @@ // Generate stack overflow check if (UseStackBanging) { - //this function will modify the value in A0 - __ push(A0); __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); - __ pop(A0); } else { // need a 5 byte instruction to allow MT safe patching to non-entrant __ nop(); @@ -1784,11 +1779,11 @@ #endif //FIXME here __ st_ptr(SP, TREG, in_bytes(JavaThread::last_Java_sp_offset())); - // -2 because return address is already present and so is saved ebp __ move(AT, -(StackAlignmentInBytes)); __ andr(SP, SP, AT); __ enter(); + // -2 because return address is already present and so is saved ebp __ addiu(SP, SP, -1 * (stack_size - 2*wordSize)); // Frame is now completed as far a size and linkage. @@ -2102,13 +2097,13 @@ // least significant 2 bits clear. // NOTE: the oopMark is in swap_reg %eax as the result of cmpxchg - __ dsub(swap_reg, swap_reg,SP); - __ move(AT, 3 - os::vm_page_size()); + __ dsub(swap_reg, swap_reg, SP); + __ move(AT, 3 - os::vm_page_size()); __ andr(swap_reg , swap_reg, AT); // Save the test result, for recursive case, the result is zero __ sd(swap_reg, lock_reg, mark_word_offset); //FIXME here, Why notEqual? - __ bne(swap_reg,R0, slow_path_lock); + __ bne(swap_reg, R0, slow_path_lock); __ delayed()->nop(); // Slow path will re-enter here __ bind(lock_done); @@ -2125,7 +2120,7 @@ // get JNIEnv* which is first argument to native if (!is_critical_native) { - __ addi(A0, thread, in_bytes(JavaThread::jni_environment_offset())); + __ addi(A0, thread, in_bytes(JavaThread::jni_environment_offset())); } // Example: Java_java_lang_ref_Finalizer_invokeFinalizeMethod(JNIEnv *env, jclass clazz, jobject ob) @@ -2168,18 +2163,16 @@ // VM thread changes sync state to synchronizing and suspends threads for GC. // Thread A is resumed to finish this native method, but doesn't block here since it // didn't see any synchronization is progress, and escapes. - // __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans); - //__ sw(_thread_in_native_trans, thread, JavaThread::thread_state_offset()); - // __ move(AT, (int)_thread_in_native_trans); __ addi(AT, R0, _thread_in_native_trans); __ sw(AT, thread, in_bytes(JavaThread::thread_state_offset())); + //if(os::is_MP()) {} + Label after_transition; // check for safepoint operation in progress and/or pending suspend requests - { Label Continue; -//FIXME here, which regiser should we use? - // SafepointSynchronize::_not_synchronized); + { + Label Continue; __ li(AT, SafepointSynchronize::address_of_state()); __ lw(A0, AT, 0); __ addi(AT, A0, -SafepointSynchronize::_not_synchronized); @@ -2198,8 +2191,8 @@ // by hand. // save_native_result(masm, ret_type, stack_slots); - __ move (A0, thread); - __ addi(SP,SP, -wordSize); + __ move(A0, thread); + __ addi(SP, SP, -wordSize); __ push(S2); __ move(AT, -(StackAlignmentInBytes)); __ move(S2, SP); // use S2 as a sender SP holder @@ -2311,7 +2304,7 @@ // Unpack oop result if (ret_type == T_OBJECT || ret_type == T_ARRAY) { Label L; - __ beq(V0, R0,L ); + __ beq(V0, R0, L); __ delayed()->nop(); __ ld(V0, V0, 0); __ bind(L); @@ -2319,15 +2312,14 @@ } if (!is_critical_native) { - // reset handle block - __ ld(AT, thread, in_bytes(JavaThread::active_handles_offset())); - __ sw(R0, AT, JNIHandleBlock::top_offset_in_bytes()); + // reset handle block + __ ld(AT, thread, in_bytes(JavaThread::active_handles_offset())); + __ sw(R0, AT, JNIHandleBlock::top_offset_in_bytes()); } if (!is_critical_native) { // Any exception pending? __ ld(AT, thread, in_bytes(Thread::pending_exception_offset())); - __ bne(AT, R0, exception_pending); __ delayed()->nop(); } @@ -2340,7 +2332,7 @@ #ifndef OPT_THREAD __ get_thread(TREG); #endif - __ ld_ptr(SP, TREG, in_bytes(JavaThread::last_Java_sp_offset())); + //__ ld_ptr(SP, TREG, in_bytes(JavaThread::last_Java_sp_offset())); __ leave(); __ jr(RA); @@ -2471,8 +2463,8 @@ __ empty_FPU_stack(); // pop our frame - //forward_exception_entry need return address on stack - __ addiu(SP, FP, wordSize); + //forward_exception_entry need return address on stack + __ addiu(SP, FP, wordSize); __ ld(FP, SP, (-1) * wordSize); // and forward the exception @@ -3708,7 +3700,7 @@ //CodeBuffer buffer(name, 1000, 512); //FIXME. aoqi. code_size - CodeBuffer buffer(name, 20000, 2048); + CodeBuffer buffer(name, 2000, 2048); MacroAssembler* masm = new MacroAssembler(&buffer); int frame_size_words; diff -r 2c1fab4a6f4e -r 0477693968a6 src/cpu/mips/vm/stubGenerator_mips_64.cpp --- a/src/cpu/mips/vm/stubGenerator_mips_64.cpp Thu Nov 16 17:27:00 2017 +0800 +++ b/src/cpu/mips/vm/stubGenerator_mips_64.cpp Mon Nov 13 15:49:42 2017 +0800 @@ -392,11 +392,11 @@ // ignore them. A potential result in registers can be ignored as // well. -#ifdef ASSERT - // make sure this code is only executed if there is a pending exception #ifndef OPT_THREAD __ get_thread(thread); #endif +#ifdef ASSERT + // make sure this code is only executed if there is a pending exception { Label L; __ ld(AT, thread, in_bytes(Thread::pending_exception_offset())); @@ -612,7 +612,7 @@ // exactly backwards!! //__ xchgptr(c_rarg1, c_rarg0); __ move(AT, A0); - __ move(A0, A1); + __ move(A0, A1); __ move(A1, AT); } else { __ move(A1, count); @@ -659,7 +659,7 @@ // exactly backwards!! //__ xchgptr(c_rarg1, c_rarg0); __ move(AT, A0); - __ move(A0, A1); + __ move(A0, A1); __ move(A1, AT); } else { __ move(A1, count); @@ -694,7 +694,7 @@ __ dsubu(end, end, start); // end --> cards count __ daddu(start, start, scratch); - + __ bind(L_loop); if (UseLoongsonISA) { __ gssbx(R0, start, count, 0); @@ -1993,14 +1993,14 @@ int frame_complete = __ pc() - start; // push java thread (becomes first argument of C function) __ sd(java_thread, SP, thread_off * wordSize); - if (java_thread!=A0) + if (java_thread != A0) __ move(A0, java_thread); // Set up last_Java_sp and last_Java_fp __ set_last_Java_frame(java_thread, SP, FP, NULL); - // Align stack - __ set64(AT, -(StackAlignmentInBytes)); - __ andr(SP, SP, AT); + // Align stack + __ set64(AT, -(StackAlignmentInBytes)); + __ andr(SP, SP, AT); __ relocate(relocInfo::internal_pc_type); { @@ -2051,8 +2051,11 @@ #endif //ASSERT __ jmp(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type); __ delayed()->nop(); - RuntimeStub* stub = RuntimeStub::new_runtime_stub(name, &code,frame_complete, - framesize, oop_maps, false); + RuntimeStub* stub = RuntimeStub::new_runtime_stub(name, + &code, + frame_complete, + framesize, + oop_maps, false); return stub->entry_point(); }