diff -r e4aeef458496 -r ffcdff41a92f src/share/vm/c1/c1_LIR.cpp --- a/src/share/vm/c1/c1_LIR.cpp Sat Jan 06 16:30:58 2018 +0800 +++ b/src/share/vm/c1/c1_LIR.cpp Thu May 24 19:49:50 2018 +0800 @@ -392,8 +392,7 @@ _stub(NULL) { } -#endif - +#endif void LIR_OpBranch::change_block(BlockBegin* b) { assert(_block != NULL, "must have old block"); assert(_block->label() == label(), "must be equal"); @@ -1342,7 +1341,10 @@ } void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { -#ifndef MIPS64 +#ifdef MIPS64 + add(base, offset, base); + offset = 0; +#endif append(new LIR_Op1( lir_move, LIR_OprFact::address(new LIR_Address(base, offset, type)), @@ -1350,16 +1352,6 @@ type, patch_code, info, lir_move_volatile)); -#else - add(base, offset, base); - append(new LIR_Op1( - lir_move, - LIR_OprFact::address(new LIR_Address(base, 0, type)), - dst, - type, - patch_code, - info, lir_move_volatile)); -#endif } @@ -1415,7 +1407,10 @@ } void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { -#ifndef MIPS64 +#ifdef MIPS64 + add(base, offset, base); + offset = 0; +#endif append(new LIR_Op1( lir_move, src, @@ -1423,18 +1418,6 @@ type, patch_code, info, lir_move_volatile)); -#else - add(base, offset, base); - append(new LIR_Op1( - lir_move, - src, - LIR_OprFact::address(new LIR_Address(base, 0, type)), - type, - patch_code, - info, lir_move_volatile)); - -#endif - } #ifdef MIPS64 @@ -1503,18 +1486,6 @@ info)); } -void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) { - if (deoptimize_on_null) { - // Emit an explicit null check and deoptimize if opr is null - CodeStub* deopt = new DeoptimizeStub(info); - cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL)); - branch(lir_cond_equal, T_OBJECT, deopt); - } else { - // Emit an implicit null check - append(new LIR_Op1(lir_null_check, opr, info)); - } -} - void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) { append(new LIR_Op2( lir_cmp, @@ -1523,7 +1494,26 @@ LIR_OprFact::address(addr), info)); } +#endif +void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) { + if (deoptimize_on_null) { + // Emit an explicit null check and deoptimize if opr is null + CodeStub* deopt = new DeoptimizeStub(info); +#ifndef MIPS64 + cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL)); + branch(lir_cond_equal, T_OBJECT, deopt); +#else + null_check_for_branch(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL)); + branch(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL), T_OBJECT, deopt); +#endif + } else { + // Emit an implicit null check + append(new LIR_Op1(lir_null_check, opr, info)); + } +} + +#ifndef MIPS64 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) { append(new LIR_OpAllocObj( @@ -1552,7 +1542,7 @@ stub)); } #else - void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, LIR_Opr t6, +void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, LIR_Opr t6, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) { append(new LIR_OpAllocObj( klass, @@ -1674,6 +1664,7 @@ append(c); } + void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) { LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception); @@ -1685,6 +1676,7 @@ append(c); } + #ifndef MIPS64 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {