diff -r bc63dd2539a4 -r 886d1fd67dc3 src/cpu/x86/vm/x86_32.ad
--- a/src/cpu/x86/vm/x86_32.ad	Fri Apr 12 20:37:18 2013 -0400
+++ b/src/cpu/x86/vm/x86_32.ad	Fri Apr 12 19:14:47 2013 -0700
@@ -1,5 +1,5 @@
 //
-// Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
 // This code is free software; you can redistribute it and/or modify it
@@ -2317,30 +2317,6 @@
     emit_rm(cbuf, 0x3, $p$$reg, tmpReg);
   %}
 
-  enc_class enc_cmpLTP_mem(rRegI p, rRegI q, memory mem, eCXRegI tmp) %{    // cadd_cmpLT
-    int tmpReg = $tmp$$reg;
-
-    // SUB $p,$q
-    emit_opcode(cbuf,0x2B);
-    emit_rm(cbuf, 0x3, $p$$reg, $q$$reg);
-    // SBB $tmp,$tmp
-    emit_opcode(cbuf,0x1B);
-    emit_rm(cbuf, 0x3, tmpReg, tmpReg);
-    // AND $tmp,$y
-    cbuf.set_insts_mark();       // Mark start of opcode for reloc info in mem operand
-    emit_opcode(cbuf,0x23);
-    int reg_encoding = tmpReg;
-    int base  = $mem$$base;
-    int index = $mem$$index;
-    int scale = $mem$$scale;
-    int displace = $mem$$disp;
-    relocInfo::relocType disp_reloc = $mem->disp_reloc();
-    encode_RegMem(cbuf, reg_encoding, base, index, scale, displace, disp_reloc);
-    // ADD $p,$tmp
-    emit_opcode(cbuf,0x03);
-    emit_rm(cbuf, 0x3, $p$$reg, tmpReg);
-  %}
-
   enc_class shift_left_long( eRegL dst, eCXRegI shift ) %{
     // TEST shift,32
     emit_opcode(cbuf,0xF7);
@@ -8922,9 +8898,9 @@
   %}
 %}
 
-instruct cmpLTMask( eCXRegI dst, ncxRegI p, ncxRegI q, eFlagsReg cr ) %{
+instruct cmpLTMask(eCXRegI dst, ncxRegI p, ncxRegI q, eFlagsReg cr) %{
   match(Set dst (CmpLTMask p q));
-  effect( KILL cr );
+  effect(KILL cr);
   ins_cost(400);
 
   // SETlt can only use low byte of EAX,EBX, ECX, or EDX as destination
@@ -8932,50 +8908,83 @@
             "CMP    $p,$q\n\t"
             "SETlt  $dst\n\t"
             "NEG    $dst" %}
-  ins_encode( OpcRegReg(0x33,dst,dst),
-              OpcRegReg(0x3B,p,q),
-              setLT_reg(dst), neg_reg(dst) );
-  ins_pipe( pipe_slow );
-%}
-
-instruct cmpLTMask0( rRegI dst, immI0 zero, eFlagsReg cr ) %{
+  ins_encode %{
+    Register Rp = $p$$Register;
+    Register Rq = $q$$Register;
+    Register Rd = $dst$$Register;
+    Label done;
+    __ xorl(Rd, Rd);
+    __ cmpl(Rp, Rq);
+    __ setb(Assembler::less, Rd);
+    __ negl(Rd);
+  %}
+
+  ins_pipe(pipe_slow);
+%}
+
+instruct cmpLTMask0(rRegI dst, immI0 zero, eFlagsReg cr) %{
   match(Set dst (CmpLTMask dst zero));
-  effect( DEF dst, KILL cr );
+  effect(DEF dst, KILL cr);
   ins_cost(100);
 
-  format %{ "SAR    $dst,31" %}
-  opcode(0xC1, 0x7);  /* C1 /7 ib */
-  ins_encode( RegOpcImm( dst, 0x1F ) );
-  ins_pipe( ialu_reg );
-%}
-
-
-instruct cadd_cmpLTMask( ncxRegI p, ncxRegI q, ncxRegI y, eCXRegI tmp, eFlagsReg cr ) %{
+  format %{ "SAR    $dst,31\t# cmpLTMask0" %}
+  ins_encode %{
+  __ sarl($dst$$Register, 31);
+  %}
+  ins_pipe(ialu_reg);
+%}
+
+/* better to save a register than avoid a branch */
+instruct cadd_cmpLTMask(rRegI p, rRegI q, rRegI y, eFlagsReg cr) %{
   match(Set p (AddI (AndI (CmpLTMask p q) y) (SubI p q)));
-  effect( KILL tmp, KILL cr );
+  effect(KILL cr);
   ins_cost(400);
-  // annoyingly, $tmp has no edges so you cant ask for it in
-  // any format or encoding
-  format %{ "SUB    $p,$q\n\t"
-            "SBB    ECX,ECX\n\t"
-            "AND    ECX,$y\n\t"
-            "ADD    $p,ECX" %}
-  ins_encode( enc_cmpLTP(p,q,y,tmp) );
-  ins_pipe( pipe_cmplt );
+  format %{ "SUB    $p,$q\t# cadd_cmpLTMask\n\t"
+            "JGE    done\n\t"
+            "ADD    $p,$y\n"
+            "done:  " %}
+  ins_encode %{
+    Register Rp = $p$$Register;
+    Register Rq = $q$$Register;
+    Register Ry = $y$$Register;
+    Label done;
+    __ subl(Rp, Rq);
+    __ jccb(Assembler::greaterEqual, done);
+    __ addl(Rp, Ry);
+    __ bind(done);
+  %}
+
+  ins_pipe(pipe_cmplt);
+%}
+
+/* better to save a register than avoid a branch */
+instruct and_cmpLTMask(rRegI p, rRegI q, rRegI y, eFlagsReg cr) %{
+  match(Set y (AndI (CmpLTMask p q) y));
+  effect(KILL cr);
+
+  ins_cost(300);
+
+  format %{ "CMPL     $p, $q\t# and_cmpLTMask\n\t"
+            "JLT      done\n\t"
+            "XORL     $y, $y\n"
+            "done:  " %}
+  ins_encode %{
+    Register Rp = $p$$Register;
+    Register Rq = $q$$Register;
+    Register Ry = $y$$Register;
+    Label done;
+    __ cmpl(Rp, Rq);
+    __ jccb(Assembler::less, done);
+    __ xorl(Ry, Ry);
+    __ bind(done);
+  %}
+
+  ins_pipe(pipe_cmplt);
 %}
 
 /* If I enable this, I encourage spilling in the inner loop of compress.
-instruct cadd_cmpLTMask_mem( ncxRegI p, ncxRegI q, memory y, eCXRegI tmp, eFlagsReg cr ) %{
+instruct cadd_cmpLTMask_mem(ncxRegI p, ncxRegI q, memory y, eCXRegI tmp, eFlagsReg cr) %{
   match(Set p (AddI (AndI (CmpLTMask p q) (LoadI y)) (SubI p q)));
-  effect( USE_KILL tmp, KILL cr );
-  ins_cost(400);
-
-  format %{ "SUB    $p,$q\n\t"
-            "SBB    ECX,ECX\n\t"
-            "AND    ECX,$y\n\t"
-            "ADD    $p,ECX" %}
-  ins_encode( enc_cmpLTP_mem(p,q,y,tmp) );
-%}
 */
 
 //----------Long Instructions------------------------------------------------