diff -r ae93017b2930 -r 2fccf735a116 src/cpu/x86/vm/x86.ad
--- a/src/cpu/x86/vm/x86.ad	Fri Jun 15 15:37:35 2018 +0000
+++ b/src/cpu/x86/vm/x86.ad	Mon Jun 18 14:39:46 2018 -0700
@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2011, 2018, Oracle and/or its affiliates. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
 // This code is free software; you can redistribute it and/or modify it
@@ -683,7 +683,7 @@
 }
 
 // Vector ideal reg corresponding to specidied size in bytes
-const int Matcher::vector_ideal_reg(int size) {
+const uint Matcher::vector_ideal_reg(int size) {
   assert(MaxVectorSize >= size, "");
   switch(size) {
     case  4: return Op_VecS;
@@ -696,7 +696,7 @@
 }
 
 // Only lowest bits of xmm reg are used for vector shift count.
-const int Matcher::vector_shift_count_ideal_reg(int size) {
+const uint Matcher::vector_shift_count_ideal_reg(int size) {
   return Op_VecS;
 }