aoqi@0: /* drchase@7161: * Copyright (c) 1998, 2014, Oracle and/or its affiliates. All rights reserved. aoqi@0: * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. aoqi@0: * aoqi@0: * This code is free software; you can redistribute it and/or modify it aoqi@0: * under the terms of the GNU General Public License version 2 only, as aoqi@0: * published by the Free Software Foundation. aoqi@0: * aoqi@0: * This code is distributed in the hope that it will be useful, but WITHOUT aoqi@0: * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or aoqi@0: * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License aoqi@0: * version 2 for more details (a copy is included in the LICENSE file that aoqi@0: * accompanied this code). aoqi@0: * aoqi@0: * You should have received a copy of the GNU General Public License version aoqi@0: * 2 along with this work; if not, write to the Free Software Foundation, aoqi@0: * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. aoqi@0: * aoqi@0: * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA aoqi@0: * or visit www.oracle.com if you need additional information or have any aoqi@0: * questions. aoqi@0: * aoqi@0: */ aoqi@0: aoqi@1: /* aoqi@1: * This file has been modified by Loongson Technology in 2015. These aoqi@1: * modifications are Copyright (c) 2015 Loongson Technology, and are made aoqi@1: * available on the same license terms set forth above. aoqi@1: */ aoqi@1: aoqi@0: #include "precompiled.hpp" aoqi@0: #include "asm/assembler.inline.hpp" aoqi@0: #include "code/compiledIC.hpp" aoqi@0: #include "code/debugInfo.hpp" aoqi@0: #include "code/debugInfoRec.hpp" aoqi@0: #include "compiler/compileBroker.hpp" aoqi@0: #include "compiler/oopMap.hpp" aoqi@0: #include "memory/allocation.inline.hpp" aoqi@0: #include "opto/callnode.hpp" aoqi@0: #include "opto/cfgnode.hpp" aoqi@0: #include "opto/locknode.hpp" aoqi@0: #include "opto/machnode.hpp" aoqi@0: #include "opto/output.hpp" aoqi@0: #include "opto/regalloc.hpp" aoqi@0: #include "opto/runtime.hpp" aoqi@0: #include "opto/subnode.hpp" aoqi@0: #include "opto/type.hpp" aoqi@0: #include "runtime/handles.inline.hpp" aoqi@0: #include "utilities/xmlstream.hpp" aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: #define DEBUG_ARG(x) , x aoqi@0: #else aoqi@0: #define DEBUG_ARG(x) aoqi@0: #endif aoqi@0: aoqi@0: // Convert Nodes to instruction bits and pass off to the VM aoqi@0: void Compile::Output() { aoqi@0: // RootNode goes aoqi@0: assert( _cfg->get_root_block()->number_of_nodes() == 0, "" ); aoqi@0: aoqi@0: // The number of new nodes (mostly MachNop) is proportional to aoqi@0: // the number of java calls and inner loops which are aligned. aoqi@0: if ( C->check_node_count((NodeLimitFudgeFactor + C->java_calls()*3 + aoqi@0: C->inner_loops()*(OptoLoopAlignment-1)), aoqi@0: "out of nodes before code generation" ) ) { aoqi@0: return; aoqi@0: } aoqi@0: // Make sure I can find the Start Node aoqi@0: Block *entry = _cfg->get_block(1); aoqi@0: Block *broot = _cfg->get_root_block(); aoqi@0: aoqi@0: const StartNode *start = entry->head()->as_Start(); aoqi@0: aoqi@0: // Replace StartNode with prolog aoqi@0: MachPrologNode *prolog = new (this) MachPrologNode(); aoqi@0: entry->map_node(prolog, 0); aoqi@0: _cfg->map_node_to_block(prolog, entry); aoqi@0: _cfg->unmap_node_from_block(start); // start is no longer in any block aoqi@0: aoqi@0: // Virtual methods need an unverified entry point aoqi@0: aoqi@0: if( is_osr_compilation() ) { aoqi@0: if( PoisonOSREntry ) { aoqi@0: // TODO: Should use a ShouldNotReachHereNode... aoqi@0: _cfg->insert( broot, 0, new (this) MachBreakpointNode() ); aoqi@0: } aoqi@0: } else { aoqi@0: if( _method && !_method->flags().is_static() ) { aoqi@0: // Insert unvalidated entry point aoqi@0: _cfg->insert( broot, 0, new (this) MachUEPNode() ); aoqi@0: } aoqi@0: aoqi@0: } aoqi@0: aoqi@0: aoqi@0: // Break before main entry point aoqi@0: if( (_method && _method->break_at_execute()) aoqi@0: #ifndef PRODUCT aoqi@0: ||(OptoBreakpoint && is_method_compilation()) aoqi@0: ||(OptoBreakpointOSR && is_osr_compilation()) aoqi@0: ||(OptoBreakpointC2R && !_method) aoqi@0: #endif aoqi@0: ) { aoqi@0: // checking for _method means that OptoBreakpoint does not apply to aoqi@0: // runtime stubs or frame converters aoqi@0: _cfg->insert( entry, 1, new (this) MachBreakpointNode() ); aoqi@0: } aoqi@0: aoqi@0: // Insert epilogs before every return aoqi@0: for (uint i = 0; i < _cfg->number_of_blocks(); i++) { aoqi@0: Block* block = _cfg->get_block(i); aoqi@0: if (!block->is_connector() && block->non_connector_successor(0) == _cfg->get_root_block()) { // Found a program exit point? aoqi@0: Node* m = block->end(); aoqi@0: if (m->is_Mach() && m->as_Mach()->ideal_Opcode() != Op_Halt) { aoqi@0: MachEpilogNode* epilog = new (this) MachEpilogNode(m->as_Mach()->ideal_Opcode() == Op_Return); aoqi@0: block->add_inst(epilog); aoqi@0: _cfg->map_node_to_block(epilog, block); aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: # ifdef ENABLE_ZAP_DEAD_LOCALS aoqi@0: if (ZapDeadCompiledLocals) { aoqi@0: Insert_zap_nodes(); aoqi@0: } aoqi@0: # endif aoqi@0: aoqi@0: uint* blk_starts = NEW_RESOURCE_ARRAY(uint, _cfg->number_of_blocks() + 1); aoqi@0: blk_starts[0] = 0; aoqi@0: aoqi@0: // Initialize code buffer and process short branches. aoqi@0: CodeBuffer* cb = init_buffer(blk_starts); aoqi@0: aoqi@0: if (cb == NULL || failing()) { aoqi@0: return; aoqi@0: } aoqi@0: aoqi@0: ScheduleAndBundle(); aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: if (trace_opto_output()) { aoqi@0: tty->print("\n---- After ScheduleAndBundle ----\n"); aoqi@0: for (uint i = 0; i < _cfg->number_of_blocks(); i++) { aoqi@0: tty->print("\nBB#%03d:\n", i); aoqi@0: Block* block = _cfg->get_block(i); aoqi@0: for (uint j = 0; j < block->number_of_nodes(); j++) { aoqi@0: Node* n = block->get_node(j); aoqi@0: OptoReg::Name reg = _regalloc->get_reg_first(n); aoqi@0: tty->print(" %-6s ", reg >= 0 && reg < REG_COUNT ? Matcher::regName[reg] : ""); aoqi@0: n->dump(); aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: #endif aoqi@0: aoqi@0: if (failing()) { aoqi@0: return; aoqi@0: } aoqi@0: aoqi@0: BuildOopMaps(); aoqi@0: aoqi@0: if (failing()) { aoqi@0: return; aoqi@0: } aoqi@0: aoqi@0: fill_buffer(cb, blk_starts); aoqi@0: } aoqi@0: aoqi@0: bool Compile::need_stack_bang(int frame_size_in_bytes) const { aoqi@0: // Determine if we need to generate a stack overflow check. aoqi@0: // Do it if the method is not a stub function and aoqi@0: // has java calls or has frame size > vm_page_size/8. aoqi@0: // The debug VM checks that deoptimization doesn't trigger an aoqi@0: // unexpected stack overflow (compiled method stack banging should aoqi@0: // guarantee it doesn't happen) so we always need the stack bang in aoqi@0: // a debug VM. aoqi@0: return (UseStackBanging && stub_function() == NULL && aoqi@0: (has_java_calls() || frame_size_in_bytes > os::vm_page_size()>>3 aoqi@0: DEBUG_ONLY(|| true))); aoqi@0: } aoqi@0: aoqi@0: bool Compile::need_register_stack_bang() const { aoqi@0: // Determine if we need to generate a register stack overflow check. aoqi@0: // This is only used on architectures which have split register aoqi@0: // and memory stacks (ie. IA64). aoqi@0: // Bang if the method is not a stub function and has java calls aoqi@0: return (stub_function() == NULL && has_java_calls()); aoqi@0: } aoqi@0: aoqi@0: # ifdef ENABLE_ZAP_DEAD_LOCALS aoqi@0: aoqi@0: aoqi@0: // In order to catch compiler oop-map bugs, we have implemented aoqi@0: // a debugging mode called ZapDeadCompilerLocals. aoqi@0: // This mode causes the compiler to insert a call to a runtime routine, aoqi@0: // "zap_dead_locals", right before each place in compiled code aoqi@0: // that could potentially be a gc-point (i.e., a safepoint or oop map point). aoqi@0: // The runtime routine checks that locations mapped as oops are really aoqi@0: // oops, that locations mapped as values do not look like oops, aoqi@0: // and that locations mapped as dead are not used later aoqi@0: // (by zapping them to an invalid address). aoqi@0: aoqi@0: int Compile::_CompiledZap_count = 0; aoqi@0: aoqi@0: void Compile::Insert_zap_nodes() { aoqi@0: bool skip = false; aoqi@0: aoqi@0: aoqi@0: // Dink with static counts because code code without the extra aoqi@0: // runtime calls is MUCH faster for debugging purposes aoqi@0: aoqi@0: if ( CompileZapFirst == 0 ) ; // nothing special aoqi@0: else if ( CompileZapFirst > CompiledZap_count() ) skip = true; aoqi@0: else if ( CompileZapFirst == CompiledZap_count() ) aoqi@0: warning("starting zap compilation after skipping"); aoqi@0: aoqi@0: if ( CompileZapLast == -1 ) ; // nothing special aoqi@0: else if ( CompileZapLast < CompiledZap_count() ) skip = true; aoqi@0: else if ( CompileZapLast == CompiledZap_count() ) aoqi@0: warning("about to compile last zap"); aoqi@0: aoqi@0: ++_CompiledZap_count; // counts skipped zaps, too aoqi@0: aoqi@0: if ( skip ) return; aoqi@0: aoqi@0: aoqi@0: if ( _method == NULL ) aoqi@0: return; // no safepoints/oopmaps emitted for calls in stubs,so we don't care aoqi@0: aoqi@0: // Insert call to zap runtime stub before every node with an oop map aoqi@0: for( uint i=0; i<_cfg->number_of_blocks(); i++ ) { aoqi@0: Block *b = _cfg->get_block(i); aoqi@0: for ( uint j = 0; j < b->number_of_nodes(); ++j ) { aoqi@0: Node *n = b->get_node(j); aoqi@0: aoqi@0: // Determining if we should insert a zap-a-lot node in output. aoqi@0: // We do that for all nodes that has oopmap info, except for calls aoqi@0: // to allocation. Calls to allocation passes in the old top-of-eden pointer aoqi@0: // and expect the C code to reset it. Hence, there can be no safepoints between aoqi@0: // the inlined-allocation and the call to new_Java, etc. aoqi@0: // We also cannot zap monitor calls, as they must hold the microlock aoqi@0: // during the call to Zap, which also wants to grab the microlock. aoqi@0: bool insert = n->is_MachSafePoint() && (n->as_MachSafePoint()->oop_map() != NULL); aoqi@0: if ( insert ) { // it is MachSafePoint aoqi@0: if ( !n->is_MachCall() ) { aoqi@0: insert = false; aoqi@0: } else if ( n->is_MachCall() ) { aoqi@0: MachCallNode* call = n->as_MachCall(); aoqi@0: if (call->entry_point() == OptoRuntime::new_instance_Java() || aoqi@0: call->entry_point() == OptoRuntime::new_array_Java() || aoqi@0: call->entry_point() == OptoRuntime::multianewarray2_Java() || aoqi@0: call->entry_point() == OptoRuntime::multianewarray3_Java() || aoqi@0: call->entry_point() == OptoRuntime::multianewarray4_Java() || aoqi@0: call->entry_point() == OptoRuntime::multianewarray5_Java() || aoqi@0: call->entry_point() == OptoRuntime::slow_arraycopy_Java() || aoqi@0: call->entry_point() == OptoRuntime::complete_monitor_locking_Java() aoqi@0: ) { aoqi@0: insert = false; aoqi@0: } aoqi@0: } aoqi@0: if (insert) { aoqi@0: Node *zap = call_zap_node(n->as_MachSafePoint(), i); aoqi@0: b->insert_node(zap, j); aoqi@0: _cfg->map_node_to_block(zap, b); aoqi@0: ++j; aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: aoqi@0: Node* Compile::call_zap_node(MachSafePointNode* node_to_check, int block_no) { aoqi@0: const TypeFunc *tf = OptoRuntime::zap_dead_locals_Type(); aoqi@0: CallStaticJavaNode* ideal_node = aoqi@0: new (this) CallStaticJavaNode( tf, aoqi@0: OptoRuntime::zap_dead_locals_stub(_method->flags().is_native()), aoqi@0: "call zap dead locals stub", 0, TypePtr::BOTTOM); aoqi@0: // We need to copy the OopMap from the site we're zapping at. aoqi@0: // We have to make a copy, because the zap site might not be aoqi@0: // a call site, and zap_dead is a call site. aoqi@0: OopMap* clone = node_to_check->oop_map()->deep_copy(); aoqi@0: aoqi@0: // Add the cloned OopMap to the zap node aoqi@0: ideal_node->set_oop_map(clone); aoqi@0: return _matcher->match_sfpt(ideal_node); aoqi@0: } aoqi@0: aoqi@0: bool Compile::is_node_getting_a_safepoint( Node* n) { aoqi@0: // This code duplicates the logic prior to the call of add_safepoint aoqi@0: // below in this file. aoqi@0: if( n->is_MachSafePoint() ) return true; aoqi@0: return false; aoqi@0: } aoqi@0: aoqi@0: # endif // ENABLE_ZAP_DEAD_LOCALS aoqi@0: aoqi@0: // Compute the size of first NumberOfLoopInstrToAlign instructions at the top aoqi@0: // of a loop. When aligning a loop we need to provide enough instructions aoqi@0: // in cpu's fetch buffer to feed decoders. The loop alignment could be aoqi@0: // avoided if we have enough instructions in fetch buffer at the head of a loop. aoqi@0: // By default, the size is set to 999999 by Block's constructor so that aoqi@0: // a loop will be aligned if the size is not reset here. aoqi@0: // aoqi@0: // Note: Mach instructions could contain several HW instructions aoqi@0: // so the size is estimated only. aoqi@0: // aoqi@0: void Compile::compute_loop_first_inst_sizes() { aoqi@0: // The next condition is used to gate the loop alignment optimization. aoqi@0: // Don't aligned a loop if there are enough instructions at the head of a loop aoqi@0: // or alignment padding is larger then MaxLoopPad. By default, MaxLoopPad aoqi@0: // is equal to OptoLoopAlignment-1 except on new Intel cpus, where it is aoqi@0: // equal to 11 bytes which is the largest address NOP instruction. aoqi@0: if (MaxLoopPad < OptoLoopAlignment - 1) { aoqi@0: uint last_block = _cfg->number_of_blocks() - 1; aoqi@0: for (uint i = 1; i <= last_block; i++) { aoqi@0: Block* block = _cfg->get_block(i); aoqi@0: // Check the first loop's block which requires an alignment. aoqi@0: if (block->loop_alignment() > (uint)relocInfo::addr_unit()) { aoqi@0: uint sum_size = 0; aoqi@0: uint inst_cnt = NumberOfLoopInstrToAlign; aoqi@0: inst_cnt = block->compute_first_inst_size(sum_size, inst_cnt, _regalloc); aoqi@0: aoqi@0: // Check subsequent fallthrough blocks if the loop's first aoqi@0: // block(s) does not have enough instructions. aoqi@0: Block *nb = block; aoqi@0: while(inst_cnt > 0 && aoqi@0: i < last_block && aoqi@0: !_cfg->get_block(i + 1)->has_loop_alignment() && aoqi@0: !nb->has_successor(block)) { aoqi@0: i++; aoqi@0: nb = _cfg->get_block(i); aoqi@0: inst_cnt = nb->compute_first_inst_size(sum_size, inst_cnt, _regalloc); aoqi@0: } // while( inst_cnt > 0 && i < last_block ) aoqi@0: aoqi@0: block->set_first_inst_size(sum_size); aoqi@0: } // f( b->head()->is_Loop() ) aoqi@0: } // for( i <= last_block ) aoqi@0: } // if( MaxLoopPad < OptoLoopAlignment-1 ) aoqi@0: } aoqi@0: aoqi@0: // The architecture description provides short branch variants for some long aoqi@0: // branch instructions. Replace eligible long branches with short branches. aoqi@0: void Compile::shorten_branches(uint* blk_starts, int& code_size, int& reloc_size, int& stub_size) { aoqi@0: // Compute size of each block, method size, and relocation information size aoqi@0: uint nblocks = _cfg->number_of_blocks(); aoqi@0: aoqi@0: uint* jmp_offset = NEW_RESOURCE_ARRAY(uint,nblocks); aoqi@0: uint* jmp_size = NEW_RESOURCE_ARRAY(uint,nblocks); aoqi@0: int* jmp_nidx = NEW_RESOURCE_ARRAY(int ,nblocks); aoqi@0: aoqi@0: // Collect worst case block paddings aoqi@0: int* block_worst_case_pad = NEW_RESOURCE_ARRAY(int, nblocks); aoqi@0: memset(block_worst_case_pad, 0, nblocks * sizeof(int)); aoqi@0: aoqi@0: DEBUG_ONLY( uint *jmp_target = NEW_RESOURCE_ARRAY(uint,nblocks); ) aoqi@0: DEBUG_ONLY( uint *jmp_rule = NEW_RESOURCE_ARRAY(uint,nblocks); ) aoqi@0: aoqi@0: bool has_short_branch_candidate = false; aoqi@0: aoqi@0: // Initialize the sizes to 0 aoqi@0: code_size = 0; // Size in bytes of generated code aoqi@0: stub_size = 0; // Size in bytes of all stub entries aoqi@0: // Size in bytes of all relocation entries, including those in local stubs. aoqi@0: // Start with 2-bytes of reloc info for the unvalidated entry point aoqi@0: reloc_size = 1; // Number of relocation entries aoqi@0: aoqi@0: // Make three passes. The first computes pessimistic blk_starts, aoqi@0: // relative jmp_offset and reloc_size information. The second performs aoqi@0: // short branch substitution using the pessimistic sizing. The aoqi@0: // third inserts nops where needed. aoqi@0: aoqi@0: // Step one, perform a pessimistic sizing pass. aoqi@0: uint last_call_adr = max_uint; aoqi@0: uint last_avoid_back_to_back_adr = max_uint; aoqi@0: uint nop_size = (new (this) MachNopNode())->size(_regalloc); aoqi@0: for (uint i = 0; i < nblocks; i++) { // For all blocks aoqi@0: Block* block = _cfg->get_block(i); aoqi@0: aoqi@0: // During short branch replacement, we store the relative (to blk_starts) aoqi@0: // offset of jump in jmp_offset, rather than the absolute offset of jump. aoqi@0: // This is so that we do not need to recompute sizes of all nodes when aoqi@0: // we compute correct blk_starts in our next sizing pass. aoqi@0: jmp_offset[i] = 0; aoqi@0: jmp_size[i] = 0; aoqi@0: jmp_nidx[i] = -1; aoqi@0: DEBUG_ONLY( jmp_target[i] = 0; ) aoqi@0: DEBUG_ONLY( jmp_rule[i] = 0; ) aoqi@0: aoqi@0: // Sum all instruction sizes to compute block size aoqi@0: uint last_inst = block->number_of_nodes(); aoqi@0: uint blk_size = 0; aoqi@0: for (uint j = 0; j < last_inst; j++) { aoqi@0: Node* nj = block->get_node(j); aoqi@0: // Handle machine instruction nodes aoqi@0: if (nj->is_Mach()) { aoqi@0: MachNode *mach = nj->as_Mach(); aoqi@0: blk_size += (mach->alignment_required() - 1) * relocInfo::addr_unit(); // assume worst case padding aoqi@0: reloc_size += mach->reloc(); aoqi@0: if (mach->is_MachCall()) { aoqi@0: // add size information for trampoline stub aoqi@0: // class CallStubImpl is platform-specific and defined in the *.ad files. aoqi@0: stub_size += CallStubImpl::size_call_trampoline(); aoqi@0: reloc_size += CallStubImpl::reloc_call_trampoline(); aoqi@0: aoqi@0: MachCallNode *mcall = mach->as_MachCall(); aoqi@0: // This destination address is NOT PC-relative aoqi@0: aoqi@0: mcall->method_set((intptr_t)mcall->entry_point()); aoqi@0: aoqi@0: if (mcall->is_MachCallJava() && mcall->as_MachCallJava()->_method) { aoqi@0: stub_size += CompiledStaticCall::to_interp_stub_size(); aoqi@0: reloc_size += CompiledStaticCall::reloc_to_interp_stub(); aoqi@0: } aoqi@0: } else if (mach->is_MachSafePoint()) { aoqi@0: // If call/safepoint are adjacent, account for possible aoqi@0: // nop to disambiguate the two safepoints. aoqi@0: // ScheduleAndBundle() can rearrange nodes in a block, aoqi@0: // check for all offsets inside this block. aoqi@0: if (last_call_adr >= blk_starts[i]) { aoqi@0: blk_size += nop_size; aoqi@0: } aoqi@0: } aoqi@0: if (mach->avoid_back_to_back(MachNode::AVOID_BEFORE)) { aoqi@0: // Nop is inserted between "avoid back to back" instructions. aoqi@0: // ScheduleAndBundle() can rearrange nodes in a block, aoqi@0: // check for all offsets inside this block. aoqi@0: if (last_avoid_back_to_back_adr >= blk_starts[i]) { aoqi@0: blk_size += nop_size; aoqi@0: } aoqi@0: } aoqi@0: if (mach->may_be_short_branch()) { aoqi@0: if (!nj->is_MachBranch()) { aoqi@0: #ifndef PRODUCT aoqi@0: nj->dump(3); aoqi@0: #endif aoqi@0: Unimplemented(); aoqi@0: } aoqi@0: assert(jmp_nidx[i] == -1, "block should have only one branch"); aoqi@0: jmp_offset[i] = blk_size; aoqi@0: jmp_size[i] = nj->size(_regalloc); aoqi@0: jmp_nidx[i] = j; aoqi@0: has_short_branch_candidate = true; aoqi@0: } aoqi@0: } aoqi@0: blk_size += nj->size(_regalloc); aoqi@0: // Remember end of call offset aoqi@0: if (nj->is_MachCall() && !nj->is_MachCallLeaf()) { aoqi@0: last_call_adr = blk_starts[i]+blk_size; aoqi@0: } aoqi@0: // Remember end of avoid_back_to_back offset aoqi@0: if (nj->is_Mach() && nj->as_Mach()->avoid_back_to_back(MachNode::AVOID_AFTER)) { aoqi@0: last_avoid_back_to_back_adr = blk_starts[i]+blk_size; aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // When the next block starts a loop, we may insert pad NOP aoqi@0: // instructions. Since we cannot know our future alignment, aoqi@0: // assume the worst. aoqi@0: if (i < nblocks - 1) { aoqi@0: Block* nb = _cfg->get_block(i + 1); aoqi@0: int max_loop_pad = nb->code_alignment()-relocInfo::addr_unit(); aoqi@0: if (max_loop_pad > 0) { aoqi@0: assert(is_power_of_2(max_loop_pad+relocInfo::addr_unit()), ""); aoqi@0: // Adjust last_call_adr and/or last_avoid_back_to_back_adr. aoqi@0: // If either is the last instruction in this block, bump by aoqi@0: // max_loop_pad in lock-step with blk_size, so sizing aoqi@0: // calculations in subsequent blocks still can conservatively aoqi@0: // detect that it may the last instruction in this block. aoqi@0: if (last_call_adr == blk_starts[i]+blk_size) { aoqi@0: last_call_adr += max_loop_pad; aoqi@0: } aoqi@0: if (last_avoid_back_to_back_adr == blk_starts[i]+blk_size) { aoqi@0: last_avoid_back_to_back_adr += max_loop_pad; aoqi@0: } aoqi@0: blk_size += max_loop_pad; aoqi@0: block_worst_case_pad[i + 1] = max_loop_pad; aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // Save block size; update total method size aoqi@0: blk_starts[i+1] = blk_starts[i]+blk_size; aoqi@0: } aoqi@0: aoqi@0: // Step two, replace eligible long jumps. aoqi@0: bool progress = true; aoqi@0: uint last_may_be_short_branch_adr = max_uint; aoqi@0: while (has_short_branch_candidate && progress) { aoqi@0: progress = false; aoqi@0: has_short_branch_candidate = false; aoqi@0: int adjust_block_start = 0; aoqi@0: for (uint i = 0; i < nblocks; i++) { aoqi@0: Block* block = _cfg->get_block(i); aoqi@0: int idx = jmp_nidx[i]; aoqi@0: MachNode* mach = (idx == -1) ? NULL: block->get_node(idx)->as_Mach(); aoqi@0: if (mach != NULL && mach->may_be_short_branch()) { aoqi@0: #ifdef ASSERT aoqi@0: assert(jmp_size[i] > 0 && mach->is_MachBranch(), "sanity"); aoqi@0: int j; aoqi@0: // Find the branch; ignore trailing NOPs. aoqi@0: for (j = block->number_of_nodes()-1; j>=0; j--) { aoqi@0: Node* n = block->get_node(j); aoqi@0: if (!n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con) aoqi@0: break; aoqi@0: } aoqi@0: assert(j >= 0 && j == idx && block->get_node(j) == (Node*)mach, "sanity"); aoqi@0: #endif aoqi@0: int br_size = jmp_size[i]; aoqi@0: int br_offs = blk_starts[i] + jmp_offset[i]; aoqi@0: aoqi@0: // This requires the TRUE branch target be in succs[0] aoqi@0: uint bnum = block->non_connector_successor(0)->_pre_order; aoqi@0: int offset = blk_starts[bnum] - br_offs; aoqi@0: if (bnum > i) { // adjust following block's offset aoqi@0: offset -= adjust_block_start; aoqi@0: } aoqi@0: aoqi@0: // This block can be a loop header, account for the padding aoqi@0: // in the previous block. aoqi@0: int block_padding = block_worst_case_pad[i]; aoqi@0: assert(i == 0 || block_padding == 0 || br_offs >= block_padding, "Should have at least a padding on top"); aoqi@0: // In the following code a nop could be inserted before aoqi@0: // the branch which will increase the backward distance. aoqi@0: bool needs_padding = ((uint)(br_offs - block_padding) == last_may_be_short_branch_adr); aoqi@0: assert(!needs_padding || jmp_offset[i] == 0, "padding only branches at the beginning of block"); aoqi@0: aoqi@0: if (needs_padding && offset <= 0) aoqi@0: offset -= nop_size; aoqi@0: aoqi@0: if (_matcher->is_short_branch_offset(mach->rule(), br_size, offset)) { aoqi@0: // We've got a winner. Replace this branch. aoqi@0: MachNode* replacement = mach->as_MachBranch()->short_branch_version(this); aoqi@0: aoqi@0: // Update the jmp_size. aoqi@0: int new_size = replacement->size(_regalloc); aoqi@0: int diff = br_size - new_size; aoqi@0: assert(diff >= (int)nop_size, "short_branch size should be smaller"); aoqi@0: // Conservatively take into account padding between aoqi@0: // avoid_back_to_back branches. Previous branch could be aoqi@0: // converted into avoid_back_to_back branch during next aoqi@0: // rounds. aoqi@0: if (needs_padding && replacement->avoid_back_to_back(MachNode::AVOID_BEFORE)) { aoqi@0: jmp_offset[i] += nop_size; aoqi@0: diff -= nop_size; aoqi@0: } aoqi@0: adjust_block_start += diff; aoqi@0: block->map_node(replacement, idx); aoqi@0: mach->subsume_by(replacement, C); aoqi@0: mach = replacement; aoqi@0: progress = true; aoqi@0: aoqi@0: jmp_size[i] = new_size; aoqi@0: DEBUG_ONLY( jmp_target[i] = bnum; ); aoqi@0: DEBUG_ONLY( jmp_rule[i] = mach->rule(); ); aoqi@0: } else { aoqi@0: // The jump distance is not short, try again during next iteration. aoqi@0: has_short_branch_candidate = true; aoqi@0: } aoqi@0: } // (mach->may_be_short_branch()) aoqi@0: if (mach != NULL && (mach->may_be_short_branch() || aoqi@0: mach->avoid_back_to_back(MachNode::AVOID_AFTER))) { aoqi@0: last_may_be_short_branch_adr = blk_starts[i] + jmp_offset[i] + jmp_size[i]; aoqi@0: } aoqi@0: blk_starts[i+1] -= adjust_block_start; aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: #ifdef ASSERT aoqi@0: for (uint i = 0; i < nblocks; i++) { // For all blocks aoqi@0: if (jmp_target[i] != 0) { aoqi@0: int br_size = jmp_size[i]; aoqi@0: int offset = blk_starts[jmp_target[i]]-(blk_starts[i] + jmp_offset[i]); aoqi@0: if (!_matcher->is_short_branch_offset(jmp_rule[i], br_size, offset)) { aoqi@0: tty->print_cr("target (%d) - jmp_offset(%d) = offset (%d), jump_size(%d), jmp_block B%d, target_block B%d", blk_starts[jmp_target[i]], blk_starts[i] + jmp_offset[i], offset, br_size, i, jmp_target[i]); aoqi@0: } aoqi@0: assert(_matcher->is_short_branch_offset(jmp_rule[i], br_size, offset), "Displacement too large for short jmp"); aoqi@0: } aoqi@0: } aoqi@0: #endif aoqi@0: aoqi@0: // Step 3, compute the offsets of all blocks, will be done in fill_buffer() aoqi@0: // after ScheduleAndBundle(). aoqi@0: aoqi@0: // ------------------ aoqi@0: // Compute size for code buffer aoqi@0: code_size = blk_starts[nblocks]; aoqi@0: aoqi@0: // Relocation records aoqi@0: reloc_size += 1; // Relo entry for exception handler aoqi@0: aoqi@0: // Adjust reloc_size to number of record of relocation info aoqi@0: // Min is 2 bytes, max is probably 6 or 8, with a tax up to 25% for aoqi@0: // a relocation index. aoqi@0: // The CodeBuffer will expand the locs array if this estimate is too low. aoqi@0: reloc_size *= 10 / sizeof(relocInfo); aoqi@0: } aoqi@0: aoqi@0: //------------------------------FillLocArray----------------------------------- aoqi@0: // Create a bit of debug info and append it to the array. The mapping is from aoqi@0: // Java local or expression stack to constant, register or stack-slot. For aoqi@0: // doubles, insert 2 mappings and return 1 (to tell the caller that the next aoqi@0: // entry has been taken care of and caller should skip it). aoqi@0: static LocationValue *new_loc_value( PhaseRegAlloc *ra, OptoReg::Name regnum, Location::Type l_type ) { aoqi@0: // This should never have accepted Bad before aoqi@0: assert(OptoReg::is_valid(regnum), "location must be valid"); aoqi@0: return (OptoReg::is_reg(regnum)) aoqi@0: ? new LocationValue(Location::new_reg_loc(l_type, OptoReg::as_VMReg(regnum)) ) aoqi@0: : new LocationValue(Location::new_stk_loc(l_type, ra->reg2offset(regnum))); aoqi@0: } aoqi@0: aoqi@0: aoqi@0: ObjectValue* aoqi@0: Compile::sv_for_node_id(GrowableArray *objs, int id) { aoqi@0: for (int i = 0; i < objs->length(); i++) { aoqi@0: assert(objs->at(i)->is_object(), "corrupt object cache"); aoqi@0: ObjectValue* sv = (ObjectValue*) objs->at(i); aoqi@0: if (sv->id() == id) { aoqi@0: return sv; aoqi@0: } aoqi@0: } aoqi@0: // Otherwise.. aoqi@0: return NULL; aoqi@0: } aoqi@0: aoqi@0: void Compile::set_sv_for_object_node(GrowableArray *objs, aoqi@0: ObjectValue* sv ) { aoqi@0: assert(sv_for_node_id(objs, sv->id()) == NULL, "Precondition"); aoqi@0: objs->append(sv); aoqi@0: } aoqi@0: aoqi@0: aoqi@0: void Compile::FillLocArray( int idx, MachSafePointNode* sfpt, Node *local, aoqi@0: GrowableArray *array, aoqi@0: GrowableArray *objs ) { aoqi@0: assert( local, "use _top instead of null" ); aoqi@0: if (array->length() != idx) { aoqi@0: assert(array->length() == idx + 1, "Unexpected array count"); aoqi@0: // Old functionality: aoqi@0: // return aoqi@0: // New functionality: aoqi@0: // Assert if the local is not top. In product mode let the new node aoqi@0: // override the old entry. aoqi@0: assert(local == top(), "LocArray collision"); aoqi@0: if (local == top()) { aoqi@0: return; aoqi@0: } aoqi@0: array->pop(); aoqi@0: } aoqi@0: const Type *t = local->bottom_type(); aoqi@0: aoqi@0: // Is it a safepoint scalar object node? aoqi@0: if (local->is_SafePointScalarObject()) { aoqi@0: SafePointScalarObjectNode* spobj = local->as_SafePointScalarObject(); aoqi@0: aoqi@0: ObjectValue* sv = Compile::sv_for_node_id(objs, spobj->_idx); aoqi@0: if (sv == NULL) { aoqi@0: ciKlass* cik = t->is_oopptr()->klass(); aoqi@0: assert(cik->is_instance_klass() || aoqi@0: cik->is_array_klass(), "Not supported allocation."); aoqi@0: sv = new ObjectValue(spobj->_idx, aoqi@0: new ConstantOopWriteValue(cik->java_mirror()->constant_encoding())); aoqi@0: Compile::set_sv_for_object_node(objs, sv); aoqi@0: aoqi@0: uint first_ind = spobj->first_index(sfpt->jvms()); aoqi@0: for (uint i = 0; i < spobj->n_fields(); i++) { aoqi@0: Node* fld_node = sfpt->in(first_ind+i); aoqi@0: (void)FillLocArray(sv->field_values()->length(), sfpt, fld_node, sv->field_values(), objs); aoqi@0: } aoqi@0: } aoqi@0: array->append(sv); aoqi@0: return; aoqi@0: } aoqi@0: aoqi@0: // Grab the register number for the local aoqi@0: OptoReg::Name regnum = _regalloc->get_reg_first(local); aoqi@0: if( OptoReg::is_valid(regnum) ) {// Got a register/stack? aoqi@0: // Record the double as two float registers. aoqi@0: // The register mask for such a value always specifies two adjacent aoqi@0: // float registers, with the lower register number even. aoqi@0: // Normally, the allocation of high and low words to these registers aoqi@0: // is irrelevant, because nearly all operations on register pairs aoqi@0: // (e.g., StoreD) treat them as a single unit. aoqi@0: // Here, we assume in addition that the words in these two registers aoqi@0: // stored "naturally" (by operations like StoreD and double stores aoqi@0: // within the interpreter) such that the lower-numbered register aoqi@0: // is written to the lower memory address. This may seem like aoqi@0: // a machine dependency, but it is not--it is a requirement on aoqi@0: // the author of the .ad file to ensure that, for every aoqi@0: // even/odd double-register pair to which a double may be allocated, aoqi@0: // the word in the even single-register is stored to the first aoqi@0: // memory word. (Note that register numbers are completely aoqi@0: // arbitrary, and are not tied to any machine-level encodings.) aoqi@0: #ifdef _LP64 aoqi@0: if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon ) { aoqi@0: array->append(new ConstantIntValue(0)); aoqi@0: array->append(new_loc_value( _regalloc, regnum, Location::dbl )); aoqi@0: } else if ( t->base() == Type::Long ) { aoqi@0: array->append(new ConstantIntValue(0)); aoqi@0: array->append(new_loc_value( _regalloc, regnum, Location::lng )); aoqi@0: } else if ( t->base() == Type::RawPtr ) { aoqi@0: // jsr/ret return address which must be restored into a the full aoqi@0: // width 64-bit stack slot. aoqi@0: array->append(new_loc_value( _regalloc, regnum, Location::lng )); aoqi@0: } aoqi@0: #else //_LP64 aoqi@0: #ifdef SPARC aoqi@0: if (t->base() == Type::Long && OptoReg::is_reg(regnum)) { aoqi@0: // For SPARC we have to swap high and low words for aoqi@0: // long values stored in a single-register (g0-g7). aoqi@0: array->append(new_loc_value( _regalloc, regnum , Location::normal )); aoqi@0: array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal )); aoqi@0: } else aoqi@0: #endif //SPARC aoqi@0: if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon || t->base() == Type::Long ) { aoqi@0: // Repack the double/long as two jints. aoqi@0: // The convention the interpreter uses is that the second local aoqi@0: // holds the first raw word of the native double representation. aoqi@0: // This is actually reasonable, since locals and stack arrays aoqi@0: // grow downwards in all implementations. aoqi@0: // (If, on some machine, the interpreter's Java locals or stack aoqi@0: // were to grow upwards, the embedded doubles would be word-swapped.) aoqi@0: array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal )); aoqi@0: array->append(new_loc_value( _regalloc, regnum , Location::normal )); aoqi@0: } aoqi@0: #endif //_LP64 aoqi@0: else if( (t->base() == Type::FloatBot || t->base() == Type::FloatCon) && aoqi@0: OptoReg::is_reg(regnum) ) { aoqi@0: array->append(new_loc_value( _regalloc, regnum, Matcher::float_in_double() aoqi@0: ? Location::float_in_dbl : Location::normal )); aoqi@0: } else if( t->base() == Type::Int && OptoReg::is_reg(regnum) ) { aoqi@0: array->append(new_loc_value( _regalloc, regnum, Matcher::int_in_long aoqi@0: ? Location::int_in_long : Location::normal )); aoqi@0: } else if( t->base() == Type::NarrowOop ) { aoqi@0: array->append(new_loc_value( _regalloc, regnum, Location::narrowoop )); aoqi@0: } else { aoqi@0: array->append(new_loc_value( _regalloc, regnum, _regalloc->is_oop(local) ? Location::oop : Location::normal )); aoqi@0: } aoqi@0: return; aoqi@0: } aoqi@0: aoqi@0: // No register. It must be constant data. aoqi@0: switch (t->base()) { aoqi@0: case Type::Half: // Second half of a double aoqi@0: ShouldNotReachHere(); // Caller should skip 2nd halves aoqi@0: break; aoqi@0: case Type::AnyPtr: aoqi@0: array->append(new ConstantOopWriteValue(NULL)); aoqi@0: break; aoqi@0: case Type::AryPtr: aoqi@0: case Type::InstPtr: // fall through aoqi@0: array->append(new ConstantOopWriteValue(t->isa_oopptr()->const_oop()->constant_encoding())); aoqi@0: break; aoqi@0: case Type::NarrowOop: aoqi@0: if (t == TypeNarrowOop::NULL_PTR) { aoqi@0: array->append(new ConstantOopWriteValue(NULL)); aoqi@0: } else { aoqi@0: array->append(new ConstantOopWriteValue(t->make_ptr()->isa_oopptr()->const_oop()->constant_encoding())); aoqi@0: } aoqi@0: break; aoqi@0: case Type::Int: aoqi@0: array->append(new ConstantIntValue(t->is_int()->get_con())); aoqi@0: break; aoqi@0: case Type::RawPtr: aoqi@0: // A return address (T_ADDRESS). aoqi@0: assert((intptr_t)t->is_ptr()->get_con() < (intptr_t)0x10000, "must be a valid BCI"); aoqi@0: #ifdef _LP64 aoqi@0: // Must be restored to the full-width 64-bit stack slot. aoqi@0: array->append(new ConstantLongValue(t->is_ptr()->get_con())); aoqi@0: #else aoqi@0: array->append(new ConstantIntValue(t->is_ptr()->get_con())); aoqi@0: #endif aoqi@0: break; aoqi@0: case Type::FloatCon: { aoqi@0: float f = t->is_float_constant()->getf(); aoqi@0: array->append(new ConstantIntValue(jint_cast(f))); aoqi@0: break; aoqi@0: } aoqi@0: case Type::DoubleCon: { aoqi@0: jdouble d = t->is_double_constant()->getd(); aoqi@0: #ifdef _LP64 aoqi@0: array->append(new ConstantIntValue(0)); aoqi@0: array->append(new ConstantDoubleValue(d)); aoqi@0: #else aoqi@0: // Repack the double as two jints. aoqi@0: // The convention the interpreter uses is that the second local aoqi@0: // holds the first raw word of the native double representation. aoqi@0: // This is actually reasonable, since locals and stack arrays aoqi@0: // grow downwards in all implementations. aoqi@0: // (If, on some machine, the interpreter's Java locals or stack aoqi@0: // were to grow upwards, the embedded doubles would be word-swapped.) roland@7003: jlong_accessor acc; roland@7003: acc.long_value = jlong_cast(d); thartmann@7001: array->append(new ConstantIntValue(acc.words[1])); thartmann@7001: array->append(new ConstantIntValue(acc.words[0])); aoqi@0: #endif aoqi@0: break; aoqi@0: } aoqi@0: case Type::Long: { aoqi@0: jlong d = t->is_long()->get_con(); aoqi@0: #ifdef _LP64 aoqi@0: array->append(new ConstantIntValue(0)); aoqi@0: array->append(new ConstantLongValue(d)); aoqi@0: #else aoqi@0: // Repack the long as two jints. aoqi@0: // The convention the interpreter uses is that the second local aoqi@0: // holds the first raw word of the native double representation. aoqi@0: // This is actually reasonable, since locals and stack arrays aoqi@0: // grow downwards in all implementations. aoqi@0: // (If, on some machine, the interpreter's Java locals or stack aoqi@0: // were to grow upwards, the embedded doubles would be word-swapped.) roland@7003: jlong_accessor acc; roland@7003: acc.long_value = d; thartmann@7001: array->append(new ConstantIntValue(acc.words[1])); thartmann@7001: array->append(new ConstantIntValue(acc.words[0])); aoqi@0: #endif aoqi@0: break; aoqi@0: } aoqi@0: case Type::Top: // Add an illegal value here aoqi@0: array->append(new LocationValue(Location())); aoqi@0: break; aoqi@0: default: aoqi@0: ShouldNotReachHere(); aoqi@0: break; aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // Determine if this node starts a bundle aoqi@0: bool Compile::starts_bundle(const Node *n) const { aoqi@0: return (_node_bundling_limit > n->_idx && aoqi@0: _node_bundling_base[n->_idx].starts_bundle()); aoqi@0: } aoqi@0: aoqi@0: //--------------------------Process_OopMap_Node-------------------------------- aoqi@0: void Compile::Process_OopMap_Node(MachNode *mach, int current_offset) { aoqi@0: aoqi@0: // Handle special safepoint nodes for synchronization aoqi@0: MachSafePointNode *sfn = mach->as_MachSafePoint(); aoqi@0: MachCallNode *mcall; aoqi@0: aoqi@0: #ifdef ENABLE_ZAP_DEAD_LOCALS aoqi@0: assert( is_node_getting_a_safepoint(mach), "logic does not match; false negative"); aoqi@0: #endif aoqi@0: aoqi@0: int safepoint_pc_offset = current_offset; aoqi@0: bool is_method_handle_invoke = false; aoqi@0: bool return_oop = false; aoqi@0: aoqi@0: // Add the safepoint in the DebugInfoRecorder aoqi@0: if( !mach->is_MachCall() ) { aoqi@0: mcall = NULL; aoqi@1: #ifdef MIPS64 aoqi@1: /* aoqi@1: 2013/10/30 Jin: safepoint_pc_offset should point to tha last instruction in safePoint. aoqi@1: In X86 and sparc, their safePoints only contain one instruction. aoqi@1: However, we should add current_offset with the size of safePoint in MIPS. aoqi@1: 0x2d6ff22c: lw s2, 0x14(s2) aoqi@1: last_pd->pc_offset()=308, pc_offset=304, bci=64 aoqi@1: last_pd->pc_offset()=312, pc_offset=312, bci=64 aoqi@1: /mnt/openjdk6/hotspot/src/share/vm/code/debugInfoRec.cpp, 289 , assert(last_pd->pc_offset() == pc_offset,"must be last pc") aoqi@1: aoqi@1: ;; Safepoint: aoqi@1: ---> pc_offset=304 aoqi@1: 0x2d6ff230: lui at, 0x2b7a ; OopMap{s2=Oop s5=Oop t4=Oop off=308} aoqi@1: ;*goto aoqi@1: ; - java.util.Hashtable::get@64 (line 353) aoqi@1: ---> last_pd(308) aoqi@1: 0x2d6ff234: lw at, 0xffffc100(at) ;*goto aoqi@1: ; - java.util.Hashtable::get@64 (line 353) aoqi@1: ; {poll} aoqi@1: 0x2d6ff238: addiu s0, zero, 0x0 aoqi@1: */ aoqi@1: safepoint_pc_offset += sfn->size(_regalloc) - 4; aoqi@1: #endif aoqi@0: debug_info()->add_safepoint(safepoint_pc_offset, sfn->_oop_map); aoqi@0: } else { aoqi@0: mcall = mach->as_MachCall(); aoqi@0: aoqi@0: // Is the call a MethodHandle call? aoqi@0: if (mcall->is_MachCallJava()) { aoqi@0: if (mcall->as_MachCallJava()->_method_handle_invoke) { aoqi@0: assert(has_method_handle_invokes(), "must have been set during call generation"); aoqi@0: is_method_handle_invoke = true; aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // Check if a call returns an object. drchase@7161: if (mcall->returns_pointer()) { aoqi@0: return_oop = true; aoqi@0: } aoqi@0: safepoint_pc_offset += mcall->ret_addr_offset(); aoqi@0: debug_info()->add_safepoint(safepoint_pc_offset, mcall->_oop_map); aoqi@0: } aoqi@0: aoqi@0: // Loop over the JVMState list to add scope information aoqi@0: // Do not skip safepoints with a NULL method, they need monitor info aoqi@0: JVMState* youngest_jvms = sfn->jvms(); aoqi@0: int max_depth = youngest_jvms->depth(); aoqi@0: aoqi@0: // Allocate the object pool for scalar-replaced objects -- the map from aoqi@0: // small-integer keys (which can be recorded in the local and ostack aoqi@0: // arrays) to descriptions of the object state. aoqi@0: GrowableArray *objs = new GrowableArray(); aoqi@0: aoqi@0: // Visit scopes from oldest to youngest. aoqi@0: for (int depth = 1; depth <= max_depth; depth++) { aoqi@0: JVMState* jvms = youngest_jvms->of_depth(depth); aoqi@0: int idx; aoqi@0: ciMethod* method = jvms->has_method() ? jvms->method() : NULL; aoqi@0: // Safepoints that do not have method() set only provide oop-map and monitor info aoqi@0: // to support GC; these do not support deoptimization. aoqi@0: int num_locs = (method == NULL) ? 0 : jvms->loc_size(); aoqi@0: int num_exps = (method == NULL) ? 0 : jvms->stk_size(); aoqi@0: int num_mon = jvms->nof_monitors(); aoqi@0: assert(method == NULL || jvms->bci() < 0 || num_locs == method->max_locals(), aoqi@0: "JVMS local count must match that of the method"); aoqi@0: aoqi@0: // Add Local and Expression Stack Information aoqi@0: aoqi@0: // Insert locals into the locarray aoqi@0: GrowableArray *locarray = new GrowableArray(num_locs); aoqi@0: for( idx = 0; idx < num_locs; idx++ ) { aoqi@0: FillLocArray( idx, sfn, sfn->local(jvms, idx), locarray, objs ); aoqi@0: } aoqi@0: aoqi@0: // Insert expression stack entries into the exparray aoqi@0: GrowableArray *exparray = new GrowableArray(num_exps); aoqi@0: for( idx = 0; idx < num_exps; idx++ ) { aoqi@0: FillLocArray( idx, sfn, sfn->stack(jvms, idx), exparray, objs ); aoqi@0: } aoqi@0: aoqi@0: // Add in mappings of the monitors aoqi@0: assert( !method || aoqi@0: !method->is_synchronized() || aoqi@0: method->is_native() || aoqi@0: num_mon > 0 || aoqi@0: !GenerateSynchronizationCode, aoqi@0: "monitors must always exist for synchronized methods"); aoqi@0: aoqi@0: // Build the growable array of ScopeValues for exp stack aoqi@0: GrowableArray *monarray = new GrowableArray(num_mon); aoqi@0: aoqi@0: // Loop over monitors and insert into array aoqi@0: for (idx = 0; idx < num_mon; idx++) { aoqi@0: // Grab the node that defines this monitor aoqi@0: Node* box_node = sfn->monitor_box(jvms, idx); aoqi@0: Node* obj_node = sfn->monitor_obj(jvms, idx); aoqi@0: aoqi@0: // Create ScopeValue for object aoqi@0: ScopeValue *scval = NULL; aoqi@0: aoqi@0: if (obj_node->is_SafePointScalarObject()) { aoqi@0: SafePointScalarObjectNode* spobj = obj_node->as_SafePointScalarObject(); aoqi@0: scval = Compile::sv_for_node_id(objs, spobj->_idx); aoqi@0: if (scval == NULL) { aoqi@0: const Type *t = spobj->bottom_type(); aoqi@0: ciKlass* cik = t->is_oopptr()->klass(); aoqi@0: assert(cik->is_instance_klass() || aoqi@0: cik->is_array_klass(), "Not supported allocation."); aoqi@0: ObjectValue* sv = new ObjectValue(spobj->_idx, aoqi@0: new ConstantOopWriteValue(cik->java_mirror()->constant_encoding())); aoqi@0: Compile::set_sv_for_object_node(objs, sv); aoqi@0: aoqi@0: uint first_ind = spobj->first_index(youngest_jvms); aoqi@0: for (uint i = 0; i < spobj->n_fields(); i++) { aoqi@0: Node* fld_node = sfn->in(first_ind+i); aoqi@0: (void)FillLocArray(sv->field_values()->length(), sfn, fld_node, sv->field_values(), objs); aoqi@0: } aoqi@0: scval = sv; aoqi@0: } aoqi@0: } else if (!obj_node->is_Con()) { aoqi@0: OptoReg::Name obj_reg = _regalloc->get_reg_first(obj_node); aoqi@0: if( obj_node->bottom_type()->base() == Type::NarrowOop ) { aoqi@0: scval = new_loc_value( _regalloc, obj_reg, Location::narrowoop ); aoqi@0: } else { aoqi@0: scval = new_loc_value( _regalloc, obj_reg, Location::oop ); aoqi@0: } aoqi@0: } else { aoqi@0: const TypePtr *tp = obj_node->get_ptr_type(); aoqi@0: scval = new ConstantOopWriteValue(tp->is_oopptr()->const_oop()->constant_encoding()); aoqi@0: } aoqi@0: aoqi@0: OptoReg::Name box_reg = BoxLockNode::reg(box_node); aoqi@0: Location basic_lock = Location::new_stk_loc(Location::normal,_regalloc->reg2offset(box_reg)); aoqi@0: bool eliminated = (box_node->is_BoxLock() && box_node->as_BoxLock()->is_eliminated()); aoqi@0: monarray->append(new MonitorValue(scval, basic_lock, eliminated)); aoqi@0: } aoqi@0: aoqi@0: // We dump the object pool first, since deoptimization reads it in first. aoqi@0: debug_info()->dump_object_pool(objs); aoqi@0: aoqi@0: // Build first class objects to pass to scope aoqi@0: DebugToken *locvals = debug_info()->create_scope_values(locarray); aoqi@0: DebugToken *expvals = debug_info()->create_scope_values(exparray); aoqi@0: DebugToken *monvals = debug_info()->create_monitor_values(monarray); aoqi@0: aoqi@0: // Make method available for all Safepoints aoqi@0: ciMethod* scope_method = method ? method : _method; aoqi@0: // Describe the scope here aoqi@0: assert(jvms->bci() >= InvocationEntryBci && jvms->bci() <= 0x10000, "must be a valid or entry BCI"); aoqi@0: assert(!jvms->should_reexecute() || depth == max_depth, "reexecute allowed only for the youngest"); aoqi@0: // Now we can describe the scope. aoqi@0: debug_info()->describe_scope(safepoint_pc_offset, scope_method, jvms->bci(), jvms->should_reexecute(), is_method_handle_invoke, return_oop, locvals, expvals, monvals); aoqi@0: } // End jvms loop aoqi@0: aoqi@0: // Mark the end of the scope set. aoqi@0: debug_info()->end_safepoint(safepoint_pc_offset); aoqi@0: } aoqi@0: aoqi@0: aoqi@0: aoqi@0: // A simplified version of Process_OopMap_Node, to handle non-safepoints. aoqi@0: class NonSafepointEmitter { aoqi@0: Compile* C; aoqi@0: JVMState* _pending_jvms; aoqi@0: int _pending_offset; aoqi@0: aoqi@0: void emit_non_safepoint(); aoqi@0: aoqi@0: public: aoqi@0: NonSafepointEmitter(Compile* compile) { aoqi@0: this->C = compile; aoqi@0: _pending_jvms = NULL; aoqi@0: _pending_offset = 0; aoqi@0: } aoqi@0: aoqi@0: void observe_instruction(Node* n, int pc_offset) { aoqi@0: if (!C->debug_info()->recording_non_safepoints()) return; aoqi@0: aoqi@0: Node_Notes* nn = C->node_notes_at(n->_idx); aoqi@0: if (nn == NULL || nn->jvms() == NULL) return; aoqi@0: if (_pending_jvms != NULL && aoqi@0: _pending_jvms->same_calls_as(nn->jvms())) { aoqi@0: // Repeated JVMS? Stretch it up here. aoqi@0: _pending_offset = pc_offset; aoqi@0: } else { aoqi@0: if (_pending_jvms != NULL && aoqi@0: _pending_offset < pc_offset) { aoqi@0: emit_non_safepoint(); aoqi@0: } aoqi@0: _pending_jvms = NULL; aoqi@0: if (pc_offset > C->debug_info()->last_pc_offset()) { aoqi@0: // This is the only way _pending_jvms can become non-NULL: aoqi@0: _pending_jvms = nn->jvms(); aoqi@0: _pending_offset = pc_offset; aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // Stay out of the way of real safepoints: aoqi@0: void observe_safepoint(JVMState* jvms, int pc_offset) { aoqi@0: if (_pending_jvms != NULL && aoqi@0: !_pending_jvms->same_calls_as(jvms) && aoqi@0: _pending_offset < pc_offset) { aoqi@0: emit_non_safepoint(); aoqi@0: } aoqi@0: _pending_jvms = NULL; aoqi@0: } aoqi@0: aoqi@0: void flush_at_end() { aoqi@0: if (_pending_jvms != NULL) { aoqi@0: emit_non_safepoint(); aoqi@0: } aoqi@0: _pending_jvms = NULL; aoqi@0: } aoqi@0: }; aoqi@0: aoqi@0: void NonSafepointEmitter::emit_non_safepoint() { aoqi@0: JVMState* youngest_jvms = _pending_jvms; aoqi@0: int pc_offset = _pending_offset; aoqi@0: aoqi@0: // Clear it now: aoqi@0: _pending_jvms = NULL; aoqi@0: aoqi@0: DebugInformationRecorder* debug_info = C->debug_info(); aoqi@0: assert(debug_info->recording_non_safepoints(), "sanity"); aoqi@0: aoqi@0: debug_info->add_non_safepoint(pc_offset); aoqi@0: int max_depth = youngest_jvms->depth(); aoqi@0: aoqi@0: // Visit scopes from oldest to youngest. aoqi@0: for (int depth = 1; depth <= max_depth; depth++) { aoqi@0: JVMState* jvms = youngest_jvms->of_depth(depth); aoqi@0: ciMethod* method = jvms->has_method() ? jvms->method() : NULL; aoqi@0: assert(!jvms->should_reexecute() || depth==max_depth, "reexecute allowed only for the youngest"); aoqi@0: debug_info->describe_scope(pc_offset, method, jvms->bci(), jvms->should_reexecute()); aoqi@0: } aoqi@0: aoqi@0: // Mark the end of the scope set. aoqi@0: debug_info->end_non_safepoint(pc_offset); aoqi@0: } aoqi@0: aoqi@0: //------------------------------init_buffer------------------------------------ aoqi@0: CodeBuffer* Compile::init_buffer(uint* blk_starts) { aoqi@0: aoqi@0: // Set the initially allocated size aoqi@0: int code_req = initial_code_capacity; aoqi@0: int locs_req = initial_locs_capacity; aoqi@0: int stub_req = TraceJumps ? initial_stub_capacity * 10 : initial_stub_capacity; aoqi@0: int const_req = initial_const_capacity; aoqi@0: aoqi@0: int pad_req = NativeCall::instruction_size; aoqi@0: // The extra spacing after the code is necessary on some platforms. aoqi@0: // Sometimes we need to patch in a jump after the last instruction, aoqi@0: // if the nmethod has been deoptimized. (See 4932387, 4894843.) aoqi@0: aoqi@0: // Compute the byte offset where we can store the deopt pc. aoqi@0: if (fixed_slots() != 0) { aoqi@0: _orig_pc_slot_offset_in_bytes = _regalloc->reg2offset(OptoReg::stack2reg(_orig_pc_slot)); aoqi@0: } aoqi@0: aoqi@0: // Compute prolog code size aoqi@0: _method_size = 0; aoqi@0: _frame_slots = OptoReg::reg2stack(_matcher->_old_SP)+_regalloc->_framesize; aoqi@0: #if defined(IA64) && !defined(AIX) aoqi@0: if (save_argument_registers()) { aoqi@0: // 4815101: this is a stub with implicit and unknown precision fp args. aoqi@0: // The usual spill mechanism can only generate stfd's in this case, which aoqi@0: // doesn't work if the fp reg to spill contains a single-precision denorm. aoqi@0: // Instead, we hack around the normal spill mechanism using stfspill's and aoqi@0: // ldffill's in the MachProlog and MachEpilog emit methods. We allocate aoqi@0: // space here for the fp arg regs (f8-f15) we're going to thusly spill. aoqi@0: // aoqi@0: // If we ever implement 16-byte 'registers' == stack slots, we can aoqi@0: // get rid of this hack and have SpillCopy generate stfspill/ldffill aoqi@0: // instead of stfd/stfs/ldfd/ldfs. aoqi@0: _frame_slots += 8*(16/BytesPerInt); aoqi@0: } aoqi@0: #endif aoqi@0: assert(_frame_slots >= 0 && _frame_slots < 1000000, "sanity check"); aoqi@0: aoqi@0: if (has_mach_constant_base_node()) { aoqi@0: uint add_size = 0; aoqi@0: // Fill the constant table. aoqi@0: // Note: This must happen before shorten_branches. aoqi@0: for (uint i = 0; i < _cfg->number_of_blocks(); i++) { aoqi@0: Block* b = _cfg->get_block(i); aoqi@0: aoqi@0: for (uint j = 0; j < b->number_of_nodes(); j++) { aoqi@0: Node* n = b->get_node(j); aoqi@0: aoqi@0: // If the node is a MachConstantNode evaluate the constant aoqi@0: // value section. aoqi@0: if (n->is_MachConstant()) { aoqi@0: MachConstantNode* machcon = n->as_MachConstant(); aoqi@0: machcon->eval_constant(C); aoqi@0: } else if (n->is_Mach()) { aoqi@0: // On Power there are more nodes that issue constants. aoqi@0: add_size += (n->as_Mach()->ins_num_consts() * 8); aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // Calculate the offsets of the constants and the size of the aoqi@0: // constant table (including the padding to the next section). aoqi@0: constant_table().calculate_offsets_and_size(); aoqi@0: const_req = constant_table().size() + add_size; aoqi@0: } aoqi@0: aoqi@0: // Initialize the space for the BufferBlob used to find and verify aoqi@0: // instruction size in MachNode::emit_size() aoqi@0: init_scratch_buffer_blob(const_req); aoqi@0: if (failing()) return NULL; // Out of memory aoqi@0: aoqi@0: // Pre-compute the length of blocks and replace aoqi@0: // long branches with short if machine supports it. aoqi@0: shorten_branches(blk_starts, code_req, locs_req, stub_req); aoqi@0: aoqi@0: // nmethod and CodeBuffer count stubs & constants as part of method's code. aoqi@0: // class HandlerImpl is platform-specific and defined in the *.ad files. aoqi@0: int exception_handler_req = HandlerImpl::size_exception_handler() + MAX_stubs_size; // add marginal slop for handler aoqi@0: int deopt_handler_req = HandlerImpl::size_deopt_handler() + MAX_stubs_size; // add marginal slop for handler aoqi@0: stub_req += MAX_stubs_size; // ensure per-stub margin aoqi@0: code_req += MAX_inst_size; // ensure per-instruction margin aoqi@0: aoqi@0: if (StressCodeBuffers) aoqi@0: code_req = const_req = stub_req = exception_handler_req = deopt_handler_req = 0x10; // force expansion aoqi@0: aoqi@0: int total_req = aoqi@0: const_req + aoqi@0: code_req + aoqi@0: pad_req + aoqi@0: stub_req + aoqi@0: exception_handler_req + aoqi@0: deopt_handler_req; // deopt handler aoqi@0: aoqi@0: if (has_method_handle_invokes()) aoqi@0: total_req += deopt_handler_req; // deopt MH handler aoqi@0: aoqi@0: CodeBuffer* cb = code_buffer(); aoqi@0: cb->initialize(total_req, locs_req); aoqi@0: aoqi@0: // Have we run out of code space? aoqi@0: if ((cb->blob() == NULL) || (!CompileBroker::should_compile_new_jobs())) { aoqi@0: C->record_failure("CodeCache is full"); aoqi@0: return NULL; aoqi@0: } aoqi@0: // Configure the code buffer. aoqi@0: cb->initialize_consts_size(const_req); aoqi@0: cb->initialize_stubs_size(stub_req); aoqi@0: cb->initialize_oop_recorder(env()->oop_recorder()); aoqi@0: aoqi@0: // fill in the nop array for bundling computations aoqi@0: MachNode *_nop_list[Bundle::_nop_count]; aoqi@0: Bundle::initialize_nops(_nop_list, this); aoqi@0: aoqi@0: return cb; aoqi@0: } aoqi@0: aoqi@0: //------------------------------fill_buffer------------------------------------ aoqi@0: void Compile::fill_buffer(CodeBuffer* cb, uint* blk_starts) { aoqi@0: // blk_starts[] contains offsets calculated during short branches processing, aoqi@0: // offsets should not be increased during following steps. aoqi@0: aoqi@0: // Compute the size of first NumberOfLoopInstrToAlign instructions at head aoqi@0: // of a loop. It is used to determine the padding for loop alignment. aoqi@0: compute_loop_first_inst_sizes(); aoqi@0: aoqi@0: // Create oopmap set. aoqi@0: _oop_map_set = new OopMapSet(); aoqi@0: aoqi@0: // !!!!! This preserves old handling of oopmaps for now aoqi@0: debug_info()->set_oopmaps(_oop_map_set); aoqi@0: aoqi@0: uint nblocks = _cfg->number_of_blocks(); aoqi@0: // Count and start of implicit null check instructions aoqi@0: uint inct_cnt = 0; aoqi@0: uint *inct_starts = NEW_RESOURCE_ARRAY(uint, nblocks+1); aoqi@0: aoqi@0: // Count and start of calls aoqi@0: uint *call_returns = NEW_RESOURCE_ARRAY(uint, nblocks+1); aoqi@0: aoqi@0: uint return_offset = 0; aoqi@0: int nop_size = (new (this) MachNopNode())->size(_regalloc); aoqi@0: aoqi@0: int previous_offset = 0; aoqi@0: int current_offset = 0; aoqi@0: int last_call_offset = -1; aoqi@0: int last_avoid_back_to_back_offset = -1; aoqi@0: #ifdef ASSERT aoqi@0: uint* jmp_target = NEW_RESOURCE_ARRAY(uint,nblocks); aoqi@0: uint* jmp_offset = NEW_RESOURCE_ARRAY(uint,nblocks); aoqi@0: uint* jmp_size = NEW_RESOURCE_ARRAY(uint,nblocks); aoqi@0: uint* jmp_rule = NEW_RESOURCE_ARRAY(uint,nblocks); aoqi@0: #endif aoqi@0: aoqi@0: // Create an array of unused labels, one for each basic block, if printing is enabled aoqi@0: #ifndef PRODUCT aoqi@0: int *node_offsets = NULL; aoqi@0: uint node_offset_limit = unique(); aoqi@0: aoqi@0: if (print_assembly()) aoqi@0: node_offsets = NEW_RESOURCE_ARRAY(int, node_offset_limit); aoqi@0: #endif aoqi@0: aoqi@0: NonSafepointEmitter non_safepoints(this); // emit non-safepoints lazily aoqi@0: aoqi@0: // Emit the constant table. aoqi@0: if (has_mach_constant_base_node()) { aoqi@0: constant_table().emit(*cb); aoqi@0: } aoqi@0: aoqi@0: // Create an array of labels, one for each basic block aoqi@0: Label *blk_labels = NEW_RESOURCE_ARRAY(Label, nblocks+1); aoqi@0: for (uint i=0; i <= nblocks; i++) { aoqi@0: blk_labels[i].init(); aoqi@0: } aoqi@0: aoqi@0: // ------------------ aoqi@0: // Now fill in the code buffer aoqi@0: Node *delay_slot = NULL; aoqi@0: aoqi@0: for (uint i = 0; i < nblocks; i++) { aoqi@0: Block* block = _cfg->get_block(i); aoqi@0: Node* head = block->head(); aoqi@0: aoqi@0: // If this block needs to start aligned (i.e, can be reached other aoqi@0: // than by falling-thru from the previous block), then force the aoqi@0: // start of a new bundle. aoqi@0: if (Pipeline::requires_bundling() && starts_bundle(head)) { aoqi@0: cb->flush_bundle(true); aoqi@0: } aoqi@0: aoqi@0: #ifdef ASSERT aoqi@0: if (!block->is_connector()) { aoqi@0: stringStream st; aoqi@0: block->dump_head(_cfg, &st); aoqi@0: MacroAssembler(cb).block_comment(st.as_string()); aoqi@0: } aoqi@0: jmp_target[i] = 0; aoqi@0: jmp_offset[i] = 0; aoqi@0: jmp_size[i] = 0; aoqi@0: jmp_rule[i] = 0; aoqi@0: #endif aoqi@0: int blk_offset = current_offset; aoqi@0: aoqi@0: // Define the label at the beginning of the basic block aoqi@0: MacroAssembler(cb).bind(blk_labels[block->_pre_order]); aoqi@0: aoqi@0: uint last_inst = block->number_of_nodes(); aoqi@0: aoqi@0: // Emit block normally, except for last instruction. aoqi@0: // Emit means "dump code bits into code buffer". aoqi@0: for (uint j = 0; jget_node(j); aoqi@0: aoqi@0: // See if delay slots are supported aoqi@0: if (valid_bundle_info(n) && aoqi@0: node_bundling(n)->used_in_unconditional_delay()) { aoqi@0: assert(delay_slot == NULL, "no use of delay slot node"); aoqi@0: assert(n->size(_regalloc) == Pipeline::instr_unit_size(), "delay slot instruction wrong size"); aoqi@0: aoqi@0: delay_slot = n; aoqi@0: continue; aoqi@0: } aoqi@0: aoqi@0: // If this starts a new instruction group, then flush the current one aoqi@0: // (but allow split bundles) aoqi@0: if (Pipeline::requires_bundling() && starts_bundle(n)) aoqi@0: cb->flush_bundle(false); aoqi@0: aoqi@0: // The following logic is duplicated in the code ifdeffed for aoqi@0: // ENABLE_ZAP_DEAD_LOCALS which appears above in this file. It aoqi@0: // should be factored out. Or maybe dispersed to the nodes? aoqi@0: aoqi@0: // Special handling for SafePoint/Call Nodes aoqi@0: bool is_mcall = false; aoqi@0: if (n->is_Mach()) { aoqi@0: MachNode *mach = n->as_Mach(); aoqi@0: is_mcall = n->is_MachCall(); aoqi@0: bool is_sfn = n->is_MachSafePoint(); aoqi@0: aoqi@0: // If this requires all previous instructions be flushed, then do so aoqi@0: if (is_sfn || is_mcall || mach->alignment_required() != 1) { aoqi@0: cb->flush_bundle(true); aoqi@0: current_offset = cb->insts_size(); aoqi@0: } aoqi@0: aoqi@0: // A padding may be needed again since a previous instruction aoqi@0: // could be moved to delay slot. aoqi@0: aoqi@0: // align the instruction if necessary aoqi@0: int padding = mach->compute_padding(current_offset); aoqi@0: // Make sure safepoint node for polling is distinct from a call's aoqi@0: // return by adding a nop if needed. aoqi@0: if (is_sfn && !is_mcall && padding == 0 && current_offset == last_call_offset) { aoqi@0: padding = nop_size; aoqi@0: } aoqi@0: if (padding == 0 && mach->avoid_back_to_back(MachNode::AVOID_BEFORE) && aoqi@0: current_offset == last_avoid_back_to_back_offset) { aoqi@0: // Avoid back to back some instructions. aoqi@0: padding = nop_size; aoqi@0: } aoqi@0: aoqi@0: if(padding > 0) { aoqi@0: assert((padding % nop_size) == 0, "padding is not a multiple of NOP size"); aoqi@0: int nops_cnt = padding / nop_size; aoqi@0: MachNode *nop = new (this) MachNopNode(nops_cnt); aoqi@0: block->insert_node(nop, j++); aoqi@0: last_inst++; aoqi@0: _cfg->map_node_to_block(nop, block); aoqi@0: nop->emit(*cb, _regalloc); aoqi@0: cb->flush_bundle(true); aoqi@0: current_offset = cb->insts_size(); aoqi@0: } aoqi@0: aoqi@0: // Remember the start of the last call in a basic block aoqi@0: if (is_mcall) { aoqi@0: MachCallNode *mcall = mach->as_MachCall(); aoqi@0: aoqi@0: // This destination address is NOT PC-relative aoqi@0: mcall->method_set((intptr_t)mcall->entry_point()); aoqi@0: aoqi@0: // Save the return address aoqi@0: call_returns[block->_pre_order] = current_offset + mcall->ret_addr_offset(); aoqi@0: aoqi@0: if (mcall->is_MachCallLeaf()) { aoqi@0: is_mcall = false; aoqi@0: is_sfn = false; aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // sfn will be valid whenever mcall is valid now because of inheritance aoqi@0: if (is_sfn || is_mcall) { aoqi@0: aoqi@0: // Handle special safepoint nodes for synchronization aoqi@0: if (!is_mcall) { aoqi@0: MachSafePointNode *sfn = mach->as_MachSafePoint(); aoqi@0: // !!!!! Stubs only need an oopmap right now, so bail out aoqi@0: if (sfn->jvms()->method() == NULL) { aoqi@0: // Write the oopmap directly to the code blob??!! aoqi@0: # ifdef ENABLE_ZAP_DEAD_LOCALS aoqi@0: assert( !is_node_getting_a_safepoint(sfn), "logic does not match; false positive"); aoqi@0: # endif aoqi@0: continue; aoqi@0: } aoqi@0: } // End synchronization aoqi@0: aoqi@0: non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(), aoqi@0: current_offset); aoqi@0: Process_OopMap_Node(mach, current_offset); aoqi@0: } // End if safepoint aoqi@0: aoqi@0: // If this is a null check, then add the start of the previous instruction to the list aoqi@0: else if( mach->is_MachNullCheck() ) { aoqi@0: inct_starts[inct_cnt++] = previous_offset; aoqi@0: } aoqi@0: aoqi@0: // If this is a branch, then fill in the label with the target BB's label aoqi@0: else if (mach->is_MachBranch()) { aoqi@0: // This requires the TRUE branch target be in succs[0] aoqi@0: uint block_num = block->non_connector_successor(0)->_pre_order; aoqi@0: aoqi@0: // Try to replace long branch if delay slot is not used, aoqi@0: // it is mostly for back branches since forward branch's aoqi@0: // distance is not updated yet. aoqi@0: bool delay_slot_is_used = valid_bundle_info(n) && aoqi@0: node_bundling(n)->use_unconditional_delay(); aoqi@0: if (!delay_slot_is_used && mach->may_be_short_branch()) { aoqi@0: assert(delay_slot == NULL, "not expecting delay slot node"); aoqi@0: int br_size = n->size(_regalloc); aoqi@0: int offset = blk_starts[block_num] - current_offset; aoqi@0: if (block_num >= i) { aoqi@0: // Current and following block's offset are not aoqi@0: // finalized yet, adjust distance by the difference aoqi@0: // between calculated and final offsets of current block. aoqi@0: offset -= (blk_starts[i] - blk_offset); aoqi@0: } aoqi@0: // In the following code a nop could be inserted before aoqi@0: // the branch which will increase the backward distance. aoqi@0: bool needs_padding = (current_offset == last_avoid_back_to_back_offset); aoqi@0: if (needs_padding && offset <= 0) aoqi@0: offset -= nop_size; aoqi@0: aoqi@0: if (_matcher->is_short_branch_offset(mach->rule(), br_size, offset)) { aoqi@0: // We've got a winner. Replace this branch. aoqi@0: MachNode* replacement = mach->as_MachBranch()->short_branch_version(this); aoqi@0: aoqi@0: // Update the jmp_size. aoqi@0: int new_size = replacement->size(_regalloc); aoqi@0: assert((br_size - new_size) >= (int)nop_size, "short_branch size should be smaller"); aoqi@0: // Insert padding between avoid_back_to_back branches. aoqi@0: if (needs_padding && replacement->avoid_back_to_back(MachNode::AVOID_BEFORE)) { aoqi@0: MachNode *nop = new (this) MachNopNode(); aoqi@0: block->insert_node(nop, j++); aoqi@0: _cfg->map_node_to_block(nop, block); aoqi@0: last_inst++; aoqi@0: nop->emit(*cb, _regalloc); aoqi@0: cb->flush_bundle(true); aoqi@0: current_offset = cb->insts_size(); aoqi@0: } aoqi@0: #ifdef ASSERT aoqi@0: jmp_target[i] = block_num; aoqi@0: jmp_offset[i] = current_offset - blk_offset; aoqi@0: jmp_size[i] = new_size; aoqi@0: jmp_rule[i] = mach->rule(); aoqi@0: #endif aoqi@0: block->map_node(replacement, j); aoqi@0: mach->subsume_by(replacement, C); aoqi@0: n = replacement; aoqi@0: mach = replacement; aoqi@0: } aoqi@0: } aoqi@0: mach->as_MachBranch()->label_set( &blk_labels[block_num], block_num ); aoqi@0: } else if (mach->ideal_Opcode() == Op_Jump) { aoqi@0: for (uint h = 0; h < block->_num_succs; h++) { aoqi@0: Block* succs_block = block->_succs[h]; aoqi@0: for (uint j = 1; j < succs_block->num_preds(); j++) { aoqi@0: Node* jpn = succs_block->pred(j); aoqi@0: if (jpn->is_JumpProj() && jpn->in(0) == mach) { aoqi@0: uint block_num = succs_block->non_connector()->_pre_order; aoqi@0: Label *blkLabel = &blk_labels[block_num]; aoqi@0: mach->add_case_label(jpn->as_JumpProj()->proj_no(), blkLabel); aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: #ifdef ASSERT aoqi@0: // Check that oop-store precedes the card-mark aoqi@0: else if (mach->ideal_Opcode() == Op_StoreCM) { aoqi@0: uint storeCM_idx = j; aoqi@0: int count = 0; aoqi@0: for (uint prec = mach->req(); prec < mach->len(); prec++) { aoqi@0: Node *oop_store = mach->in(prec); // Precedence edge aoqi@0: if (oop_store == NULL) continue; aoqi@0: count++; aoqi@0: uint i4; aoqi@0: for (i4 = 0; i4 < last_inst; ++i4) { aoqi@0: if (block->get_node(i4) == oop_store) { aoqi@0: break; aoqi@0: } aoqi@0: } aoqi@0: // Note: This test can provide a false failure if other precedence aoqi@0: // edges have been added to the storeCMNode. aoqi@0: assert(i4 == last_inst || i4 < storeCM_idx, "CM card-mark executes before oop-store"); aoqi@0: } aoqi@0: assert(count > 0, "storeCM expects at least one precedence edge"); aoqi@0: } aoqi@0: #endif aoqi@0: else if (!n->is_Proj()) { aoqi@0: // Remember the beginning of the previous instruction, in case aoqi@0: // it's followed by a flag-kill and a null-check. Happens on aoqi@0: // Intel all the time, with add-to-memory kind of opcodes. aoqi@0: previous_offset = current_offset; aoqi@0: } aoqi@0: aoqi@0: // Not an else-if! aoqi@0: // If this is a trap based cmp then add its offset to the list. aoqi@0: if (mach->is_TrapBasedCheckNode()) { aoqi@0: inct_starts[inct_cnt++] = current_offset; aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // Verify that there is sufficient space remaining aoqi@0: cb->insts()->maybe_expand_to_ensure_remaining(MAX_inst_size); aoqi@0: if ((cb->blob() == NULL) || (!CompileBroker::should_compile_new_jobs())) { aoqi@0: C->record_failure("CodeCache is full"); aoqi@0: return; aoqi@0: } aoqi@0: aoqi@0: // Save the offset for the listing aoqi@0: #ifndef PRODUCT aoqi@0: if (node_offsets && n->_idx < node_offset_limit) aoqi@0: node_offsets[n->_idx] = cb->insts_size(); aoqi@0: #endif aoqi@0: aoqi@0: // "Normal" instruction case aoqi@0: DEBUG_ONLY( uint instr_offset = cb->insts_size(); ) aoqi@0: n->emit(*cb, _regalloc); aoqi@0: current_offset = cb->insts_size(); aoqi@8023: #ifdef MIPS64 aoqi@8023: if (!n->is_Proj()) { aoqi@8023: // For MIPS, the first instruction of the previous node (usually a instruction sequence) sometime aoqi@8023: // is not the instruction which access memory. adjust is needed. previous_offset points to the aoqi@8023: // instruction which access memory. Instruction size is 4. cb->insts_size() and aoqi@8023: // cb->insts()->end() are the location of current instruction. aoqi@8023: int adjust = 4; aoqi@8023: NativeInstruction* inst = (NativeInstruction*) (cb->insts()->end() - 4); aoqi@8023: if (inst->is_sync()) { aoqi@8023: // a sync may be the last instruction, see store_B_immI_enc_sync aoqi@8023: adjust += 4; aoqi@8023: inst = (NativeInstruction*) (cb->insts()->end() - 8); aoqi@8023: } aoqi@8023: previous_offset = current_offset - adjust; aoqi@8023: } aoqi@8023: #endif aoqi@0: vkempik@8427: // Above we only verified that there is enough space in the instruction section. vkempik@8427: // However, the instruction may emit stubs that cause code buffer expansion. vkempik@8427: // Bail out here if expansion failed due to a lack of code cache space. vkempik@8427: if (failing()) { vkempik@8427: return; vkempik@8427: } vkempik@8427: aoqi@0: #ifdef ASSERT aoqi@0: if (n->size(_regalloc) < (current_offset-instr_offset)) { aoqi@0: n->dump(); aoqi@0: assert(false, "wrong size of mach node"); aoqi@0: } aoqi@0: #endif aoqi@0: non_safepoints.observe_instruction(n, current_offset); aoqi@0: aoqi@0: // mcall is last "call" that can be a safepoint aoqi@0: // record it so we can see if a poll will directly follow it aoqi@0: // in which case we'll need a pad to make the PcDesc sites unique aoqi@0: // see 5010568. This can be slightly inaccurate but conservative aoqi@0: // in the case that return address is not actually at current_offset. aoqi@0: // This is a small price to pay. aoqi@0: aoqi@0: if (is_mcall) { aoqi@0: last_call_offset = current_offset; aoqi@0: } aoqi@0: aoqi@0: if (n->is_Mach() && n->as_Mach()->avoid_back_to_back(MachNode::AVOID_AFTER)) { aoqi@0: // Avoid back to back some instructions. aoqi@0: last_avoid_back_to_back_offset = current_offset; aoqi@0: } aoqi@0: aoqi@0: // See if this instruction has a delay slot aoqi@0: if (valid_bundle_info(n) && node_bundling(n)->use_unconditional_delay()) { aoqi@0: assert(delay_slot != NULL, "expecting delay slot node"); aoqi@0: aoqi@0: // Back up 1 instruction aoqi@0: cb->set_insts_end(cb->insts_end() - Pipeline::instr_unit_size()); aoqi@0: aoqi@0: // Save the offset for the listing aoqi@0: #ifndef PRODUCT aoqi@0: if (node_offsets && delay_slot->_idx < node_offset_limit) aoqi@0: node_offsets[delay_slot->_idx] = cb->insts_size(); aoqi@0: #endif aoqi@0: aoqi@0: // Support a SafePoint in the delay slot aoqi@0: if (delay_slot->is_MachSafePoint()) { aoqi@0: MachNode *mach = delay_slot->as_Mach(); aoqi@0: // !!!!! Stubs only need an oopmap right now, so bail out aoqi@0: if (!mach->is_MachCall() && mach->as_MachSafePoint()->jvms()->method() == NULL) { aoqi@0: // Write the oopmap directly to the code blob??!! aoqi@0: # ifdef ENABLE_ZAP_DEAD_LOCALS aoqi@0: assert( !is_node_getting_a_safepoint(mach), "logic does not match; false positive"); aoqi@0: # endif aoqi@0: delay_slot = NULL; aoqi@0: continue; aoqi@0: } aoqi@0: aoqi@0: int adjusted_offset = current_offset - Pipeline::instr_unit_size(); aoqi@0: non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(), aoqi@0: adjusted_offset); aoqi@0: // Generate an OopMap entry aoqi@0: Process_OopMap_Node(mach, adjusted_offset); aoqi@0: } aoqi@0: aoqi@0: // Insert the delay slot instruction aoqi@0: delay_slot->emit(*cb, _regalloc); aoqi@0: aoqi@0: // Don't reuse it aoqi@0: delay_slot = NULL; aoqi@0: } aoqi@0: aoqi@0: } // End for all instructions in block aoqi@0: aoqi@0: // If the next block is the top of a loop, pad this block out to align aoqi@0: // the loop top a little. Helps prevent pipe stalls at loop back branches. aoqi@0: if (i < nblocks-1) { aoqi@0: Block *nb = _cfg->get_block(i + 1); aoqi@0: int padding = nb->alignment_padding(current_offset); aoqi@0: if( padding > 0 ) { aoqi@0: MachNode *nop = new (this) MachNopNode(padding / nop_size); aoqi@0: block->insert_node(nop, block->number_of_nodes()); aoqi@0: _cfg->map_node_to_block(nop, block); aoqi@0: nop->emit(*cb, _regalloc); aoqi@0: current_offset = cb->insts_size(); aoqi@0: } aoqi@0: } aoqi@0: // Verify that the distance for generated before forward aoqi@0: // short branches is still valid. aoqi@0: guarantee((int)(blk_starts[i+1] - blk_starts[i]) >= (current_offset - blk_offset), "shouldn't increase block size"); aoqi@0: aoqi@0: // Save new block start offset aoqi@0: blk_starts[i] = blk_offset; aoqi@0: } // End of for all blocks aoqi@0: blk_starts[nblocks] = current_offset; aoqi@0: aoqi@0: non_safepoints.flush_at_end(); aoqi@0: aoqi@0: // Offset too large? aoqi@0: if (failing()) return; aoqi@0: aoqi@0: // Define a pseudo-label at the end of the code aoqi@0: MacroAssembler(cb).bind( blk_labels[nblocks] ); aoqi@0: aoqi@0: // Compute the size of the first block aoqi@0: _first_block_size = blk_labels[1].loc_pos() - blk_labels[0].loc_pos(); aoqi@0: aoqi@0: assert(cb->insts_size() < 500000, "method is unreasonably large"); aoqi@0: aoqi@0: #ifdef ASSERT aoqi@0: for (uint i = 0; i < nblocks; i++) { // For all blocks aoqi@0: if (jmp_target[i] != 0) { aoqi@0: int br_size = jmp_size[i]; aoqi@0: int offset = blk_starts[jmp_target[i]]-(blk_starts[i] + jmp_offset[i]); aoqi@0: if (!_matcher->is_short_branch_offset(jmp_rule[i], br_size, offset)) { aoqi@0: tty->print_cr("target (%d) - jmp_offset(%d) = offset (%d), jump_size(%d), jmp_block B%d, target_block B%d", blk_starts[jmp_target[i]], blk_starts[i] + jmp_offset[i], offset, br_size, i, jmp_target[i]); aoqi@0: assert(false, "Displacement too large for short jmp"); aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: #endif aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: // Information on the size of the method, without the extraneous code aoqi@0: Scheduling::increment_method_size(cb->insts_size()); aoqi@0: #endif aoqi@0: aoqi@0: // ------------------ aoqi@0: // Fill in exception table entries. aoqi@0: FillExceptionTables(inct_cnt, call_returns, inct_starts, blk_labels); aoqi@0: aoqi@0: // Only java methods have exception handlers and deopt handlers aoqi@0: // class HandlerImpl is platform-specific and defined in the *.ad files. aoqi@0: if (_method) { aoqi@0: // Emit the exception handler code. aoqi@0: _code_offsets.set_value(CodeOffsets::Exceptions, HandlerImpl::emit_exception_handler(*cb)); vkempik@8427: if (failing()) { vkempik@8427: return; // CodeBuffer::expand failed vkempik@8427: } aoqi@0: // Emit the deopt handler code. aoqi@0: _code_offsets.set_value(CodeOffsets::Deopt, HandlerImpl::emit_deopt_handler(*cb)); aoqi@0: aoqi@0: // Emit the MethodHandle deopt handler code (if required). vkempik@8427: if (has_method_handle_invokes() && !failing()) { aoqi@0: // We can use the same code as for the normal deopt handler, we aoqi@0: // just need a different entry point address. aoqi@0: _code_offsets.set_value(CodeOffsets::DeoptMH, HandlerImpl::emit_deopt_handler(*cb)); aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // One last check for failed CodeBuffer::expand: aoqi@0: if ((cb->blob() == NULL) || (!CompileBroker::should_compile_new_jobs())) { aoqi@0: C->record_failure("CodeCache is full"); aoqi@0: return; aoqi@0: } aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: // Dump the assembly code, including basic-block numbers aoqi@0: if (print_assembly()) { aoqi@0: ttyLocker ttyl; // keep the following output all in one block aoqi@0: if (!VMThread::should_terminate()) { // test this under the tty lock aoqi@0: // This output goes directly to the tty, not the compiler log. aoqi@0: // To enable tools to match it up with the compilation activity, aoqi@0: // be sure to tag this tty output with the compile ID. aoqi@0: if (xtty != NULL) { aoqi@0: xtty->head("opto_assembly compile_id='%d'%s", compile_id(), aoqi@0: is_osr_compilation() ? " compile_kind='osr'" : aoqi@0: ""); aoqi@0: } aoqi@0: if (method() != NULL) { aoqi@0: method()->print_metadata(); aoqi@0: } aoqi@0: dump_asm(node_offsets, node_offset_limit); aoqi@0: if (xtty != NULL) { aoqi@0: xtty->tail("opto_assembly"); aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: #endif aoqi@0: aoqi@0: } aoqi@0: aoqi@0: void Compile::FillExceptionTables(uint cnt, uint *call_returns, uint *inct_starts, Label *blk_labels) { aoqi@0: _inc_table.set_size(cnt); aoqi@0: aoqi@0: uint inct_cnt = 0; aoqi@0: for (uint i = 0; i < _cfg->number_of_blocks(); i++) { aoqi@0: Block* block = _cfg->get_block(i); aoqi@0: Node *n = NULL; aoqi@0: int j; aoqi@0: aoqi@0: // Find the branch; ignore trailing NOPs. aoqi@0: for (j = block->number_of_nodes() - 1; j >= 0; j--) { aoqi@0: n = block->get_node(j); aoqi@0: if (!n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con) { aoqi@0: break; aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // If we didn't find anything, continue aoqi@0: if (j < 0) { aoqi@0: continue; aoqi@0: } aoqi@0: aoqi@0: // Compute ExceptionHandlerTable subtable entry and add it aoqi@0: // (skip empty blocks) aoqi@0: if (n->is_Catch()) { aoqi@0: aoqi@0: // Get the offset of the return from the call aoqi@0: uint call_return = call_returns[block->_pre_order]; aoqi@0: #ifdef ASSERT aoqi@0: assert( call_return > 0, "no call seen for this basic block" ); aoqi@0: while (block->get_node(--j)->is_MachProj()) ; aoqi@0: assert(block->get_node(j)->is_MachCall(), "CatchProj must follow call"); aoqi@0: #endif aoqi@0: // last instruction is a CatchNode, find it's CatchProjNodes aoqi@0: int nof_succs = block->_num_succs; aoqi@0: // allocate space aoqi@0: GrowableArray handler_bcis(nof_succs); aoqi@0: GrowableArray handler_pcos(nof_succs); aoqi@0: // iterate through all successors aoqi@0: for (int j = 0; j < nof_succs; j++) { aoqi@0: Block* s = block->_succs[j]; aoqi@0: bool found_p = false; aoqi@0: for (uint k = 1; k < s->num_preds(); k++) { aoqi@0: Node* pk = s->pred(k); aoqi@0: if (pk->is_CatchProj() && pk->in(0) == n) { aoqi@0: const CatchProjNode* p = pk->as_CatchProj(); aoqi@0: found_p = true; aoqi@0: // add the corresponding handler bci & pco information aoqi@0: if (p->_con != CatchProjNode::fall_through_index) { aoqi@0: // p leads to an exception handler (and is not fall through) aoqi@0: assert(s == _cfg->get_block(s->_pre_order), "bad numbering"); aoqi@0: // no duplicates, please aoqi@0: if (!handler_bcis.contains(p->handler_bci())) { aoqi@0: uint block_num = s->non_connector()->_pre_order; aoqi@0: handler_bcis.append(p->handler_bci()); aoqi@0: handler_pcos.append(blk_labels[block_num].loc_pos()); aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: assert(found_p, "no matching predecessor found"); aoqi@0: // Note: Due to empty block removal, one block may have aoqi@0: // several CatchProj inputs, from the same Catch. aoqi@0: } aoqi@0: aoqi@0: // Set the offset of the return from the call aoqi@0: _handler_table.add_subtable(call_return, &handler_bcis, NULL, &handler_pcos); aoqi@0: continue; aoqi@0: } aoqi@0: aoqi@0: // Handle implicit null exception table updates aoqi@0: if (n->is_MachNullCheck()) { aoqi@0: uint block_num = block->non_connector_successor(0)->_pre_order; aoqi@0: _inc_table.append(inct_starts[inct_cnt++], blk_labels[block_num].loc_pos()); aoqi@0: continue; aoqi@0: } aoqi@0: // Handle implicit exception table updates: trap instructions. aoqi@0: if (n->is_Mach() && n->as_Mach()->is_TrapBasedCheckNode()) { aoqi@0: uint block_num = block->non_connector_successor(0)->_pre_order; aoqi@0: _inc_table.append(inct_starts[inct_cnt++], blk_labels[block_num].loc_pos()); aoqi@0: continue; aoqi@0: } aoqi@0: } // End of for all blocks fill in exception table entries aoqi@0: } aoqi@0: aoqi@0: // Static Variables aoqi@0: #ifndef PRODUCT aoqi@0: uint Scheduling::_total_nop_size = 0; aoqi@0: uint Scheduling::_total_method_size = 0; aoqi@0: uint Scheduling::_total_branches = 0; aoqi@0: uint Scheduling::_total_unconditional_delays = 0; aoqi@0: uint Scheduling::_total_instructions_per_bundle[Pipeline::_max_instrs_per_cycle+1]; aoqi@0: #endif aoqi@0: aoqi@0: // Initializer for class Scheduling aoqi@0: aoqi@0: Scheduling::Scheduling(Arena *arena, Compile &compile) aoqi@0: : _arena(arena), aoqi@0: _cfg(compile.cfg()), aoqi@0: _regalloc(compile.regalloc()), aoqi@0: _reg_node(arena), aoqi@0: _bundle_instr_count(0), aoqi@0: _bundle_cycle_number(0), aoqi@0: _scheduled(arena), aoqi@0: _available(arena), aoqi@0: _next_node(NULL), aoqi@0: _bundle_use(0, 0, resource_count, &_bundle_use_elements[0]), aoqi@0: _pinch_free_list(arena) aoqi@0: #ifndef PRODUCT aoqi@0: , _branches(0) aoqi@0: , _unconditional_delays(0) aoqi@0: #endif aoqi@0: { aoqi@0: // Create a MachNopNode aoqi@0: _nop = new (&compile) MachNopNode(); aoqi@0: aoqi@0: // Now that the nops are in the array, save the count aoqi@0: // (but allow entries for the nops) aoqi@0: _node_bundling_limit = compile.unique(); aoqi@0: uint node_max = _regalloc->node_regs_max_index(); aoqi@0: aoqi@0: compile.set_node_bundling_limit(_node_bundling_limit); aoqi@0: aoqi@0: // This one is persistent within the Compile class aoqi@0: _node_bundling_base = NEW_ARENA_ARRAY(compile.comp_arena(), Bundle, node_max); aoqi@0: aoqi@0: // Allocate space for fixed-size arrays aoqi@0: _node_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max); aoqi@0: _uses = NEW_ARENA_ARRAY(arena, short, node_max); aoqi@0: _current_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max); aoqi@0: aoqi@0: // Clear the arrays aoqi@0: memset(_node_bundling_base, 0, node_max * sizeof(Bundle)); aoqi@0: memset(_node_latency, 0, node_max * sizeof(unsigned short)); aoqi@0: memset(_uses, 0, node_max * sizeof(short)); aoqi@0: memset(_current_latency, 0, node_max * sizeof(unsigned short)); aoqi@0: aoqi@0: // Clear the bundling information aoqi@0: memcpy(_bundle_use_elements, Pipeline_Use::elaborated_elements, sizeof(Pipeline_Use::elaborated_elements)); aoqi@0: aoqi@0: // Get the last node aoqi@0: Block* block = _cfg->get_block(_cfg->number_of_blocks() - 1); aoqi@0: aoqi@0: _next_node = block->get_node(block->number_of_nodes() - 1); aoqi@0: } aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: // Scheduling destructor aoqi@0: Scheduling::~Scheduling() { aoqi@0: _total_branches += _branches; aoqi@0: _total_unconditional_delays += _unconditional_delays; aoqi@0: } aoqi@0: #endif aoqi@0: aoqi@0: // Step ahead "i" cycles aoqi@0: void Scheduling::step(uint i) { aoqi@0: aoqi@0: Bundle *bundle = node_bundling(_next_node); aoqi@0: bundle->set_starts_bundle(); aoqi@0: aoqi@0: // Update the bundle record, but leave the flags information alone aoqi@0: if (_bundle_instr_count > 0) { aoqi@0: bundle->set_instr_count(_bundle_instr_count); aoqi@0: bundle->set_resources_used(_bundle_use.resourcesUsed()); aoqi@0: } aoqi@0: aoqi@0: // Update the state information aoqi@0: _bundle_instr_count = 0; aoqi@0: _bundle_cycle_number += i; aoqi@0: _bundle_use.step(i); aoqi@0: } aoqi@0: aoqi@0: void Scheduling::step_and_clear() { aoqi@0: Bundle *bundle = node_bundling(_next_node); aoqi@0: bundle->set_starts_bundle(); aoqi@0: aoqi@0: // Update the bundle record aoqi@0: if (_bundle_instr_count > 0) { aoqi@0: bundle->set_instr_count(_bundle_instr_count); aoqi@0: bundle->set_resources_used(_bundle_use.resourcesUsed()); aoqi@0: aoqi@0: _bundle_cycle_number += 1; aoqi@0: } aoqi@0: aoqi@0: // Clear the bundling information aoqi@0: _bundle_instr_count = 0; aoqi@0: _bundle_use.reset(); aoqi@0: aoqi@0: memcpy(_bundle_use_elements, aoqi@0: Pipeline_Use::elaborated_elements, aoqi@0: sizeof(Pipeline_Use::elaborated_elements)); aoqi@0: } aoqi@0: aoqi@0: // Perform instruction scheduling and bundling over the sequence of aoqi@0: // instructions in backwards order. aoqi@0: void Compile::ScheduleAndBundle() { aoqi@0: aoqi@0: // Don't optimize this if it isn't a method aoqi@0: if (!_method) aoqi@0: return; aoqi@0: aoqi@0: // Don't optimize this if scheduling is disabled aoqi@0: if (!do_scheduling()) aoqi@0: return; aoqi@0: aoqi@0: // Scheduling code works only with pairs (8 bytes) maximum. aoqi@0: if (max_vector_size() > 8) aoqi@0: return; aoqi@0: aoqi@0: NOT_PRODUCT( TracePhase t2("isched", &_t_instrSched, TimeCompiler); ) aoqi@0: aoqi@0: // Create a data structure for all the scheduling information aoqi@0: Scheduling scheduling(Thread::current()->resource_area(), *this); aoqi@0: aoqi@0: // Walk backwards over each basic block, computing the needed alignment aoqi@0: // Walk over all the basic blocks aoqi@0: scheduling.DoScheduling(); aoqi@0: } aoqi@0: aoqi@0: // Compute the latency of all the instructions. This is fairly simple, aoqi@0: // because we already have a legal ordering. Walk over the instructions aoqi@0: // from first to last, and compute the latency of the instruction based aoqi@0: // on the latency of the preceding instruction(s). aoqi@0: void Scheduling::ComputeLocalLatenciesForward(const Block *bb) { aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) aoqi@0: tty->print("# -> ComputeLocalLatenciesForward\n"); aoqi@0: #endif aoqi@0: aoqi@0: // Walk over all the schedulable instructions aoqi@0: for( uint j=_bb_start; j < _bb_end; j++ ) { aoqi@0: aoqi@0: // This is a kludge, forcing all latency calculations to start at 1. aoqi@0: // Used to allow latency 0 to force an instruction to the beginning aoqi@0: // of the bb aoqi@0: uint latency = 1; aoqi@0: Node *use = bb->get_node(j); aoqi@0: uint nlen = use->len(); aoqi@0: aoqi@0: // Walk over all the inputs aoqi@0: for ( uint k=0; k < nlen; k++ ) { aoqi@0: Node *def = use->in(k); aoqi@0: if (!def) aoqi@0: continue; aoqi@0: aoqi@0: uint l = _node_latency[def->_idx] + use->latency(k); aoqi@0: if (latency < l) aoqi@0: latency = l; aoqi@0: } aoqi@0: aoqi@0: _node_latency[use->_idx] = latency; aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) { aoqi@0: tty->print("# latency %4d: ", latency); aoqi@0: use->dump(); aoqi@0: } aoqi@0: #endif aoqi@0: } aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) aoqi@0: tty->print("# <- ComputeLocalLatenciesForward\n"); aoqi@0: #endif aoqi@0: aoqi@0: } // end ComputeLocalLatenciesForward aoqi@0: aoqi@0: // See if this node fits into the present instruction bundle aoqi@0: bool Scheduling::NodeFitsInBundle(Node *n) { aoqi@0: uint n_idx = n->_idx; aoqi@0: aoqi@0: // If this is the unconditional delay instruction, then it fits aoqi@0: if (n == _unconditional_delay_slot) { aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) aoqi@0: tty->print("# NodeFitsInBundle [%4d]: TRUE; is in unconditional delay slot\n", n->_idx); aoqi@0: #endif aoqi@0: return (true); aoqi@0: } aoqi@0: aoqi@0: // If the node cannot be scheduled this cycle, skip it aoqi@0: if (_current_latency[n_idx] > _bundle_cycle_number) { aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) aoqi@0: tty->print("# NodeFitsInBundle [%4d]: FALSE; latency %4d > %d\n", aoqi@0: n->_idx, _current_latency[n_idx], _bundle_cycle_number); aoqi@0: #endif aoqi@0: return (false); aoqi@0: } aoqi@0: aoqi@0: const Pipeline *node_pipeline = n->pipeline(); aoqi@0: aoqi@0: uint instruction_count = node_pipeline->instructionCount(); aoqi@0: if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0) aoqi@0: instruction_count = 0; aoqi@0: else if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot) aoqi@0: instruction_count++; aoqi@0: aoqi@0: if (_bundle_instr_count + instruction_count > Pipeline::_max_instrs_per_cycle) { aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) aoqi@0: tty->print("# NodeFitsInBundle [%4d]: FALSE; too many instructions: %d > %d\n", aoqi@0: n->_idx, _bundle_instr_count + instruction_count, Pipeline::_max_instrs_per_cycle); aoqi@0: #endif aoqi@0: return (false); aoqi@0: } aoqi@0: aoqi@0: // Don't allow non-machine nodes to be handled this way aoqi@0: if (!n->is_Mach() && instruction_count == 0) aoqi@0: return (false); aoqi@0: aoqi@0: // See if there is any overlap aoqi@0: uint delay = _bundle_use.full_latency(0, node_pipeline->resourceUse()); aoqi@0: aoqi@0: if (delay > 0) { aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) aoqi@0: tty->print("# NodeFitsInBundle [%4d]: FALSE; functional units overlap\n", n_idx); aoqi@0: #endif aoqi@0: return false; aoqi@0: } aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) aoqi@0: tty->print("# NodeFitsInBundle [%4d]: TRUE\n", n_idx); aoqi@0: #endif aoqi@0: aoqi@0: return true; aoqi@0: } aoqi@0: aoqi@0: Node * Scheduling::ChooseNodeToBundle() { aoqi@0: uint siz = _available.size(); aoqi@0: aoqi@0: if (siz == 0) { aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) aoqi@0: tty->print("# ChooseNodeToBundle: NULL\n"); aoqi@0: #endif aoqi@0: return (NULL); aoqi@0: } aoqi@0: aoqi@0: // Fast path, if only 1 instruction in the bundle aoqi@0: if (siz == 1) { aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) { aoqi@0: tty->print("# ChooseNodeToBundle (only 1): "); aoqi@0: _available[0]->dump(); aoqi@0: } aoqi@0: #endif aoqi@0: return (_available[0]); aoqi@0: } aoqi@0: aoqi@0: // Don't bother, if the bundle is already full aoqi@0: if (_bundle_instr_count < Pipeline::_max_instrs_per_cycle) { aoqi@0: for ( uint i = 0; i < siz; i++ ) { aoqi@0: Node *n = _available[i]; aoqi@0: aoqi@0: // Skip projections, we'll handle them another way aoqi@0: if (n->is_Proj()) aoqi@0: continue; aoqi@0: aoqi@0: // This presupposed that instructions are inserted into the aoqi@0: // available list in a legality order; i.e. instructions that aoqi@0: // must be inserted first are at the head of the list aoqi@0: if (NodeFitsInBundle(n)) { aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) { aoqi@0: tty->print("# ChooseNodeToBundle: "); aoqi@0: n->dump(); aoqi@0: } aoqi@0: #endif aoqi@0: return (n); aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // Nothing fits in this bundle, choose the highest priority aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) { aoqi@0: tty->print("# ChooseNodeToBundle: "); aoqi@0: _available[0]->dump(); aoqi@0: } aoqi@0: #endif aoqi@0: aoqi@0: return _available[0]; aoqi@0: } aoqi@0: aoqi@0: void Scheduling::AddNodeToAvailableList(Node *n) { aoqi@0: assert( !n->is_Proj(), "projections never directly made available" ); aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) { aoqi@0: tty->print("# AddNodeToAvailableList: "); aoqi@0: n->dump(); aoqi@0: } aoqi@0: #endif aoqi@0: aoqi@0: int latency = _current_latency[n->_idx]; aoqi@0: aoqi@0: // Insert in latency order (insertion sort) aoqi@0: uint i; aoqi@0: for ( i=0; i < _available.size(); i++ ) aoqi@0: if (_current_latency[_available[i]->_idx] > latency) aoqi@0: break; aoqi@0: aoqi@0: // Special Check for compares following branches aoqi@0: if( n->is_Mach() && _scheduled.size() > 0 ) { aoqi@0: int op = n->as_Mach()->ideal_Opcode(); aoqi@0: Node *last = _scheduled[0]; aoqi@0: if( last->is_MachIf() && last->in(1) == n && aoqi@0: ( op == Op_CmpI || aoqi@0: op == Op_CmpU || thartmann@8797: op == Op_CmpUL || aoqi@0: op == Op_CmpP || aoqi@0: op == Op_CmpF || aoqi@0: op == Op_CmpD || aoqi@0: op == Op_CmpL ) ) { aoqi@0: aoqi@0: // Recalculate position, moving to front of same latency aoqi@0: for ( i=0 ; i < _available.size(); i++ ) aoqi@0: if (_current_latency[_available[i]->_idx] >= latency) aoqi@0: break; aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // Insert the node in the available list aoqi@0: _available.insert(i, n); aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) aoqi@0: dump_available(); aoqi@0: #endif aoqi@0: } aoqi@0: aoqi@0: void Scheduling::DecrementUseCounts(Node *n, const Block *bb) { aoqi@0: for ( uint i=0; i < n->len(); i++ ) { aoqi@0: Node *def = n->in(i); aoqi@0: if (!def) continue; aoqi@0: if( def->is_Proj() ) // If this is a machine projection, then aoqi@0: def = def->in(0); // propagate usage thru to the base instruction aoqi@0: aoqi@0: if(_cfg->get_block_for_node(def) != bb) { // Ignore if not block-local aoqi@0: continue; aoqi@0: } aoqi@0: aoqi@0: // Compute the latency aoqi@0: uint l = _bundle_cycle_number + n->latency(i); aoqi@0: if (_current_latency[def->_idx] < l) aoqi@0: _current_latency[def->_idx] = l; aoqi@0: aoqi@0: // If this does not have uses then schedule it aoqi@0: if ((--_uses[def->_idx]) == 0) aoqi@0: AddNodeToAvailableList(def); aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: void Scheduling::AddNodeToBundle(Node *n, const Block *bb) { aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) { aoqi@0: tty->print("# AddNodeToBundle: "); aoqi@0: n->dump(); aoqi@0: } aoqi@0: #endif aoqi@0: aoqi@0: // Remove this from the available list aoqi@0: uint i; aoqi@0: for (i = 0; i < _available.size(); i++) aoqi@0: if (_available[i] == n) aoqi@0: break; aoqi@0: assert(i < _available.size(), "entry in _available list not found"); aoqi@0: _available.remove(i); aoqi@0: aoqi@0: // See if this fits in the current bundle aoqi@0: const Pipeline *node_pipeline = n->pipeline(); aoqi@0: const Pipeline_Use& node_usage = node_pipeline->resourceUse(); aoqi@0: aoqi@0: // Check for instructions to be placed in the delay slot. We aoqi@0: // do this before we actually schedule the current instruction, aoqi@0: // because the delay slot follows the current instruction. aoqi@0: if (Pipeline::_branch_has_delay_slot && aoqi@0: node_pipeline->hasBranchDelay() && aoqi@0: !_unconditional_delay_slot) { aoqi@0: aoqi@0: uint siz = _available.size(); aoqi@0: aoqi@0: // Conditional branches can support an instruction that aoqi@0: // is unconditionally executed and not dependent by the aoqi@0: // branch, OR a conditionally executed instruction if aoqi@0: // the branch is taken. In practice, this means that aoqi@0: // the first instruction at the branch target is aoqi@0: // copied to the delay slot, and the branch goes to aoqi@0: // the instruction after that at the branch target aoqi@0: if ( n->is_MachBranch() ) { aoqi@0: aoqi@0: assert( !n->is_MachNullCheck(), "should not look for delay slot for Null Check" ); aoqi@0: assert( !n->is_Catch(), "should not look for delay slot for Catch" ); aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: _branches++; aoqi@0: #endif aoqi@0: aoqi@0: // At least 1 instruction is on the available list aoqi@0: // that is not dependent on the branch aoqi@0: for (uint i = 0; i < siz; i++) { aoqi@0: Node *d = _available[i]; aoqi@0: const Pipeline *avail_pipeline = d->pipeline(); aoqi@0: aoqi@0: // Don't allow safepoints in the branch shadow, that will aoqi@0: // cause a number of difficulties aoqi@0: if ( avail_pipeline->instructionCount() == 1 && aoqi@0: !avail_pipeline->hasMultipleBundles() && aoqi@0: !avail_pipeline->hasBranchDelay() && aoqi@0: Pipeline::instr_has_unit_size() && aoqi@0: d->size(_regalloc) == Pipeline::instr_unit_size() && aoqi@0: NodeFitsInBundle(d) && aoqi@0: !node_bundling(d)->used_in_delay()) { aoqi@0: aoqi@0: if (d->is_Mach() && !d->is_MachSafePoint()) { aoqi@0: // A node that fits in the delay slot was found, so we need to aoqi@0: // set the appropriate bits in the bundle pipeline information so aoqi@0: // that it correctly indicates resource usage. Later, when we aoqi@0: // attempt to add this instruction to the bundle, we will skip aoqi@0: // setting the resource usage. aoqi@0: _unconditional_delay_slot = d; aoqi@0: node_bundling(n)->set_use_unconditional_delay(); aoqi@0: node_bundling(d)->set_used_in_unconditional_delay(); aoqi@0: _bundle_use.add_usage(avail_pipeline->resourceUse()); aoqi@0: _current_latency[d->_idx] = _bundle_cycle_number; aoqi@0: _next_node = d; aoqi@0: ++_bundle_instr_count; aoqi@0: #ifndef PRODUCT aoqi@0: _unconditional_delays++; aoqi@0: #endif aoqi@0: break; aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // No delay slot, add a nop to the usage aoqi@0: if (!_unconditional_delay_slot) { aoqi@0: // See if adding an instruction in the delay slot will overflow aoqi@0: // the bundle. aoqi@0: if (!NodeFitsInBundle(_nop)) { aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) aoqi@0: tty->print("# *** STEP(1 instruction for delay slot) ***\n"); aoqi@0: #endif aoqi@0: step(1); aoqi@0: } aoqi@0: aoqi@0: _bundle_use.add_usage(_nop->pipeline()->resourceUse()); aoqi@0: _next_node = _nop; aoqi@0: ++_bundle_instr_count; aoqi@0: } aoqi@0: aoqi@0: // See if the instruction in the delay slot requires a aoqi@0: // step of the bundles aoqi@0: if (!NodeFitsInBundle(n)) { aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) aoqi@0: tty->print("# *** STEP(branch won't fit) ***\n"); aoqi@0: #endif aoqi@0: // Update the state information aoqi@0: _bundle_instr_count = 0; aoqi@0: _bundle_cycle_number += 1; aoqi@0: _bundle_use.step(1); aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // Get the number of instructions aoqi@0: uint instruction_count = node_pipeline->instructionCount(); aoqi@0: if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0) aoqi@0: instruction_count = 0; aoqi@0: aoqi@0: // Compute the latency information aoqi@0: uint delay = 0; aoqi@0: aoqi@0: if (instruction_count > 0 || !node_pipeline->mayHaveNoCode()) { aoqi@0: int relative_latency = _current_latency[n->_idx] - _bundle_cycle_number; aoqi@0: if (relative_latency < 0) aoqi@0: relative_latency = 0; aoqi@0: aoqi@0: delay = _bundle_use.full_latency(relative_latency, node_usage); aoqi@0: aoqi@0: // Does not fit in this bundle, start a new one aoqi@0: if (delay > 0) { aoqi@0: step(delay); aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) aoqi@0: tty->print("# *** STEP(%d) ***\n", delay); aoqi@0: #endif aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // If this was placed in the delay slot, ignore it aoqi@0: if (n != _unconditional_delay_slot) { aoqi@0: aoqi@0: if (delay == 0) { aoqi@0: if (node_pipeline->hasMultipleBundles()) { aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) aoqi@0: tty->print("# *** STEP(multiple instructions) ***\n"); aoqi@0: #endif aoqi@0: step(1); aoqi@0: } aoqi@0: aoqi@0: else if (instruction_count + _bundle_instr_count > Pipeline::_max_instrs_per_cycle) { aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) aoqi@0: tty->print("# *** STEP(%d >= %d instructions) ***\n", aoqi@0: instruction_count + _bundle_instr_count, aoqi@0: Pipeline::_max_instrs_per_cycle); aoqi@0: #endif aoqi@0: step(1); aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot) aoqi@0: _bundle_instr_count++; aoqi@0: aoqi@0: // Set the node's latency aoqi@0: _current_latency[n->_idx] = _bundle_cycle_number; aoqi@0: aoqi@0: // Now merge the functional unit information aoqi@0: if (instruction_count > 0 || !node_pipeline->mayHaveNoCode()) aoqi@0: _bundle_use.add_usage(node_usage); aoqi@0: aoqi@0: // Increment the number of instructions in this bundle aoqi@0: _bundle_instr_count += instruction_count; aoqi@0: aoqi@0: // Remember this node for later aoqi@0: if (n->is_Mach()) aoqi@0: _next_node = n; aoqi@0: } aoqi@0: aoqi@0: // It's possible to have a BoxLock in the graph and in the _bbs mapping but aoqi@0: // not in the bb->_nodes array. This happens for debug-info-only BoxLocks. aoqi@0: // 'Schedule' them (basically ignore in the schedule) but do not insert them aoqi@0: // into the block. All other scheduled nodes get put in the schedule here. aoqi@0: int op = n->Opcode(); aoqi@0: if( (op == Op_Node && n->req() == 0) || // anti-dependence node OR aoqi@0: (op != Op_Node && // Not an unused antidepedence node and aoqi@0: // not an unallocated boxlock aoqi@0: (OptoReg::is_valid(_regalloc->get_reg_first(n)) || op != Op_BoxLock)) ) { aoqi@0: aoqi@0: // Push any trailing projections aoqi@0: if( bb->get_node(bb->number_of_nodes()-1) != n ) { aoqi@0: for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) { aoqi@0: Node *foi = n->fast_out(i); aoqi@0: if( foi->is_Proj() ) aoqi@0: _scheduled.push(foi); aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // Put the instruction in the schedule list aoqi@0: _scheduled.push(n); aoqi@0: } aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) aoqi@0: dump_available(); aoqi@0: #endif aoqi@0: aoqi@0: // Walk all the definitions, decrementing use counts, and aoqi@0: // if a definition has a 0 use count, place it in the available list. aoqi@0: DecrementUseCounts(n,bb); aoqi@0: } aoqi@0: aoqi@0: // This method sets the use count within a basic block. We will ignore all aoqi@0: // uses outside the current basic block. As we are doing a backwards walk, aoqi@0: // any node we reach that has a use count of 0 may be scheduled. This also aoqi@0: // avoids the problem of cyclic references from phi nodes, as long as phi aoqi@0: // nodes are at the front of the basic block. This method also initializes aoqi@0: // the available list to the set of instructions that have no uses within this aoqi@0: // basic block. aoqi@0: void Scheduling::ComputeUseCount(const Block *bb) { aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) aoqi@0: tty->print("# -> ComputeUseCount\n"); aoqi@0: #endif aoqi@0: aoqi@0: // Clear the list of available and scheduled instructions, just in case aoqi@0: _available.clear(); aoqi@0: _scheduled.clear(); aoqi@0: aoqi@0: // No delay slot specified aoqi@0: _unconditional_delay_slot = NULL; aoqi@0: aoqi@0: #ifdef ASSERT aoqi@0: for( uint i=0; i < bb->number_of_nodes(); i++ ) aoqi@0: assert( _uses[bb->get_node(i)->_idx] == 0, "_use array not clean" ); aoqi@0: #endif aoqi@0: aoqi@0: // Force the _uses count to never go to zero for unscheduable pieces aoqi@0: // of the block aoqi@0: for( uint k = 0; k < _bb_start; k++ ) aoqi@0: _uses[bb->get_node(k)->_idx] = 1; aoqi@0: for( uint l = _bb_end; l < bb->number_of_nodes(); l++ ) aoqi@0: _uses[bb->get_node(l)->_idx] = 1; aoqi@0: aoqi@0: // Iterate backwards over the instructions in the block. Don't count the aoqi@0: // branch projections at end or the block header instructions. aoqi@0: for( uint j = _bb_end-1; j >= _bb_start; j-- ) { aoqi@0: Node *n = bb->get_node(j); aoqi@0: if( n->is_Proj() ) continue; // Projections handled another way aoqi@0: aoqi@0: // Account for all uses aoqi@0: for ( uint k = 0; k < n->len(); k++ ) { aoqi@0: Node *inp = n->in(k); aoqi@0: if (!inp) continue; aoqi@0: assert(inp != n, "no cycles allowed" ); aoqi@0: if (_cfg->get_block_for_node(inp) == bb) { // Block-local use? aoqi@0: if (inp->is_Proj()) { // Skip through Proj's aoqi@0: inp = inp->in(0); aoqi@0: } aoqi@0: ++_uses[inp->_idx]; // Count 1 block-local use aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // If this instruction has a 0 use count, then it is available aoqi@0: if (!_uses[n->_idx]) { aoqi@0: _current_latency[n->_idx] = _bundle_cycle_number; aoqi@0: AddNodeToAvailableList(n); aoqi@0: } aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) { aoqi@0: tty->print("# uses: %3d: ", _uses[n->_idx]); aoqi@0: n->dump(); aoqi@0: } aoqi@0: #endif aoqi@0: } aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) aoqi@0: tty->print("# <- ComputeUseCount\n"); aoqi@0: #endif aoqi@0: } aoqi@0: aoqi@0: // This routine performs scheduling on each basic block in reverse order, aoqi@0: // using instruction latencies and taking into account function unit aoqi@0: // availability. aoqi@0: void Scheduling::DoScheduling() { aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) aoqi@0: tty->print("# -> DoScheduling\n"); aoqi@0: #endif aoqi@0: aoqi@0: Block *succ_bb = NULL; aoqi@0: Block *bb; aoqi@0: aoqi@0: // Walk over all the basic blocks in reverse order aoqi@0: for (int i = _cfg->number_of_blocks() - 1; i >= 0; succ_bb = bb, i--) { aoqi@0: bb = _cfg->get_block(i); aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) { aoqi@0: tty->print("# Schedule BB#%03d (initial)\n", i); aoqi@0: for (uint j = 0; j < bb->number_of_nodes(); j++) { aoqi@0: bb->get_node(j)->dump(); aoqi@0: } aoqi@0: } aoqi@0: #endif aoqi@0: aoqi@0: // On the head node, skip processing aoqi@0: if (bb == _cfg->get_root_block()) { aoqi@0: continue; aoqi@0: } aoqi@0: aoqi@0: // Skip empty, connector blocks aoqi@0: if (bb->is_connector()) aoqi@0: continue; aoqi@0: aoqi@0: // If the following block is not the sole successor of aoqi@0: // this one, then reset the pipeline information aoqi@0: if (bb->_num_succs != 1 || bb->non_connector_successor(0) != succ_bb) { aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) { aoqi@0: tty->print("*** bundle start of next BB, node %d, for %d instructions\n", aoqi@0: _next_node->_idx, _bundle_instr_count); aoqi@0: } aoqi@0: #endif aoqi@0: step_and_clear(); aoqi@0: } aoqi@0: aoqi@0: // Leave untouched the starting instruction, any Phis, a CreateEx node aoqi@0: // or Top. bb->get_node(_bb_start) is the first schedulable instruction. aoqi@0: _bb_end = bb->number_of_nodes()-1; aoqi@0: for( _bb_start=1; _bb_start <= _bb_end; _bb_start++ ) { aoqi@0: Node *n = bb->get_node(_bb_start); aoqi@0: // Things not matched, like Phinodes and ProjNodes don't get scheduled. aoqi@0: // Also, MachIdealNodes do not get scheduled aoqi@0: if( !n->is_Mach() ) continue; // Skip non-machine nodes aoqi@0: MachNode *mach = n->as_Mach(); aoqi@0: int iop = mach->ideal_Opcode(); aoqi@0: if( iop == Op_CreateEx ) continue; // CreateEx is pinned aoqi@0: if( iop == Op_Con ) continue; // Do not schedule Top aoqi@0: if( iop == Op_Node && // Do not schedule PhiNodes, ProjNodes aoqi@0: mach->pipeline() == MachNode::pipeline_class() && iveresov@7570: !n->is_SpillCopy() && !n->is_MachMerge() ) // Breakpoints, Prolog, etc aoqi@0: continue; aoqi@0: break; // Funny loop structure to be sure... aoqi@0: } aoqi@0: // Compute last "interesting" instruction in block - last instruction we aoqi@0: // might schedule. _bb_end points just after last schedulable inst. We aoqi@0: // normally schedule conditional branches (despite them being forced last aoqi@0: // in the block), because they have delay slots we can fill. Calls all aoqi@0: // have their delay slots filled in the template expansions, so we don't aoqi@0: // bother scheduling them. aoqi@0: Node *last = bb->get_node(_bb_end); aoqi@0: // Ignore trailing NOPs. aoqi@0: while (_bb_end > 0 && last->is_Mach() && aoqi@0: last->as_Mach()->ideal_Opcode() == Op_Con) { aoqi@0: last = bb->get_node(--_bb_end); aoqi@0: } aoqi@0: assert(!last->is_Mach() || last->as_Mach()->ideal_Opcode() != Op_Con, ""); aoqi@0: if( last->is_Catch() || aoqi@0: // Exclude unreachable path case when Halt node is in a separate block. aoqi@0: (_bb_end > 1 && last->is_Mach() && last->as_Mach()->ideal_Opcode() == Op_Halt) ) { aoqi@0: // There must be a prior call. Skip it. aoqi@0: while( !bb->get_node(--_bb_end)->is_MachCall() ) { aoqi@0: assert( bb->get_node(_bb_end)->is_MachProj(), "skipping projections after expected call" ); aoqi@0: } aoqi@0: } else if( last->is_MachNullCheck() ) { aoqi@0: // Backup so the last null-checked memory instruction is aoqi@0: // outside the schedulable range. Skip over the nullcheck, aoqi@0: // projection, and the memory nodes. aoqi@0: Node *mem = last->in(1); aoqi@0: do { aoqi@0: _bb_end--; aoqi@0: } while (mem != bb->get_node(_bb_end)); aoqi@0: } else { aoqi@0: // Set _bb_end to point after last schedulable inst. aoqi@0: _bb_end++; aoqi@0: } aoqi@0: aoqi@0: assert( _bb_start <= _bb_end, "inverted block ends" ); aoqi@0: aoqi@0: // Compute the register antidependencies for the basic block aoqi@0: ComputeRegisterAntidependencies(bb); aoqi@0: if (_cfg->C->failing()) return; // too many D-U pinch points aoqi@0: aoqi@0: // Compute intra-bb latencies for the nodes aoqi@0: ComputeLocalLatenciesForward(bb); aoqi@0: aoqi@0: // Compute the usage within the block, and set the list of all nodes aoqi@0: // in the block that have no uses within the block. aoqi@0: ComputeUseCount(bb); aoqi@0: aoqi@0: // Schedule the remaining instructions in the block aoqi@0: while ( _available.size() > 0 ) { aoqi@0: Node *n = ChooseNodeToBundle(); aoqi@0: guarantee(n != NULL, "no nodes available"); aoqi@0: AddNodeToBundle(n,bb); aoqi@0: } aoqi@0: aoqi@0: assert( _scheduled.size() == _bb_end - _bb_start, "wrong number of instructions" ); aoqi@0: #ifdef ASSERT aoqi@0: for( uint l = _bb_start; l < _bb_end; l++ ) { aoqi@0: Node *n = bb->get_node(l); aoqi@0: uint m; aoqi@0: for( m = 0; m < _bb_end-_bb_start; m++ ) aoqi@0: if( _scheduled[m] == n ) aoqi@0: break; aoqi@0: assert( m < _bb_end-_bb_start, "instruction missing in schedule" ); aoqi@0: } aoqi@0: #endif aoqi@0: aoqi@0: // Now copy the instructions (in reverse order) back to the block aoqi@0: for ( uint k = _bb_start; k < _bb_end; k++ ) aoqi@0: bb->map_node(_scheduled[_bb_end-k-1], k); aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) { aoqi@0: tty->print("# Schedule BB#%03d (final)\n", i); aoqi@0: uint current = 0; aoqi@0: for (uint j = 0; j < bb->number_of_nodes(); j++) { aoqi@0: Node *n = bb->get_node(j); aoqi@0: if( valid_bundle_info(n) ) { aoqi@0: Bundle *bundle = node_bundling(n); aoqi@0: if (bundle->instr_count() > 0 || bundle->flags() > 0) { aoqi@0: tty->print("*** Bundle: "); aoqi@0: bundle->dump(); aoqi@0: } aoqi@0: n->dump(); aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: #endif aoqi@0: #ifdef ASSERT aoqi@0: verify_good_schedule(bb,"after block local scheduling"); aoqi@0: #endif aoqi@0: } aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) aoqi@0: tty->print("# <- DoScheduling\n"); aoqi@0: #endif aoqi@0: aoqi@0: // Record final node-bundling array location aoqi@0: _regalloc->C->set_node_bundling_base(_node_bundling_base); aoqi@0: aoqi@0: } // end DoScheduling aoqi@0: aoqi@0: // Verify that no live-range used in the block is killed in the block by a aoqi@0: // wrong DEF. This doesn't verify live-ranges that span blocks. aoqi@0: aoqi@0: // Check for edge existence. Used to avoid adding redundant precedence edges. aoqi@0: static bool edge_from_to( Node *from, Node *to ) { aoqi@0: for( uint i=0; ilen(); i++ ) aoqi@0: if( from->in(i) == to ) aoqi@0: return true; aoqi@0: return false; aoqi@0: } aoqi@0: aoqi@0: #ifdef ASSERT aoqi@0: void Scheduling::verify_do_def( Node *n, OptoReg::Name def, const char *msg ) { aoqi@0: // Check for bad kills aoqi@0: if( OptoReg::is_valid(def) ) { // Ignore stores & control flow aoqi@0: Node *prior_use = _reg_node[def]; aoqi@0: if( prior_use && !edge_from_to(prior_use,n) ) { aoqi@0: tty->print("%s = ",OptoReg::as_VMReg(def)->name()); aoqi@0: n->dump(); aoqi@0: tty->print_cr("..."); aoqi@0: prior_use->dump(); aoqi@0: assert(edge_from_to(prior_use,n),msg); aoqi@0: } aoqi@0: _reg_node.map(def,NULL); // Kill live USEs aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: void Scheduling::verify_good_schedule( Block *b, const char *msg ) { aoqi@0: aoqi@0: // Zap to something reasonable for the verify code aoqi@0: _reg_node.clear(); aoqi@0: aoqi@0: // Walk over the block backwards. Check to make sure each DEF doesn't aoqi@0: // kill a live value (other than the one it's supposed to). Add each aoqi@0: // USE to the live set. aoqi@0: for( uint i = b->number_of_nodes()-1; i >= _bb_start; i-- ) { aoqi@0: Node *n = b->get_node(i); aoqi@0: int n_op = n->Opcode(); aoqi@0: if( n_op == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) { aoqi@0: // Fat-proj kills a slew of registers aoqi@0: RegMask rm = n->out_RegMask();// Make local copy aoqi@0: while( rm.is_NotEmpty() ) { aoqi@0: OptoReg::Name kill = rm.find_first_elem(); aoqi@0: rm.Remove(kill); aoqi@0: verify_do_def( n, kill, msg ); aoqi@0: } aoqi@0: } else if( n_op != Op_Node ) { // Avoid brand new antidependence nodes aoqi@0: // Get DEF'd registers the normal way aoqi@0: verify_do_def( n, _regalloc->get_reg_first(n), msg ); aoqi@0: verify_do_def( n, _regalloc->get_reg_second(n), msg ); aoqi@0: } aoqi@0: aoqi@0: // Now make all USEs live aoqi@0: for( uint i=1; ireq(); i++ ) { aoqi@0: Node *def = n->in(i); aoqi@0: assert(def != 0, "input edge required"); aoqi@0: OptoReg::Name reg_lo = _regalloc->get_reg_first(def); aoqi@0: OptoReg::Name reg_hi = _regalloc->get_reg_second(def); aoqi@0: if( OptoReg::is_valid(reg_lo) ) { aoqi@0: assert(!_reg_node[reg_lo] || edge_from_to(_reg_node[reg_lo],def), msg); aoqi@0: _reg_node.map(reg_lo,n); aoqi@0: } aoqi@0: if( OptoReg::is_valid(reg_hi) ) { aoqi@0: assert(!_reg_node[reg_hi] || edge_from_to(_reg_node[reg_hi],def), msg); aoqi@0: _reg_node.map(reg_hi,n); aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: } aoqi@0: aoqi@0: // Zap to something reasonable for the Antidependence code aoqi@0: _reg_node.clear(); aoqi@0: } aoqi@0: #endif aoqi@0: aoqi@0: // Conditionally add precedence edges. Avoid putting edges on Projs. aoqi@0: static void add_prec_edge_from_to( Node *from, Node *to ) { aoqi@0: if( from->is_Proj() ) { // Put precedence edge on Proj's input aoqi@0: assert( from->req() == 1 && (from->len() == 1 || from->in(1)==0), "no precedence edges on projections" ); aoqi@0: from = from->in(0); aoqi@0: } aoqi@0: if( from != to && // No cycles (for things like LD L0,[L0+4] ) aoqi@0: !edge_from_to( from, to ) ) // Avoid duplicate edge aoqi@0: from->add_prec(to); aoqi@0: } aoqi@0: aoqi@0: void Scheduling::anti_do_def( Block *b, Node *def, OptoReg::Name def_reg, int is_def ) { aoqi@0: if( !OptoReg::is_valid(def_reg) ) // Ignore stores & control flow aoqi@0: return; aoqi@0: aoqi@0: Node *pinch = _reg_node[def_reg]; // Get pinch point aoqi@0: if ((pinch == NULL) || _cfg->get_block_for_node(pinch) != b || // No pinch-point yet? aoqi@0: is_def ) { // Check for a true def (not a kill) aoqi@0: _reg_node.map(def_reg,def); // Record def/kill as the optimistic pinch-point aoqi@0: return; aoqi@0: } aoqi@0: aoqi@0: Node *kill = def; // Rename 'def' to more descriptive 'kill' aoqi@0: debug_only( def = (Node*)0xdeadbeef; ) aoqi@0: aoqi@0: // After some number of kills there _may_ be a later def aoqi@0: Node *later_def = NULL; aoqi@0: aoqi@0: // Finding a kill requires a real pinch-point. aoqi@0: // Check for not already having a pinch-point. aoqi@0: // Pinch points are Op_Node's. aoqi@0: if( pinch->Opcode() != Op_Node ) { // Or later-def/kill as pinch-point? aoqi@0: later_def = pinch; // Must be def/kill as optimistic pinch-point aoqi@0: if ( _pinch_free_list.size() > 0) { aoqi@0: pinch = _pinch_free_list.pop(); aoqi@0: } else { aoqi@0: pinch = new (_cfg->C) Node(1); // Pinch point to-be aoqi@0: } aoqi@0: if (pinch->_idx >= _regalloc->node_regs_max_index()) { aoqi@0: _cfg->C->record_method_not_compilable("too many D-U pinch points"); aoqi@0: return; aoqi@0: } aoqi@0: _cfg->map_node_to_block(pinch, b); // Pretend it's valid in this block (lazy init) aoqi@0: _reg_node.map(def_reg,pinch); // Record pinch-point aoqi@0: //_regalloc->set_bad(pinch->_idx); // Already initialized this way. aoqi@0: if( later_def->outcnt() == 0 || later_def->ideal_reg() == MachProjNode::fat_proj ) { // Distinguish def from kill aoqi@0: pinch->init_req(0, _cfg->C->top()); // set not NULL for the next call aoqi@0: add_prec_edge_from_to(later_def,pinch); // Add edge from kill to pinch aoqi@0: later_def = NULL; // and no later def aoqi@0: } aoqi@0: pinch->set_req(0,later_def); // Hook later def so we can find it aoqi@0: } else { // Else have valid pinch point aoqi@0: if( pinch->in(0) ) // If there is a later-def aoqi@0: later_def = pinch->in(0); // Get it aoqi@0: } aoqi@0: aoqi@0: // Add output-dependence edge from later def to kill aoqi@0: if( later_def ) // If there is some original def aoqi@0: add_prec_edge_from_to(later_def,kill); // Add edge from def to kill aoqi@0: aoqi@0: // See if current kill is also a use, and so is forced to be the pinch-point. aoqi@0: if( pinch->Opcode() == Op_Node ) { aoqi@0: Node *uses = kill->is_Proj() ? kill->in(0) : kill; aoqi@0: for( uint i=1; ireq(); i++ ) { aoqi@0: if( _regalloc->get_reg_first(uses->in(i)) == def_reg || aoqi@0: _regalloc->get_reg_second(uses->in(i)) == def_reg ) { aoqi@0: // Yes, found a use/kill pinch-point aoqi@0: pinch->set_req(0,NULL); // aoqi@0: pinch->replace_by(kill); // Move anti-dep edges up aoqi@0: pinch = kill; aoqi@0: _reg_node.map(def_reg,pinch); aoqi@0: return; aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // Add edge from kill to pinch-point aoqi@0: add_prec_edge_from_to(kill,pinch); aoqi@0: } aoqi@0: aoqi@0: void Scheduling::anti_do_use( Block *b, Node *use, OptoReg::Name use_reg ) { aoqi@0: if( !OptoReg::is_valid(use_reg) ) // Ignore stores & control flow aoqi@0: return; aoqi@0: Node *pinch = _reg_node[use_reg]; // Get pinch point aoqi@0: // Check for no later def_reg/kill in block aoqi@0: if ((pinch != NULL) && _cfg->get_block_for_node(pinch) == b && aoqi@0: // Use has to be block-local as well aoqi@0: _cfg->get_block_for_node(use) == b) { aoqi@0: if( pinch->Opcode() == Op_Node && // Real pinch-point (not optimistic?) aoqi@0: pinch->req() == 1 ) { // pinch not yet in block? aoqi@0: pinch->del_req(0); // yank pointer to later-def, also set flag aoqi@0: // Insert the pinch-point in the block just after the last use aoqi@0: b->insert_node(pinch, b->find_node(use) + 1); aoqi@0: _bb_end++; // Increase size scheduled region in block aoqi@0: } aoqi@0: aoqi@0: add_prec_edge_from_to(pinch,use); aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // We insert antidependences between the reads and following write of aoqi@0: // allocated registers to prevent illegal code motion. Hopefully, the aoqi@0: // number of added references should be fairly small, especially as we aoqi@0: // are only adding references within the current basic block. aoqi@0: void Scheduling::ComputeRegisterAntidependencies(Block *b) { aoqi@0: aoqi@0: #ifdef ASSERT aoqi@0: verify_good_schedule(b,"before block local scheduling"); aoqi@0: #endif aoqi@0: aoqi@0: // A valid schedule, for each register independently, is an endless cycle aoqi@0: // of: a def, then some uses (connected to the def by true dependencies), aoqi@0: // then some kills (defs with no uses), finally the cycle repeats with a new aoqi@0: // def. The uses are allowed to float relative to each other, as are the aoqi@0: // kills. No use is allowed to slide past a kill (or def). This requires aoqi@0: // antidependencies between all uses of a single def and all kills that aoqi@0: // follow, up to the next def. More edges are redundant, because later defs aoqi@0: // & kills are already serialized with true or antidependencies. To keep aoqi@0: // the edge count down, we add a 'pinch point' node if there's more than aoqi@0: // one use or more than one kill/def. aoqi@0: aoqi@0: // We add dependencies in one bottom-up pass. aoqi@0: aoqi@0: // For each instruction we handle it's DEFs/KILLs, then it's USEs. aoqi@0: aoqi@0: // For each DEF/KILL, we check to see if there's a prior DEF/KILL for this aoqi@0: // register. If not, we record the DEF/KILL in _reg_node, the aoqi@0: // register-to-def mapping. If there is a prior DEF/KILL, we insert a aoqi@0: // "pinch point", a new Node that's in the graph but not in the block. aoqi@0: // We put edges from the prior and current DEF/KILLs to the pinch point. aoqi@0: // We put the pinch point in _reg_node. If there's already a pinch point aoqi@0: // we merely add an edge from the current DEF/KILL to the pinch point. aoqi@0: aoqi@0: // After doing the DEF/KILLs, we handle USEs. For each used register, we aoqi@0: // put an edge from the pinch point to the USE. aoqi@0: aoqi@0: // To be expedient, the _reg_node array is pre-allocated for the whole aoqi@0: // compilation. _reg_node is lazily initialized; it either contains a NULL, aoqi@0: // or a valid def/kill/pinch-point, or a leftover node from some prior aoqi@0: // block. Leftover node from some prior block is treated like a NULL (no aoqi@0: // prior def, so no anti-dependence needed). Valid def is distinguished by aoqi@0: // it being in the current block. aoqi@0: bool fat_proj_seen = false; aoqi@0: uint last_safept = _bb_end-1; aoqi@0: Node* end_node = (_bb_end-1 >= _bb_start) ? b->get_node(last_safept) : NULL; aoqi@0: Node* last_safept_node = end_node; aoqi@0: for( uint i = _bb_end-1; i >= _bb_start; i-- ) { aoqi@0: Node *n = b->get_node(i); aoqi@0: int is_def = n->outcnt(); // def if some uses prior to adding precedence edges aoqi@0: if( n->is_MachProj() && n->ideal_reg() == MachProjNode::fat_proj ) { aoqi@0: // Fat-proj kills a slew of registers aoqi@0: // This can add edges to 'n' and obscure whether or not it was a def, aoqi@0: // hence the is_def flag. aoqi@0: fat_proj_seen = true; aoqi@0: RegMask rm = n->out_RegMask();// Make local copy aoqi@0: while( rm.is_NotEmpty() ) { aoqi@0: OptoReg::Name kill = rm.find_first_elem(); aoqi@0: rm.Remove(kill); aoqi@0: anti_do_def( b, n, kill, is_def ); aoqi@0: } aoqi@0: } else { aoqi@0: // Get DEF'd registers the normal way aoqi@0: anti_do_def( b, n, _regalloc->get_reg_first(n), is_def ); aoqi@0: anti_do_def( b, n, _regalloc->get_reg_second(n), is_def ); aoqi@0: } aoqi@0: aoqi@0: // Kill projections on a branch should appear to occur on the aoqi@0: // branch, not afterwards, so grab the masks from the projections aoqi@0: // and process them. aoqi@0: if (n->is_MachBranch() || n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_Jump) { aoqi@0: for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) { aoqi@0: Node* use = n->fast_out(i); aoqi@0: if (use->is_Proj()) { aoqi@0: RegMask rm = use->out_RegMask();// Make local copy aoqi@0: while( rm.is_NotEmpty() ) { aoqi@0: OptoReg::Name kill = rm.find_first_elem(); aoqi@0: rm.Remove(kill); aoqi@0: anti_do_def( b, n, kill, false ); aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // Check each register used by this instruction for a following DEF/KILL aoqi@0: // that must occur afterward and requires an anti-dependence edge. aoqi@0: for( uint j=0; jreq(); j++ ) { aoqi@0: Node *def = n->in(j); aoqi@0: if( def ) { aoqi@0: assert( !def->is_MachProj() || def->ideal_reg() != MachProjNode::fat_proj, "" ); aoqi@0: anti_do_use( b, n, _regalloc->get_reg_first(def) ); aoqi@0: anti_do_use( b, n, _regalloc->get_reg_second(def) ); aoqi@0: } aoqi@0: } aoqi@0: // Do not allow defs of new derived values to float above GC aoqi@0: // points unless the base is definitely available at the GC point. aoqi@0: aoqi@0: Node *m = b->get_node(i); aoqi@0: aoqi@0: // Add precedence edge from following safepoint to use of derived pointer aoqi@0: if( last_safept_node != end_node && aoqi@0: m != last_safept_node) { aoqi@0: for (uint k = 1; k < m->req(); k++) { aoqi@0: const Type *t = m->in(k)->bottom_type(); aoqi@0: if( t->isa_oop_ptr() && aoqi@0: t->is_ptr()->offset() != 0 ) { aoqi@0: last_safept_node->add_prec( m ); aoqi@0: break; aoqi@0: } aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: if( n->jvms() ) { // Precedence edge from derived to safept aoqi@0: // Check if last_safept_node was moved by pinch-point insertion in anti_do_use() aoqi@0: if( b->get_node(last_safept) != last_safept_node ) { aoqi@0: last_safept = b->find_node(last_safept_node); aoqi@0: } aoqi@0: for( uint j=last_safept; j > i; j-- ) { aoqi@0: Node *mach = b->get_node(j); aoqi@0: if( mach->is_Mach() && mach->as_Mach()->ideal_Opcode() == Op_AddP ) aoqi@0: mach->add_prec( n ); aoqi@0: } aoqi@0: last_safept = i; aoqi@0: last_safept_node = m; aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: if (fat_proj_seen) { aoqi@0: // Garbage collect pinch nodes that were not consumed. aoqi@0: // They are usually created by a fat kill MachProj for a call. aoqi@0: garbage_collect_pinch_nodes(); aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: // Garbage collect pinch nodes for reuse by other blocks. aoqi@0: // aoqi@0: // The block scheduler's insertion of anti-dependence aoqi@0: // edges creates many pinch nodes when the block contains aoqi@0: // 2 or more Calls. A pinch node is used to prevent a aoqi@0: // combinatorial explosion of edges. If a set of kills for a aoqi@0: // register is anti-dependent on a set of uses (or defs), rather aoqi@0: // than adding an edge in the graph between each pair of kill aoqi@0: // and use (or def), a pinch is inserted between them: aoqi@0: // aoqi@0: // use1 use2 use3 aoqi@0: // \ | / aoqi@0: // \ | / aoqi@0: // pinch aoqi@0: // / | \ aoqi@0: // / | \ aoqi@0: // kill1 kill2 kill3 aoqi@0: // aoqi@0: // One pinch node is created per register killed when aoqi@0: // the second call is encountered during a backwards pass aoqi@0: // over the block. Most of these pinch nodes are never aoqi@0: // wired into the graph because the register is never aoqi@0: // used or def'ed in the block. aoqi@0: // aoqi@0: void Scheduling::garbage_collect_pinch_nodes() { aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) tty->print("Reclaimed pinch nodes:"); aoqi@0: #endif aoqi@0: int trace_cnt = 0; aoqi@0: for (uint k = 0; k < _reg_node.Size(); k++) { aoqi@0: Node* pinch = _reg_node[k]; aoqi@0: if ((pinch != NULL) && pinch->Opcode() == Op_Node && aoqi@0: // no predecence input edges aoqi@0: (pinch->req() == pinch->len() || pinch->in(pinch->req()) == NULL) ) { aoqi@0: cleanup_pinch(pinch); aoqi@0: _pinch_free_list.push(pinch); aoqi@0: _reg_node.map(k, NULL); aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) { aoqi@0: trace_cnt++; aoqi@0: if (trace_cnt > 40) { aoqi@0: tty->print("\n"); aoqi@0: trace_cnt = 0; aoqi@0: } aoqi@0: tty->print(" %d", pinch->_idx); aoqi@0: } aoqi@0: #endif aoqi@0: } aoqi@0: } aoqi@0: #ifndef PRODUCT aoqi@0: if (_cfg->C->trace_opto_output()) tty->print("\n"); aoqi@0: #endif aoqi@0: } aoqi@0: aoqi@0: // Clean up a pinch node for reuse. aoqi@0: void Scheduling::cleanup_pinch( Node *pinch ) { aoqi@0: assert (pinch && pinch->Opcode() == Op_Node && pinch->req() == 1, "just checking"); aoqi@0: aoqi@0: for (DUIterator_Last imin, i = pinch->last_outs(imin); i >= imin; ) { aoqi@0: Node* use = pinch->last_out(i); aoqi@0: uint uses_found = 0; aoqi@0: for (uint j = use->req(); j < use->len(); j++) { aoqi@0: if (use->in(j) == pinch) { aoqi@0: use->rm_prec(j); aoqi@0: uses_found++; aoqi@0: } aoqi@0: } aoqi@0: assert(uses_found > 0, "must be a precedence edge"); aoqi@0: i -= uses_found; // we deleted 1 or more copies of this edge aoqi@0: } aoqi@0: // May have a later_def entry aoqi@0: pinch->set_req(0, NULL); aoqi@0: } aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: aoqi@0: void Scheduling::dump_available() const { aoqi@0: tty->print("#Availist "); aoqi@0: for (uint i = 0; i < _available.size(); i++) aoqi@0: tty->print(" N%d/l%d", _available[i]->_idx,_current_latency[_available[i]->_idx]); aoqi@0: tty->cr(); aoqi@0: } aoqi@0: aoqi@0: // Print Scheduling Statistics aoqi@0: void Scheduling::print_statistics() { aoqi@0: // Print the size added by nops for bundling aoqi@0: tty->print("Nops added %d bytes to total of %d bytes", aoqi@0: _total_nop_size, _total_method_size); aoqi@0: if (_total_method_size > 0) aoqi@0: tty->print(", for %.2f%%", aoqi@0: ((double)_total_nop_size) / ((double) _total_method_size) * 100.0); aoqi@0: tty->print("\n"); aoqi@0: aoqi@0: // Print the number of branch shadows filled aoqi@0: if (Pipeline::_branch_has_delay_slot) { aoqi@0: tty->print("Of %d branches, %d had unconditional delay slots filled", aoqi@0: _total_branches, _total_unconditional_delays); aoqi@0: if (_total_branches > 0) aoqi@0: tty->print(", for %.2f%%", aoqi@0: ((double)_total_unconditional_delays) / ((double)_total_branches) * 100.0); aoqi@0: tty->print("\n"); aoqi@0: } aoqi@0: aoqi@0: uint total_instructions = 0, total_bundles = 0; aoqi@0: aoqi@0: for (uint i = 1; i <= Pipeline::_max_instrs_per_cycle; i++) { aoqi@0: uint bundle_count = _total_instructions_per_bundle[i]; aoqi@0: total_instructions += bundle_count * i; aoqi@0: total_bundles += bundle_count; aoqi@0: } aoqi@0: aoqi@0: if (total_bundles > 0) aoqi@0: tty->print("Average ILP (excluding nops) is %.2f\n", aoqi@0: ((double)total_instructions) / ((double)total_bundles)); aoqi@0: } aoqi@0: #endif