aoqi@0: /* aoqi@0: * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. aoqi@0: * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. aoqi@0: * aoqi@0: * This code is free software; you can redistribute it and/or modify it aoqi@0: * under the terms of the GNU General Public License version 2 only, as aoqi@0: * published by the Free Software Foundation. aoqi@0: * aoqi@0: * This code is distributed in the hope that it will be useful, but WITHOUT aoqi@0: * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or aoqi@0: * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License aoqi@0: * version 2 for more details (a copy is included in the LICENSE file that aoqi@0: * accompanied this code). aoqi@0: * aoqi@0: * You should have received a copy of the GNU General Public License version aoqi@0: * 2 along with this work; if not, write to the Free Software Foundation, aoqi@0: * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. aoqi@0: * aoqi@0: * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA aoqi@0: * or visit www.oracle.com if you need additional information or have any aoqi@0: * questions. aoqi@0: * aoqi@0: */ aoqi@0: aoqi@0: #ifndef SHARE_VM_OPTO_MACHNODE_HPP aoqi@0: #define SHARE_VM_OPTO_MACHNODE_HPP aoqi@0: aoqi@0: #include "opto/callnode.hpp" aoqi@0: #include "opto/matcher.hpp" aoqi@0: #include "opto/multnode.hpp" aoqi@0: #include "opto/node.hpp" aoqi@0: #include "opto/regmask.hpp" aoqi@0: aoqi@0: class BiasedLockingCounters; aoqi@0: class BufferBlob; aoqi@0: class CodeBuffer; aoqi@0: class JVMState; aoqi@0: class MachCallDynamicJavaNode; aoqi@0: class MachCallJavaNode; aoqi@0: class MachCallLeafNode; aoqi@0: class MachCallNode; aoqi@0: class MachCallRuntimeNode; aoqi@0: class MachCallStaticJavaNode; aoqi@0: class MachEpilogNode; aoqi@0: class MachIfNode; aoqi@0: class MachNullCheckNode; aoqi@0: class MachOper; aoqi@0: class MachProjNode; aoqi@0: class MachPrologNode; aoqi@0: class MachReturnNode; aoqi@0: class MachSafePointNode; aoqi@0: class MachSpillCopyNode; aoqi@0: class Matcher; aoqi@0: class PhaseRegAlloc; aoqi@0: class RegMask; aoqi@0: class RTMLockingCounters; aoqi@0: class State; aoqi@0: aoqi@0: //---------------------------MachOper------------------------------------------ aoqi@0: class MachOper : public ResourceObj { aoqi@0: public: aoqi@0: // Allocate right next to the MachNodes in the same arena aoqi@0: void *operator new( size_t x, Compile* C ) throw() { return C->node_arena()->Amalloc_D(x); } aoqi@0: aoqi@0: // Opcode aoqi@0: virtual uint opcode() const = 0; aoqi@0: aoqi@0: // Number of input edges. aoqi@0: // Generally at least 1 aoqi@0: virtual uint num_edges() const { return 1; } aoqi@0: // Array of Register masks aoqi@0: virtual const RegMask *in_RegMask(int index) const; aoqi@0: aoqi@0: // Methods to output the encoding of the operand aoqi@0: aoqi@0: // Negate conditional branches. Error for non-branch Nodes aoqi@0: virtual void negate(); aoqi@0: aoqi@0: // Return the value requested aoqi@0: // result register lookup, corresponding to int_format aoqi@0: virtual int reg(PhaseRegAlloc *ra_, const Node *node) const; aoqi@0: // input register lookup, corresponding to ext_format aoqi@0: virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const; aoqi@0: aoqi@0: // helpers for MacroAssembler generation from ADLC aoqi@0: Register as_Register(PhaseRegAlloc *ra_, const Node *node) const { aoqi@0: return ::as_Register(reg(ra_, node)); aoqi@0: } aoqi@0: Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const { aoqi@0: return ::as_Register(reg(ra_, node, idx)); aoqi@0: } aoqi@0: FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const { aoqi@0: return ::as_FloatRegister(reg(ra_, node)); aoqi@0: } aoqi@0: FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { aoqi@0: return ::as_FloatRegister(reg(ra_, node, idx)); aoqi@0: } aoqi@0: aoqi@0: #if defined(IA32) || defined(AMD64) aoqi@0: XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const { aoqi@0: return ::as_XMMRegister(reg(ra_, node)); aoqi@0: } aoqi@0: XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { aoqi@0: return ::as_XMMRegister(reg(ra_, node, idx)); aoqi@0: } aoqi@0: #endif aoqi@0: // CondRegister reg converter aoqi@0: #if defined(PPC64) aoqi@0: ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const { aoqi@0: return ::as_ConditionRegister(reg(ra_, node)); aoqi@0: } aoqi@0: ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { aoqi@0: return ::as_ConditionRegister(reg(ra_, node, idx)); aoqi@0: } aoqi@0: #endif aoqi@0: aoqi@0: virtual intptr_t constant() const; aoqi@0: virtual relocInfo::relocType constant_reloc() const; aoqi@0: virtual jdouble constantD() const; aoqi@0: virtual jfloat constantF() const; aoqi@0: virtual jlong constantL() const; aoqi@0: virtual TypeOopPtr *oop() const; aoqi@0: virtual int ccode() const; aoqi@0: // A zero, default, indicates this value is not needed. aoqi@0: // May need to lookup the base register, as done in int_ and ext_format aoqi@0: virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const; aoqi@0: virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const; aoqi@0: virtual int scale() const; aoqi@0: // Parameters needed to support MEMORY_INTERFACE access to stackSlot aoqi@0: virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const; aoqi@0: // Check for PC-Relative displacement aoqi@0: virtual relocInfo::relocType disp_reloc() const; aoqi@0: virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot aoqi@0: virtual int base_position() const; // base edge position, or -1 aoqi@0: virtual int index_position() const; // index edge position, or -1 aoqi@0: aoqi@0: // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP aoqi@0: // Only returns non-null value for i486.ad's indOffset32X aoqi@0: virtual const TypePtr *disp_as_type() const { return NULL; } aoqi@0: aoqi@0: // Return the label aoqi@0: virtual Label *label() const; aoqi@0: aoqi@0: // Return the method's address aoqi@0: virtual intptr_t method() const; aoqi@0: aoqi@0: // Hash and compare over operands are currently identical aoqi@0: virtual uint hash() const; aoqi@0: virtual uint cmp( const MachOper &oper ) const; aoqi@0: aoqi@0: // Virtual clone, since I do not know how big the MachOper is. aoqi@0: virtual MachOper *clone(Compile* C) const = 0; aoqi@0: aoqi@0: // Return ideal Type from simple operands. Fail for complex operands. aoqi@0: virtual const Type *type() const; aoqi@0: aoqi@0: // Set an integer offset if we have one, or error otherwise aoqi@0: virtual void set_con( jint c0 ) { ShouldNotReachHere(); } aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: // Return name of operand aoqi@0: virtual const char *Name() const { return "???";} aoqi@0: aoqi@0: // Methods to output the text version of the operand aoqi@0: virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0; aoqi@0: virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0; aoqi@0: aoqi@0: virtual void dump_spec(outputStream *st) const; // Print per-operand info aoqi@0: aoqi@0: // Check whether o is a valid oper. aoqi@0: static bool notAnOper(const MachOper *o) { aoqi@0: if (o == NULL) return true; aoqi@0: if (((intptr_t)o & 1) != 0) return true; aoqi@0: if (*(address*)o == badAddress) return true; // kill by Node::destruct aoqi@0: return false; aoqi@0: } aoqi@0: #endif // !PRODUCT aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachNode--------------------------------------- aoqi@0: // Base type for all machine specific nodes. All node classes generated by the aoqi@0: // ADLC inherit from this class. aoqi@0: class MachNode : public Node { aoqi@0: public: aoqi@0: MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) { aoqi@0: init_class_id(Class_Mach); aoqi@0: } aoqi@0: // Required boilerplate aoqi@0: virtual uint size_of() const { return sizeof(MachNode); } aoqi@0: virtual int Opcode() const; // Always equal to MachNode aoqi@0: virtual uint rule() const = 0; // Machine-specific opcode aoqi@0: // Number of inputs which come before the first operand. aoqi@0: // Generally at least 1, to skip the Control input aoqi@0: virtual uint oper_input_base() const { return 1; } aoqi@0: // Position of constant base node in node's inputs. -1 if aoqi@0: // no constant base node input. aoqi@0: virtual uint mach_constant_base_node_input() const { return (uint)-1; } aoqi@0: aoqi@0: // Copy inputs and operands to new node of instruction. aoqi@0: // Called from cisc_version() and short_branch_version(). aoqi@0: // !!!! The method's body is defined in ad_.cpp file. aoqi@0: void fill_new_machnode(MachNode *n, Compile* C) const; aoqi@0: aoqi@0: // Return an equivalent instruction using memory for cisc_operand position aoqi@0: virtual MachNode *cisc_version(int offset, Compile* C); aoqi@0: // Modify this instruction's register mask to use stack version for cisc_operand aoqi@0: virtual void use_cisc_RegMask(); aoqi@0: aoqi@0: // Support for short branches aoqi@0: bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; } aoqi@0: aoqi@0: // Avoid back to back some instructions on some CPUs. aoqi@0: enum AvoidBackToBackFlag { AVOID_NONE = 0, aoqi@0: AVOID_BEFORE = Flag_avoid_back_to_back_before, aoqi@0: AVOID_AFTER = Flag_avoid_back_to_back_after, aoqi@0: AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER }; aoqi@0: aoqi@0: bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const { aoqi@0: return (flags() & flag_value) == flag_value; aoqi@0: } aoqi@0: aoqi@0: // instruction implemented with a call aoqi@0: bool has_call() const { return (flags() & Flag_has_call) != 0; } aoqi@0: aoqi@0: // First index in _in[] corresponding to operand, or -1 if there is none aoqi@0: int operand_index(uint operand) const; aoqi@0: int operand_index(const MachOper *oper) const; aoqi@0: aoqi@0: // Register class input is expected in aoqi@0: virtual const RegMask &in_RegMask(uint) const; aoqi@0: aoqi@0: // cisc-spillable instructions redefine for use by in_RegMask aoqi@0: virtual const RegMask *cisc_RegMask() const { return NULL; } aoqi@0: aoqi@0: // If this instruction is a 2-address instruction, then return the aoqi@0: // index of the input which must match the output. Not nessecary aoqi@0: // for instructions which bind the input and output register to the aoqi@0: // same singleton regiser (e.g., Intel IDIV which binds AX to be aoqi@0: // both an input and an output). It is nessecary when the input and aoqi@0: // output have choices - but they must use the same choice. aoqi@0: virtual uint two_adr( ) const { return 0; } aoqi@0: aoqi@0: // Array of complex operand pointers. Each corresponds to zero or aoqi@0: // more leafs. Must be set by MachNode constructor to point to an aoqi@0: // internal array of MachOpers. The MachOper array is sized by aoqi@0: // specific MachNodes described in the ADL. aoqi@0: uint _num_opnds; aoqi@0: MachOper **_opnds; aoqi@0: uint num_opnds() const { return _num_opnds; } aoqi@0: aoqi@0: // Emit bytes into cbuf aoqi@0: virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; aoqi@0: // Expand node after register allocation. aoqi@0: // Node is replaced by several nodes in the postalloc expand phase. aoqi@0: // Corresponding methods are generated for nodes if they specify aoqi@0: // postalloc_expand. See block.cpp for more documentation. aoqi@0: virtual bool requires_postalloc_expand() const { return false; } aoqi@0: virtual void postalloc_expand(GrowableArray *nodes, PhaseRegAlloc *ra_); aoqi@0: // Size of instruction in bytes aoqi@0: virtual uint size(PhaseRegAlloc *ra_) const; aoqi@0: // Helper function that computes size by emitting code aoqi@0: virtual uint emit_size(PhaseRegAlloc *ra_) const; aoqi@0: aoqi@0: // Return the alignment required (in units of relocInfo::addr_unit()) aoqi@0: // for this instruction (must be a power of 2) aoqi@0: virtual int alignment_required() const { return 1; } aoqi@0: aoqi@0: // Return the padding (in bytes) to be emitted before this aoqi@0: // instruction to properly align it. aoqi@0: virtual int compute_padding(int current_offset) const { return 0; } aoqi@0: aoqi@0: // Return number of relocatable values contained in this instruction aoqi@0: virtual int reloc() const { return 0; } aoqi@0: aoqi@0: // Return number of words used for double constants in this instruction aoqi@0: virtual int ins_num_consts() const { return 0; } aoqi@0: aoqi@0: // Hash and compare over operands. Used to do GVN on machine Nodes. aoqi@0: virtual uint hash() const; aoqi@0: virtual uint cmp( const Node &n ) const; aoqi@0: aoqi@0: // Expand method for MachNode, replaces nodes representing pseudo aoqi@0: // instructions with a set of nodes which represent real machine aoqi@0: // instructions and compute the same value. aoqi@0: virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; } aoqi@0: aoqi@0: // Bottom_type call; value comes from operand0 aoqi@0: virtual const class Type *bottom_type() const { return _opnds[0]->type(); } aoqi@0: virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : t->ideal_reg(); } aoqi@0: aoqi@0: // If this is a memory op, return the base pointer and fixed offset. aoqi@0: // If there are no such, return NULL. If there are multiple addresses aoqi@0: // or the address is indeterminate (rare cases) then return (Node*)-1, aoqi@0: // which serves as node bottom. aoqi@0: // If the offset is not statically determined, set it to Type::OffsetBot. aoqi@0: // This method is free to ignore stack slots if that helps. aoqi@0: #define TYPE_PTR_SENTINAL ((const TypePtr*)-1) aoqi@0: // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible aoqi@0: const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const; aoqi@0: aoqi@0: // Helper for get_base_and_disp: find the base and index input nodes. aoqi@0: // Returns the MachOper as determined by memory_operand(), for use, if aoqi@0: // needed by the caller. If (MachOper *)-1 is returned, base and index aoqi@0: // are set to NodeSentinel. If (MachOper *) NULL is returned, base and aoqi@0: // index are set to NULL. aoqi@0: const MachOper* memory_inputs(Node* &base, Node* &index) const; aoqi@0: aoqi@0: // Helper for memory_inputs: Which operand carries the necessary info? aoqi@0: // By default, returns NULL, which means there is no such operand. aoqi@0: // If it returns (MachOper*)-1, this means there are multiple memories. aoqi@0: virtual const MachOper* memory_operand() const { return NULL; } aoqi@0: aoqi@0: // Call "get_base_and_disp" to decide which category of memory is used here. aoqi@0: virtual const class TypePtr *adr_type() const; aoqi@0: aoqi@0: // Apply peephole rule(s) to this instruction aoqi@0: virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ); aoqi@0: aoqi@0: // Top-level ideal Opcode matched aoqi@0: virtual int ideal_Opcode() const { return Op_Node; } aoqi@0: aoqi@0: // Adds the label for the case aoqi@0: virtual void add_case_label( int switch_val, Label* blockLabel); aoqi@0: aoqi@0: // Set the absolute address for methods aoqi@0: virtual void method_set( intptr_t addr ); aoqi@0: aoqi@0: // Should we clone rather than spill this instruction? aoqi@0: bool rematerialize() const; aoqi@0: aoqi@0: // Get the pipeline info aoqi@0: static const Pipeline *pipeline_class(); aoqi@0: virtual const Pipeline *pipeline() const; aoqi@0: aoqi@0: // Returns true if this node is a check that can be implemented with a trap. aoqi@0: virtual bool is_TrapBasedCheckNode() const { return false; } aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: virtual const char *Name() const = 0; // Machine-specific name aoqi@0: virtual void dump_spec(outputStream *st) const; // Print per-node info aoqi@0: void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachIdealNode---------------------------- aoqi@0: // Machine specific versions of nodes that must be defined by user. aoqi@0: // These are not converted by matcher from ideal nodes to machine nodes aoqi@0: // but are inserted into the code by the compiler. aoqi@0: class MachIdealNode : public MachNode { aoqi@0: public: aoqi@0: MachIdealNode( ) {} aoqi@0: aoqi@0: // Define the following defaults for non-matched machine nodes aoqi@0: virtual uint oper_input_base() const { return 0; } aoqi@0: virtual uint rule() const { return 9999999; } aoqi@0: virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); } aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachTypeNode---------------------------- aoqi@0: // Machine Nodes that need to retain a known Type. aoqi@0: class MachTypeNode : public MachNode { aoqi@0: virtual uint size_of() const { return sizeof(*this); } // Size is bigger aoqi@0: public: aoqi@0: MachTypeNode( ) {} aoqi@0: const Type *_bottom_type; aoqi@0: aoqi@0: virtual const class Type *bottom_type() const { return _bottom_type; } aoqi@0: #ifndef PRODUCT aoqi@0: virtual void dump_spec(outputStream *st) const; aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachBreakpointNode---------------------------- aoqi@0: // Machine breakpoint or interrupt Node aoqi@0: class MachBreakpointNode : public MachIdealNode { aoqi@0: public: aoqi@0: MachBreakpointNode( ) {} aoqi@0: virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; aoqi@0: virtual uint size(PhaseRegAlloc *ra_) const; aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: virtual const char *Name() const { return "Breakpoint"; } aoqi@0: virtual void format( PhaseRegAlloc *, outputStream *st ) const; aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachConstantBaseNode-------------------------- aoqi@0: // Machine node that represents the base address of the constant table. aoqi@0: class MachConstantBaseNode : public MachIdealNode { aoqi@0: public: aoqi@0: static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask(). aoqi@0: aoqi@0: public: aoqi@0: MachConstantBaseNode() : MachIdealNode() { aoqi@0: init_class_id(Class_MachConstantBase); aoqi@0: } aoqi@0: virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; } aoqi@0: virtual uint ideal_reg() const { return Op_RegP; } aoqi@0: virtual uint oper_input_base() const { return 1; } aoqi@0: aoqi@0: virtual bool requires_postalloc_expand() const; aoqi@0: virtual void postalloc_expand(GrowableArray *nodes, PhaseRegAlloc *ra_); aoqi@0: aoqi@0: virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const; aoqi@0: virtual uint size(PhaseRegAlloc* ra_) const; aoqi@0: virtual bool pinned() const { return UseRDPCForConstantTableBase; } aoqi@0: aoqi@0: static const RegMask& static_out_RegMask() { return _out_RegMask; } aoqi@0: virtual const RegMask& out_RegMask() const { return static_out_RegMask(); } aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: virtual const char* Name() const { return "MachConstantBaseNode"; } aoqi@0: virtual void format(PhaseRegAlloc*, outputStream* st) const; aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachConstantNode------------------------------- aoqi@0: // Machine node that holds a constant which is stored in the constant table. aoqi@0: class MachConstantNode : public MachTypeNode { aoqi@0: protected: aoqi@0: Compile::Constant _constant; // This node's constant. aoqi@0: aoqi@0: public: aoqi@0: MachConstantNode() : MachTypeNode() { aoqi@0: init_class_id(Class_MachConstant); aoqi@0: } aoqi@0: aoqi@0: virtual void eval_constant(Compile* C) { aoqi@0: #ifdef ASSERT aoqi@0: tty->print("missing MachConstantNode eval_constant function: "); aoqi@0: dump(); aoqi@0: #endif aoqi@0: ShouldNotCallThis(); aoqi@0: } aoqi@0: aoqi@0: virtual const RegMask &in_RegMask(uint idx) const { aoqi@0: if (idx == mach_constant_base_node_input()) aoqi@0: return MachConstantBaseNode::static_out_RegMask(); aoqi@0: return MachNode::in_RegMask(idx); aoqi@0: } aoqi@0: aoqi@0: // Input edge of MachConstantBaseNode. aoqi@0: virtual uint mach_constant_base_node_input() const { return req() - 1; } aoqi@0: aoqi@0: int constant_offset(); aoqi@0: int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); } aoqi@0: // Unchecked version to avoid assertions in debug output. aoqi@0: int constant_offset_unchecked() const; aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachUEPNode----------------------------------- aoqi@0: // Machine Unvalidated Entry Point Node aoqi@0: class MachUEPNode : public MachIdealNode { aoqi@0: public: aoqi@0: MachUEPNode( ) {} aoqi@0: virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; aoqi@0: virtual uint size(PhaseRegAlloc *ra_) const; aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: virtual const char *Name() const { return "Unvalidated-Entry-Point"; } aoqi@0: virtual void format( PhaseRegAlloc *, outputStream *st ) const; aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachPrologNode-------------------------------- aoqi@0: // Machine function Prolog Node aoqi@0: class MachPrologNode : public MachIdealNode { aoqi@0: public: aoqi@0: MachPrologNode( ) {} aoqi@0: virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; aoqi@0: virtual uint size(PhaseRegAlloc *ra_) const; aoqi@0: virtual int reloc() const; aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: virtual const char *Name() const { return "Prolog"; } aoqi@0: virtual void format( PhaseRegAlloc *, outputStream *st ) const; aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachEpilogNode-------------------------------- aoqi@0: // Machine function Epilog Node aoqi@0: class MachEpilogNode : public MachIdealNode { aoqi@0: public: aoqi@0: MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {} aoqi@0: virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; aoqi@0: virtual uint size(PhaseRegAlloc *ra_) const; aoqi@0: virtual int reloc() const; aoqi@0: virtual const Pipeline *pipeline() const; aoqi@0: aoqi@0: private: aoqi@0: bool _do_polling; aoqi@0: aoqi@0: public: aoqi@0: bool do_polling() const { return _do_polling; } aoqi@0: aoqi@0: // Offset of safepoint from the beginning of the node aoqi@0: int safepoint_offset() const; aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: virtual const char *Name() const { return "Epilog"; } aoqi@0: virtual void format( PhaseRegAlloc *, outputStream *st ) const; aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachNopNode----------------------------------- aoqi@0: // Machine function Nop Node aoqi@0: class MachNopNode : public MachIdealNode { aoqi@0: private: aoqi@0: int _count; aoqi@0: public: aoqi@0: MachNopNode( ) : _count(1) {} aoqi@0: MachNopNode( int count ) : _count(count) {} aoqi@0: virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; aoqi@0: virtual uint size(PhaseRegAlloc *ra_) const; aoqi@0: aoqi@0: virtual const class Type *bottom_type() const { return Type::CONTROL; } aoqi@0: aoqi@0: virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp aoqi@0: virtual const Pipeline *pipeline() const; aoqi@0: #ifndef PRODUCT aoqi@0: virtual const char *Name() const { return "Nop"; } aoqi@0: virtual void format( PhaseRegAlloc *, outputStream *st ) const; aoqi@0: virtual void dump_spec(outputStream *st) const { } // No per-operand info aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachSpillCopyNode------------------------------ aoqi@0: // Machine SpillCopy Node. Copies 1 or 2 words from any location to any aoqi@0: // location (stack or register). aoqi@0: class MachSpillCopyNode : public MachIdealNode { aoqi@0: const RegMask *_in; // RegMask for input aoqi@0: const RegMask *_out; // RegMask for output aoqi@0: const Type *_type; aoqi@0: public: aoqi@0: MachSpillCopyNode( Node *n, const RegMask &in, const RegMask &out ) : aoqi@0: MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()) { aoqi@0: init_class_id(Class_MachSpillCopy); aoqi@0: init_flags(Flag_is_Copy); aoqi@0: add_req(NULL); aoqi@0: add_req(n); aoqi@0: } aoqi@0: virtual uint size_of() const { return sizeof(*this); } aoqi@0: void set_out_RegMask(const RegMask &out) { _out = &out; } aoqi@0: void set_in_RegMask(const RegMask &in) { _in = ∈ } aoqi@0: virtual const RegMask &out_RegMask() const { return *_out; } aoqi@0: virtual const RegMask &in_RegMask(uint) const { return *_in; } aoqi@0: virtual const class Type *bottom_type() const { return _type; } aoqi@0: virtual uint ideal_reg() const { return _type->ideal_reg(); } aoqi@0: virtual uint oper_input_base() const { return 1; } aoqi@0: uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const; aoqi@0: aoqi@0: virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; aoqi@0: virtual uint size(PhaseRegAlloc *ra_) const; aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: virtual const char *Name() const { return "MachSpillCopy"; } aoqi@0: virtual void format( PhaseRegAlloc *, outputStream *st ) const; aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachBranchNode-------------------------------- aoqi@0: // Abstract machine branch Node aoqi@0: class MachBranchNode : public MachIdealNode { aoqi@0: public: aoqi@0: MachBranchNode() : MachIdealNode() { aoqi@0: init_class_id(Class_MachBranch); aoqi@0: } aoqi@0: virtual void label_set(Label* label, uint block_num) = 0; aoqi@0: virtual void save_label(Label** label, uint* block_num) = 0; aoqi@0: aoqi@0: // Support for short branches aoqi@0: virtual MachNode *short_branch_version(Compile* C) { return NULL; } aoqi@0: aoqi@0: virtual bool pinned() const { return true; }; aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachNullChkNode-------------------------------- aoqi@0: // Machine-dependent null-pointer-check Node. Points a real MachNode that is aoqi@0: // also some kind of memory op. Turns the indicated MachNode into a aoqi@0: // conditional branch with good latency on the ptr-not-null path and awful aoqi@0: // latency on the pointer-is-null path. aoqi@0: aoqi@0: class MachNullCheckNode : public MachBranchNode { aoqi@0: public: aoqi@0: const uint _vidx; // Index of memop being tested aoqi@0: MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) { aoqi@0: init_class_id(Class_MachNullCheck); aoqi@0: add_req(ctrl); aoqi@0: add_req(memop); aoqi@0: } aoqi@0: virtual uint size_of() const { return sizeof(*this); } aoqi@0: aoqi@0: virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; aoqi@0: virtual void label_set(Label* label, uint block_num); aoqi@0: virtual void save_label(Label** label, uint* block_num); aoqi@0: virtual void negate() { } aoqi@0: virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; } aoqi@0: virtual uint ideal_reg() const { return NotAMachineReg; } aoqi@0: virtual const RegMask &in_RegMask(uint) const; aoqi@0: virtual const RegMask &out_RegMask() const { return RegMask::Empty; } aoqi@0: #ifndef PRODUCT aoqi@0: virtual const char *Name() const { return "NullCheck"; } aoqi@0: virtual void format( PhaseRegAlloc *, outputStream *st ) const; aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachProjNode---------------------------------- aoqi@0: // Machine-dependent Ideal projections (how is that for an oxymoron). Really aoqi@0: // just MachNodes made by the Ideal world that replicate simple projections aoqi@0: // but with machine-dependent input & output register masks. Generally aoqi@0: // produced as part of calling conventions. Normally I make MachNodes as part aoqi@0: // of the Matcher process, but the Matcher is ill suited to issues involving aoqi@0: // frame handling, so frame handling is all done in the Ideal world with aoqi@0: // occasional callbacks to the machine model for important info. aoqi@0: class MachProjNode : public ProjNode { aoqi@0: public: aoqi@0: MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) { aoqi@0: init_class_id(Class_MachProj); aoqi@0: } aoqi@0: RegMask _rout; aoqi@0: const uint _ideal_reg; aoqi@0: enum projType { aoqi@0: unmatched_proj = 0, // Projs for Control, I/O, memory not matched aoqi@0: fat_proj = 999 // Projs killing many regs, defined by _rout aoqi@0: }; aoqi@0: virtual int Opcode() const; aoqi@0: virtual const Type *bottom_type() const; aoqi@0: virtual const TypePtr *adr_type() const; aoqi@0: virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; } aoqi@0: virtual const RegMask &out_RegMask() const { return _rout; } aoqi@0: virtual uint ideal_reg() const { return _ideal_reg; } aoqi@0: // Need size_of() for virtual ProjNode::clone() aoqi@0: virtual uint size_of() const { return sizeof(MachProjNode); } aoqi@0: #ifndef PRODUCT aoqi@0: virtual void dump_spec(outputStream *st) const; aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachIfNode------------------------------------- aoqi@0: // Machine-specific versions of IfNodes aoqi@0: class MachIfNode : public MachBranchNode { aoqi@0: virtual uint size_of() const { return sizeof(*this); } // Size is bigger aoqi@0: public: aoqi@0: float _prob; // Probability branch goes either way aoqi@0: float _fcnt; // Frequency counter aoqi@0: MachIfNode() : MachBranchNode() { aoqi@0: init_class_id(Class_MachIf); aoqi@0: } aoqi@0: // Negate conditional branches. aoqi@0: virtual void negate() = 0; aoqi@0: #ifndef PRODUCT aoqi@0: virtual void dump_spec(outputStream *st) const; aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachGotoNode----------------------------------- aoqi@0: // Machine-specific versions of GotoNodes aoqi@0: class MachGotoNode : public MachBranchNode { aoqi@0: public: aoqi@0: MachGotoNode() : MachBranchNode() { aoqi@0: init_class_id(Class_MachGoto); aoqi@0: } aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachFastLockNode------------------------------------- aoqi@0: // Machine-specific versions of FastLockNodes aoqi@0: class MachFastLockNode : public MachNode { aoqi@0: virtual uint size_of() const { return sizeof(*this); } // Size is bigger aoqi@0: public: aoqi@0: BiasedLockingCounters* _counters; aoqi@0: RTMLockingCounters* _rtm_counters; // RTM lock counters for inflated locks aoqi@0: RTMLockingCounters* _stack_rtm_counters; // RTM lock counters for stack locks aoqi@0: MachFastLockNode() : MachNode() {} aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachReturnNode-------------------------------- aoqi@0: // Machine-specific versions of subroutine returns aoqi@0: class MachReturnNode : public MachNode { aoqi@0: virtual uint size_of() const; // Size is bigger aoqi@0: public: aoqi@0: RegMask *_in_rms; // Input register masks, set during allocation aoqi@0: ReallocMark _nesting; // assertion check for reallocations aoqi@0: const TypePtr* _adr_type; // memory effects of call or return aoqi@0: MachReturnNode() : MachNode() { aoqi@0: init_class_id(Class_MachReturn); aoqi@0: _adr_type = TypePtr::BOTTOM; // the default: all of memory aoqi@0: } aoqi@0: aoqi@0: void set_adr_type(const TypePtr* atp) { _adr_type = atp; } aoqi@0: aoqi@0: virtual const RegMask &in_RegMask(uint) const; aoqi@0: virtual bool pinned() const { return true; }; aoqi@0: virtual const TypePtr *adr_type() const; aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachSafePointNode----------------------------- aoqi@0: // Machine-specific versions of safepoints aoqi@0: class MachSafePointNode : public MachReturnNode { aoqi@0: public: aoqi@0: OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC aoqi@0: JVMState* _jvms; // Pointer to list of JVM State Objects aoqi@0: uint _jvmadj; // Extra delta to jvms indexes (mach. args) aoqi@0: OopMap* oop_map() const { return _oop_map; } aoqi@0: void set_oop_map(OopMap* om) { _oop_map = om; } aoqi@0: aoqi@0: MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) { aoqi@0: init_class_id(Class_MachSafePoint); aoqi@0: } aoqi@0: aoqi@0: virtual JVMState* jvms() const { return _jvms; } aoqi@0: void set_jvms(JVMState* s) { aoqi@0: _jvms = s; aoqi@0: } aoqi@0: virtual const Type *bottom_type() const; aoqi@0: aoqi@0: virtual const RegMask &in_RegMask(uint) const; aoqi@0: aoqi@0: // Functionality from old debug nodes aoqi@0: Node *returnadr() const { return in(TypeFunc::ReturnAdr); } aoqi@0: Node *frameptr () const { return in(TypeFunc::FramePtr); } aoqi@0: aoqi@0: Node *local(const JVMState* jvms, uint idx) const { aoqi@0: assert(verify_jvms(jvms), "jvms must match"); aoqi@0: return in(_jvmadj + jvms->locoff() + idx); aoqi@0: } aoqi@0: Node *stack(const JVMState* jvms, uint idx) const { aoqi@0: assert(verify_jvms(jvms), "jvms must match"); aoqi@0: return in(_jvmadj + jvms->stkoff() + idx); aoqi@0: } aoqi@0: Node *monitor_obj(const JVMState* jvms, uint idx) const { aoqi@0: assert(verify_jvms(jvms), "jvms must match"); aoqi@0: return in(_jvmadj + jvms->monitor_obj_offset(idx)); aoqi@0: } aoqi@0: Node *monitor_box(const JVMState* jvms, uint idx) const { aoqi@0: assert(verify_jvms(jvms), "jvms must match"); aoqi@0: return in(_jvmadj + jvms->monitor_box_offset(idx)); aoqi@0: } aoqi@0: void set_local(const JVMState* jvms, uint idx, Node *c) { aoqi@0: assert(verify_jvms(jvms), "jvms must match"); aoqi@0: set_req(_jvmadj + jvms->locoff() + idx, c); aoqi@0: } aoqi@0: void set_stack(const JVMState* jvms, uint idx, Node *c) { aoqi@0: assert(verify_jvms(jvms), "jvms must match"); aoqi@0: set_req(_jvmadj + jvms->stkoff() + idx, c); aoqi@0: } aoqi@0: void set_monitor(const JVMState* jvms, uint idx, Node *c) { aoqi@0: assert(verify_jvms(jvms), "jvms must match"); aoqi@0: set_req(_jvmadj + jvms->monoff() + idx, c); aoqi@0: } aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachCallNode---------------------------------- aoqi@0: // Machine-specific versions of subroutine calls aoqi@0: class MachCallNode : public MachSafePointNode { aoqi@0: protected: aoqi@0: virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash aoqi@0: virtual uint cmp( const Node &n ) const; aoqi@0: virtual uint size_of() const = 0; // Size is bigger aoqi@0: public: aoqi@0: const TypeFunc *_tf; // Function type aoqi@0: address _entry_point; // Address of the method being called aoqi@0: float _cnt; // Estimate of number of times called aoqi@0: uint _argsize; // Size of argument block on stack aoqi@0: aoqi@0: const TypeFunc* tf() const { return _tf; } aoqi@0: const address entry_point() const { return _entry_point; } aoqi@0: const float cnt() const { return _cnt; } aoqi@0: uint argsize() const { return _argsize; } aoqi@0: aoqi@0: void set_tf(const TypeFunc* tf) { _tf = tf; } aoqi@0: void set_entry_point(address p) { _entry_point = p; } aoqi@0: void set_cnt(float c) { _cnt = c; } aoqi@0: void set_argsize(int s) { _argsize = s; } aoqi@0: aoqi@0: MachCallNode() : MachSafePointNode() { aoqi@0: init_class_id(Class_MachCall); aoqi@0: } aoqi@0: aoqi@0: virtual const Type *bottom_type() const; aoqi@0: virtual bool pinned() const { return false; } aoqi@0: virtual const Type *Value( PhaseTransform *phase ) const; aoqi@0: virtual const RegMask &in_RegMask(uint) const; aoqi@0: virtual int ret_addr_offset() { return 0; } aoqi@0: aoqi@0: bool returns_long() const { return tf()->return_type() == T_LONG; } aoqi@0: bool return_value_is_used() const; aoqi@0: #ifndef PRODUCT aoqi@0: virtual void dump_spec(outputStream *st) const; aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachCallJavaNode------------------------------ aoqi@0: // "Base" class for machine-specific versions of subroutine calls aoqi@0: class MachCallJavaNode : public MachCallNode { aoqi@0: protected: aoqi@0: virtual uint cmp( const Node &n ) const; aoqi@0: virtual uint size_of() const; // Size is bigger aoqi@0: public: aoqi@0: ciMethod* _method; // Method being direct called aoqi@0: int _bci; // Byte Code index of call byte code aoqi@0: bool _optimized_virtual; // Tells if node is a static call or an optimized virtual aoqi@0: bool _method_handle_invoke; // Tells if the call has to preserve SP aoqi@0: MachCallJavaNode() : MachCallNode() { aoqi@0: init_class_id(Class_MachCallJava); aoqi@0: } aoqi@0: aoqi@0: virtual const RegMask &in_RegMask(uint) const; aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: virtual void dump_spec(outputStream *st) const; aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachCallStaticJavaNode------------------------ aoqi@0: // Machine-specific versions of monomorphic subroutine calls aoqi@0: class MachCallStaticJavaNode : public MachCallJavaNode { aoqi@0: virtual uint cmp( const Node &n ) const; aoqi@0: virtual uint size_of() const; // Size is bigger aoqi@0: public: aoqi@0: const char *_name; // Runtime wrapper name aoqi@0: MachCallStaticJavaNode() : MachCallJavaNode() { aoqi@0: init_class_id(Class_MachCallStaticJava); aoqi@0: } aoqi@0: aoqi@0: // If this is an uncommon trap, return the request code, else zero. aoqi@0: int uncommon_trap_request() const; aoqi@0: aoqi@0: virtual int ret_addr_offset(); aoqi@0: #ifndef PRODUCT aoqi@0: virtual void dump_spec(outputStream *st) const; aoqi@0: void dump_trap_args(outputStream *st) const; aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachCallDynamicJavaNode------------------------ aoqi@0: // Machine-specific versions of possibly megamorphic subroutine calls aoqi@0: class MachCallDynamicJavaNode : public MachCallJavaNode { aoqi@0: public: aoqi@0: int _vtable_index; aoqi@0: MachCallDynamicJavaNode() : MachCallJavaNode() { aoqi@0: init_class_id(Class_MachCallDynamicJava); aoqi@0: DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized aoqi@0: } aoqi@0: virtual int ret_addr_offset(); aoqi@0: #ifndef PRODUCT aoqi@0: virtual void dump_spec(outputStream *st) const; aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachCallRuntimeNode---------------------------- aoqi@0: // Machine-specific versions of subroutine calls aoqi@0: class MachCallRuntimeNode : public MachCallNode { aoqi@0: virtual uint cmp( const Node &n ) const; aoqi@0: virtual uint size_of() const; // Size is bigger aoqi@0: public: aoqi@0: const char *_name; // Printable name, if _method is NULL aoqi@0: MachCallRuntimeNode() : MachCallNode() { aoqi@0: init_class_id(Class_MachCallRuntime); aoqi@0: } aoqi@0: virtual int ret_addr_offset(); aoqi@0: #ifndef PRODUCT aoqi@0: virtual void dump_spec(outputStream *st) const; aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: class MachCallLeafNode: public MachCallRuntimeNode { aoqi@0: public: aoqi@0: MachCallLeafNode() : MachCallRuntimeNode() { aoqi@0: init_class_id(Class_MachCallLeaf); aoqi@0: } aoqi@0: }; aoqi@0: aoqi@0: //------------------------------MachHaltNode----------------------------------- aoqi@0: // Machine-specific versions of halt nodes aoqi@0: class MachHaltNode : public MachReturnNode { aoqi@0: public: aoqi@0: virtual JVMState* jvms() const; aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: //------------------------------MachTempNode----------------------------------- aoqi@0: // Node used by the adlc to construct inputs to represent temporary registers aoqi@0: class MachTempNode : public MachNode { aoqi@0: private: aoqi@0: MachOper *_opnd_array[1]; aoqi@0: aoqi@0: public: aoqi@0: virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); } aoqi@0: virtual uint rule() const { return 9999999; } aoqi@0: virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {} aoqi@0: aoqi@0: MachTempNode(MachOper* oper) { aoqi@0: init_class_id(Class_MachTemp); aoqi@0: _num_opnds = 1; aoqi@0: _opnds = _opnd_array; aoqi@0: add_req(NULL); aoqi@0: _opnds[0] = oper; aoqi@0: } aoqi@0: virtual uint size_of() const { return sizeof(MachTempNode); } aoqi@0: aoqi@0: #ifndef PRODUCT aoqi@0: virtual void format(PhaseRegAlloc *, outputStream *st ) const {} aoqi@0: virtual const char *Name() const { return "MachTemp";} aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: aoqi@0: //------------------------------labelOper-------------------------------------- aoqi@0: // Machine-independent version of label operand aoqi@0: class labelOper : public MachOper { aoqi@0: private: aoqi@0: virtual uint num_edges() const { return 0; } aoqi@0: public: aoqi@0: // Supported for fixed size branches aoqi@0: Label* _label; // Label for branch(es) aoqi@0: aoqi@0: uint _block_num; aoqi@0: aoqi@0: labelOper() : _block_num(0), _label(0) {} aoqi@0: aoqi@0: labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {} aoqi@0: aoqi@0: labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {} aoqi@0: aoqi@0: virtual MachOper *clone(Compile* C) const; aoqi@0: aoqi@0: virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; } aoqi@0: aoqi@0: virtual uint opcode() const; aoqi@0: aoqi@0: virtual uint hash() const; aoqi@0: virtual uint cmp( const MachOper &oper ) const; aoqi@0: #ifndef PRODUCT aoqi@0: virtual const char *Name() const { return "Label";} aoqi@0: aoqi@0: virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; aoqi@0: virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: //------------------------------methodOper-------------------------------------- aoqi@0: // Machine-independent version of method operand aoqi@0: class methodOper : public MachOper { aoqi@0: private: aoqi@0: virtual uint num_edges() const { return 0; } aoqi@0: public: aoqi@0: intptr_t _method; // Address of method aoqi@0: methodOper() : _method(0) {} aoqi@0: methodOper(intptr_t method) : _method(method) {} aoqi@0: aoqi@0: virtual MachOper *clone(Compile* C) const; aoqi@0: aoqi@0: virtual intptr_t method() const { return _method; } aoqi@0: aoqi@0: virtual uint opcode() const; aoqi@0: aoqi@0: virtual uint hash() const; aoqi@0: virtual uint cmp( const MachOper &oper ) const; aoqi@0: #ifndef PRODUCT aoqi@0: virtual const char *Name() const { return "Method";} aoqi@0: aoqi@0: virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; aoqi@0: virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: #endif // SHARE_VM_OPTO_MACHNODE_HPP