aoqi@0: /* aoqi@0: * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. aoqi@0: * Copyright 2012, 2013 SAP AG. All rights reserved. aoqi@0: * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. aoqi@0: * aoqi@0: * This code is free software; you can redistribute it and/or modify it aoqi@0: * under the terms of the GNU General Public License version 2 only, as aoqi@0: * published by the Free Software Foundation. aoqi@0: * aoqi@0: * This code is distributed in the hope that it will be useful, but WITHOUT aoqi@0: * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or aoqi@0: * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License aoqi@0: * version 2 for more details (a copy is included in the LICENSE file that aoqi@0: * accompanied this code). aoqi@0: * aoqi@0: * You should have received a copy of the GNU General Public License version aoqi@0: * 2 along with this work; if not, write to the Free Software Foundation, aoqi@0: * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. aoqi@0: * aoqi@0: * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA aoqi@0: * or visit www.oracle.com if you need additional information or have any aoqi@0: * questions. aoqi@0: * aoqi@0: */ aoqi@0: aoqi@0: #ifndef OS_CPU_AIX_OJDKPPC_VM_ORDERACCESS_AIX_PPC_INLINE_HPP aoqi@0: #define OS_CPU_AIX_OJDKPPC_VM_ORDERACCESS_AIX_PPC_INLINE_HPP aoqi@0: aoqi@0: #include "runtime/orderAccess.hpp" aoqi@0: #include "vm_version_ppc.hpp" aoqi@0: aoqi@0: // Implementation of class OrderAccess. aoqi@0: aoqi@0: // aoqi@0: // Machine barrier instructions: aoqi@0: // aoqi@0: // - sync Two-way memory barrier, aka fence. aoqi@0: // - lwsync orders Store|Store, aoqi@0: // Load|Store, aoqi@0: // Load|Load, aoqi@0: // but not Store|Load aoqi@0: // - eieio orders Store|Store aoqi@0: // - isync Invalidates speculatively executed instructions, aoqi@0: // but isync may complete before storage accesses aoqi@0: // associated with instructions preceding isync have aoqi@0: // been performed. aoqi@0: // aoqi@0: // Semantic barrier instructions: aoqi@0: // (as defined in orderAccess.hpp) aoqi@0: // aoqi@0: // - release orders Store|Store, (maps to lwsync) aoqi@0: // Load|Store aoqi@0: // - acquire orders Load|Store, (maps to lwsync) aoqi@0: // Load|Load aoqi@0: // - fence orders Store|Store, (maps to sync) aoqi@0: // Load|Store, aoqi@0: // Load|Load, aoqi@0: // Store|Load aoqi@0: // aoqi@0: aoqi@0: #define inlasm_sync() __asm__ __volatile__ ("sync" : : : "memory"); aoqi@0: #define inlasm_lwsync() __asm__ __volatile__ ("lwsync" : : : "memory"); aoqi@0: #define inlasm_eieio() __asm__ __volatile__ ("eieio" : : : "memory"); aoqi@0: #define inlasm_isync() __asm__ __volatile__ ("isync" : : : "memory"); aoqi@0: #define inlasm_release() inlasm_lwsync(); aoqi@0: #define inlasm_acquire() inlasm_lwsync(); aoqi@0: // Use twi-isync for load_acquire (faster than lwsync). aoqi@0: // ATTENTION: seems like xlC 10.1 has problems with this inline assembler macro (VerifyMethodHandles found "bad vminfo in AMH.conv"): aoqi@0: // #define inlasm_acquire_reg(X) __asm__ __volatile__ ("twi 0,%0,0\n isync\n" : : "r" (X) : "memory"); aoqi@0: #define inlasm_acquire_reg(X) inlasm_lwsync(); aoqi@0: #define inlasm_fence() inlasm_sync(); aoqi@0: aoqi@0: inline void OrderAccess::loadload() { inlasm_lwsync(); } aoqi@0: inline void OrderAccess::storestore() { inlasm_lwsync(); } aoqi@0: inline void OrderAccess::loadstore() { inlasm_lwsync(); } aoqi@0: inline void OrderAccess::storeload() { inlasm_fence(); } aoqi@0: aoqi@0: inline void OrderAccess::acquire() { inlasm_acquire(); } aoqi@0: inline void OrderAccess::release() { inlasm_release(); } aoqi@0: inline void OrderAccess::fence() { inlasm_fence(); } aoqi@0: aoqi@0: inline jbyte OrderAccess::load_acquire(volatile jbyte* p) { register jbyte t = *p; inlasm_acquire_reg(t); return t; } aoqi@0: inline jshort OrderAccess::load_acquire(volatile jshort* p) { register jshort t = *p; inlasm_acquire_reg(t); return t; } aoqi@0: inline jint OrderAccess::load_acquire(volatile jint* p) { register jint t = *p; inlasm_acquire_reg(t); return t; } aoqi@0: inline jlong OrderAccess::load_acquire(volatile jlong* p) { register jlong t = *p; inlasm_acquire_reg(t); return t; } aoqi@0: inline jubyte OrderAccess::load_acquire(volatile jubyte* p) { register jubyte t = *p; inlasm_acquire_reg(t); return t; } aoqi@0: inline jushort OrderAccess::load_acquire(volatile jushort* p) { register jushort t = *p; inlasm_acquire_reg(t); return t; } aoqi@0: inline juint OrderAccess::load_acquire(volatile juint* p) { register juint t = *p; inlasm_acquire_reg(t); return t; } aoqi@0: inline julong OrderAccess::load_acquire(volatile julong* p) { return (julong)load_acquire((volatile jlong*)p); } aoqi@0: inline jfloat OrderAccess::load_acquire(volatile jfloat* p) { register jfloat t = *p; inlasm_acquire(); return t; } aoqi@0: inline jdouble OrderAccess::load_acquire(volatile jdouble* p) { register jdouble t = *p; inlasm_acquire(); return t; } aoqi@0: aoqi@0: inline intptr_t OrderAccess::load_ptr_acquire(volatile intptr_t* p) { return (intptr_t)load_acquire((volatile jlong*)p); } aoqi@0: inline void* OrderAccess::load_ptr_acquire(volatile void* p) { return (void*) load_acquire((volatile jlong*)p); } aoqi@0: inline void* OrderAccess::load_ptr_acquire(const volatile void* p) { return (void*) load_acquire((volatile jlong*)p); } aoqi@0: aoqi@0: inline void OrderAccess::release_store(volatile jbyte* p, jbyte v) { inlasm_release(); *p = v; } aoqi@0: inline void OrderAccess::release_store(volatile jshort* p, jshort v) { inlasm_release(); *p = v; } aoqi@0: inline void OrderAccess::release_store(volatile jint* p, jint v) { inlasm_release(); *p = v; } aoqi@0: inline void OrderAccess::release_store(volatile jlong* p, jlong v) { inlasm_release(); *p = v; } aoqi@0: inline void OrderAccess::release_store(volatile jubyte* p, jubyte v) { inlasm_release(); *p = v; } aoqi@0: inline void OrderAccess::release_store(volatile jushort* p, jushort v) { inlasm_release(); *p = v; } aoqi@0: inline void OrderAccess::release_store(volatile juint* p, juint v) { inlasm_release(); *p = v; } aoqi@0: inline void OrderAccess::release_store(volatile julong* p, julong v) { inlasm_release(); *p = v; } aoqi@0: inline void OrderAccess::release_store(volatile jfloat* p, jfloat v) { inlasm_release(); *p = v; } aoqi@0: inline void OrderAccess::release_store(volatile jdouble* p, jdouble v) { inlasm_release(); *p = v; } aoqi@0: aoqi@0: inline void OrderAccess::release_store_ptr(volatile intptr_t* p, intptr_t v) { inlasm_release(); *p = v; } aoqi@0: inline void OrderAccess::release_store_ptr(volatile void* p, void* v) { inlasm_release(); *(void* volatile *)p = v; } aoqi@0: aoqi@0: inline void OrderAccess::store_fence(jbyte* p, jbyte v) { *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::store_fence(jshort* p, jshort v) { *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::store_fence(jint* p, jint v) { *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::store_fence(jlong* p, jlong v) { *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::store_fence(jubyte* p, jubyte v) { *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::store_fence(jushort* p, jushort v) { *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::store_fence(juint* p, juint v) { *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::store_fence(julong* p, julong v) { *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::store_fence(jfloat* p, jfloat v) { *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::store_fence(jdouble* p, jdouble v) { *p = v; inlasm_fence(); } aoqi@0: aoqi@0: inline void OrderAccess::store_ptr_fence(intptr_t* p, intptr_t v) { *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::store_ptr_fence(void** p, void* v) { *p = v; inlasm_fence(); } aoqi@0: aoqi@0: inline void OrderAccess::release_store_fence(volatile jbyte* p, jbyte v) { inlasm_release(); *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::release_store_fence(volatile jshort* p, jshort v) { inlasm_release(); *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::release_store_fence(volatile jint* p, jint v) { inlasm_release(); *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::release_store_fence(volatile jlong* p, jlong v) { inlasm_release(); *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::release_store_fence(volatile jubyte* p, jubyte v) { inlasm_release(); *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::release_store_fence(volatile jushort* p, jushort v) { inlasm_release(); *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::release_store_fence(volatile juint* p, juint v) { inlasm_release(); *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::release_store_fence(volatile julong* p, julong v) { inlasm_release(); *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::release_store_fence(volatile jfloat* p, jfloat v) { inlasm_release(); *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::release_store_fence(volatile jdouble* p, jdouble v) { inlasm_release(); *p = v; inlasm_fence(); } aoqi@0: aoqi@0: inline void OrderAccess::release_store_ptr_fence(volatile intptr_t* p, intptr_t v) { inlasm_release(); *p = v; inlasm_fence(); } aoqi@0: inline void OrderAccess::release_store_ptr_fence(volatile void* p, void* v) { inlasm_release(); *(void* volatile *)p = v; inlasm_fence(); } aoqi@0: aoqi@0: #undef inlasm_sync aoqi@0: #undef inlasm_lwsync aoqi@0: #undef inlasm_eieio aoqi@0: #undef inlasm_isync aoqi@0: #undef inlasm_release aoqi@0: #undef inlasm_acquire aoqi@0: #undef inlasm_fence aoqi@0: aoqi@0: #endif // OS_CPU_AIX_OJDKPPC_VM_ORDERACCESS_AIX_PPC_INLINE_HPP