aoqi@0: /*
aoqi@0:  * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
aoqi@0:  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aoqi@0:  *
aoqi@0:  * This code is free software; you can redistribute it and/or modify it
aoqi@0:  * under the terms of the GNU General Public License version 2 only, as
aoqi@0:  * published by the Free Software Foundation.
aoqi@0:  *
aoqi@0:  * This code is distributed in the hope that it will be useful, but WITHOUT
aoqi@0:  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aoqi@0:  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
aoqi@0:  * version 2 for more details (a copy is included in the LICENSE file that
aoqi@0:  * accompanied this code).
aoqi@0:  *
aoqi@0:  * You should have received a copy of the GNU General Public License version
aoqi@0:  * 2 along with this work; if not, write to the Free Software Foundation,
aoqi@0:  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aoqi@0:  *
aoqi@0:  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aoqi@0:  * or visit www.oracle.com if you need additional information or have any
aoqi@0:  * questions.
aoqi@0:  *
aoqi@0:  */
aoqi@0: 
aoqi@0: #ifndef CPU_X86_VM_C1_DEFS_X86_HPP
aoqi@0: #define CPU_X86_VM_C1_DEFS_X86_HPP
aoqi@0: 
aoqi@0: // native word offsets from memory address (little endian)
aoqi@0: enum {
aoqi@0:   pd_lo_word_offset_in_bytes = 0,
aoqi@0:   pd_hi_word_offset_in_bytes = BytesPerWord
aoqi@0: };
aoqi@0: 
aoqi@0: // explicit rounding operations are required to implement the strictFP mode
aoqi@0: enum {
aoqi@0:   pd_strict_fp_requires_explicit_rounding = true
aoqi@0: };
aoqi@0: 
aoqi@0: 
aoqi@0: // registers
aoqi@0: enum {
aoqi@0:   pd_nof_cpu_regs_frame_map = RegisterImpl::number_of_registers,       // number of registers used during code emission
aoqi@0:   pd_nof_fpu_regs_frame_map = FloatRegisterImpl::number_of_registers,  // number of registers used during code emission
aoqi@0:   pd_nof_xmm_regs_frame_map = XMMRegisterImpl::number_of_registers,    // number of registers used during code emission
aoqi@0: 
aoqi@0: #ifdef _LP64
aoqi@0:   #define UNALLOCATED 4    // rsp, rbp, r15, r10
aoqi@0: #else
aoqi@0:   #define UNALLOCATED 2    // rsp, rbp
aoqi@0: #endif // LP64
aoqi@0: 
aoqi@0:   pd_nof_caller_save_cpu_regs_frame_map = pd_nof_cpu_regs_frame_map - UNALLOCATED,  // number of registers killed by calls
aoqi@0:   pd_nof_caller_save_fpu_regs_frame_map = pd_nof_fpu_regs_frame_map,  // number of registers killed by calls
aoqi@0:   pd_nof_caller_save_xmm_regs_frame_map = pd_nof_xmm_regs_frame_map,  // number of registers killed by calls
aoqi@0: 
aoqi@0:   pd_nof_cpu_regs_reg_alloc = pd_nof_caller_save_cpu_regs_frame_map,  // number of registers that are visible to register allocator
aoqi@0:   pd_nof_fpu_regs_reg_alloc = 6,  // number of registers that are visible to register allocator
aoqi@0: 
aoqi@0:   pd_nof_cpu_regs_linearscan = pd_nof_cpu_regs_frame_map, // number of registers visible to linear scan
aoqi@0:   pd_nof_fpu_regs_linearscan = pd_nof_fpu_regs_frame_map, // number of registers visible to linear scan
aoqi@0:   pd_nof_xmm_regs_linearscan = pd_nof_xmm_regs_frame_map, // number of registers visible to linear scan
aoqi@0:   pd_first_cpu_reg = 0,
aoqi@0:   pd_last_cpu_reg = NOT_LP64(5) LP64_ONLY(11),
aoqi@0:   pd_first_byte_reg = NOT_LP64(2) LP64_ONLY(0),
aoqi@0:   pd_last_byte_reg = NOT_LP64(5) LP64_ONLY(11),
aoqi@0:   pd_first_fpu_reg = pd_nof_cpu_regs_frame_map,
aoqi@0:   pd_last_fpu_reg =  pd_first_fpu_reg + 7,
aoqi@0:   pd_first_xmm_reg = pd_nof_cpu_regs_frame_map + pd_nof_fpu_regs_frame_map,
aoqi@0:   pd_last_xmm_reg =  pd_first_xmm_reg + pd_nof_xmm_regs_frame_map - 1
aoqi@0: };
aoqi@0: 
aoqi@0: 
aoqi@0: // encoding of float value in debug info:
aoqi@0: enum {
aoqi@0:   pd_float_saved_as_double = true
aoqi@0: };
aoqi@0: 
aoqi@0: #endif // CPU_X86_VM_C1_DEFS_X86_HPP