duke@435: /*
dlong@7598:  * Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved.
duke@435:  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435:  *
duke@435:  * This code is free software; you can redistribute it and/or modify it
duke@435:  * under the terms of the GNU General Public License version 2 only, as
duke@435:  * published by the Free Software Foundation.
duke@435:  *
duke@435:  * This code is distributed in the hope that it will be useful, but WITHOUT
duke@435:  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435:  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
duke@435:  * version 2 for more details (a copy is included in the LICENSE file that
duke@435:  * accompanied this code).
duke@435:  *
duke@435:  * You should have received a copy of the GNU General Public License version
duke@435:  * 2 along with this work; if not, write to the Free Software Foundation,
duke@435:  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435:  *
trims@1907:  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907:  * or visit www.oracle.com if you need additional information or have any
trims@1907:  * questions.
duke@435:  *
duke@435:  */
duke@435: 
stefank@2314: #include "precompiled.hpp"
stefank@2314: #include "c1/c1_CFGPrinter.hpp"
stefank@2314: #include "c1/c1_CodeStubs.hpp"
stefank@2314: #include "c1/c1_Compilation.hpp"
stefank@2314: #include "c1/c1_FrameMap.hpp"
stefank@2314: #include "c1/c1_IR.hpp"
stefank@2314: #include "c1/c1_LIRGenerator.hpp"
stefank@2314: #include "c1/c1_LinearScan.hpp"
stefank@2314: #include "c1/c1_ValueStack.hpp"
stefank@2314: #include "utilities/bitMap.inline.hpp"
stefank@2314: #ifdef TARGET_ARCH_x86
stefank@2314: # include "vmreg_x86.inline.hpp"
stefank@2314: #endif
stefank@2314: #ifdef TARGET_ARCH_sparc
stefank@2314: # include "vmreg_sparc.inline.hpp"
stefank@2314: #endif
stefank@2314: #ifdef TARGET_ARCH_zero
stefank@2314: # include "vmreg_zero.inline.hpp"
stefank@2314: #endif
bobv@2508: #ifdef TARGET_ARCH_arm
bobv@2508: # include "vmreg_arm.inline.hpp"
bobv@2508: #endif
bobv@2508: #ifdef TARGET_ARCH_ppc
bobv@2508: # include "vmreg_ppc.inline.hpp"
bobv@2508: #endif
duke@435: 
duke@435: 
duke@435: #ifndef PRODUCT
duke@435: 
duke@435:   static LinearScanStatistic _stat_before_alloc;
duke@435:   static LinearScanStatistic _stat_after_asign;
duke@435:   static LinearScanStatistic _stat_final;
duke@435: 
duke@435:   static LinearScanTimers _total_timer;
duke@435: 
duke@435:   // helper macro for short definition of timer
duke@435:   #define TIME_LINEAR_SCAN(timer_name)  TraceTime _block_timer("", _total_timer.timer(LinearScanTimers::timer_name), TimeLinearScan || TimeEachLinearScan, Verbose);
duke@435: 
duke@435:   // helper macro for short definition of trace-output inside code
duke@435:   #define TRACE_LINEAR_SCAN(level, code)       \
duke@435:     if (TraceLinearScanLevel >= level) {       \
duke@435:       code;                                    \
duke@435:     }
duke@435: 
duke@435: #else
duke@435: 
duke@435:   #define TIME_LINEAR_SCAN(timer_name)
duke@435:   #define TRACE_LINEAR_SCAN(level, code)
duke@435: 
duke@435: #endif
duke@435: 
duke@435: // Map BasicType to spill size in 32-bit words, matching VMReg's notion of words
duke@435: #ifdef _LP64
iveresov@5994: static int type2spill_size[T_CONFLICT+1]={ -1, 0, 0, 0, 1, 1, 1, 2, 1, 1, 1, 2, 2, 2, 0, 2,  1, 2, 1, -1};
duke@435: #else
iveresov@5994: static int type2spill_size[T_CONFLICT+1]={ -1, 0, 0, 0, 1, 1, 1, 2, 1, 1, 1, 2, 1, 1, 0, 1, -1, 1, 1, -1};
duke@435: #endif
duke@435: 
duke@435: 
duke@435: // Implementation of LinearScan
duke@435: 
duke@435: LinearScan::LinearScan(IR* ir, LIRGenerator* gen, FrameMap* frame_map)
duke@435:  : _compilation(ir->compilation())
duke@435:  , _ir(ir)
duke@435:  , _gen(gen)
duke@435:  , _frame_map(frame_map)
duke@435:  , _num_virtual_regs(gen->max_virtual_register_number())
duke@435:  , _has_fpu_registers(false)
duke@435:  , _num_calls(-1)
duke@435:  , _max_spills(0)
duke@435:  , _unused_spill_slot(-1)
duke@435:  , _intervals(0)   // initialized later with correct length
duke@435:  , _new_intervals_from_allocation(new IntervalList())
duke@435:  , _sorted_intervals(NULL)
never@2404:  , _needs_full_resort(false)
duke@435:  , _lir_ops(0)     // initialized later with correct length
duke@435:  , _block_of_op(0) // initialized later with correct length
duke@435:  , _has_info(0)
duke@435:  , _has_call(0)
duke@435:  , _scope_value_cache(0) // initialized later with correct length
duke@435:  , _interval_in_loop(0, 0) // initialized later with correct length
duke@435:  , _cached_blocks(*ir->linear_scan_order())
never@739: #ifdef X86
duke@435:  , _fpu_stack_allocator(NULL)
duke@435: #endif
duke@435: {
duke@435:   assert(this->ir() != NULL,          "check if valid");
duke@435:   assert(this->compilation() != NULL, "check if valid");
duke@435:   assert(this->gen() != NULL,         "check if valid");
duke@435:   assert(this->frame_map() != NULL,   "check if valid");
duke@435: }
duke@435: 
duke@435: 
duke@435: // ********** functions for converting LIR-Operands to register numbers
duke@435: //
duke@435: // Emulate a flat register file comprising physical integer registers,
duke@435: // physical floating-point registers and virtual registers, in that order.
duke@435: // Virtual registers already have appropriate numbers, since V0 is
duke@435: // the number of physical registers.
duke@435: // Returns -1 for hi word if opr is a single word operand.
duke@435: //
duke@435: // Note: the inverse operation (calculating an operand for register numbers)
duke@435: //       is done in calc_operand_for_interval()
duke@435: 
duke@435: int LinearScan::reg_num(LIR_Opr opr) {
duke@435:   assert(opr->is_register(), "should not call this otherwise");
duke@435: 
duke@435:   if (opr->is_virtual_register()) {
duke@435:     assert(opr->vreg_number() >= nof_regs, "found a virtual register with a fixed-register number");
duke@435:     return opr->vreg_number();
duke@435:   } else if (opr->is_single_cpu()) {
duke@435:     return opr->cpu_regnr();
duke@435:   } else if (opr->is_double_cpu()) {
duke@435:     return opr->cpu_regnrLo();
never@739: #ifdef X86
duke@435:   } else if (opr->is_single_xmm()) {
duke@435:     return opr->fpu_regnr() + pd_first_xmm_reg;
duke@435:   } else if (opr->is_double_xmm()) {
duke@435:     return opr->fpu_regnrLo() + pd_first_xmm_reg;
duke@435: #endif
duke@435:   } else if (opr->is_single_fpu()) {
duke@435:     return opr->fpu_regnr() + pd_first_fpu_reg;
duke@435:   } else if (opr->is_double_fpu()) {
duke@435:     return opr->fpu_regnrLo() + pd_first_fpu_reg;
duke@435:   } else {
duke@435:     ShouldNotReachHere();
never@739:     return -1;
duke@435:   }
duke@435: }
duke@435: 
duke@435: int LinearScan::reg_numHi(LIR_Opr opr) {
duke@435:   assert(opr->is_register(), "should not call this otherwise");
duke@435: 
duke@435:   if (opr->is_virtual_register()) {
duke@435:     return -1;
duke@435:   } else if (opr->is_single_cpu()) {
duke@435:     return -1;
duke@435:   } else if (opr->is_double_cpu()) {
duke@435:     return opr->cpu_regnrHi();
never@739: #ifdef X86
duke@435:   } else if (opr->is_single_xmm()) {
duke@435:     return -1;
duke@435:   } else if (opr->is_double_xmm()) {
duke@435:     return -1;
duke@435: #endif
duke@435:   } else if (opr->is_single_fpu()) {
duke@435:     return -1;
duke@435:   } else if (opr->is_double_fpu()) {
duke@435:     return opr->fpu_regnrHi() + pd_first_fpu_reg;
duke@435:   } else {
duke@435:     ShouldNotReachHere();
never@739:     return -1;
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: // ********** functions for classification of intervals
duke@435: 
duke@435: bool LinearScan::is_precolored_interval(const Interval* i) {
duke@435:   return i->reg_num() < LinearScan::nof_regs;
duke@435: }
duke@435: 
duke@435: bool LinearScan::is_virtual_interval(const Interval* i) {
duke@435:   return i->reg_num() >= LIR_OprDesc::vreg_base;
duke@435: }
duke@435: 
duke@435: bool LinearScan::is_precolored_cpu_interval(const Interval* i) {
duke@435:   return i->reg_num() < LinearScan::nof_cpu_regs;
duke@435: }
duke@435: 
duke@435: bool LinearScan::is_virtual_cpu_interval(const Interval* i) {
bobv@2036: #if defined(__SOFTFP__) || defined(E500V2)
bobv@2036:   return i->reg_num() >= LIR_OprDesc::vreg_base;
bobv@2036: #else
duke@435:   return i->reg_num() >= LIR_OprDesc::vreg_base && (i->type() != T_FLOAT && i->type() != T_DOUBLE);
bobv@2036: #endif // __SOFTFP__ or E500V2
duke@435: }
duke@435: 
duke@435: bool LinearScan::is_precolored_fpu_interval(const Interval* i) {
duke@435:   return i->reg_num() >= LinearScan::nof_cpu_regs && i->reg_num() < LinearScan::nof_regs;
duke@435: }
duke@435: 
duke@435: bool LinearScan::is_virtual_fpu_interval(const Interval* i) {
bobv@2036: #if defined(__SOFTFP__) || defined(E500V2)
bobv@2036:   return false;
bobv@2036: #else
duke@435:   return i->reg_num() >= LIR_OprDesc::vreg_base && (i->type() == T_FLOAT || i->type() == T_DOUBLE);
bobv@2036: #endif // __SOFTFP__ or E500V2
duke@435: }
duke@435: 
duke@435: bool LinearScan::is_in_fpu_register(const Interval* i) {
duke@435:   // fixed intervals not needed for FPU stack allocation
duke@435:   return i->reg_num() >= nof_regs && pd_first_fpu_reg <= i->assigned_reg() && i->assigned_reg() <= pd_last_fpu_reg;
duke@435: }
duke@435: 
duke@435: bool LinearScan::is_oop_interval(const Interval* i) {
duke@435:   // fixed intervals never contain oops
duke@435:   return i->reg_num() >= nof_regs && i->type() == T_OBJECT;
duke@435: }
duke@435: 
duke@435: 
duke@435: // ********** General helper functions
duke@435: 
duke@435: // compute next unused stack index that can be used for spilling
duke@435: int LinearScan::allocate_spill_slot(bool double_word) {
duke@435:   int spill_slot;
duke@435:   if (double_word) {
duke@435:     if ((_max_spills & 1) == 1) {
duke@435:       // alignment of double-word values
duke@435:       // the hole because of the alignment is filled with the next single-word value
duke@435:       assert(_unused_spill_slot == -1, "wasting a spill slot");
duke@435:       _unused_spill_slot = _max_spills;
duke@435:       _max_spills++;
duke@435:     }
duke@435:     spill_slot = _max_spills;
duke@435:     _max_spills += 2;
duke@435: 
duke@435:   } else if (_unused_spill_slot != -1) {
duke@435:     // re-use hole that was the result of a previous double-word alignment
duke@435:     spill_slot = _unused_spill_slot;
duke@435:     _unused_spill_slot = -1;
duke@435: 
duke@435:   } else {
duke@435:     spill_slot = _max_spills;
duke@435:     _max_spills++;
duke@435:   }
duke@435: 
duke@435:   int result = spill_slot + LinearScan::nof_regs + frame_map()->argcount();
duke@435: 
duke@435:   // the class OopMapValue uses only 11 bits for storing the name of the
duke@435:   // oop location. So a stack slot bigger than 2^11 leads to an overflow
duke@435:   // that is not reported in product builds. Prevent this by checking the
duke@435:   // spill slot here (altough this value and the later used location name
duke@435:   // are slightly different)
duke@435:   if (result > 2000) {
duke@435:     bailout("too many stack slots used");
duke@435:   }
duke@435: 
duke@435:   return result;
duke@435: }
duke@435: 
duke@435: void LinearScan::assign_spill_slot(Interval* it) {
duke@435:   // assign the canonical spill slot of the parent (if a part of the interval
duke@435:   // is already spilled) or allocate a new spill slot
duke@435:   if (it->canonical_spill_slot() >= 0) {
duke@435:     it->assign_reg(it->canonical_spill_slot());
duke@435:   } else {
duke@435:     int spill = allocate_spill_slot(type2spill_size[it->type()] == 2);
duke@435:     it->set_canonical_spill_slot(spill);
duke@435:     it->assign_reg(spill);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScan::propagate_spill_slots() {
duke@435:   if (!frame_map()->finalize_frame(max_spills())) {
duke@435:     bailout("frame too large");
duke@435:   }
duke@435: }
duke@435: 
duke@435: // create a new interval with a predefined reg_num
duke@435: // (only used for parent intervals that are created during the building phase)
duke@435: Interval* LinearScan::create_interval(int reg_num) {
duke@435:   assert(_intervals.at(reg_num) == NULL, "overwriting exisiting interval");
duke@435: 
duke@435:   Interval* interval = new Interval(reg_num);
duke@435:   _intervals.at_put(reg_num, interval);
duke@435: 
duke@435:   // assign register number for precolored intervals
duke@435:   if (reg_num < LIR_OprDesc::vreg_base) {
duke@435:     interval->assign_reg(reg_num);
duke@435:   }
duke@435:   return interval;
duke@435: }
duke@435: 
duke@435: // assign a new reg_num to the interval and append it to the list of intervals
duke@435: // (only used for child intervals that are created during register allocation)
duke@435: void LinearScan::append_interval(Interval* it) {
duke@435:   it->set_reg_num(_intervals.length());
duke@435:   _intervals.append(it);
duke@435:   _new_intervals_from_allocation->append(it);
duke@435: }
duke@435: 
duke@435: // copy the vreg-flags if an interval is split
duke@435: void LinearScan::copy_register_flags(Interval* from, Interval* to) {
duke@435:   if (gen()->is_vreg_flag_set(from->reg_num(), LIRGenerator::byte_reg)) {
duke@435:     gen()->set_vreg_flag(to->reg_num(), LIRGenerator::byte_reg);
duke@435:   }
duke@435:   if (gen()->is_vreg_flag_set(from->reg_num(), LIRGenerator::callee_saved)) {
duke@435:     gen()->set_vreg_flag(to->reg_num(), LIRGenerator::callee_saved);
duke@435:   }
duke@435: 
duke@435:   // Note: do not copy the must_start_in_memory flag because it is not necessary for child
duke@435:   //       intervals (only the very beginning of the interval must be in memory)
duke@435: }
duke@435: 
duke@435: 
duke@435: // ********** spill move optimization
duke@435: // eliminate moves from register to stack if stack slot is known to be correct
duke@435: 
duke@435: // called during building of intervals
duke@435: void LinearScan::change_spill_definition_pos(Interval* interval, int def_pos) {
duke@435:   assert(interval->is_split_parent(), "can only be called for split parents");
duke@435: 
duke@435:   switch (interval->spill_state()) {
duke@435:     case noDefinitionFound:
duke@435:       assert(interval->spill_definition_pos() == -1, "must no be set before");
duke@435:       interval->set_spill_definition_pos(def_pos);
duke@435:       interval->set_spill_state(oneDefinitionFound);
duke@435:       break;
duke@435: 
duke@435:     case oneDefinitionFound:
duke@435:       assert(def_pos <= interval->spill_definition_pos(), "positions are processed in reverse order when intervals are created");
duke@435:       if (def_pos < interval->spill_definition_pos() - 2) {
duke@435:         // second definition found, so no spill optimization possible for this interval
duke@435:         interval->set_spill_state(noOptimization);
duke@435:       } else {
duke@435:         // two consecutive definitions (because of two-operand LIR form)
duke@435:         assert(block_of_op_with_id(def_pos) == block_of_op_with_id(interval->spill_definition_pos()), "block must be equal");
duke@435:       }
duke@435:       break;
duke@435: 
duke@435:     case noOptimization:
duke@435:       // nothing to do
duke@435:       break;
duke@435: 
duke@435:     default:
duke@435:       assert(false, "other states not allowed at this time");
duke@435:   }
duke@435: }
duke@435: 
duke@435: // called during register allocation
duke@435: void LinearScan::change_spill_state(Interval* interval, int spill_pos) {
duke@435:   switch (interval->spill_state()) {
duke@435:     case oneDefinitionFound: {
duke@435:       int def_loop_depth = block_of_op_with_id(interval->spill_definition_pos())->loop_depth();
duke@435:       int spill_loop_depth = block_of_op_with_id(spill_pos)->loop_depth();
duke@435: 
duke@435:       if (def_loop_depth < spill_loop_depth) {
duke@435:         // the loop depth of the spilling position is higher then the loop depth
duke@435:         // at the definition of the interval -> move write to memory out of loop
duke@435:         // by storing at definitin of the interval
duke@435:         interval->set_spill_state(storeAtDefinition);
duke@435:       } else {
duke@435:         // the interval is currently spilled only once, so for now there is no
duke@435:         // reason to store the interval at the definition
duke@435:         interval->set_spill_state(oneMoveInserted);
duke@435:       }
duke@435:       break;
duke@435:     }
duke@435: 
duke@435:     case oneMoveInserted: {
duke@435:       // the interval is spilled more then once, so it is better to store it to
duke@435:       // memory at the definition
duke@435:       interval->set_spill_state(storeAtDefinition);
duke@435:       break;
duke@435:     }
duke@435: 
duke@435:     case storeAtDefinition:
duke@435:     case startInMemory:
duke@435:     case noOptimization:
duke@435:     case noDefinitionFound:
duke@435:       // nothing to do
duke@435:       break;
duke@435: 
duke@435:     default:
duke@435:       assert(false, "other states not allowed at this time");
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: bool LinearScan::must_store_at_definition(const Interval* i) {
duke@435:   return i->is_split_parent() && i->spill_state() == storeAtDefinition;
duke@435: }
duke@435: 
duke@435: // called once before asignment of register numbers
duke@435: void LinearScan::eliminate_spill_moves() {
duke@435:   TIME_LINEAR_SCAN(timer_eliminate_spill_moves);
duke@435:   TRACE_LINEAR_SCAN(3, tty->print_cr("***** Eliminating unnecessary spill moves"));
duke@435: 
duke@435:   // collect all intervals that must be stored after their definion.
duke@435:   // the list is sorted by Interval::spill_definition_pos
duke@435:   Interval* interval;
duke@435:   Interval* temp_list;
duke@435:   create_unhandled_lists(&interval, &temp_list, must_store_at_definition, NULL);
duke@435: 
duke@435: #ifdef ASSERT
duke@435:   Interval* prev = NULL;
duke@435:   Interval* temp = interval;
duke@435:   while (temp != Interval::end()) {
duke@435:     assert(temp->spill_definition_pos() > 0, "invalid spill definition pos");
duke@435:     if (prev != NULL) {
duke@435:       assert(temp->from() >= prev->from(), "intervals not sorted");
duke@435:       assert(temp->spill_definition_pos() >= prev->spill_definition_pos(), "when intervals are sorted by from, then they must also be sorted by spill_definition_pos");
duke@435:     }
duke@435: 
duke@435:     assert(temp->canonical_spill_slot() >= LinearScan::nof_regs, "interval has no spill slot assigned");
duke@435:     assert(temp->spill_definition_pos() >= temp->from(), "invalid order");
duke@435:     assert(temp->spill_definition_pos() <= temp->from() + 2, "only intervals defined once at their start-pos can be optimized");
duke@435: 
duke@435:     TRACE_LINEAR_SCAN(4, tty->print_cr("interval %d (from %d to %d) must be stored at %d", temp->reg_num(), temp->from(), temp->to(), temp->spill_definition_pos()));
duke@435: 
duke@435:     temp = temp->next();
duke@435:   }
duke@435: #endif
duke@435: 
duke@435:   LIR_InsertionBuffer insertion_buffer;
duke@435:   int num_blocks = block_count();
duke@435:   for (int i = 0; i < num_blocks; i++) {
duke@435:     BlockBegin* block = block_at(i);
duke@435:     LIR_OpList* instructions = block->lir()->instructions_list();
duke@435:     int         num_inst = instructions->length();
duke@435:     bool        has_new = false;
duke@435: 
duke@435:     // iterate all instructions of the block. skip the first because it is always a label
duke@435:     for (int j = 1; j < num_inst; j++) {
duke@435:       LIR_Op* op = instructions->at(j);
duke@435:       int op_id = op->id();
duke@435: 
duke@435:       if (op_id == -1) {
duke@435:         // remove move from register to stack if the stack slot is guaranteed to be correct.
duke@435:         // only moves that have been inserted by LinearScan can be removed.
duke@435:         assert(op->code() == lir_move, "only moves can have a op_id of -1");
duke@435:         assert(op->as_Op1() != NULL, "move must be LIR_Op1");
duke@435:         assert(op->as_Op1()->result_opr()->is_virtual(), "LinearScan inserts only moves to virtual registers");
duke@435: 
duke@435:         LIR_Op1* op1 = (LIR_Op1*)op;
duke@435:         Interval* interval = interval_at(op1->result_opr()->vreg_number());
duke@435: 
duke@435:         if (interval->assigned_reg() >= LinearScan::nof_regs && interval->always_in_memory()) {
duke@435:           // move target is a stack slot that is always correct, so eliminate instruction
duke@435:           TRACE_LINEAR_SCAN(4, tty->print_cr("eliminating move from interval %d to %d", op1->in_opr()->vreg_number(), op1->result_opr()->vreg_number()));
duke@435:           instructions->at_put(j, NULL); // NULL-instructions are deleted by assign_reg_num
duke@435:         }
duke@435: 
duke@435:       } else {
duke@435:         // insert move from register to stack just after the beginning of the interval
duke@435:         assert(interval == Interval::end() || interval->spill_definition_pos() >= op_id, "invalid order");
duke@435:         assert(interval == Interval::end() || (interval->is_split_parent() && interval->spill_state() == storeAtDefinition), "invalid interval");
duke@435: 
duke@435:         while (interval != Interval::end() && interval->spill_definition_pos() == op_id) {
duke@435:           if (!has_new) {
duke@435:             // prepare insertion buffer (appended when all instructions of the block are processed)
duke@435:             insertion_buffer.init(block->lir());
duke@435:             has_new = true;
duke@435:           }
duke@435: 
duke@435:           LIR_Opr from_opr = operand_for_interval(interval);
duke@435:           LIR_Opr to_opr = canonical_spill_opr(interval);
duke@435:           assert(from_opr->is_fixed_cpu() || from_opr->is_fixed_fpu(), "from operand must be a register");
duke@435:           assert(to_opr->is_stack(), "to operand must be a stack slot");
duke@435: 
duke@435:           insertion_buffer.move(j, from_opr, to_opr);
duke@435:           TRACE_LINEAR_SCAN(4, tty->print_cr("inserting move after definition of interval %d to stack slot %d at op_id %d", interval->reg_num(), interval->canonical_spill_slot() - LinearScan::nof_regs, op_id));
duke@435: 
duke@435:           interval = interval->next();
duke@435:         }
duke@435:       }
duke@435:     } // end of instruction iteration
duke@435: 
duke@435:     if (has_new) {
duke@435:       block->lir()->append(&insertion_buffer);
duke@435:     }
duke@435:   } // end of block iteration
duke@435: 
duke@435:   assert(interval == Interval::end(), "missed an interval");
duke@435: }
duke@435: 
duke@435: 
duke@435: // ********** Phase 1: number all instructions in all blocks
duke@435: // Compute depth-first and linear scan block orders, and number LIR_Op nodes for linear scan.
duke@435: 
duke@435: void LinearScan::number_instructions() {
duke@435:   {
duke@435:     // dummy-timer to measure the cost of the timer itself
duke@435:     // (this time is then subtracted from all other timers to get the real value)
duke@435:     TIME_LINEAR_SCAN(timer_do_nothing);
duke@435:   }
duke@435:   TIME_LINEAR_SCAN(timer_number_instructions);
duke@435: 
duke@435:   // Assign IDs to LIR nodes and build a mapping, lir_ops, from ID to LIR_Op node.
duke@435:   int num_blocks = block_count();
duke@435:   int num_instructions = 0;
duke@435:   int i;
duke@435:   for (i = 0; i < num_blocks; i++) {
duke@435:     num_instructions += block_at(i)->lir()->instructions_list()->length();
duke@435:   }
duke@435: 
duke@435:   // initialize with correct length
duke@435:   _lir_ops = LIR_OpArray(num_instructions);
duke@435:   _block_of_op = BlockBeginArray(num_instructions);
duke@435: 
duke@435:   int op_id = 0;
duke@435:   int idx = 0;
duke@435: 
duke@435:   for (i = 0; i < num_blocks; i++) {
duke@435:     BlockBegin* block = block_at(i);
duke@435:     block->set_first_lir_instruction_id(op_id);
duke@435:     LIR_OpList* instructions = block->lir()->instructions_list();
duke@435: 
duke@435:     int num_inst = instructions->length();
duke@435:     for (int j = 0; j < num_inst; j++) {
duke@435:       LIR_Op* op = instructions->at(j);
duke@435:       op->set_id(op_id);
duke@435: 
duke@435:       _lir_ops.at_put(idx, op);
duke@435:       _block_of_op.at_put(idx, block);
duke@435:       assert(lir_op_with_id(op_id) == op, "must match");
duke@435: 
duke@435:       idx++;
duke@435:       op_id += 2; // numbering of lir_ops by two
duke@435:     }
duke@435:     block->set_last_lir_instruction_id(op_id - 2);
duke@435:   }
duke@435:   assert(idx == num_instructions, "must match");
duke@435:   assert(idx * 2 == op_id, "must match");
duke@435: 
duke@435:   _has_call = BitMap(num_instructions); _has_call.clear();
duke@435:   _has_info = BitMap(num_instructions); _has_info.clear();
duke@435: }
duke@435: 
duke@435: 
duke@435: // ********** Phase 2: compute local live sets separately for each block
duke@435: // (sets live_gen and live_kill for each block)
duke@435: 
duke@435: void LinearScan::set_live_gen_kill(Value value, LIR_Op* op, BitMap& live_gen, BitMap& live_kill) {
duke@435:   LIR_Opr opr = value->operand();
duke@435:   Constant* con = value->as_Constant();
duke@435: 
duke@435:   // check some asumptions about debug information
duke@435:   assert(!value->type()->is_illegal(), "if this local is used by the interpreter it shouldn't be of indeterminate type");
duke@435:   assert(con == NULL || opr->is_virtual() || opr->is_constant() || opr->is_illegal(), "asumption: Constant instructions have only constant operands");
duke@435:   assert(con != NULL || opr->is_virtual(), "asumption: non-Constant instructions have only virtual operands");
duke@435: 
duke@435:   if ((con == NULL || con->is_pinned()) && opr->is_register()) {
duke@435:     assert(reg_num(opr) == opr->vreg_number() && !is_valid_reg_num(reg_numHi(opr)), "invalid optimization below");
duke@435:     int reg = opr->vreg_number();
duke@435:     if (!live_kill.at(reg)) {
duke@435:       live_gen.set_bit(reg);
duke@435:       TRACE_LINEAR_SCAN(4, tty->print_cr("  Setting live_gen for value %c%d, LIR op_id %d, register number %d", value->type()->tchar(), value->id(), op->id(), reg));
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScan::compute_local_live_sets() {
duke@435:   TIME_LINEAR_SCAN(timer_compute_local_live_sets);
duke@435: 
duke@435:   int  num_blocks = block_count();
duke@435:   int  live_size = live_set_size();
duke@435:   bool local_has_fpu_registers = false;
duke@435:   int  local_num_calls = 0;
duke@435:   LIR_OpVisitState visitor;
duke@435: 
duke@435:   BitMap2D local_interval_in_loop = BitMap2D(_num_virtual_regs, num_loops());
duke@435:   local_interval_in_loop.clear();
duke@435: 
duke@435:   // iterate all blocks
duke@435:   for (int i = 0; i < num_blocks; i++) {
duke@435:     BlockBegin* block = block_at(i);
duke@435: 
duke@435:     BitMap live_gen(live_size);  live_gen.clear();
duke@435:     BitMap live_kill(live_size); live_kill.clear();
duke@435: 
duke@435:     if (block->is_set(BlockBegin::exception_entry_flag)) {
duke@435:       // Phi functions at the begin of an exception handler are
duke@435:       // implicitly defined (= killed) at the beginning of the block.
duke@435:       for_each_phi_fun(block, phi,
duke@435:         live_kill.set_bit(phi->operand()->vreg_number())
duke@435:       );
duke@435:     }
duke@435: 
duke@435:     LIR_OpList* instructions = block->lir()->instructions_list();
duke@435:     int num_inst = instructions->length();
duke@435: 
duke@435:     // iterate all instructions of the block. skip the first because it is always a label
duke@435:     assert(visitor.no_operands(instructions->at(0)), "first operation must always be a label");
duke@435:     for (int j = 1; j < num_inst; j++) {
duke@435:       LIR_Op* op = instructions->at(j);
duke@435: 
duke@435:       // visit operation to collect all operands
duke@435:       visitor.visit(op);
duke@435: 
duke@435:       if (visitor.has_call()) {
duke@435:         _has_call.set_bit(op->id() >> 1);
duke@435:         local_num_calls++;
duke@435:       }
duke@435:       if (visitor.info_count() > 0) {
duke@435:         _has_info.set_bit(op->id() >> 1);
duke@435:       }
duke@435: 
duke@435:       // iterate input operands of instruction
duke@435:       int k, n, reg;
duke@435:       n = visitor.opr_count(LIR_OpVisitState::inputMode);
duke@435:       for (k = 0; k < n; k++) {
duke@435:         LIR_Opr opr = visitor.opr_at(LIR_OpVisitState::inputMode, k);
duke@435:         assert(opr->is_register(), "visitor should only return register operands");
duke@435: 
duke@435:         if (opr->is_virtual_register()) {
duke@435:           assert(reg_num(opr) == opr->vreg_number() && !is_valid_reg_num(reg_numHi(opr)), "invalid optimization below");
duke@435:           reg = opr->vreg_number();
duke@435:           if (!live_kill.at(reg)) {
duke@435:             live_gen.set_bit(reg);
duke@435:             TRACE_LINEAR_SCAN(4, tty->print_cr("  Setting live_gen for register %d at instruction %d", reg, op->id()));
duke@435:           }
duke@435:           if (block->loop_index() >= 0) {
duke@435:             local_interval_in_loop.set_bit(reg, block->loop_index());
duke@435:           }
duke@435:           local_has_fpu_registers = local_has_fpu_registers || opr->is_virtual_fpu();
duke@435:         }
duke@435: 
duke@435: #ifdef ASSERT
duke@435:         // fixed intervals are never live at block boundaries, so
duke@435:         // they need not be processed in live sets.
duke@435:         // this is checked by these assertions to be sure about it.
duke@435:         // the entry block may have incoming values in registers, which is ok.
duke@435:         if (!opr->is_virtual_register() && block != ir()->start()) {
duke@435:           reg = reg_num(opr);
duke@435:           if (is_processed_reg_num(reg)) {
duke@435:             assert(live_kill.at(reg), "using fixed register that is not defined in this block");
duke@435:           }
duke@435:           reg = reg_numHi(opr);
duke@435:           if (is_valid_reg_num(reg) && is_processed_reg_num(reg)) {
duke@435:             assert(live_kill.at(reg), "using fixed register that is not defined in this block");
duke@435:           }
duke@435:         }
duke@435: #endif
duke@435:       }
duke@435: 
duke@435:       // Add uses of live locals from interpreter's point of view for proper debug information generation
duke@435:       n = visitor.info_count();
duke@435:       for (k = 0; k < n; k++) {
duke@435:         CodeEmitInfo* info = visitor.info_at(k);
duke@435:         ValueStack* stack = info->stack();
duke@435:         for_each_state_value(stack, value,
duke@435:           set_live_gen_kill(value, op, live_gen, live_kill)
duke@435:         );
duke@435:       }
duke@435: 
duke@435:       // iterate temp operands of instruction
duke@435:       n = visitor.opr_count(LIR_OpVisitState::tempMode);
duke@435:       for (k = 0; k < n; k++) {
duke@435:         LIR_Opr opr = visitor.opr_at(LIR_OpVisitState::tempMode, k);
duke@435:         assert(opr->is_register(), "visitor should only return register operands");
duke@435: 
duke@435:         if (opr->is_virtual_register()) {
duke@435:           assert(reg_num(opr) == opr->vreg_number() && !is_valid_reg_num(reg_numHi(opr)), "invalid optimization below");
duke@435:           reg = opr->vreg_number();
duke@435:           live_kill.set_bit(reg);
duke@435:           if (block->loop_index() >= 0) {
duke@435:             local_interval_in_loop.set_bit(reg, block->loop_index());
duke@435:           }
duke@435:           local_has_fpu_registers = local_has_fpu_registers || opr->is_virtual_fpu();
duke@435:         }
duke@435: 
duke@435: #ifdef ASSERT
duke@435:         // fixed intervals are never live at block boundaries, so
duke@435:         // they need not be processed in live sets
duke@435:         // process them only in debug mode so that this can be checked
duke@435:         if (!opr->is_virtual_register()) {
duke@435:           reg = reg_num(opr);
duke@435:           if (is_processed_reg_num(reg)) {
duke@435:             live_kill.set_bit(reg_num(opr));
duke@435:           }
duke@435:           reg = reg_numHi(opr);
duke@435:           if (is_valid_reg_num(reg) && is_processed_reg_num(reg)) {
duke@435:             live_kill.set_bit(reg);
duke@435:           }
duke@435:         }
duke@435: #endif
duke@435:       }
duke@435: 
duke@435:       // iterate output operands of instruction
duke@435:       n = visitor.opr_count(LIR_OpVisitState::outputMode);
duke@435:       for (k = 0; k < n; k++) {
duke@435:         LIR_Opr opr = visitor.opr_at(LIR_OpVisitState::outputMode, k);
duke@435:         assert(opr->is_register(), "visitor should only return register operands");
duke@435: 
duke@435:         if (opr->is_virtual_register()) {
duke@435:           assert(reg_num(opr) == opr->vreg_number() && !is_valid_reg_num(reg_numHi(opr)), "invalid optimization below");
duke@435:           reg = opr->vreg_number();
duke@435:           live_kill.set_bit(reg);
duke@435:           if (block->loop_index() >= 0) {
duke@435:             local_interval_in_loop.set_bit(reg, block->loop_index());
duke@435:           }
duke@435:           local_has_fpu_registers = local_has_fpu_registers || opr->is_virtual_fpu();
duke@435:         }
duke@435: 
duke@435: #ifdef ASSERT
duke@435:         // fixed intervals are never live at block boundaries, so
duke@435:         // they need not be processed in live sets
duke@435:         // process them only in debug mode so that this can be checked
duke@435:         if (!opr->is_virtual_register()) {
duke@435:           reg = reg_num(opr);
duke@435:           if (is_processed_reg_num(reg)) {
duke@435:             live_kill.set_bit(reg_num(opr));
duke@435:           }
duke@435:           reg = reg_numHi(opr);
duke@435:           if (is_valid_reg_num(reg) && is_processed_reg_num(reg)) {
duke@435:             live_kill.set_bit(reg);
duke@435:           }
duke@435:         }
duke@435: #endif
duke@435:       }
duke@435:     } // end of instruction iteration
duke@435: 
duke@435:     block->set_live_gen (live_gen);
duke@435:     block->set_live_kill(live_kill);
duke@435:     block->set_live_in  (BitMap(live_size)); block->live_in().clear();
duke@435:     block->set_live_out (BitMap(live_size)); block->live_out().clear();
duke@435: 
duke@435:     TRACE_LINEAR_SCAN(4, tty->print("live_gen  B%d ", block->block_id()); print_bitmap(block->live_gen()));
duke@435:     TRACE_LINEAR_SCAN(4, tty->print("live_kill B%d ", block->block_id()); print_bitmap(block->live_kill()));
duke@435:   } // end of block iteration
duke@435: 
duke@435:   // propagate local calculated information into LinearScan object
duke@435:   _has_fpu_registers = local_has_fpu_registers;
duke@435:   compilation()->set_has_fpu_code(local_has_fpu_registers);
duke@435: 
duke@435:   _num_calls = local_num_calls;
duke@435:   _interval_in_loop = local_interval_in_loop;
duke@435: }
duke@435: 
duke@435: 
duke@435: // ********** Phase 3: perform a backward dataflow analysis to compute global live sets
duke@435: // (sets live_in and live_out for each block)
duke@435: 
duke@435: void LinearScan::compute_global_live_sets() {
duke@435:   TIME_LINEAR_SCAN(timer_compute_global_live_sets);
duke@435: 
duke@435:   int  num_blocks = block_count();
duke@435:   bool change_occurred;
duke@435:   bool change_occurred_in_block;
duke@435:   int  iteration_count = 0;
duke@435:   BitMap live_out(live_set_size()); live_out.clear(); // scratch set for calculations
duke@435: 
duke@435:   // Perform a backward dataflow analysis to compute live_out and live_in for each block.
duke@435:   // The loop is executed until a fixpoint is reached (no changes in an iteration)
duke@435:   // Exception handlers must be processed because not all live values are
duke@435:   // present in the state array, e.g. because of global value numbering
duke@435:   do {
duke@435:     change_occurred = false;
duke@435: 
duke@435:     // iterate all blocks in reverse order
duke@435:     for (int i = num_blocks - 1; i >= 0; i--) {
duke@435:       BlockBegin* block = block_at(i);
duke@435: 
duke@435:       change_occurred_in_block = false;
duke@435: 
duke@435:       // live_out(block) is the union of live_in(sux), for successors sux of block
duke@435:       int n = block->number_of_sux();
duke@435:       int e = block->number_of_exception_handlers();
duke@435:       if (n + e > 0) {
duke@435:         // block has successors
duke@435:         if (n > 0) {
duke@435:           live_out.set_from(block->sux_at(0)->live_in());
duke@435:           for (int j = 1; j < n; j++) {
duke@435:             live_out.set_union(block->sux_at(j)->live_in());
duke@435:           }
duke@435:         } else {
duke@435:           live_out.clear();
duke@435:         }
duke@435:         for (int j = 0; j < e; j++) {
duke@435:           live_out.set_union(block->exception_handler_at(j)->live_in());
duke@435:         }
duke@435: 
duke@435:         if (!block->live_out().is_same(live_out)) {
duke@435:           // A change occurred.  Swap the old and new live out sets to avoid copying.
duke@435:           BitMap temp = block->live_out();
duke@435:           block->set_live_out(live_out);
duke@435:           live_out = temp;
duke@435: 
duke@435:           change_occurred = true;
duke@435:           change_occurred_in_block = true;
duke@435:         }
duke@435:       }
duke@435: 
duke@435:       if (iteration_count == 0 || change_occurred_in_block) {
duke@435:         // live_in(block) is the union of live_gen(block) with (live_out(block) & !live_kill(block))
duke@435:         // note: live_in has to be computed only in first iteration or if live_out has changed!
duke@435:         BitMap live_in = block->live_in();
duke@435:         live_in.set_from(block->live_out());
duke@435:         live_in.set_difference(block->live_kill());
duke@435:         live_in.set_union(block->live_gen());
duke@435:       }
duke@435: 
duke@435: #ifndef PRODUCT
duke@435:       if (TraceLinearScanLevel >= 4) {
duke@435:         char c = ' ';
duke@435:         if (iteration_count == 0 || change_occurred_in_block) {
duke@435:           c = '*';
duke@435:         }
duke@435:         tty->print("(%d) live_in%c  B%d ", iteration_count, c, block->block_id()); print_bitmap(block->live_in());
duke@435:         tty->print("(%d) live_out%c B%d ", iteration_count, c, block->block_id()); print_bitmap(block->live_out());
duke@435:       }
duke@435: #endif
duke@435:     }
duke@435:     iteration_count++;
duke@435: 
duke@435:     if (change_occurred && iteration_count > 50) {
duke@435:       BAILOUT("too many iterations in compute_global_live_sets");
duke@435:     }
duke@435:   } while (change_occurred);
duke@435: 
duke@435: 
duke@435: #ifdef ASSERT
duke@435:   // check that fixed intervals are not live at block boundaries
duke@435:   // (live set must be empty at fixed intervals)
duke@435:   for (int i = 0; i < num_blocks; i++) {
duke@435:     BlockBegin* block = block_at(i);
duke@435:     for (int j = 0; j < LIR_OprDesc::vreg_base; j++) {
duke@435:       assert(block->live_in().at(j)  == false, "live_in  set of fixed register must be empty");
duke@435:       assert(block->live_out().at(j) == false, "live_out set of fixed register must be empty");
duke@435:       assert(block->live_gen().at(j) == false, "live_gen set of fixed register must be empty");
duke@435:     }
duke@435:   }
duke@435: #endif
duke@435: 
duke@435:   // check that the live_in set of the first block is empty
duke@435:   BitMap live_in_args(ir()->start()->live_in().size());
duke@435:   live_in_args.clear();
duke@435:   if (!ir()->start()->live_in().is_same(live_in_args)) {
duke@435: #ifdef ASSERT
duke@435:     tty->print_cr("Error: live_in set of first block must be empty (when this fails, virtual registers are used before they are defined)");
duke@435:     tty->print_cr("affected registers:");
duke@435:     print_bitmap(ir()->start()->live_in());
duke@435: 
duke@435:     // print some additional information to simplify debugging
duke@435:     for (unsigned int i = 0; i < ir()->start()->live_in().size(); i++) {
duke@435:       if (ir()->start()->live_in().at(i)) {
duke@435:         Instruction* instr = gen()->instruction_for_vreg(i);
duke@435:         tty->print_cr("* vreg %d (HIR instruction %c%d)", i, instr == NULL ? ' ' : instr->type()->tchar(), instr == NULL ? 0 : instr->id());
duke@435: 
duke@435:         for (int j = 0; j < num_blocks; j++) {
duke@435:           BlockBegin* block = block_at(j);
duke@435:           if (block->live_gen().at(i)) {
duke@435:             tty->print_cr("  used in block B%d", block->block_id());
duke@435:           }
duke@435:           if (block->live_kill().at(i)) {
duke@435:             tty->print_cr("  defined in block B%d", block->block_id());
duke@435:           }
duke@435:         }
duke@435:       }
duke@435:     }
duke@435: 
duke@435: #endif
duke@435:     // when this fails, virtual registers are used before they are defined.
duke@435:     assert(false, "live_in set of first block must be empty");
duke@435:     // bailout of if this occurs in product mode.
duke@435:     bailout("live_in set of first block not empty");
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: // ********** Phase 4: build intervals
duke@435: // (fills the list _intervals)
duke@435: 
duke@435: void LinearScan::add_use(Value value, int from, int to, IntervalUseKind use_kind) {
duke@435:   assert(!value->type()->is_illegal(), "if this value is used by the interpreter it shouldn't be of indeterminate type");
duke@435:   LIR_Opr opr = value->operand();
duke@435:   Constant* con = value->as_Constant();
duke@435: 
duke@435:   if ((con == NULL || con->is_pinned()) && opr->is_register()) {
duke@435:     assert(reg_num(opr) == opr->vreg_number() && !is_valid_reg_num(reg_numHi(opr)), "invalid optimization below");
duke@435:     add_use(opr, from, to, use_kind);
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScan::add_def(LIR_Opr opr, int def_pos, IntervalUseKind use_kind) {
duke@435:   TRACE_LINEAR_SCAN(2, tty->print(" def "); opr->print(tty); tty->print_cr(" def_pos %d (%d)", def_pos, use_kind));
duke@435:   assert(opr->is_register(), "should not be called otherwise");
duke@435: 
duke@435:   if (opr->is_virtual_register()) {
duke@435:     assert(reg_num(opr) == opr->vreg_number() && !is_valid_reg_num(reg_numHi(opr)), "invalid optimization below");
duke@435:     add_def(opr->vreg_number(), def_pos, use_kind, opr->type_register());
duke@435: 
duke@435:   } else {
duke@435:     int reg = reg_num(opr);
duke@435:     if (is_processed_reg_num(reg)) {
duke@435:       add_def(reg, def_pos, use_kind, opr->type_register());
duke@435:     }
duke@435:     reg = reg_numHi(opr);
duke@435:     if (is_valid_reg_num(reg) && is_processed_reg_num(reg)) {
duke@435:       add_def(reg, def_pos, use_kind, opr->type_register());
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScan::add_use(LIR_Opr opr, int from, int to, IntervalUseKind use_kind) {
duke@435:   TRACE_LINEAR_SCAN(2, tty->print(" use "); opr->print(tty); tty->print_cr(" from %d to %d (%d)", from, to, use_kind));
duke@435:   assert(opr->is_register(), "should not be called otherwise");
duke@435: 
duke@435:   if (opr->is_virtual_register()) {
duke@435:     assert(reg_num(opr) == opr->vreg_number() && !is_valid_reg_num(reg_numHi(opr)), "invalid optimization below");
duke@435:     add_use(opr->vreg_number(), from, to, use_kind, opr->type_register());
duke@435: 
duke@435:   } else {
duke@435:     int reg = reg_num(opr);
duke@435:     if (is_processed_reg_num(reg)) {
duke@435:       add_use(reg, from, to, use_kind, opr->type_register());
duke@435:     }
duke@435:     reg = reg_numHi(opr);
duke@435:     if (is_valid_reg_num(reg) && is_processed_reg_num(reg)) {
duke@435:       add_use(reg, from, to, use_kind, opr->type_register());
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScan::add_temp(LIR_Opr opr, int temp_pos, IntervalUseKind use_kind) {
duke@435:   TRACE_LINEAR_SCAN(2, tty->print(" temp "); opr->print(tty); tty->print_cr(" temp_pos %d (%d)", temp_pos, use_kind));
duke@435:   assert(opr->is_register(), "should not be called otherwise");
duke@435: 
duke@435:   if (opr->is_virtual_register()) {
duke@435:     assert(reg_num(opr) == opr->vreg_number() && !is_valid_reg_num(reg_numHi(opr)), "invalid optimization below");
duke@435:     add_temp(opr->vreg_number(), temp_pos, use_kind, opr->type_register());
duke@435: 
duke@435:   } else {
duke@435:     int reg = reg_num(opr);
duke@435:     if (is_processed_reg_num(reg)) {
duke@435:       add_temp(reg, temp_pos, use_kind, opr->type_register());
duke@435:     }
duke@435:     reg = reg_numHi(opr);
duke@435:     if (is_valid_reg_num(reg) && is_processed_reg_num(reg)) {
duke@435:       add_temp(reg, temp_pos, use_kind, opr->type_register());
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScan::add_def(int reg_num, int def_pos, IntervalUseKind use_kind, BasicType type) {
duke@435:   Interval* interval = interval_at(reg_num);
duke@435:   if (interval != NULL) {
duke@435:     assert(interval->reg_num() == reg_num, "wrong interval");
duke@435: 
duke@435:     if (type != T_ILLEGAL) {
duke@435:       interval->set_type(type);
duke@435:     }
duke@435: 
duke@435:     Range* r = interval->first();
duke@435:     if (r->from() <= def_pos) {
duke@435:       // Update the starting point (when a range is first created for a use, its
duke@435:       // start is the beginning of the current block until a def is encountered.)
duke@435:       r->set_from(def_pos);
duke@435:       interval->add_use_pos(def_pos, use_kind);
duke@435: 
duke@435:     } else {
duke@435:       // Dead value - make vacuous interval
duke@435:       // also add use_kind for dead intervals
duke@435:       interval->add_range(def_pos, def_pos + 1);
duke@435:       interval->add_use_pos(def_pos, use_kind);
duke@435:       TRACE_LINEAR_SCAN(2, tty->print_cr("Warning: def of reg %d at %d occurs without use", reg_num, def_pos));
duke@435:     }
duke@435: 
duke@435:   } else {
duke@435:     // Dead value - make vacuous interval
duke@435:     // also add use_kind for dead intervals
duke@435:     interval = create_interval(reg_num);
duke@435:     if (type != T_ILLEGAL) {
duke@435:       interval->set_type(type);
duke@435:     }
duke@435: 
duke@435:     interval->add_range(def_pos, def_pos + 1);
duke@435:     interval->add_use_pos(def_pos, use_kind);
duke@435:     TRACE_LINEAR_SCAN(2, tty->print_cr("Warning: dead value %d at %d in live intervals", reg_num, def_pos));
duke@435:   }
duke@435: 
duke@435:   change_spill_definition_pos(interval, def_pos);
duke@435:   if (use_kind == noUse && interval->spill_state() <= startInMemory) {
duke@435:         // detection of method-parameters and roundfp-results
duke@435:         // TODO: move this directly to position where use-kind is computed
duke@435:     interval->set_spill_state(startInMemory);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScan::add_use(int reg_num, int from, int to, IntervalUseKind use_kind, BasicType type) {
duke@435:   Interval* interval = interval_at(reg_num);
duke@435:   if (interval == NULL) {
duke@435:     interval = create_interval(reg_num);
duke@435:   }
duke@435:   assert(interval->reg_num() == reg_num, "wrong interval");
duke@435: 
duke@435:   if (type != T_ILLEGAL) {
duke@435:     interval->set_type(type);
duke@435:   }
duke@435: 
duke@435:   interval->add_range(from, to);
duke@435:   interval->add_use_pos(to, use_kind);
duke@435: }
duke@435: 
duke@435: void LinearScan::add_temp(int reg_num, int temp_pos, IntervalUseKind use_kind, BasicType type) {
duke@435:   Interval* interval = interval_at(reg_num);
duke@435:   if (interval == NULL) {
duke@435:     interval = create_interval(reg_num);
duke@435:   }
duke@435:   assert(interval->reg_num() == reg_num, "wrong interval");
duke@435: 
duke@435:   if (type != T_ILLEGAL) {
duke@435:     interval->set_type(type);
duke@435:   }
duke@435: 
duke@435:   interval->add_range(temp_pos, temp_pos + 1);
duke@435:   interval->add_use_pos(temp_pos, use_kind);
duke@435: }
duke@435: 
duke@435: 
duke@435: // the results of this functions are used for optimizing spilling and reloading
duke@435: // if the functions return shouldHaveRegister and the interval is spilled,
duke@435: // it is not reloaded to a register.
duke@435: IntervalUseKind LinearScan::use_kind_of_output_operand(LIR_Op* op, LIR_Opr opr) {
duke@435:   if (op->code() == lir_move) {
duke@435:     assert(op->as_Op1() != NULL, "lir_move must be LIR_Op1");
duke@435:     LIR_Op1* move = (LIR_Op1*)op;
duke@435:     LIR_Opr res = move->result_opr();
duke@435:     bool result_in_memory = res->is_virtual() && gen()->is_vreg_flag_set(res->vreg_number(), LIRGenerator::must_start_in_memory);
duke@435: 
duke@435:     if (result_in_memory) {
duke@435:       // Begin of an interval with must_start_in_memory set.
duke@435:       // This interval will always get a stack slot first, so return noUse.
duke@435:       return noUse;
duke@435: 
duke@435:     } else if (move->in_opr()->is_stack()) {
duke@435:       // method argument (condition must be equal to handle_method_arguments)
duke@435:       return noUse;
duke@435: 
duke@435:     } else if (move->in_opr()->is_register() && move->result_opr()->is_register()) {
duke@435:       // Move from register to register
duke@435:       if (block_of_op_with_id(op->id())->is_set(BlockBegin::osr_entry_flag)) {
duke@435:         // special handling of phi-function moves inside osr-entry blocks
duke@435:         // input operand must have a register instead of output operand (leads to better register allocation)
duke@435:         return shouldHaveRegister;
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   if (opr->is_virtual() &&
duke@435:       gen()->is_vreg_flag_set(opr->vreg_number(), LIRGenerator::must_start_in_memory)) {
duke@435:     // result is a stack-slot, so prevent immediate reloading
duke@435:     return noUse;
duke@435:   }
duke@435: 
duke@435:   // all other operands require a register
duke@435:   return mustHaveRegister;
duke@435: }
duke@435: 
duke@435: IntervalUseKind LinearScan::use_kind_of_input_operand(LIR_Op* op, LIR_Opr opr) {
duke@435:   if (op->code() == lir_move) {
duke@435:     assert(op->as_Op1() != NULL, "lir_move must be LIR_Op1");
duke@435:     LIR_Op1* move = (LIR_Op1*)op;
duke@435:     LIR_Opr res = move->result_opr();
duke@435:     bool result_in_memory = res->is_virtual() && gen()->is_vreg_flag_set(res->vreg_number(), LIRGenerator::must_start_in_memory);
duke@435: 
duke@435:     if (result_in_memory) {
duke@435:       // Move to an interval with must_start_in_memory set.
duke@435:       // To avoid moves from stack to stack (not allowed) force the input operand to a register
duke@435:       return mustHaveRegister;
duke@435: 
duke@435:     } else if (move->in_opr()->is_register() && move->result_opr()->is_register()) {
duke@435:       // Move from register to register
duke@435:       if (block_of_op_with_id(op->id())->is_set(BlockBegin::osr_entry_flag)) {
duke@435:         // special handling of phi-function moves inside osr-entry blocks
duke@435:         // input operand must have a register instead of output operand (leads to better register allocation)
duke@435:         return mustHaveRegister;
duke@435:       }
duke@435: 
duke@435:       // The input operand is not forced to a register (moves from stack to register are allowed),
duke@435:       // but it is faster if the input operand is in a register
duke@435:       return shouldHaveRegister;
duke@435:     }
duke@435:   }
duke@435: 
duke@435: 
never@739: #ifdef X86
duke@435:   if (op->code() == lir_cmove) {
duke@435:     // conditional moves can handle stack operands
duke@435:     assert(op->result_opr()->is_register(), "result must always be in a register");
duke@435:     return shouldHaveRegister;
duke@435:   }
duke@435: 
duke@435:   // optimizations for second input operand of arithmehtic operations on Intel
duke@435:   // this operand is allowed to be on the stack in some cases
duke@435:   BasicType opr_type = opr->type_register();
duke@435:   if (opr_type == T_FLOAT || opr_type == T_DOUBLE) {
duke@435:     if ((UseSSE == 1 && opr_type == T_FLOAT) || UseSSE >= 2) {
duke@435:       // SSE float instruction (T_DOUBLE only supported with SSE2)
duke@435:       switch (op->code()) {
duke@435:         case lir_cmp:
duke@435:         case lir_add:
duke@435:         case lir_sub:
duke@435:         case lir_mul:
duke@435:         case lir_div:
duke@435:         {
duke@435:           assert(op->as_Op2() != NULL, "must be LIR_Op2");
duke@435:           LIR_Op2* op2 = (LIR_Op2*)op;
duke@435:           if (op2->in_opr1() != op2->in_opr2() && op2->in_opr2() == opr) {
duke@435:             assert((op2->result_opr()->is_register() || op->code() == lir_cmp) && op2->in_opr1()->is_register(), "cannot mark second operand as stack if others are not in register");
duke@435:             return shouldHaveRegister;
duke@435:           }
duke@435:         }
duke@435:       }
duke@435:     } else {
duke@435:       // FPU stack float instruction
duke@435:       switch (op->code()) {
duke@435:         case lir_add:
duke@435:         case lir_sub:
duke@435:         case lir_mul:
duke@435:         case lir_div:
duke@435:         {
duke@435:           assert(op->as_Op2() != NULL, "must be LIR_Op2");
duke@435:           LIR_Op2* op2 = (LIR_Op2*)op;
duke@435:           if (op2->in_opr1() != op2->in_opr2() && op2->in_opr2() == opr) {
duke@435:             assert((op2->result_opr()->is_register() || op->code() == lir_cmp) && op2->in_opr1()->is_register(), "cannot mark second operand as stack if others are not in register");
duke@435:             return shouldHaveRegister;
duke@435:           }
duke@435:         }
duke@435:       }
duke@435:     }
iveresov@6069:     // We want to sometimes use logical operations on pointers, in particular in GC barriers.
iveresov@6069:     // Since 64bit logical operations do not current support operands on stack, we have to make sure
iveresov@6069:     // T_OBJECT doesn't get spilled along with T_LONG.
iveresov@6069:   } else if (opr_type != T_LONG LP64_ONLY(&& opr_type != T_OBJECT)) {
duke@435:     // integer instruction (note: long operands must always be in register)
duke@435:     switch (op->code()) {
duke@435:       case lir_cmp:
duke@435:       case lir_add:
duke@435:       case lir_sub:
duke@435:       case lir_logic_and:
duke@435:       case lir_logic_or:
duke@435:       case lir_logic_xor:
duke@435:       {
duke@435:         assert(op->as_Op2() != NULL, "must be LIR_Op2");
duke@435:         LIR_Op2* op2 = (LIR_Op2*)op;
duke@435:         if (op2->in_opr1() != op2->in_opr2() && op2->in_opr2() == opr) {
duke@435:           assert((op2->result_opr()->is_register() || op->code() == lir_cmp) && op2->in_opr1()->is_register(), "cannot mark second operand as stack if others are not in register");
duke@435:           return shouldHaveRegister;
duke@435:         }
duke@435:       }
duke@435:     }
duke@435:   }
never@739: #endif // X86
duke@435: 
duke@435:   // all other operands require a register
duke@435:   return mustHaveRegister;
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScan::handle_method_arguments(LIR_Op* op) {
duke@435:   // special handling for method arguments (moves from stack to virtual register):
duke@435:   // the interval gets no register assigned, but the stack slot.
duke@435:   // it is split before the first use by the register allocator.
duke@435: 
duke@435:   if (op->code() == lir_move) {
duke@435:     assert(op->as_Op1() != NULL, "must be LIR_Op1");
duke@435:     LIR_Op1* move = (LIR_Op1*)op;
duke@435: 
duke@435:     if (move->in_opr()->is_stack()) {
duke@435: #ifdef ASSERT
duke@435:       int arg_size = compilation()->method()->arg_size();
duke@435:       LIR_Opr o = move->in_opr();
duke@435:       if (o->is_single_stack()) {
duke@435:         assert(o->single_stack_ix() >= 0 && o->single_stack_ix() < arg_size, "out of range");
duke@435:       } else if (o->is_double_stack()) {
duke@435:         assert(o->double_stack_ix() >= 0 && o->double_stack_ix() < arg_size, "out of range");
duke@435:       } else {
duke@435:         ShouldNotReachHere();
duke@435:       }
duke@435: 
duke@435:       assert(move->id() > 0, "invalid id");
duke@435:       assert(block_of_op_with_id(move->id())->number_of_preds() == 0, "move from stack must be in first block");
duke@435:       assert(move->result_opr()->is_virtual(), "result of move must be a virtual register");
duke@435: 
duke@435:       TRACE_LINEAR_SCAN(4, tty->print_cr("found move from stack slot %d to vreg %d", o->is_single_stack() ? o->single_stack_ix() : o->double_stack_ix(), reg_num(move->result_opr())));
duke@435: #endif
duke@435: 
duke@435:       Interval* interval = interval_at(reg_num(move->result_opr()));
duke@435: 
duke@435:       int stack_slot = LinearScan::nof_regs + (move->in_opr()->is_single_stack() ? move->in_opr()->single_stack_ix() : move->in_opr()->double_stack_ix());
duke@435:       interval->set_canonical_spill_slot(stack_slot);
duke@435:       interval->assign_reg(stack_slot);
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScan::handle_doubleword_moves(LIR_Op* op) {
duke@435:   // special handling for doubleword move from memory to register:
duke@435:   // in this case the registers of the input address and the result
duke@435:   // registers must not overlap -> add a temp range for the input registers
duke@435:   if (op->code() == lir_move) {
duke@435:     assert(op->as_Op1() != NULL, "must be LIR_Op1");
duke@435:     LIR_Op1* move = (LIR_Op1*)op;
duke@435: 
duke@435:     if (move->result_opr()->is_double_cpu() && move->in_opr()->is_pointer()) {
duke@435:       LIR_Address* address = move->in_opr()->as_address_ptr();
duke@435:       if (address != NULL) {
duke@435:         if (address->base()->is_valid()) {
duke@435:           add_temp(address->base(), op->id(), noUse);
duke@435:         }
duke@435:         if (address->index()->is_valid()) {
duke@435:           add_temp(address->index(), op->id(), noUse);
duke@435:         }
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScan::add_register_hints(LIR_Op* op) {
duke@435:   switch (op->code()) {
duke@435:     case lir_move:      // fall through
duke@435:     case lir_convert: {
duke@435:       assert(op->as_Op1() != NULL, "lir_move, lir_convert must be LIR_Op1");
duke@435:       LIR_Op1* move = (LIR_Op1*)op;
duke@435: 
duke@435:       LIR_Opr move_from = move->in_opr();
duke@435:       LIR_Opr move_to = move->result_opr();
duke@435: 
duke@435:       if (move_to->is_register() && move_from->is_register()) {
duke@435:         Interval* from = interval_at(reg_num(move_from));
duke@435:         Interval* to = interval_at(reg_num(move_to));
duke@435:         if (from != NULL && to != NULL) {
duke@435:           to->set_register_hint(from);
duke@435:           TRACE_LINEAR_SCAN(4, tty->print_cr("operation at op_id %d: added hint from interval %d to %d", move->id(), from->reg_num(), to->reg_num()));
duke@435:         }
duke@435:       }
duke@435:       break;
duke@435:     }
duke@435:     case lir_cmove: {
duke@435:       assert(op->as_Op2() != NULL, "lir_cmove must be LIR_Op2");
duke@435:       LIR_Op2* cmove = (LIR_Op2*)op;
duke@435: 
duke@435:       LIR_Opr move_from = cmove->in_opr1();
duke@435:       LIR_Opr move_to = cmove->result_opr();
duke@435: 
duke@435:       if (move_to->is_register() && move_from->is_register()) {
duke@435:         Interval* from = interval_at(reg_num(move_from));
duke@435:         Interval* to = interval_at(reg_num(move_to));
duke@435:         if (from != NULL && to != NULL) {
duke@435:           to->set_register_hint(from);
duke@435:           TRACE_LINEAR_SCAN(4, tty->print_cr("operation at op_id %d: added hint from interval %d to %d", cmove->id(), from->reg_num(), to->reg_num()));
duke@435:         }
duke@435:       }
duke@435:       break;
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScan::build_intervals() {
duke@435:   TIME_LINEAR_SCAN(timer_build_intervals);
duke@435: 
duke@435:   // initialize interval list with expected number of intervals
duke@435:   // (32 is added to have some space for split children without having to resize the list)
duke@435:   _intervals = IntervalList(num_virtual_regs() + 32);
duke@435:   // initialize all slots that are used by build_intervals
duke@435:   _intervals.at_put_grow(num_virtual_regs() - 1, NULL, NULL);
duke@435: 
duke@435:   // create a list with all caller-save registers (cpu, fpu, xmm)
duke@435:   // when an instruction is a call, a temp range is created for all these registers
duke@435:   int num_caller_save_registers = 0;
duke@435:   int caller_save_registers[LinearScan::nof_regs];
duke@435: 
duke@435:   int i;
iveresov@2344:   for (i = 0; i < FrameMap::nof_caller_save_cpu_regs(); i++) {
duke@435:     LIR_Opr opr = FrameMap::caller_save_cpu_reg_at(i);
duke@435:     assert(opr->is_valid() && opr->is_register(), "FrameMap should not return invalid operands");
duke@435:     assert(reg_numHi(opr) == -1, "missing addition of range for hi-register");
duke@435:     caller_save_registers[num_caller_save_registers++] = reg_num(opr);
duke@435:   }
duke@435: 
duke@435:   // temp ranges for fpu registers are only created when the method has
duke@435:   // virtual fpu operands. Otherwise no allocation for fpu registers is
duke@435:   // perfomed and so the temp ranges would be useless
duke@435:   if (has_fpu_registers()) {
never@739: #ifdef X86
duke@435:     if (UseSSE < 2) {
duke@435: #endif
duke@435:       for (i = 0; i < FrameMap::nof_caller_save_fpu_regs; i++) {
duke@435:         LIR_Opr opr = FrameMap::caller_save_fpu_reg_at(i);
duke@435:         assert(opr->is_valid() && opr->is_register(), "FrameMap should not return invalid operands");
duke@435:         assert(reg_numHi(opr) == -1, "missing addition of range for hi-register");
duke@435:         caller_save_registers[num_caller_save_registers++] = reg_num(opr);
duke@435:       }
never@739: #ifdef X86
duke@435:     }
duke@435:     if (UseSSE > 0) {
duke@435:       for (i = 0; i < FrameMap::nof_caller_save_xmm_regs; i++) {
duke@435:         LIR_Opr opr = FrameMap::caller_save_xmm_reg_at(i);
duke@435:         assert(opr->is_valid() && opr->is_register(), "FrameMap should not return invalid operands");
duke@435:         assert(reg_numHi(opr) == -1, "missing addition of range for hi-register");
duke@435:         caller_save_registers[num_caller_save_registers++] = reg_num(opr);
duke@435:       }
duke@435:     }
duke@435: #endif
duke@435:   }
duke@435:   assert(num_caller_save_registers <= LinearScan::nof_regs, "out of bounds");
duke@435: 
duke@435: 
duke@435:   LIR_OpVisitState visitor;
duke@435: 
duke@435:   // iterate all blocks in reverse order
duke@435:   for (i = block_count() - 1; i >= 0; i--) {
duke@435:     BlockBegin* block = block_at(i);
duke@435:     LIR_OpList* instructions = block->lir()->instructions_list();
duke@435:     int         block_from =   block->first_lir_instruction_id();
duke@435:     int         block_to =     block->last_lir_instruction_id();
duke@435: 
duke@435:     assert(block_from == instructions->at(0)->id(), "must be");
duke@435:     assert(block_to   == instructions->at(instructions->length() - 1)->id(), "must be");
duke@435: 
duke@435:     // Update intervals for registers live at the end of this block;
duke@435:     BitMap live = block->live_out();
never@739:     int size = (int)live.size();
never@739:     for (int number = (int)live.get_next_one_offset(0, size); number < size; number = (int)live.get_next_one_offset(number + 1, size)) {
duke@435:       assert(live.at(number), "should not stop here otherwise");
duke@435:       assert(number >= LIR_OprDesc::vreg_base, "fixed intervals must not be live on block bounds");
duke@435:       TRACE_LINEAR_SCAN(2, tty->print_cr("live in %d to %d", number, block_to + 2));
duke@435: 
duke@435:       add_use(number, block_from, block_to + 2, noUse, T_ILLEGAL);
duke@435: 
duke@435:       // add special use positions for loop-end blocks when the
duke@435:       // interval is used anywhere inside this loop.  It's possible
duke@435:       // that the block was part of a non-natural loop, so it might
duke@435:       // have an invalid loop index.
duke@435:       if (block->is_set(BlockBegin::linear_scan_loop_end_flag) &&
duke@435:           block->loop_index() != -1 &&
duke@435:           is_interval_in_loop(number, block->loop_index())) {
duke@435:         interval_at(number)->add_use_pos(block_to + 1, loopEndMarker);
duke@435:       }
duke@435:     }
duke@435: 
duke@435:     // iterate all instructions of the block in reverse order.
duke@435:     // skip the first instruction because it is always a label
duke@435:     // definitions of intervals are processed before uses
duke@435:     assert(visitor.no_operands(instructions->at(0)), "first operation must always be a label");
duke@435:     for (int j = instructions->length() - 1; j >= 1; j--) {
duke@435:       LIR_Op* op = instructions->at(j);
duke@435:       int op_id = op->id();
duke@435: 
duke@435:       // visit operation to collect all operands
duke@435:       visitor.visit(op);
duke@435: 
duke@435:       // add a temp range for each register if operation destroys caller-save registers
duke@435:       if (visitor.has_call()) {
duke@435:         for (int k = 0; k < num_caller_save_registers; k++) {
duke@435:           add_temp(caller_save_registers[k], op_id, noUse, T_ILLEGAL);
duke@435:         }
duke@435:         TRACE_LINEAR_SCAN(4, tty->print_cr("operation destroys all caller-save registers"));
duke@435:       }
duke@435: 
duke@435:       // Add any platform dependent temps
duke@435:       pd_add_temps(op);
duke@435: 
duke@435:       // visit definitions (output and temp operands)
duke@435:       int k, n;
duke@435:       n = visitor.opr_count(LIR_OpVisitState::outputMode);
duke@435:       for (k = 0; k < n; k++) {
duke@435:         LIR_Opr opr = visitor.opr_at(LIR_OpVisitState::outputMode, k);
duke@435:         assert(opr->is_register(), "visitor should only return register operands");
duke@435:         add_def(opr, op_id, use_kind_of_output_operand(op, opr));
duke@435:       }
duke@435: 
duke@435:       n = visitor.opr_count(LIR_OpVisitState::tempMode);
duke@435:       for (k = 0; k < n; k++) {
duke@435:         LIR_Opr opr = visitor.opr_at(LIR_OpVisitState::tempMode, k);
duke@435:         assert(opr->is_register(), "visitor should only return register operands");
duke@435:         add_temp(opr, op_id, mustHaveRegister);
duke@435:       }
duke@435: 
duke@435:       // visit uses (input operands)
duke@435:       n = visitor.opr_count(LIR_OpVisitState::inputMode);
duke@435:       for (k = 0; k < n; k++) {
duke@435:         LIR_Opr opr = visitor.opr_at(LIR_OpVisitState::inputMode, k);
duke@435:         assert(opr->is_register(), "visitor should only return register operands");
duke@435:         add_use(opr, block_from, op_id, use_kind_of_input_operand(op, opr));
duke@435:       }
duke@435: 
duke@435:       // Add uses of live locals from interpreter's point of view for proper
duke@435:       // debug information generation
duke@435:       // Treat these operands as temp values (if the life range is extended
duke@435:       // to a call site, the value would be in a register at the call otherwise)
duke@435:       n = visitor.info_count();
duke@435:       for (k = 0; k < n; k++) {
duke@435:         CodeEmitInfo* info = visitor.info_at(k);
duke@435:         ValueStack* stack = info->stack();
duke@435:         for_each_state_value(stack, value,
duke@435:           add_use(value, block_from, op_id + 1, noUse);
duke@435:         );
duke@435:       }
duke@435: 
duke@435:       // special steps for some instructions (especially moves)
duke@435:       handle_method_arguments(op);
duke@435:       handle_doubleword_moves(op);
duke@435:       add_register_hints(op);
duke@435: 
duke@435:     } // end of instruction iteration
duke@435:   } // end of block iteration
duke@435: 
duke@435: 
duke@435:   // add the range [0, 1[ to all fixed intervals
duke@435:   // -> the register allocator need not handle unhandled fixed intervals
duke@435:   for (int n = 0; n < LinearScan::nof_regs; n++) {
duke@435:     Interval* interval = interval_at(n);
duke@435:     if (interval != NULL) {
duke@435:       interval->add_range(0, 1);
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: // ********** Phase 5: actual register allocation
duke@435: 
duke@435: int LinearScan::interval_cmp(Interval** a, Interval** b) {
duke@435:   if (*a != NULL) {
duke@435:     if (*b != NULL) {
duke@435:       return (*a)->from() - (*b)->from();
duke@435:     } else {
duke@435:       return -1;
duke@435:     }
duke@435:   } else {
duke@435:     if (*b != NULL) {
duke@435:       return 1;
duke@435:     } else {
duke@435:       return 0;
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: #ifndef PRODUCT
duke@435: bool LinearScan::is_sorted(IntervalArray* intervals) {
duke@435:   int from = -1;
duke@435:   int i, j;
duke@435:   for (i = 0; i < intervals->length(); i ++) {
duke@435:     Interval* it = intervals->at(i);
duke@435:     if (it != NULL) {
duke@435:       if (from > it->from()) {
duke@435:         assert(false, "");
duke@435:         return false;
duke@435:       }
duke@435:       from = it->from();
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   // check in both directions if sorted list and unsorted list contain same intervals
duke@435:   for (i = 0; i < interval_count(); i++) {
duke@435:     if (interval_at(i) != NULL) {
duke@435:       int num_found = 0;
duke@435:       for (j = 0; j < intervals->length(); j++) {
duke@435:         if (interval_at(i) == intervals->at(j)) {
duke@435:           num_found++;
duke@435:         }
duke@435:       }
duke@435:       assert(num_found == 1, "lists do not contain same intervals");
duke@435:     }
duke@435:   }
duke@435:   for (j = 0; j < intervals->length(); j++) {
duke@435:     int num_found = 0;
duke@435:     for (i = 0; i < interval_count(); i++) {
duke@435:       if (interval_at(i) == intervals->at(j)) {
duke@435:         num_found++;
duke@435:       }
duke@435:     }
duke@435:     assert(num_found == 1, "lists do not contain same intervals");
duke@435:   }
duke@435: 
duke@435:   return true;
duke@435: }
duke@435: #endif
duke@435: 
duke@435: void LinearScan::add_to_list(Interval** first, Interval** prev, Interval* interval) {
duke@435:   if (*prev != NULL) {
duke@435:     (*prev)->set_next(interval);
duke@435:   } else {
duke@435:     *first = interval;
duke@435:   }
duke@435:   *prev = interval;
duke@435: }
duke@435: 
duke@435: void LinearScan::create_unhandled_lists(Interval** list1, Interval** list2, bool (is_list1)(const Interval* i), bool (is_list2)(const Interval* i)) {
duke@435:   assert(is_sorted(_sorted_intervals), "interval list is not sorted");
duke@435: 
duke@435:   *list1 = *list2 = Interval::end();
duke@435: 
duke@435:   Interval* list1_prev = NULL;
duke@435:   Interval* list2_prev = NULL;
duke@435:   Interval* v;
duke@435: 
duke@435:   const int n = _sorted_intervals->length();
duke@435:   for (int i = 0; i < n; i++) {
duke@435:     v = _sorted_intervals->at(i);
duke@435:     if (v == NULL) continue;
duke@435: 
duke@435:     if (is_list1(v)) {
duke@435:       add_to_list(list1, &list1_prev, v);
duke@435:     } else if (is_list2 == NULL || is_list2(v)) {
duke@435:       add_to_list(list2, &list2_prev, v);
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   if (list1_prev != NULL) list1_prev->set_next(Interval::end());
duke@435:   if (list2_prev != NULL) list2_prev->set_next(Interval::end());
duke@435: 
duke@435:   assert(list1_prev == NULL || list1_prev->next() == Interval::end(), "linear list ends not with sentinel");
duke@435:   assert(list2_prev == NULL || list2_prev->next() == Interval::end(), "linear list ends not with sentinel");
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScan::sort_intervals_before_allocation() {
duke@435:   TIME_LINEAR_SCAN(timer_sort_intervals_before);
duke@435: 
never@2404:   if (_needs_full_resort) {
never@2404:     // There is no known reason why this should occur but just in case...
never@2404:     assert(false, "should never occur");
never@2404:     // Re-sort existing interval list because an Interval::from() has changed
never@2404:     _sorted_intervals->sort(interval_cmp);
never@2404:     _needs_full_resort = false;
never@2404:   }
never@2404: 
duke@435:   IntervalList* unsorted_list = &_intervals;
duke@435:   int unsorted_len = unsorted_list->length();
duke@435:   int sorted_len = 0;
duke@435:   int unsorted_idx;
duke@435:   int sorted_idx = 0;
duke@435:   int sorted_from_max = -1;
duke@435: 
duke@435:   // calc number of items for sorted list (sorted list must not contain NULL values)
duke@435:   for (unsorted_idx = 0; unsorted_idx < unsorted_len; unsorted_idx++) {
duke@435:     if (unsorted_list->at(unsorted_idx) != NULL) {
duke@435:       sorted_len++;
duke@435:     }
duke@435:   }
duke@435:   IntervalArray* sorted_list = new IntervalArray(sorted_len);
duke@435: 
duke@435:   // special sorting algorithm: the original interval-list is almost sorted,
duke@435:   // only some intervals are swapped. So this is much faster than a complete QuickSort
duke@435:   for (unsorted_idx = 0; unsorted_idx < unsorted_len; unsorted_idx++) {
duke@435:     Interval* cur_interval = unsorted_list->at(unsorted_idx);
duke@435: 
duke@435:     if (cur_interval != NULL) {
duke@435:       int cur_from = cur_interval->from();
duke@435: 
duke@435:       if (sorted_from_max <= cur_from) {
duke@435:         sorted_list->at_put(sorted_idx++, cur_interval);
duke@435:         sorted_from_max = cur_interval->from();
duke@435:       } else {
duke@435:         // the asumption that the intervals are already sorted failed,
duke@435:         // so this interval must be sorted in manually
duke@435:         int j;
duke@435:         for (j = sorted_idx - 1; j >= 0 && cur_from < sorted_list->at(j)->from(); j--) {
duke@435:           sorted_list->at_put(j + 1, sorted_list->at(j));
duke@435:         }
duke@435:         sorted_list->at_put(j + 1, cur_interval);
duke@435:         sorted_idx++;
duke@435:       }
duke@435:     }
duke@435:   }
duke@435:   _sorted_intervals = sorted_list;
never@2404:   assert(is_sorted(_sorted_intervals), "intervals unsorted");
duke@435: }
duke@435: 
duke@435: void LinearScan::sort_intervals_after_allocation() {
duke@435:   TIME_LINEAR_SCAN(timer_sort_intervals_after);
duke@435: 
never@2404:   if (_needs_full_resort) {
never@2404:     // Re-sort existing interval list because an Interval::from() has changed
never@2404:     _sorted_intervals->sort(interval_cmp);
never@2404:     _needs_full_resort = false;
never@2404:   }
never@2404: 
duke@435:   IntervalArray* old_list      = _sorted_intervals;
duke@435:   IntervalList*  new_list      = _new_intervals_from_allocation;
duke@435:   int old_len = old_list->length();
duke@435:   int new_len = new_list->length();
duke@435: 
duke@435:   if (new_len == 0) {
duke@435:     // no intervals have been added during allocation, so sorted list is already up to date
never@2404:     assert(is_sorted(_sorted_intervals), "intervals unsorted");
duke@435:     return;
duke@435:   }
duke@435: 
duke@435:   // conventional sort-algorithm for new intervals
duke@435:   new_list->sort(interval_cmp);
duke@435: 
duke@435:   // merge old and new list (both already sorted) into one combined list
duke@435:   IntervalArray* combined_list = new IntervalArray(old_len + new_len);
duke@435:   int old_idx = 0;
duke@435:   int new_idx = 0;
duke@435: 
duke@435:   while (old_idx + new_idx < old_len + new_len) {
duke@435:     if (new_idx >= new_len || (old_idx < old_len && old_list->at(old_idx)->from() <= new_list->at(new_idx)->from())) {
duke@435:       combined_list->at_put(old_idx + new_idx, old_list->at(old_idx));
duke@435:       old_idx++;
duke@435:     } else {
duke@435:       combined_list->at_put(old_idx + new_idx, new_list->at(new_idx));
duke@435:       new_idx++;
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   _sorted_intervals = combined_list;
never@2404:   assert(is_sorted(_sorted_intervals), "intervals unsorted");
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScan::allocate_registers() {
duke@435:   TIME_LINEAR_SCAN(timer_allocate_registers);
duke@435: 
duke@435:   Interval* precolored_cpu_intervals, *not_precolored_cpu_intervals;
duke@435:   Interval* precolored_fpu_intervals, *not_precolored_fpu_intervals;
duke@435: 
duke@435:   // allocate cpu registers
morris@6958:   create_unhandled_lists(&precolored_cpu_intervals, &not_precolored_cpu_intervals,
morris@6958:                          is_precolored_cpu_interval, is_virtual_cpu_interval);
morris@6958: 
morris@6958:   // allocate fpu registers
morris@6958:   create_unhandled_lists(&precolored_fpu_intervals, &not_precolored_fpu_intervals,
morris@6958:                          is_precolored_fpu_interval, is_virtual_fpu_interval);
morris@6958: 
morris@6958:   // the fpu interval allocation cannot be moved down below with the fpu section as
morris@6958:   // the cpu_lsw.walk() changes interval positions.
morris@6958: 
duke@435:   LinearScanWalker cpu_lsw(this, precolored_cpu_intervals, not_precolored_cpu_intervals);
duke@435:   cpu_lsw.walk();
duke@435:   cpu_lsw.finish_allocation();
duke@435: 
duke@435:   if (has_fpu_registers()) {
duke@435:     LinearScanWalker fpu_lsw(this, precolored_fpu_intervals, not_precolored_fpu_intervals);
duke@435:     fpu_lsw.walk();
duke@435:     fpu_lsw.finish_allocation();
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: // ********** Phase 6: resolve data flow
duke@435: // (insert moves at edges between blocks if intervals have been split)
duke@435: 
duke@435: // wrapper for Interval::split_child_at_op_id that performs a bailout in product mode
duke@435: // instead of returning NULL
duke@435: Interval* LinearScan::split_child_at_op_id(Interval* interval, int op_id, LIR_OpVisitState::OprMode mode) {
duke@435:   Interval* result = interval->split_child_at_op_id(op_id, mode);
duke@435:   if (result != NULL) {
duke@435:     return result;
duke@435:   }
duke@435: 
duke@435:   assert(false, "must find an interval, but do a clean bailout in product mode");
duke@435:   result = new Interval(LIR_OprDesc::vreg_base);
duke@435:   result->assign_reg(0);
duke@435:   result->set_type(T_INT);
duke@435:   BAILOUT_("LinearScan: interval is NULL", result);
duke@435: }
duke@435: 
duke@435: 
duke@435: Interval* LinearScan::interval_at_block_begin(BlockBegin* block, int reg_num) {
duke@435:   assert(LinearScan::nof_regs <= reg_num && reg_num < num_virtual_regs(), "register number out of bounds");
duke@435:   assert(interval_at(reg_num) != NULL, "no interval found");
duke@435: 
duke@435:   return split_child_at_op_id(interval_at(reg_num), block->first_lir_instruction_id(), LIR_OpVisitState::outputMode);
duke@435: }
duke@435: 
duke@435: Interval* LinearScan::interval_at_block_end(BlockBegin* block, int reg_num) {
duke@435:   assert(LinearScan::nof_regs <= reg_num && reg_num < num_virtual_regs(), "register number out of bounds");
duke@435:   assert(interval_at(reg_num) != NULL, "no interval found");
duke@435: 
duke@435:   return split_child_at_op_id(interval_at(reg_num), block->last_lir_instruction_id() + 1, LIR_OpVisitState::outputMode);
duke@435: }
duke@435: 
duke@435: Interval* LinearScan::interval_at_op_id(int reg_num, int op_id) {
duke@435:   assert(LinearScan::nof_regs <= reg_num && reg_num < num_virtual_regs(), "register number out of bounds");
duke@435:   assert(interval_at(reg_num) != NULL, "no interval found");
duke@435: 
duke@435:   return split_child_at_op_id(interval_at(reg_num), op_id, LIR_OpVisitState::inputMode);
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScan::resolve_collect_mappings(BlockBegin* from_block, BlockBegin* to_block, MoveResolver &move_resolver) {
duke@435:   DEBUG_ONLY(move_resolver.check_empty());
duke@435: 
duke@435:   const int num_regs = num_virtual_regs();
duke@435:   const int size = live_set_size();
duke@435:   const BitMap live_at_edge = to_block->live_in();
duke@435: 
duke@435:   // visit all registers where the live_at_edge bit is set
never@739:   for (int r = (int)live_at_edge.get_next_one_offset(0, size); r < size; r = (int)live_at_edge.get_next_one_offset(r + 1, size)) {
duke@435:     assert(r < num_regs, "live information set for not exisiting interval");
duke@435:     assert(from_block->live_out().at(r) && to_block->live_in().at(r), "interval not live at this edge");
duke@435: 
duke@435:     Interval* from_interval = interval_at_block_end(from_block, r);
duke@435:     Interval* to_interval = interval_at_block_begin(to_block, r);
duke@435: 
duke@435:     if (from_interval != to_interval && (from_interval->assigned_reg() != to_interval->assigned_reg() || from_interval->assigned_regHi() != to_interval->assigned_regHi())) {
duke@435:       // need to insert move instruction
duke@435:       move_resolver.add_mapping(from_interval, to_interval);
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScan::resolve_find_insert_pos(BlockBegin* from_block, BlockBegin* to_block, MoveResolver &move_resolver) {
duke@435:   if (from_block->number_of_sux() <= 1) {
duke@435:     TRACE_LINEAR_SCAN(4, tty->print_cr("inserting moves at end of from_block B%d", from_block->block_id()));
duke@435: 
duke@435:     LIR_OpList* instructions = from_block->lir()->instructions_list();
duke@435:     LIR_OpBranch* branch = instructions->last()->as_OpBranch();
duke@435:     if (branch != NULL) {
duke@435:       // insert moves before branch
duke@435:       assert(branch->cond() == lir_cond_always, "block does not end with an unconditional jump");
duke@435:       move_resolver.set_insert_position(from_block->lir(), instructions->length() - 2);
duke@435:     } else {
duke@435:       move_resolver.set_insert_position(from_block->lir(), instructions->length() - 1);
duke@435:     }
duke@435: 
duke@435:   } else {
duke@435:     TRACE_LINEAR_SCAN(4, tty->print_cr("inserting moves at beginning of to_block B%d", to_block->block_id()));
duke@435: #ifdef ASSERT
duke@435:     assert(from_block->lir()->instructions_list()->at(0)->as_OpLabel() != NULL, "block does not start with a label");
duke@435: 
duke@435:     // because the number of predecessor edges matches the number of
duke@435:     // successor edges, blocks which are reached by switch statements
duke@435:     // may have be more than one predecessor but it will be guaranteed
duke@435:     // that all predecessors will be the same.
duke@435:     for (int i = 0; i < to_block->number_of_preds(); i++) {
duke@435:       assert(from_block == to_block->pred_at(i), "all critical edges must be broken");
duke@435:     }
duke@435: #endif
duke@435: 
duke@435:     move_resolver.set_insert_position(to_block->lir(), 0);
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: // insert necessary moves (spilling or reloading) at edges between blocks if interval has been split
duke@435: void LinearScan::resolve_data_flow() {
duke@435:   TIME_LINEAR_SCAN(timer_resolve_data_flow);
duke@435: 
duke@435:   int num_blocks = block_count();
duke@435:   MoveResolver move_resolver(this);
duke@435:   BitMap block_completed(num_blocks);  block_completed.clear();
duke@435:   BitMap already_resolved(num_blocks); already_resolved.clear();
duke@435: 
duke@435:   int i;
duke@435:   for (i = 0; i < num_blocks; i++) {
duke@435:     BlockBegin* block = block_at(i);
duke@435: 
duke@435:     // check if block has only one predecessor and only one successor
duke@435:     if (block->number_of_preds() == 1 && block->number_of_sux() == 1 && block->number_of_exception_handlers() == 0) {
duke@435:       LIR_OpList* instructions = block->lir()->instructions_list();
duke@435:       assert(instructions->at(0)->code() == lir_label, "block must start with label");
duke@435:       assert(instructions->last()->code() == lir_branch, "block with successors must end with branch");
duke@435:       assert(instructions->last()->as_OpBranch()->cond() == lir_cond_always, "block with successor must end with unconditional branch");
duke@435: 
duke@435:       // check if block is empty (only label and branch)
duke@435:       if (instructions->length() == 2) {
duke@435:         BlockBegin* pred = block->pred_at(0);
duke@435:         BlockBegin* sux = block->sux_at(0);
duke@435: 
duke@435:         // prevent optimization of two consecutive blocks
duke@435:         if (!block_completed.at(pred->linear_scan_number()) && !block_completed.at(sux->linear_scan_number())) {
duke@435:           TRACE_LINEAR_SCAN(3, tty->print_cr("**** optimizing empty block B%d (pred: B%d, sux: B%d)", block->block_id(), pred->block_id(), sux->block_id()));
duke@435:           block_completed.set_bit(block->linear_scan_number());
duke@435: 
duke@435:           // directly resolve between pred and sux (without looking at the empty block between)
duke@435:           resolve_collect_mappings(pred, sux, move_resolver);
duke@435:           if (move_resolver.has_mappings()) {
duke@435:             move_resolver.set_insert_position(block->lir(), 0);
duke@435:             move_resolver.resolve_and_append_moves();
duke@435:           }
duke@435:         }
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: 
duke@435: 
duke@435:   for (i = 0; i < num_blocks; i++) {
duke@435:     if (!block_completed.at(i)) {
duke@435:       BlockBegin* from_block = block_at(i);
duke@435:       already_resolved.set_from(block_completed);
duke@435: 
duke@435:       int num_sux = from_block->number_of_sux();
duke@435:       for (int s = 0; s < num_sux; s++) {
duke@435:         BlockBegin* to_block = from_block->sux_at(s);
duke@435: 
duke@435:         // check for duplicate edges between the same blocks (can happen with switch blocks)
duke@435:         if (!already_resolved.at(to_block->linear_scan_number())) {
duke@435:           TRACE_LINEAR_SCAN(3, tty->print_cr("**** processing edge between B%d and B%d", from_block->block_id(), to_block->block_id()));
duke@435:           already_resolved.set_bit(to_block->linear_scan_number());
duke@435: 
duke@435:           // collect all intervals that have been split between from_block and to_block
duke@435:           resolve_collect_mappings(from_block, to_block, move_resolver);
duke@435:           if (move_resolver.has_mappings()) {
duke@435:             resolve_find_insert_pos(from_block, to_block, move_resolver);
duke@435:             move_resolver.resolve_and_append_moves();
duke@435:           }
duke@435:         }
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScan::resolve_exception_entry(BlockBegin* block, int reg_num, MoveResolver &move_resolver) {
duke@435:   if (interval_at(reg_num) == NULL) {
duke@435:     // if a phi function is never used, no interval is created -> ignore this
duke@435:     return;
duke@435:   }
duke@435: 
duke@435:   Interval* interval = interval_at_block_begin(block, reg_num);
duke@435:   int reg = interval->assigned_reg();
duke@435:   int regHi = interval->assigned_regHi();
duke@435: 
duke@435:   if ((reg < nof_regs && interval->always_in_memory()) ||
duke@435:       (use_fpu_stack_allocation() && reg >= pd_first_fpu_reg && reg <= pd_last_fpu_reg)) {
duke@435:     // the interval is split to get a short range that is located on the stack
duke@435:     // in the following two cases:
duke@435:     // * the interval started in memory (e.g. method parameter), but is currently in a register
duke@435:     //   this is an optimization for exception handling that reduces the number of moves that
duke@435:     //   are necessary for resolving the states when an exception uses this exception handler
duke@435:     // * the interval would be on the fpu stack at the begin of the exception handler
duke@435:     //   this is not allowed because of the complicated fpu stack handling on Intel
duke@435: 
duke@435:     // range that will be spilled to memory
duke@435:     int from_op_id = block->first_lir_instruction_id();
duke@435:     int to_op_id = from_op_id + 1;  // short live range of length 1
duke@435:     assert(interval->from() <= from_op_id && interval->to() >= to_op_id,
duke@435:            "no split allowed between exception entry and first instruction");
duke@435: 
duke@435:     if (interval->from() != from_op_id) {
duke@435:       // the part before from_op_id is unchanged
duke@435:       interval = interval->split(from_op_id);
duke@435:       interval->assign_reg(reg, regHi);
duke@435:       append_interval(interval);
never@2404:     } else {
never@2404:       _needs_full_resort = true;
duke@435:     }
duke@435:     assert(interval->from() == from_op_id, "must be true now");
duke@435: 
duke@435:     Interval* spilled_part = interval;
duke@435:     if (interval->to() != to_op_id) {
duke@435:       // the part after to_op_id is unchanged
duke@435:       spilled_part = interval->split_from_start(to_op_id);
duke@435:       append_interval(spilled_part);
duke@435:       move_resolver.add_mapping(spilled_part, interval);
duke@435:     }
duke@435:     assign_spill_slot(spilled_part);
duke@435: 
duke@435:     assert(spilled_part->from() == from_op_id && spilled_part->to() == to_op_id, "just checking");
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScan::resolve_exception_entry(BlockBegin* block, MoveResolver &move_resolver) {
duke@435:   assert(block->is_set(BlockBegin::exception_entry_flag), "should not call otherwise");
duke@435:   DEBUG_ONLY(move_resolver.check_empty());
duke@435: 
duke@435:   // visit all registers where the live_in bit is set
duke@435:   int size = live_set_size();
never@739:   for (int r = (int)block->live_in().get_next_one_offset(0, size); r < size; r = (int)block->live_in().get_next_one_offset(r + 1, size)) {
duke@435:     resolve_exception_entry(block, r, move_resolver);
duke@435:   }
duke@435: 
duke@435:   // the live_in bits are not set for phi functions of the xhandler entry, so iterate them separately
duke@435:   for_each_phi_fun(block, phi,
duke@435:     resolve_exception_entry(block, phi->operand()->vreg_number(), move_resolver)
duke@435:   );
duke@435: 
duke@435:   if (move_resolver.has_mappings()) {
duke@435:     // insert moves after first instruction
roland@3609:     move_resolver.set_insert_position(block->lir(), 0);
duke@435:     move_resolver.resolve_and_append_moves();
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScan::resolve_exception_edge(XHandler* handler, int throwing_op_id, int reg_num, Phi* phi, MoveResolver &move_resolver) {
duke@435:   if (interval_at(reg_num) == NULL) {
duke@435:     // if a phi function is never used, no interval is created -> ignore this
duke@435:     return;
duke@435:   }
duke@435: 
duke@435:   // the computation of to_interval is equal to resolve_collect_mappings,
duke@435:   // but from_interval is more complicated because of phi functions
duke@435:   BlockBegin* to_block = handler->entry_block();
duke@435:   Interval* to_interval = interval_at_block_begin(to_block, reg_num);
duke@435: 
duke@435:   if (phi != NULL) {
duke@435:     // phi function of the exception entry block
duke@435:     // no moves are created for this phi function in the LIR_Generator, so the
duke@435:     // interval at the throwing instruction must be searched using the operands
duke@435:     // of the phi function
duke@435:     Value from_value = phi->operand_at(handler->phi_operand());
duke@435: 
duke@435:     // with phi functions it can happen that the same from_value is used in
duke@435:     // multiple mappings, so notify move-resolver that this is allowed
duke@435:     move_resolver.set_multiple_reads_allowed();
duke@435: 
duke@435:     Constant* con = from_value->as_Constant();
duke@435:     if (con != NULL && !con->is_pinned()) {
duke@435:       // unpinned constants may have no register, so add mapping from constant to interval
duke@435:       move_resolver.add_mapping(LIR_OprFact::value_type(con->type()), to_interval);
duke@435:     } else {
duke@435:       // search split child at the throwing op_id
duke@435:       Interval* from_interval = interval_at_op_id(from_value->operand()->vreg_number(), throwing_op_id);
duke@435:       move_resolver.add_mapping(from_interval, to_interval);
duke@435:     }
duke@435: 
duke@435:   } else {
duke@435:     // no phi function, so use reg_num also for from_interval
duke@435:     // search split child at the throwing op_id
duke@435:     Interval* from_interval = interval_at_op_id(reg_num, throwing_op_id);
duke@435:     if (from_interval != to_interval) {
duke@435:       // optimization to reduce number of moves: when to_interval is on stack and
duke@435:       // the stack slot is known to be always correct, then no move is necessary
duke@435:       if (!from_interval->always_in_memory() || from_interval->canonical_spill_slot() != to_interval->assigned_reg()) {
duke@435:         move_resolver.add_mapping(from_interval, to_interval);
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScan::resolve_exception_edge(XHandler* handler, int throwing_op_id, MoveResolver &move_resolver) {
duke@435:   TRACE_LINEAR_SCAN(4, tty->print_cr("resolving exception handler B%d: throwing_op_id=%d", handler->entry_block()->block_id(), throwing_op_id));
duke@435: 
duke@435:   DEBUG_ONLY(move_resolver.check_empty());
duke@435:   assert(handler->lir_op_id() == -1, "already processed this xhandler");
duke@435:   DEBUG_ONLY(handler->set_lir_op_id(throwing_op_id));
duke@435:   assert(handler->entry_code() == NULL, "code already present");
duke@435: 
duke@435:   // visit all registers where the live_in bit is set
duke@435:   BlockBegin* block = handler->entry_block();
duke@435:   int size = live_set_size();
never@739:   for (int r = (int)block->live_in().get_next_one_offset(0, size); r < size; r = (int)block->live_in().get_next_one_offset(r + 1, size)) {
duke@435:     resolve_exception_edge(handler, throwing_op_id, r, NULL, move_resolver);
duke@435:   }
duke@435: 
duke@435:   // the live_in bits are not set for phi functions of the xhandler entry, so iterate them separately
duke@435:   for_each_phi_fun(block, phi,
duke@435:     resolve_exception_edge(handler, throwing_op_id, phi->operand()->vreg_number(), phi, move_resolver)
duke@435:   );
duke@435: 
duke@435:   if (move_resolver.has_mappings()) {
duke@435:     LIR_List* entry_code = new LIR_List(compilation());
duke@435:     move_resolver.set_insert_position(entry_code, 0);
duke@435:     move_resolver.resolve_and_append_moves();
duke@435: 
duke@435:     entry_code->jump(handler->entry_block());
duke@435:     handler->set_entry_code(entry_code);
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScan::resolve_exception_handlers() {
duke@435:   MoveResolver move_resolver(this);
duke@435:   LIR_OpVisitState visitor;
duke@435:   int num_blocks = block_count();
duke@435: 
duke@435:   int i;
duke@435:   for (i = 0; i < num_blocks; i++) {
duke@435:     BlockBegin* block = block_at(i);
duke@435:     if (block->is_set(BlockBegin::exception_entry_flag)) {
duke@435:       resolve_exception_entry(block, move_resolver);
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   for (i = 0; i < num_blocks; i++) {
duke@435:     BlockBegin* block = block_at(i);
duke@435:     LIR_List* ops = block->lir();
duke@435:     int num_ops = ops->length();
duke@435: 
duke@435:     // iterate all instructions of the block. skip the first because it is always a label
duke@435:     assert(visitor.no_operands(ops->at(0)), "first operation must always be a label");
duke@435:     for (int j = 1; j < num_ops; j++) {
duke@435:       LIR_Op* op = ops->at(j);
duke@435:       int op_id = op->id();
duke@435: 
duke@435:       if (op_id != -1 && has_info(op_id)) {
duke@435:         // visit operation to collect all operands
duke@435:         visitor.visit(op);
duke@435:         assert(visitor.info_count() > 0, "should not visit otherwise");
duke@435: 
duke@435:         XHandlers* xhandlers = visitor.all_xhandler();
duke@435:         int n = xhandlers->length();
duke@435:         for (int k = 0; k < n; k++) {
duke@435:           resolve_exception_edge(xhandlers->handler_at(k), op_id, move_resolver);
duke@435:         }
duke@435: 
duke@435: #ifdef ASSERT
duke@435:       } else {
duke@435:         visitor.visit(op);
duke@435:         assert(visitor.all_xhandler()->length() == 0, "missed exception handler");
duke@435: #endif
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: // ********** Phase 7: assign register numbers back to LIR
duke@435: // (includes computation of debug information and oop maps)
duke@435: 
duke@435: VMReg LinearScan::vm_reg_for_interval(Interval* interval) {
duke@435:   VMReg reg = interval->cached_vm_reg();
duke@435:   if (!reg->is_valid() ) {
duke@435:     reg = vm_reg_for_operand(operand_for_interval(interval));
duke@435:     interval->set_cached_vm_reg(reg);
duke@435:   }
duke@435:   assert(reg == vm_reg_for_operand(operand_for_interval(interval)), "wrong cached value");
duke@435:   return reg;
duke@435: }
duke@435: 
duke@435: VMReg LinearScan::vm_reg_for_operand(LIR_Opr opr) {
duke@435:   assert(opr->is_oop(), "currently only implemented for oop operands");
duke@435:   return frame_map()->regname(opr);
duke@435: }
duke@435: 
duke@435: 
duke@435: LIR_Opr LinearScan::operand_for_interval(Interval* interval) {
duke@435:   LIR_Opr opr = interval->cached_opr();
duke@435:   if (opr->is_illegal()) {
duke@435:     opr = calc_operand_for_interval(interval);
duke@435:     interval->set_cached_opr(opr);
duke@435:   }
duke@435: 
duke@435:   assert(opr == calc_operand_for_interval(interval), "wrong cached value");
duke@435:   return opr;
duke@435: }
duke@435: 
duke@435: LIR_Opr LinearScan::calc_operand_for_interval(const Interval* interval) {
duke@435:   int assigned_reg = interval->assigned_reg();
duke@435:   BasicType type = interval->type();
duke@435: 
duke@435:   if (assigned_reg >= nof_regs) {
duke@435:     // stack slot
duke@435:     assert(interval->assigned_regHi() == any_reg, "must not have hi register");
duke@435:     return LIR_OprFact::stack(assigned_reg - nof_regs, type);
duke@435: 
duke@435:   } else {
duke@435:     // register
duke@435:     switch (type) {
duke@435:       case T_OBJECT: {
duke@435:         assert(assigned_reg >= pd_first_cpu_reg && assigned_reg <= pd_last_cpu_reg, "no cpu register");
duke@435:         assert(interval->assigned_regHi() == any_reg, "must not have hi register");
duke@435:         return LIR_OprFact::single_cpu_oop(assigned_reg);
duke@435:       }
duke@435: 
never@2171:       case T_ADDRESS: {
never@2171:         assert(assigned_reg >= pd_first_cpu_reg && assigned_reg <= pd_last_cpu_reg, "no cpu register");
never@2171:         assert(interval->assigned_regHi() == any_reg, "must not have hi register");
never@2171:         return LIR_OprFact::single_cpu_address(assigned_reg);
never@2171:       }
never@2171: 
roland@4051:       case T_METADATA: {
roland@4051:         assert(assigned_reg >= pd_first_cpu_reg && assigned_reg <= pd_last_cpu_reg, "no cpu register");
roland@4051:         assert(interval->assigned_regHi() == any_reg, "must not have hi register");
roland@4051:         return LIR_OprFact::single_cpu_metadata(assigned_reg);
roland@4051:       }
roland@4051: 
bobv@2036: #ifdef __SOFTFP__
bobv@2036:       case T_FLOAT:  // fall through
bobv@2036: #endif // __SOFTFP__
duke@435:       case T_INT: {
duke@435:         assert(assigned_reg >= pd_first_cpu_reg && assigned_reg <= pd_last_cpu_reg, "no cpu register");
duke@435:         assert(interval->assigned_regHi() == any_reg, "must not have hi register");
duke@435:         return LIR_OprFact::single_cpu(assigned_reg);
duke@435:       }
duke@435: 
bobv@2036: #ifdef __SOFTFP__
bobv@2036:       case T_DOUBLE:  // fall through
bobv@2036: #endif // __SOFTFP__
duke@435:       case T_LONG: {
duke@435:         int assigned_regHi = interval->assigned_regHi();
duke@435:         assert(assigned_reg >= pd_first_cpu_reg && assigned_reg <= pd_last_cpu_reg, "no cpu register");
duke@435:         assert(num_physical_regs(T_LONG) == 1 ||
duke@435:                (assigned_regHi >= pd_first_cpu_reg && assigned_regHi <= pd_last_cpu_reg), "no cpu register");
duke@435: 
duke@435:         assert(assigned_reg != assigned_regHi, "invalid allocation");
duke@435:         assert(num_physical_regs(T_LONG) == 1 || assigned_reg < assigned_regHi,
duke@435:                "register numbers must be sorted (ensure that e.g. a move from eax,ebx to ebx,eax can not occur)");
duke@435:         assert((assigned_regHi != any_reg) ^ (num_physical_regs(T_LONG) == 1), "must be match");
duke@435:         if (requires_adjacent_regs(T_LONG)) {
duke@435:           assert(assigned_reg % 2 == 0 && assigned_reg + 1 == assigned_regHi, "must be sequential and even");
duke@435:         }
duke@435: 
duke@435: #ifdef _LP64
duke@435:         return LIR_OprFact::double_cpu(assigned_reg, assigned_reg);
duke@435: #else
bobv@2036: #if defined(SPARC) || defined(PPC)
duke@435:         return LIR_OprFact::double_cpu(assigned_regHi, assigned_reg);
duke@435: #else
duke@435:         return LIR_OprFact::double_cpu(assigned_reg, assigned_regHi);
never@739: #endif // SPARC
never@739: #endif // LP64
duke@435:       }
duke@435: 
bobv@2036: #ifndef __SOFTFP__
duke@435:       case T_FLOAT: {
never@739: #ifdef X86
duke@435:         if (UseSSE >= 1) {
duke@435:           assert(assigned_reg >= pd_first_xmm_reg && assigned_reg <= pd_last_xmm_reg, "no xmm register");
duke@435:           assert(interval->assigned_regHi() == any_reg, "must not have hi register");
duke@435:           return LIR_OprFact::single_xmm(assigned_reg - pd_first_xmm_reg);
duke@435:         }
duke@435: #endif
duke@435: 
duke@435:         assert(assigned_reg >= pd_first_fpu_reg && assigned_reg <= pd_last_fpu_reg, "no fpu register");
duke@435:         assert(interval->assigned_regHi() == any_reg, "must not have hi register");
duke@435:         return LIR_OprFact::single_fpu(assigned_reg - pd_first_fpu_reg);
duke@435:       }
duke@435: 
duke@435:       case T_DOUBLE: {
never@739: #ifdef X86
duke@435:         if (UseSSE >= 2) {
duke@435:           assert(assigned_reg >= pd_first_xmm_reg && assigned_reg <= pd_last_xmm_reg, "no xmm register");
duke@435:           assert(interval->assigned_regHi() == any_reg, "must not have hi register (double xmm values are stored in one register)");
duke@435:           return LIR_OprFact::double_xmm(assigned_reg - pd_first_xmm_reg);
duke@435:         }
duke@435: #endif
duke@435: 
duke@435: #ifdef SPARC
duke@435:         assert(assigned_reg >= pd_first_fpu_reg && assigned_reg <= pd_last_fpu_reg, "no fpu register");
duke@435:         assert(interval->assigned_regHi() >= pd_first_fpu_reg && interval->assigned_regHi() <= pd_last_fpu_reg, "no fpu register");
duke@435:         assert(assigned_reg % 2 == 0 && assigned_reg + 1 == interval->assigned_regHi(), "must be sequential and even");
duke@435:         LIR_Opr result = LIR_OprFact::double_fpu(interval->assigned_regHi() - pd_first_fpu_reg, assigned_reg - pd_first_fpu_reg);
dlong@7598: #elif defined(ARM32)
bobv@2036:         assert(assigned_reg >= pd_first_fpu_reg && assigned_reg <= pd_last_fpu_reg, "no fpu register");
bobv@2036:         assert(interval->assigned_regHi() >= pd_first_fpu_reg && interval->assigned_regHi() <= pd_last_fpu_reg, "no fpu register");
bobv@2036:         assert(assigned_reg % 2 == 0 && assigned_reg + 1 == interval->assigned_regHi(), "must be sequential and even");
bobv@2036:         LIR_Opr result = LIR_OprFact::double_fpu(assigned_reg - pd_first_fpu_reg, interval->assigned_regHi() - pd_first_fpu_reg);
duke@435: #else
duke@435:         assert(assigned_reg >= pd_first_fpu_reg && assigned_reg <= pd_last_fpu_reg, "no fpu register");
duke@435:         assert(interval->assigned_regHi() == any_reg, "must not have hi register (double fpu values are stored in one register on Intel)");
duke@435:         LIR_Opr result = LIR_OprFact::double_fpu(assigned_reg - pd_first_fpu_reg);
duke@435: #endif
duke@435:         return result;
duke@435:       }
bobv@2036: #endif // __SOFTFP__
duke@435: 
duke@435:       default: {
duke@435:         ShouldNotReachHere();
duke@435:         return LIR_OprFact::illegalOpr;
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: LIR_Opr LinearScan::canonical_spill_opr(Interval* interval) {
duke@435:   assert(interval->canonical_spill_slot() >= nof_regs, "canonical spill slot not set");
duke@435:   return LIR_OprFact::stack(interval->canonical_spill_slot() - nof_regs, interval->type());
duke@435: }
duke@435: 
duke@435: LIR_Opr LinearScan::color_lir_opr(LIR_Opr opr, int op_id, LIR_OpVisitState::OprMode mode) {
duke@435:   assert(opr->is_virtual(), "should not call this otherwise");
duke@435: 
duke@435:   Interval* interval = interval_at(opr->vreg_number());
duke@435:   assert(interval != NULL, "interval must exist");
duke@435: 
duke@435:   if (op_id != -1) {
duke@435: #ifdef ASSERT
duke@435:     BlockBegin* block = block_of_op_with_id(op_id);
duke@435:     if (block->number_of_sux() <= 1 && op_id == block->last_lir_instruction_id()) {
duke@435:       // check if spill moves could have been appended at the end of this block, but
duke@435:       // before the branch instruction. So the split child information for this branch would
duke@435:       // be incorrect.
duke@435:       LIR_OpBranch* branch = block->lir()->instructions_list()->last()->as_OpBranch();
duke@435:       if (branch != NULL) {
duke@435:         if (block->live_out().at(opr->vreg_number())) {
duke@435:           assert(branch->cond() == lir_cond_always, "block does not end with an unconditional jump");
duke@435:           assert(false, "can't get split child for the last branch of a block because the information would be incorrect (moves are inserted before the branch in resolve_data_flow)");
duke@435:         }
duke@435:       }
duke@435:     }
duke@435: #endif
duke@435: 
duke@435:     // operands are not changed when an interval is split during allocation,
duke@435:     // so search the right interval here
duke@435:     interval = split_child_at_op_id(interval, op_id, mode);
duke@435:   }
duke@435: 
duke@435:   LIR_Opr res = operand_for_interval(interval);
duke@435: 
never@739: #ifdef X86
duke@435:   // new semantic for is_last_use: not only set on definite end of interval,
duke@435:   // but also before hole
duke@435:   // This may still miss some cases (e.g. for dead values), but it is not necessary that the
duke@435:   // last use information is completely correct
duke@435:   // information is only needed for fpu stack allocation
duke@435:   if (res->is_fpu_register()) {
duke@435:     if (opr->is_last_use() || op_id == interval->to() || (op_id != -1 && interval->has_hole_between(op_id, op_id + 1))) {
duke@435:       assert(op_id == -1 || !is_block_begin(op_id), "holes at begin of block may also result from control flow");
duke@435:       res = res->make_last_use();
duke@435:     }
duke@435:   }
duke@435: #endif
duke@435: 
duke@435:   assert(!gen()->is_vreg_flag_set(opr->vreg_number(), LIRGenerator::callee_saved) || !FrameMap::is_caller_save_register(res), "bad allocation");
duke@435: 
duke@435:   return res;
duke@435: }
duke@435: 
duke@435: 
duke@435: #ifdef ASSERT
duke@435: // some methods used to check correctness of debug information
duke@435: 
duke@435: void assert_no_register_values(GrowableArray<ScopeValue*>* values) {
duke@435:   if (values == NULL) {
duke@435:     return;
duke@435:   }
duke@435: 
duke@435:   for (int i = 0; i < values->length(); i++) {
duke@435:     ScopeValue* value = values->at(i);
duke@435: 
duke@435:     if (value->is_location()) {
duke@435:       Location location = ((LocationValue*)value)->location();
duke@435:       assert(location.where() == Location::on_stack, "value is in register");
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: void assert_no_register_values(GrowableArray<MonitorValue*>* values) {
duke@435:   if (values == NULL) {
duke@435:     return;
duke@435:   }
duke@435: 
duke@435:   for (int i = 0; i < values->length(); i++) {
duke@435:     MonitorValue* value = values->at(i);
duke@435: 
duke@435:     if (value->owner()->is_location()) {
duke@435:       Location location = ((LocationValue*)value->owner())->location();
duke@435:       assert(location.where() == Location::on_stack, "owner is in register");
duke@435:     }
duke@435:     assert(value->basic_lock().where() == Location::on_stack, "basic_lock is in register");
duke@435:   }
duke@435: }
duke@435: 
duke@435: void assert_equal(Location l1, Location l2) {
duke@435:   assert(l1.where() == l2.where() && l1.type() == l2.type() && l1.offset() == l2.offset(), "");
duke@435: }
duke@435: 
duke@435: void assert_equal(ScopeValue* v1, ScopeValue* v2) {
duke@435:   if (v1->is_location()) {
duke@435:     assert(v2->is_location(), "");
duke@435:     assert_equal(((LocationValue*)v1)->location(), ((LocationValue*)v2)->location());
duke@435:   } else if (v1->is_constant_int()) {
duke@435:     assert(v2->is_constant_int(), "");
duke@435:     assert(((ConstantIntValue*)v1)->value() == ((ConstantIntValue*)v2)->value(), "");
duke@435:   } else if (v1->is_constant_double()) {
duke@435:     assert(v2->is_constant_double(), "");
duke@435:     assert(((ConstantDoubleValue*)v1)->value() == ((ConstantDoubleValue*)v2)->value(), "");
duke@435:   } else if (v1->is_constant_long()) {
duke@435:     assert(v2->is_constant_long(), "");
duke@435:     assert(((ConstantLongValue*)v1)->value() == ((ConstantLongValue*)v2)->value(), "");
duke@435:   } else if (v1->is_constant_oop()) {
duke@435:     assert(v2->is_constant_oop(), "");
duke@435:     assert(((ConstantOopWriteValue*)v1)->value() == ((ConstantOopWriteValue*)v2)->value(), "");
duke@435:   } else {
duke@435:     ShouldNotReachHere();
duke@435:   }
duke@435: }
duke@435: 
duke@435: void assert_equal(MonitorValue* m1, MonitorValue* m2) {
duke@435:   assert_equal(m1->owner(), m2->owner());
duke@435:   assert_equal(m1->basic_lock(), m2->basic_lock());
duke@435: }
duke@435: 
duke@435: void assert_equal(IRScopeDebugInfo* d1, IRScopeDebugInfo* d2) {
duke@435:   assert(d1->scope() == d2->scope(), "not equal");
duke@435:   assert(d1->bci() == d2->bci(), "not equal");
duke@435: 
duke@435:   if (d1->locals() != NULL) {
duke@435:     assert(d1->locals() != NULL && d2->locals() != NULL, "not equal");
duke@435:     assert(d1->locals()->length() == d2->locals()->length(), "not equal");
duke@435:     for (int i = 0; i < d1->locals()->length(); i++) {
duke@435:       assert_equal(d1->locals()->at(i), d2->locals()->at(i));
duke@435:     }
duke@435:   } else {
duke@435:     assert(d1->locals() == NULL && d2->locals() == NULL, "not equal");
duke@435:   }
duke@435: 
duke@435:   if (d1->expressions() != NULL) {
duke@435:     assert(d1->expressions() != NULL && d2->expressions() != NULL, "not equal");
duke@435:     assert(d1->expressions()->length() == d2->expressions()->length(), "not equal");
duke@435:     for (int i = 0; i < d1->expressions()->length(); i++) {
duke@435:       assert_equal(d1->expressions()->at(i), d2->expressions()->at(i));
duke@435:     }
duke@435:   } else {
duke@435:     assert(d1->expressions() == NULL && d2->expressions() == NULL, "not equal");
duke@435:   }
duke@435: 
duke@435:   if (d1->monitors() != NULL) {
duke@435:     assert(d1->monitors() != NULL && d2->monitors() != NULL, "not equal");
duke@435:     assert(d1->monitors()->length() == d2->monitors()->length(), "not equal");
duke@435:     for (int i = 0; i < d1->monitors()->length(); i++) {
duke@435:       assert_equal(d1->monitors()->at(i), d2->monitors()->at(i));
duke@435:     }
duke@435:   } else {
duke@435:     assert(d1->monitors() == NULL && d2->monitors() == NULL, "not equal");
duke@435:   }
duke@435: 
duke@435:   if (d1->caller() != NULL) {
duke@435:     assert(d1->caller() != NULL && d2->caller() != NULL, "not equal");
duke@435:     assert_equal(d1->caller(), d2->caller());
duke@435:   } else {
duke@435:     assert(d1->caller() == NULL && d2->caller() == NULL, "not equal");
duke@435:   }
duke@435: }
duke@435: 
duke@435: void check_stack_depth(CodeEmitInfo* info, int stack_end) {
roland@2174:   if (info->stack()->bci() != SynchronizationEntryBCI && !info->scope()->method()->is_native()) {
roland@2174:     Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->stack()->bci());
duke@435:     switch (code) {
duke@435:       case Bytecodes::_ifnull    : // fall through
duke@435:       case Bytecodes::_ifnonnull : // fall through
duke@435:       case Bytecodes::_ifeq      : // fall through
duke@435:       case Bytecodes::_ifne      : // fall through
duke@435:       case Bytecodes::_iflt      : // fall through
duke@435:       case Bytecodes::_ifge      : // fall through
duke@435:       case Bytecodes::_ifgt      : // fall through
duke@435:       case Bytecodes::_ifle      : // fall through
duke@435:       case Bytecodes::_if_icmpeq : // fall through
duke@435:       case Bytecodes::_if_icmpne : // fall through
duke@435:       case Bytecodes::_if_icmplt : // fall through
duke@435:       case Bytecodes::_if_icmpge : // fall through
duke@435:       case Bytecodes::_if_icmpgt : // fall through
duke@435:       case Bytecodes::_if_icmple : // fall through
duke@435:       case Bytecodes::_if_acmpeq : // fall through
duke@435:       case Bytecodes::_if_acmpne :
duke@435:         assert(stack_end >= -Bytecodes::depth(code), "must have non-empty expression stack at if bytecode");
duke@435:         break;
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: #endif // ASSERT
duke@435: 
duke@435: 
duke@435: IntervalWalker* LinearScan::init_compute_oop_maps() {
duke@435:   // setup lists of potential oops for walking
duke@435:   Interval* oop_intervals;
duke@435:   Interval* non_oop_intervals;
duke@435: 
duke@435:   create_unhandled_lists(&oop_intervals, &non_oop_intervals, is_oop_interval, NULL);
duke@435: 
duke@435:   // intervals that have no oops inside need not to be processed
duke@435:   // to ensure a walking until the last instruction id, add a dummy interval
duke@435:   // with a high operation id
duke@435:   non_oop_intervals = new Interval(any_reg);
duke@435:   non_oop_intervals->add_range(max_jint - 2, max_jint - 1);
duke@435: 
duke@435:   return new IntervalWalker(this, oop_intervals, non_oop_intervals);
duke@435: }
duke@435: 
duke@435: 
duke@435: OopMap* LinearScan::compute_oop_map(IntervalWalker* iw, LIR_Op* op, CodeEmitInfo* info, bool is_call_site) {
duke@435:   TRACE_LINEAR_SCAN(3, tty->print_cr("creating oop map at op_id %d", op->id()));
duke@435: 
duke@435:   // walk before the current operation -> intervals that start at
duke@435:   // the operation (= output operands of the operation) are not
duke@435:   // included in the oop map
duke@435:   iw->walk_before(op->id());
duke@435: 
duke@435:   int frame_size = frame_map()->framesize();
duke@435:   int arg_count = frame_map()->oop_map_arg_count();
duke@435:   OopMap* map = new OopMap(frame_size, arg_count);
duke@435: 
duke@435:   // Iterate through active intervals
duke@435:   for (Interval* interval = iw->active_first(fixedKind); interval != Interval::end(); interval = interval->next()) {
duke@435:     int assigned_reg = interval->assigned_reg();
duke@435: 
duke@435:     assert(interval->current_from() <= op->id() && op->id() <= interval->current_to(), "interval should not be active otherwise");
duke@435:     assert(interval->assigned_regHi() == any_reg, "oop must be single word");
duke@435:     assert(interval->reg_num() >= LIR_OprDesc::vreg_base, "fixed interval found");
duke@435: 
duke@435:     // Check if this range covers the instruction. Intervals that
duke@435:     // start or end at the current operation are not included in the
duke@435:     // oop map, except in the case of patching moves.  For patching
duke@435:     // moves, any intervals which end at this instruction are included
duke@435:     // in the oop map since we may safepoint while doing the patch
duke@435:     // before we've consumed the inputs.
neliasso@6688:     if (op->is_patching() || op->id() < interval->current_to()) {
duke@435: 
duke@435:       // caller-save registers must not be included into oop-maps at calls
duke@435:       assert(!is_call_site || assigned_reg >= nof_regs || !is_caller_save(assigned_reg), "interval is in a caller-save register at a call -> register will be overwritten");
duke@435: 
duke@435:       VMReg name = vm_reg_for_interval(interval);
never@3108:       set_oop(map, name);
duke@435: 
duke@435:       // Spill optimization: when the stack value is guaranteed to be always correct,
duke@435:       // then it must be added to the oop map even if the interval is currently in a register
duke@435:       if (interval->always_in_memory() &&
duke@435:           op->id() > interval->spill_definition_pos() &&
duke@435:           interval->assigned_reg() != interval->canonical_spill_slot()) {
duke@435:         assert(interval->spill_definition_pos() > 0, "position not set correctly");
duke@435:         assert(interval->canonical_spill_slot() >= LinearScan::nof_regs, "no spill slot assigned");
duke@435:         assert(interval->assigned_reg() < LinearScan::nof_regs, "interval is on stack, so stack slot is registered twice");
duke@435: 
never@3108:         set_oop(map, frame_map()->slot_regname(interval->canonical_spill_slot() - LinearScan::nof_regs));
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   // add oops from lock stack
duke@435:   assert(info->stack() != NULL, "CodeEmitInfo must always have a stack");
roland@2174:   int locks_count = info->stack()->total_locks_size();
duke@435:   for (int i = 0; i < locks_count; i++) {
never@3108:     set_oop(map, frame_map()->monitor_object_regname(i));
duke@435:   }
duke@435: 
duke@435:   return map;
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScan::compute_oop_map(IntervalWalker* iw, const LIR_OpVisitState &visitor, LIR_Op* op) {
duke@435:   assert(visitor.info_count() > 0, "no oop map needed");
duke@435: 
duke@435:   // compute oop_map only for first CodeEmitInfo
duke@435:   // because it is (in most cases) equal for all other infos of the same operation
duke@435:   CodeEmitInfo* first_info = visitor.info_at(0);
duke@435:   OopMap* first_oop_map = compute_oop_map(iw, op, first_info, visitor.has_call());
duke@435: 
duke@435:   for (int i = 0; i < visitor.info_count(); i++) {
duke@435:     CodeEmitInfo* info = visitor.info_at(i);
duke@435:     OopMap* oop_map = first_oop_map;
duke@435: 
roland@6723:     // compute worst case interpreter size in case of a deoptimization
roland@6723:     _compilation->update_interpreter_frame_size(info->interpreter_frame_size());
roland@6723: 
duke@435:     if (info->stack()->locks_size() != first_info->stack()->locks_size()) {
duke@435:       // this info has a different number of locks then the precomputed oop map
duke@435:       // (possible for lock and unlock instructions) -> compute oop map with
duke@435:       // correct lock information
duke@435:       oop_map = compute_oop_map(iw, op, info, visitor.has_call());
duke@435:     }
duke@435: 
duke@435:     if (info->_oop_map == NULL) {
duke@435:       info->_oop_map = oop_map;
duke@435:     } else {
duke@435:       // a CodeEmitInfo can not be shared between different LIR-instructions
duke@435:       // because interval splitting can occur anywhere between two instructions
duke@435:       // and so the oop maps must be different
duke@435:       // -> check if the already set oop_map is exactly the one calculated for this operation
duke@435:       assert(info->_oop_map == oop_map, "same CodeEmitInfo used for multiple LIR instructions");
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: // frequently used constants
roland@3575: // Allocate them with new so they are never destroyed (otherwise, a
roland@3575: // forced exit could destroy these objects while they are still in
roland@3575: // use).
zgu@3900: ConstantOopWriteValue* LinearScan::_oop_null_scope_value = new (ResourceObj::C_HEAP, mtCompiler) ConstantOopWriteValue(NULL);
zgu@3900: ConstantIntValue*      LinearScan::_int_m1_scope_value = new (ResourceObj::C_HEAP, mtCompiler) ConstantIntValue(-1);
zgu@3900: ConstantIntValue*      LinearScan::_int_0_scope_value =  new (ResourceObj::C_HEAP, mtCompiler) ConstantIntValue(0);
zgu@3900: ConstantIntValue*      LinearScan::_int_1_scope_value =  new (ResourceObj::C_HEAP, mtCompiler) ConstantIntValue(1);
zgu@3900: ConstantIntValue*      LinearScan::_int_2_scope_value =  new (ResourceObj::C_HEAP, mtCompiler) ConstantIntValue(2);
zgu@3900: LocationValue*         _illegal_value = new (ResourceObj::C_HEAP, mtCompiler) LocationValue(Location());
duke@435: 
duke@435: void LinearScan::init_compute_debug_info() {
duke@435:   // cache for frequently used scope values
duke@435:   // (cpu registers and stack slots)
duke@435:   _scope_value_cache = ScopeValueArray((LinearScan::nof_cpu_regs + frame_map()->argcount() + max_spills()) * 2, NULL);
duke@435: }
duke@435: 
duke@435: MonitorValue* LinearScan::location_for_monitor_index(int monitor_index) {
duke@435:   Location loc;
duke@435:   if (!frame_map()->location_for_monitor_object(monitor_index, &loc)) {
duke@435:     bailout("too large frame");
duke@435:   }
duke@435:   ScopeValue* object_scope_value = new LocationValue(loc);
duke@435: 
duke@435:   if (!frame_map()->location_for_monitor_lock(monitor_index, &loc)) {
duke@435:     bailout("too large frame");
duke@435:   }
duke@435:   return new MonitorValue(object_scope_value, loc);
duke@435: }
duke@435: 
duke@435: LocationValue* LinearScan::location_for_name(int name, Location::Type loc_type) {
duke@435:   Location loc;
duke@435:   if (!frame_map()->locations_for_slot(name, loc_type, &loc)) {
duke@435:     bailout("too large frame");
duke@435:   }
duke@435:   return new LocationValue(loc);
duke@435: }
duke@435: 
duke@435: 
duke@435: int LinearScan::append_scope_value_for_constant(LIR_Opr opr, GrowableArray<ScopeValue*>* scope_values) {
duke@435:   assert(opr->is_constant(), "should not be called otherwise");
duke@435: 
duke@435:   LIR_Const* c = opr->as_constant_ptr();
duke@435:   BasicType t = c->type();
duke@435:   switch (t) {
duke@435:     case T_OBJECT: {
duke@435:       jobject value = c->as_jobject();
duke@435:       if (value == NULL) {
roland@3575:         scope_values->append(_oop_null_scope_value);
duke@435:       } else {
duke@435:         scope_values->append(new ConstantOopWriteValue(c->as_jobject()));
duke@435:       }
duke@435:       return 1;
duke@435:     }
duke@435: 
duke@435:     case T_INT: // fall through
duke@435:     case T_FLOAT: {
duke@435:       int value = c->as_jint_bits();
duke@435:       switch (value) {
roland@3575:         case -1: scope_values->append(_int_m1_scope_value); break;
roland@3575:         case 0:  scope_values->append(_int_0_scope_value); break;
roland@3575:         case 1:  scope_values->append(_int_1_scope_value); break;
roland@3575:         case 2:  scope_values->append(_int_2_scope_value); break;
duke@435:         default: scope_values->append(new ConstantIntValue(c->as_jint_bits())); break;
duke@435:       }
duke@435:       return 1;
duke@435:     }
duke@435: 
duke@435:     case T_LONG: // fall through
duke@435:     case T_DOUBLE: {
roland@1495: #ifdef _LP64
roland@3575:       scope_values->append(_int_0_scope_value);
roland@1495:       scope_values->append(new ConstantLongValue(c->as_jlong_bits()));
roland@1495: #else
duke@435:       if (hi_word_offset_in_bytes > lo_word_offset_in_bytes) {
duke@435:         scope_values->append(new ConstantIntValue(c->as_jint_hi_bits()));
duke@435:         scope_values->append(new ConstantIntValue(c->as_jint_lo_bits()));
duke@435:       } else {
duke@435:         scope_values->append(new ConstantIntValue(c->as_jint_lo_bits()));
duke@435:         scope_values->append(new ConstantIntValue(c->as_jint_hi_bits()));
duke@435:       }
roland@1495: #endif
duke@435:       return 2;
duke@435:     }
duke@435: 
roland@1732:     case T_ADDRESS: {
roland@1732: #ifdef _LP64
roland@1732:       scope_values->append(new ConstantLongValue(c->as_jint()));
roland@1732: #else
roland@1732:       scope_values->append(new ConstantIntValue(c->as_jint()));
roland@1732: #endif
roland@1732:       return 1;
roland@1732:     }
roland@1732: 
duke@435:     default:
duke@435:       ShouldNotReachHere();
never@739:       return -1;
duke@435:   }
duke@435: }
duke@435: 
duke@435: int LinearScan::append_scope_value_for_operand(LIR_Opr opr, GrowableArray<ScopeValue*>* scope_values) {
duke@435:   if (opr->is_single_stack()) {
duke@435:     int stack_idx = opr->single_stack_ix();
duke@435:     bool is_oop = opr->is_oop_register();
duke@435:     int cache_idx = (stack_idx + LinearScan::nof_cpu_regs) * 2 + (is_oop ? 1 : 0);
duke@435: 
duke@435:     ScopeValue* sv = _scope_value_cache.at(cache_idx);
duke@435:     if (sv == NULL) {
duke@435:       Location::Type loc_type = is_oop ? Location::oop : Location::normal;
duke@435:       sv = location_for_name(stack_idx, loc_type);
duke@435:       _scope_value_cache.at_put(cache_idx, sv);
duke@435:     }
duke@435: 
duke@435:     // check if cached value is correct
duke@435:     DEBUG_ONLY(assert_equal(sv, location_for_name(stack_idx, is_oop ? Location::oop : Location::normal)));
duke@435: 
duke@435:     scope_values->append(sv);
duke@435:     return 1;
duke@435: 
duke@435:   } else if (opr->is_single_cpu()) {
duke@435:     bool is_oop = opr->is_oop_register();
duke@435:     int cache_idx = opr->cpu_regnr() * 2 + (is_oop ? 1 : 0);
roland@1495:     Location::Type int_loc_type = NOT_LP64(Location::normal) LP64_ONLY(Location::int_in_long);
duke@435: 
duke@435:     ScopeValue* sv = _scope_value_cache.at(cache_idx);
duke@435:     if (sv == NULL) {
roland@1495:       Location::Type loc_type = is_oop ? Location::oop : int_loc_type;
duke@435:       VMReg rname = frame_map()->regname(opr);
duke@435:       sv = new LocationValue(Location::new_reg_loc(loc_type, rname));
duke@435:       _scope_value_cache.at_put(cache_idx, sv);
duke@435:     }
duke@435: 
duke@435:     // check if cached value is correct
roland@1495:     DEBUG_ONLY(assert_equal(sv, new LocationValue(Location::new_reg_loc(is_oop ? Location::oop : int_loc_type, frame_map()->regname(opr)))));
duke@435: 
duke@435:     scope_values->append(sv);
duke@435:     return 1;
duke@435: 
never@739: #ifdef X86
duke@435:   } else if (opr->is_single_xmm()) {
duke@435:     VMReg rname = opr->as_xmm_float_reg()->as_VMReg();
duke@435:     LocationValue* sv = new LocationValue(Location::new_reg_loc(Location::normal, rname));
duke@435: 
duke@435:     scope_values->append(sv);
duke@435:     return 1;
duke@435: #endif
duke@435: 
duke@435:   } else if (opr->is_single_fpu()) {
never@739: #ifdef X86
duke@435:     // the exact location of fpu stack values is only known
duke@435:     // during fpu stack allocation, so the stack allocator object
duke@435:     // must be present
duke@435:     assert(use_fpu_stack_allocation(), "should not have float stack values without fpu stack allocation (all floats must be SSE2)");
duke@435:     assert(_fpu_stack_allocator != NULL, "must be present");
duke@435:     opr = _fpu_stack_allocator->to_fpu_stack(opr);
duke@435: #endif
duke@435: 
duke@435:     Location::Type loc_type = float_saved_as_double ? Location::float_in_dbl : Location::normal;
duke@435:     VMReg rname = frame_map()->fpu_regname(opr->fpu_regnr());
bdelsart@3195: #ifndef __SOFTFP__
bdelsart@3195: #ifndef VM_LITTLE_ENDIAN
bdelsart@3195:     if (! float_saved_as_double) {
bdelsart@3195:       // On big endian system, we may have an issue if float registers use only
bdelsart@3195:       // the low half of the (same) double registers.
bdelsart@3195:       // Both the float and the double could have the same regnr but would correspond
bdelsart@3195:       // to two different addresses once saved.
bdelsart@3195: 
bdelsart@3195:       // get next safely (no assertion checks)
bdelsart@3195:       VMReg next = VMRegImpl::as_VMReg(1+rname->value());
bdelsart@3195:       if (next->is_reg() &&
bdelsart@3195:           (next->as_FloatRegister() == rname->as_FloatRegister())) {
bdelsart@3195:         // the back-end does use the same numbering for the double and the float
bdelsart@3195:         rname = next; // VMReg for the low bits, e.g. the real VMReg for the float
bdelsart@3195:       }
bdelsart@3195:     }
bdelsart@3195: #endif
bdelsart@3195: #endif
duke@435:     LocationValue* sv = new LocationValue(Location::new_reg_loc(loc_type, rname));
duke@435: 
duke@435:     scope_values->append(sv);
duke@435:     return 1;
duke@435: 
duke@435:   } else {
duke@435:     // double-size operands
duke@435: 
duke@435:     ScopeValue* first;
duke@435:     ScopeValue* second;
duke@435: 
duke@435:     if (opr->is_double_stack()) {
never@739: #ifdef _LP64
never@739:       Location loc1;
never@739:       Location::Type loc_type = opr->type() == T_LONG ? Location::lng : Location::dbl;
never@739:       if (!frame_map()->locations_for_slot(opr->double_stack_ix(), loc_type, &loc1, NULL)) {
never@739:         bailout("too large frame");
never@739:       }
never@739:       // Does this reverse on x86 vs. sparc?
never@739:       first =  new LocationValue(loc1);
roland@3575:       second = _int_0_scope_value;
never@739: #else
duke@435:       Location loc1, loc2;
duke@435:       if (!frame_map()->locations_for_slot(opr->double_stack_ix(), Location::normal, &loc1, &loc2)) {
duke@435:         bailout("too large frame");
duke@435:       }
duke@435:       first =  new LocationValue(loc1);
duke@435:       second = new LocationValue(loc2);
never@739: #endif // _LP64
duke@435: 
duke@435:     } else if (opr->is_double_cpu()) {
duke@435: #ifdef _LP64
duke@435:       VMReg rname_first = opr->as_register_lo()->as_VMReg();
duke@435:       first = new LocationValue(Location::new_reg_loc(Location::lng, rname_first));
roland@3575:       second = _int_0_scope_value;
duke@435: #else
duke@435:       VMReg rname_first = opr->as_register_lo()->as_VMReg();
duke@435:       VMReg rname_second = opr->as_register_hi()->as_VMReg();
duke@435: 
duke@435:       if (hi_word_offset_in_bytes < lo_word_offset_in_bytes) {
duke@435:         // lo/hi and swapped relative to first and second, so swap them
duke@435:         VMReg tmp = rname_first;
duke@435:         rname_first = rname_second;
duke@435:         rname_second = tmp;
duke@435:       }
duke@435: 
duke@435:       first = new LocationValue(Location::new_reg_loc(Location::normal, rname_first));
duke@435:       second = new LocationValue(Location::new_reg_loc(Location::normal, rname_second));
never@739: #endif //_LP64
never@739: 
never@739: 
never@739: #ifdef X86
duke@435:     } else if (opr->is_double_xmm()) {
duke@435:       assert(opr->fpu_regnrLo() == opr->fpu_regnrHi(), "assumed in calculation");
duke@435:       VMReg rname_first  = opr->as_xmm_double_reg()->as_VMReg();
iveresov@1804: #  ifdef _LP64
iveresov@1804:       first = new LocationValue(Location::new_reg_loc(Location::dbl, rname_first));
roland@3575:       second = _int_0_scope_value;
iveresov@1804: #  else
iveresov@1804:       first = new LocationValue(Location::new_reg_loc(Location::normal, rname_first));
iveresov@1804:       // %%% This is probably a waste but we'll keep things as they were for now
iveresov@1804:       if (true) {
iveresov@1804:         VMReg rname_second = rname_first->next();
iveresov@1804:         second = new LocationValue(Location::new_reg_loc(Location::normal, rname_second));
iveresov@1804:       }
iveresov@1804: #  endif
iveresov@1804: #endif
iveresov@1804: 
iveresov@1804:     } else if (opr->is_double_fpu()) {
iveresov@1804:       // On SPARC, fpu_regnrLo/fpu_regnrHi represents the two halves of
iveresov@1804:       // the double as float registers in the native ordering. On X86,
iveresov@1804:       // fpu_regnrLo is a FPU stack slot whose VMReg represents
iveresov@1804:       // the low-order word of the double and fpu_regnrLo + 1 is the
iveresov@1804:       // name for the other half.  *first and *second must represent the
iveresov@1804:       // least and most significant words, respectively.
iveresov@1804: 
iveresov@1804: #ifdef X86
iveresov@1804:       // the exact location of fpu stack values is only known
iveresov@1804:       // during fpu stack allocation, so the stack allocator object
iveresov@1804:       // must be present
iveresov@1804:       assert(use_fpu_stack_allocation(), "should not have float stack values without fpu stack allocation (all floats must be SSE2)");
iveresov@1804:       assert(_fpu_stack_allocator != NULL, "must be present");
iveresov@1804:       opr = _fpu_stack_allocator->to_fpu_stack(opr);
iveresov@1804: 
vladidan@2627:       assert(opr->fpu_regnrLo() == opr->fpu_regnrHi(), "assumed in calculation (only fpu_regnrLo is used)");
iveresov@1804: #endif
iveresov@1804: #ifdef SPARC
iveresov@1804:       assert(opr->fpu_regnrLo() == opr->fpu_regnrHi() + 1, "assumed in calculation (only fpu_regnrHi is used)");
iveresov@1804: #endif
dlong@7598: #ifdef ARM32
bobv@2036:       assert(opr->fpu_regnrHi() == opr->fpu_regnrLo() + 1, "assumed in calculation (only fpu_regnrLo is used)");
bobv@2036: #endif
bobv@2036: #ifdef PPC
bobv@2036:       assert(opr->fpu_regnrLo() == opr->fpu_regnrHi(), "assumed in calculation (only fpu_regnrHi is used)");
bobv@2036: #endif
iveresov@1804: 
vladidan@2627: #ifdef VM_LITTLE_ENDIAN
vladidan@2627:       VMReg rname_first = frame_map()->fpu_regname(opr->fpu_regnrLo());
vladidan@2627: #else
iveresov@1804:       VMReg rname_first = frame_map()->fpu_regname(opr->fpu_regnrHi());
vladidan@2627: #endif
vladidan@2627: 
iveresov@1804: #ifdef _LP64
iveresov@1804:       first = new LocationValue(Location::new_reg_loc(Location::dbl, rname_first));
roland@3575:       second = _int_0_scope_value;
iveresov@1804: #else
duke@435:       first = new LocationValue(Location::new_reg_loc(Location::normal, rname_first));
duke@435:       // %%% This is probably a waste but we'll keep things as they were for now
duke@435:       if (true) {
duke@435:         VMReg rname_second = rname_first->next();
duke@435:         second = new LocationValue(Location::new_reg_loc(Location::normal, rname_second));
duke@435:       }
duke@435: #endif
duke@435: 
duke@435:     } else {
duke@435:       ShouldNotReachHere();
duke@435:       first = NULL;
duke@435:       second = NULL;
duke@435:     }
duke@435: 
duke@435:     assert(first != NULL && second != NULL, "must be set");
duke@435:     // The convention the interpreter uses is that the second local
duke@435:     // holds the first raw word of the native double representation.
duke@435:     // This is actually reasonable, since locals and stack arrays
duke@435:     // grow downwards in all implementations.
duke@435:     // (If, on some machine, the interpreter's Java locals or stack
duke@435:     // were to grow upwards, the embedded doubles would be word-swapped.)
duke@435:     scope_values->append(second);
duke@435:     scope_values->append(first);
duke@435:     return 2;
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: int LinearScan::append_scope_value(int op_id, Value value, GrowableArray<ScopeValue*>* scope_values) {
duke@435:   if (value != NULL) {
duke@435:     LIR_Opr opr = value->operand();
duke@435:     Constant* con = value->as_Constant();
duke@435: 
duke@435:     assert(con == NULL || opr->is_virtual() || opr->is_constant() || opr->is_illegal(), "asumption: Constant instructions have only constant operands (or illegal if constant is optimized away)");
duke@435:     assert(con != NULL || opr->is_virtual(), "asumption: non-Constant instructions have only virtual operands");
duke@435: 
duke@435:     if (con != NULL && !con->is_pinned() && !opr->is_constant()) {
duke@435:       // Unpinned constants may have a virtual operand for a part of the lifetime
duke@435:       // or may be illegal when it was optimized away,
duke@435:       // so always use a constant operand
duke@435:       opr = LIR_OprFact::value_type(con->type());
duke@435:     }
duke@435:     assert(opr->is_virtual() || opr->is_constant(), "other cases not allowed here");
duke@435: 
duke@435:     if (opr->is_virtual()) {
duke@435:       LIR_OpVisitState::OprMode mode = LIR_OpVisitState::inputMode;
duke@435: 
duke@435:       BlockBegin* block = block_of_op_with_id(op_id);
duke@435:       if (block->number_of_sux() == 1 && op_id == block->last_lir_instruction_id()) {
duke@435:         // generating debug information for the last instruction of a block.
duke@435:         // if this instruction is a branch, spill moves are inserted before this branch
duke@435:         // and so the wrong operand would be returned (spill moves at block boundaries are not
duke@435:         // considered in the live ranges of intervals)
duke@435:         // Solution: use the first op_id of the branch target block instead.
duke@435:         if (block->lir()->instructions_list()->last()->as_OpBranch() != NULL) {
duke@435:           if (block->live_out().at(opr->vreg_number())) {
duke@435:             op_id = block->sux_at(0)->first_lir_instruction_id();
duke@435:             mode = LIR_OpVisitState::outputMode;
duke@435:           }
duke@435:         }
duke@435:       }
duke@435: 
duke@435:       // Get current location of operand
duke@435:       // The operand must be live because debug information is considered when building the intervals
duke@435:       // if the interval is not live, color_lir_opr will cause an assertion failure
duke@435:       opr = color_lir_opr(opr, op_id, mode);
duke@435:       assert(!has_call(op_id) || opr->is_stack() || !is_caller_save(reg_num(opr)), "can not have caller-save register operands at calls");
duke@435: 
duke@435:       // Append to ScopeValue array
duke@435:       return append_scope_value_for_operand(opr, scope_values);
duke@435: 
duke@435:     } else {
duke@435:       assert(value->as_Constant() != NULL, "all other instructions have only virtual operands");
duke@435:       assert(opr->is_constant(), "operand must be constant");
duke@435: 
duke@435:       return append_scope_value_for_constant(opr, scope_values);
duke@435:     }
duke@435:   } else {
duke@435:     // append a dummy value because real value not needed
roland@3575:     scope_values->append(_illegal_value);
duke@435:     return 1;
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
roland@2174: IRScopeDebugInfo* LinearScan::compute_debug_info_for_scope(int op_id, IRScope* cur_scope, ValueStack* cur_state, ValueStack* innermost_state) {
duke@435:   IRScopeDebugInfo* caller_debug_info = NULL;
roland@2174: 
roland@2174:   ValueStack* caller_state = cur_state->caller_state();
duke@435:   if (caller_state != NULL) {
duke@435:     // process recursively to compute outermost scope first
roland@2174:     caller_debug_info = compute_debug_info_for_scope(op_id, cur_scope->caller(), caller_state, innermost_state);
duke@435:   }
duke@435: 
duke@435:   // initialize these to null.
duke@435:   // If we don't need deopt info or there are no locals, expressions or monitors,
duke@435:   // then these get recorded as no information and avoids the allocation of 0 length arrays.
duke@435:   GrowableArray<ScopeValue*>*   locals      = NULL;
duke@435:   GrowableArray<ScopeValue*>*   expressions = NULL;
duke@435:   GrowableArray<MonitorValue*>* monitors    = NULL;
duke@435: 
duke@435:   // describe local variable values
roland@2174:   int nof_locals = cur_state->locals_size();
duke@435:   if (nof_locals > 0) {
duke@435:     locals = new GrowableArray<ScopeValue*>(nof_locals);
duke@435: 
duke@435:     int pos = 0;
duke@435:     while (pos < nof_locals) {
duke@435:       assert(pos < cur_state->locals_size(), "why not?");
duke@435: 
duke@435:       Value local = cur_state->local_at(pos);
duke@435:       pos += append_scope_value(op_id, local, locals);
duke@435: 
duke@435:       assert(locals->length() == pos, "must match");
duke@435:     }
duke@435:     assert(locals->length() == cur_scope->method()->max_locals(), "wrong number of locals");
duke@435:     assert(locals->length() == cur_state->locals_size(), "wrong number of locals");
roland@2174:   } else if (cur_scope->method()->max_locals() > 0) {
roland@2174:     assert(cur_state->kind() == ValueStack::EmptyExceptionState, "should be");
roland@2174:     nof_locals = cur_scope->method()->max_locals();
roland@2174:     locals = new GrowableArray<ScopeValue*>(nof_locals);
roland@2174:     for(int i = 0; i < nof_locals; i++) {
roland@3575:       locals->append(_illegal_value);
roland@2174:     }
roland@2174:   }
duke@435: 
duke@435:   // describe expression stack
roland@2174:   int nof_stack = cur_state->stack_size();
duke@435:   if (nof_stack > 0) {
duke@435:     expressions = new GrowableArray<ScopeValue*>(nof_stack);
duke@435: 
roland@2174:     int pos = 0;
roland@2174:     while (pos < nof_stack) {
roland@2174:       Value expression = cur_state->stack_at_inc(pos);
duke@435:       append_scope_value(op_id, expression, expressions);
duke@435: 
roland@2174:       assert(expressions->length() == pos, "must match");
roland@2174:     }
roland@2174:     assert(expressions->length() == cur_state->stack_size(), "wrong number of stack entries");
duke@435:   }
duke@435: 
duke@435:   // describe monitors
roland@2174:   int nof_locks = cur_state->locks_size();
duke@435:   if (nof_locks > 0) {
roland@2174:     int lock_offset = cur_state->caller_state() != NULL ? cur_state->caller_state()->total_locks_size() : 0;
duke@435:     monitors = new GrowableArray<MonitorValue*>(nof_locks);
roland@2174:     for (int i = 0; i < nof_locks; i++) {
roland@2174:       monitors->append(location_for_monitor_index(lock_offset + i));
roland@2174:     }
roland@2174:   }
roland@2174: 
roland@2174:   return new IRScopeDebugInfo(cur_scope, cur_state->bci(), locals, expressions, monitors, caller_debug_info);
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScan::compute_debug_info(CodeEmitInfo* info, int op_id) {
duke@435:   TRACE_LINEAR_SCAN(3, tty->print_cr("creating debug information at op_id %d", op_id));
duke@435: 
duke@435:   IRScope* innermost_scope = info->scope();
duke@435:   ValueStack* innermost_state = info->stack();
duke@435: 
duke@435:   assert(innermost_scope != NULL && innermost_state != NULL, "why is it missing?");
duke@435: 
roland@2174:   DEBUG_ONLY(check_stack_depth(info, innermost_state->stack_size()));
duke@435: 
duke@435:   if (info->_scope_debug_info == NULL) {
duke@435:     // compute debug information
roland@2174:     info->_scope_debug_info = compute_debug_info_for_scope(op_id, innermost_scope, innermost_state, innermost_state);
duke@435:   } else {
duke@435:     // debug information already set. Check that it is correct from the current point of view
roland@2174:     DEBUG_ONLY(assert_equal(info->_scope_debug_info, compute_debug_info_for_scope(op_id, innermost_scope, innermost_state, innermost_state)));
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScan::assign_reg_num(LIR_OpList* instructions, IntervalWalker* iw) {
duke@435:   LIR_OpVisitState visitor;
duke@435:   int num_inst = instructions->length();
duke@435:   bool has_dead = false;
duke@435: 
duke@435:   for (int j = 0; j < num_inst; j++) {
duke@435:     LIR_Op* op = instructions->at(j);
duke@435:     if (op == NULL) {  // this can happen when spill-moves are removed in eliminate_spill_moves
duke@435:       has_dead = true;
duke@435:       continue;
duke@435:     }
duke@435:     int op_id = op->id();
duke@435: 
duke@435:     // visit instruction to get list of operands
duke@435:     visitor.visit(op);
duke@435: 
duke@435:     // iterate all modes of the visitor and process all virtual operands
duke@435:     for_each_visitor_mode(mode) {
duke@435:       int n = visitor.opr_count(mode);
duke@435:       for (int k = 0; k < n; k++) {
duke@435:         LIR_Opr opr = visitor.opr_at(mode, k);
duke@435:         if (opr->is_virtual_register()) {
duke@435:           visitor.set_opr_at(mode, k, color_lir_opr(opr, op_id, mode));
duke@435:         }
duke@435:       }
duke@435:     }
duke@435: 
duke@435:     if (visitor.info_count() > 0) {
duke@435:       // exception handling
duke@435:       if (compilation()->has_exception_handlers()) {
duke@435:         XHandlers* xhandlers = visitor.all_xhandler();
duke@435:         int n = xhandlers->length();
duke@435:         for (int k = 0; k < n; k++) {
duke@435:           XHandler* handler = xhandlers->handler_at(k);
duke@435:           if (handler->entry_code() != NULL) {
duke@435:             assign_reg_num(handler->entry_code()->instructions_list(), NULL);
duke@435:           }
duke@435:         }
duke@435:       } else {
duke@435:         assert(visitor.all_xhandler()->length() == 0, "missed exception handler");
duke@435:       }
duke@435: 
duke@435:       // compute oop map
duke@435:       assert(iw != NULL, "needed for compute_oop_map");
duke@435:       compute_oop_map(iw, visitor, op);
duke@435: 
duke@435:       // compute debug information
duke@435:       if (!use_fpu_stack_allocation()) {
duke@435:         // compute debug information if fpu stack allocation is not needed.
duke@435:         // when fpu stack allocation is needed, the debug information can not
duke@435:         // be computed here because the exact location of fpu operands is not known
duke@435:         // -> debug information is created inside the fpu stack allocator
duke@435:         int n = visitor.info_count();
duke@435:         for (int k = 0; k < n; k++) {
duke@435:           compute_debug_info(visitor.info_at(k), op_id);
duke@435:         }
duke@435:       }
duke@435:     }
duke@435: 
duke@435: #ifdef ASSERT
duke@435:     // make sure we haven't made the op invalid.
duke@435:     op->verify();
duke@435: #endif
duke@435: 
duke@435:     // remove useless moves
duke@435:     if (op->code() == lir_move) {
duke@435:       assert(op->as_Op1() != NULL, "move must be LIR_Op1");
duke@435:       LIR_Op1* move = (LIR_Op1*)op;
duke@435:       LIR_Opr src = move->in_opr();
duke@435:       LIR_Opr dst = move->result_opr();
duke@435:       if (dst == src ||
duke@435:           !dst->is_pointer() && !src->is_pointer() &&
duke@435:           src->is_same_register(dst)) {
duke@435:         instructions->at_put(j, NULL);
duke@435:         has_dead = true;
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   if (has_dead) {
duke@435:     // iterate all instructions of the block and remove all null-values.
duke@435:     int insert_point = 0;
duke@435:     for (int j = 0; j < num_inst; j++) {
duke@435:       LIR_Op* op = instructions->at(j);
duke@435:       if (op != NULL) {
duke@435:         if (insert_point != j) {
duke@435:           instructions->at_put(insert_point, op);
duke@435:         }
duke@435:         insert_point++;
duke@435:       }
duke@435:     }
duke@435:     instructions->truncate(insert_point);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScan::assign_reg_num() {
duke@435:   TIME_LINEAR_SCAN(timer_assign_reg_num);
duke@435: 
duke@435:   init_compute_debug_info();
duke@435:   IntervalWalker* iw = init_compute_oop_maps();
duke@435: 
duke@435:   int num_blocks = block_count();
duke@435:   for (int i = 0; i < num_blocks; i++) {
duke@435:     BlockBegin* block = block_at(i);
duke@435:     assign_reg_num(block->lir()->instructions_list(), iw);
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScan::do_linear_scan() {
duke@435:   NOT_PRODUCT(_total_timer.begin_method());
duke@435: 
duke@435:   number_instructions();
duke@435: 
duke@435:   NOT_PRODUCT(print_lir(1, "Before Register Allocation"));
duke@435: 
duke@435:   compute_local_live_sets();
duke@435:   compute_global_live_sets();
duke@435:   CHECK_BAILOUT();
duke@435: 
duke@435:   build_intervals();
duke@435:   CHECK_BAILOUT();
duke@435:   sort_intervals_before_allocation();
duke@435: 
duke@435:   NOT_PRODUCT(print_intervals("Before Register Allocation"));
duke@435:   NOT_PRODUCT(LinearScanStatistic::compute(this, _stat_before_alloc));
duke@435: 
duke@435:   allocate_registers();
duke@435:   CHECK_BAILOUT();
duke@435: 
duke@435:   resolve_data_flow();
duke@435:   if (compilation()->has_exception_handlers()) {
duke@435:     resolve_exception_handlers();
duke@435:   }
duke@435:   // fill in number of spill slots into frame_map
duke@435:   propagate_spill_slots();
duke@435:   CHECK_BAILOUT();
duke@435: 
duke@435:   NOT_PRODUCT(print_intervals("After Register Allocation"));
duke@435:   NOT_PRODUCT(print_lir(2, "LIR after register allocation:"));
never@1157: 
never@1157:   sort_intervals_after_allocation();
never@1157: 
duke@435:   DEBUG_ONLY(verify());
duke@435: 
duke@435:   eliminate_spill_moves();
duke@435:   assign_reg_num();
duke@435:   CHECK_BAILOUT();
duke@435: 
duke@435:   NOT_PRODUCT(print_lir(2, "LIR after assignment of register numbers:"));
duke@435:   NOT_PRODUCT(LinearScanStatistic::compute(this, _stat_after_asign));
duke@435: 
duke@435:   { TIME_LINEAR_SCAN(timer_allocate_fpu_stack);
duke@435: 
duke@435:     if (use_fpu_stack_allocation()) {
duke@435:       allocate_fpu_stack(); // Only has effect on Intel
duke@435:       NOT_PRODUCT(print_lir(2, "LIR after FPU stack allocation:"));
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   { TIME_LINEAR_SCAN(timer_optimize_lir);
duke@435: 
duke@435:     EdgeMoveOptimizer::optimize(ir()->code());
duke@435:     ControlFlowOptimizer::optimize(ir()->code());
duke@435:     // check that cfg is still correct after optimizations
duke@435:     ir()->verify();
duke@435:   }
duke@435: 
duke@435:   NOT_PRODUCT(print_lir(1, "Before Code Generation", false));
duke@435:   NOT_PRODUCT(LinearScanStatistic::compute(this, _stat_final));
duke@435:   NOT_PRODUCT(_total_timer.end_method(this));
duke@435: }
duke@435: 
duke@435: 
duke@435: // ********** Printing functions
duke@435: 
duke@435: #ifndef PRODUCT
duke@435: 
duke@435: void LinearScan::print_timers(double total) {
duke@435:   _total_timer.print(total);
duke@435: }
duke@435: 
duke@435: void LinearScan::print_statistics() {
duke@435:   _stat_before_alloc.print("before allocation");
duke@435:   _stat_after_asign.print("after assignment of register");
duke@435:   _stat_final.print("after optimization");
duke@435: }
duke@435: 
duke@435: void LinearScan::print_bitmap(BitMap& b) {
duke@435:   for (unsigned int i = 0; i < b.size(); i++) {
duke@435:     if (b.at(i)) tty->print("%d ", i);
duke@435:   }
duke@435:   tty->cr();
duke@435: }
duke@435: 
duke@435: void LinearScan::print_intervals(const char* label) {
duke@435:   if (TraceLinearScanLevel >= 1) {
duke@435:     int i;
duke@435:     tty->cr();
duke@435:     tty->print_cr("%s", label);
duke@435: 
duke@435:     for (i = 0; i < interval_count(); i++) {
duke@435:       Interval* interval = interval_at(i);
duke@435:       if (interval != NULL) {
duke@435:         interval->print();
duke@435:       }
duke@435:     }
duke@435: 
duke@435:     tty->cr();
duke@435:     tty->print_cr("--- Basic Blocks ---");
duke@435:     for (i = 0; i < block_count(); i++) {
duke@435:       BlockBegin* block = block_at(i);
duke@435:       tty->print("B%d [%d, %d, %d, %d] ", block->block_id(), block->first_lir_instruction_id(), block->last_lir_instruction_id(), block->loop_index(), block->loop_depth());
duke@435:     }
duke@435:     tty->cr();
duke@435:     tty->cr();
duke@435:   }
duke@435: 
duke@435:   if (PrintCFGToFile) {
duke@435:     CFGPrinter::print_intervals(&_intervals, label);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScan::print_lir(int level, const char* label, bool hir_valid) {
duke@435:   if (TraceLinearScanLevel >= level) {
duke@435:     tty->cr();
duke@435:     tty->print_cr("%s", label);
duke@435:     print_LIR(ir()->linear_scan_order());
duke@435:     tty->cr();
duke@435:   }
duke@435: 
duke@435:   if (level == 1 && PrintCFGToFile) {
duke@435:     CFGPrinter::print_cfg(ir()->linear_scan_order(), label, hir_valid, true);
duke@435:   }
duke@435: }
duke@435: 
duke@435: #endif //PRODUCT
duke@435: 
duke@435: 
duke@435: // ********** verification functions for allocation
duke@435: // (check that all intervals have a correct register and that no registers are overwritten)
duke@435: #ifdef ASSERT
duke@435: 
duke@435: void LinearScan::verify() {
duke@435:   TRACE_LINEAR_SCAN(2, tty->print_cr("********* verifying intervals ******************************************"));
duke@435:   verify_intervals();
duke@435: 
duke@435:   TRACE_LINEAR_SCAN(2, tty->print_cr("********* verifying that no oops are in fixed intervals ****************"));
duke@435:   verify_no_oops_in_fixed_intervals();
duke@435: 
duke@435:   TRACE_LINEAR_SCAN(2, tty->print_cr("********* verifying that unpinned constants are not alive across block boundaries"));
duke@435:   verify_constants();
duke@435: 
duke@435:   TRACE_LINEAR_SCAN(2, tty->print_cr("********* verifying register allocation ********************************"));
duke@435:   verify_registers();
duke@435: 
duke@435:   TRACE_LINEAR_SCAN(2, tty->print_cr("********* no errors found **********************************************"));
duke@435: }
duke@435: 
duke@435: void LinearScan::verify_intervals() {
duke@435:   int len = interval_count();
duke@435:   bool has_error = false;
duke@435: 
duke@435:   for (int i = 0; i < len; i++) {
duke@435:     Interval* i1 = interval_at(i);
duke@435:     if (i1 == NULL) continue;
duke@435: 
duke@435:     i1->check_split_children();
duke@435: 
duke@435:     if (i1->reg_num() != i) {
duke@435:       tty->print_cr("Interval %d is on position %d in list", i1->reg_num(), i); i1->print(); tty->cr();
duke@435:       has_error = true;
duke@435:     }
duke@435: 
duke@435:     if (i1->reg_num() >= LIR_OprDesc::vreg_base && i1->type() == T_ILLEGAL) {
duke@435:       tty->print_cr("Interval %d has no type assigned", i1->reg_num()); i1->print(); tty->cr();
duke@435:       has_error = true;
duke@435:     }
duke@435: 
duke@435:     if (i1->assigned_reg() == any_reg) {
duke@435:       tty->print_cr("Interval %d has no register assigned", i1->reg_num()); i1->print(); tty->cr();
duke@435:       has_error = true;
duke@435:     }
duke@435: 
duke@435:     if (i1->assigned_reg() == i1->assigned_regHi()) {
duke@435:       tty->print_cr("Interval %d: low and high register equal", i1->reg_num()); i1->print(); tty->cr();
duke@435:       has_error = true;
duke@435:     }
duke@435: 
duke@435:     if (!is_processed_reg_num(i1->assigned_reg())) {
duke@435:       tty->print_cr("Can not have an Interval for an ignored register"); i1->print(); tty->cr();
duke@435:       has_error = true;
duke@435:     }
duke@435: 
duke@435:     if (i1->first() == Range::end()) {
duke@435:       tty->print_cr("Interval %d has no Range", i1->reg_num()); i1->print(); tty->cr();
duke@435:       has_error = true;
duke@435:     }
duke@435: 
duke@435:     for (Range* r = i1->first(); r != Range::end(); r = r->next()) {
duke@435:       if (r->from() >= r->to()) {
duke@435:         tty->print_cr("Interval %d has zero length range", i1->reg_num()); i1->print(); tty->cr();
duke@435:         has_error = true;
duke@435:       }
duke@435:     }
duke@435: 
duke@435:     for (int j = i + 1; j < len; j++) {
duke@435:       Interval* i2 = interval_at(j);
duke@435:       if (i2 == NULL) continue;
duke@435: 
duke@435:       // special intervals that are created in MoveResolver
duke@435:       // -> ignore them because the range information has no meaning there
duke@435:       if (i1->from() == 1 && i1->to() == 2) continue;
duke@435:       if (i2->from() == 1 && i2->to() == 2) continue;
duke@435: 
duke@435:       int r1 = i1->assigned_reg();
duke@435:       int r1Hi = i1->assigned_regHi();
duke@435:       int r2 = i2->assigned_reg();
duke@435:       int r2Hi = i2->assigned_regHi();
duke@435:       if (i1->intersects(i2) && (r1 == r2 || r1 == r2Hi || (r1Hi != any_reg && (r1Hi == r2 || r1Hi == r2Hi)))) {
duke@435:         tty->print_cr("Intervals %d and %d overlap and have the same register assigned", i1->reg_num(), i2->reg_num());
duke@435:         i1->print(); tty->cr();
duke@435:         i2->print(); tty->cr();
duke@435:         has_error = true;
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   assert(has_error == false, "register allocation invalid");
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScan::verify_no_oops_in_fixed_intervals() {
never@1157:   Interval* fixed_intervals;
never@1157:   Interval* other_intervals;
never@1157:   create_unhandled_lists(&fixed_intervals, &other_intervals, is_precolored_cpu_interval, NULL);
never@1157: 
never@1157:   // to ensure a walking until the last instruction id, add a dummy interval
never@1157:   // with a high operation id
never@1157:   other_intervals = new Interval(any_reg);
never@1157:   other_intervals->add_range(max_jint - 2, max_jint - 1);
never@1157:   IntervalWalker* iw = new IntervalWalker(this, fixed_intervals, other_intervals);
never@1157: 
duke@435:   LIR_OpVisitState visitor;
duke@435:   for (int i = 0; i < block_count(); i++) {
duke@435:     BlockBegin* block = block_at(i);
duke@435: 
duke@435:     LIR_OpList* instructions = block->lir()->instructions_list();
duke@435: 
duke@435:     for (int j = 0; j < instructions->length(); j++) {
duke@435:       LIR_Op* op = instructions->at(j);
duke@435:       int op_id = op->id();
duke@435: 
duke@435:       visitor.visit(op);
duke@435: 
never@1157:       if (visitor.info_count() > 0) {
never@1157:         iw->walk_before(op->id());
never@1157:         bool check_live = true;
never@1157:         if (op->code() == lir_move) {
never@1157:           LIR_Op1* move = (LIR_Op1*)op;
never@1157:           check_live = (move->patch_code() == lir_patch_none);
never@1157:         }
never@1157:         LIR_OpBranch* branch = op->as_OpBranch();
never@1157:         if (branch != NULL && branch->stub() != NULL && branch->stub()->is_exception_throw_stub()) {
never@1157:           // Don't bother checking the stub in this case since the
never@1157:           // exception stub will never return to normal control flow.
never@1157:           check_live = false;
never@1157:         }
never@1157: 
never@1157:         // Make sure none of the fixed registers is live across an
never@1157:         // oopmap since we can't handle that correctly.
never@1157:         if (check_live) {
never@1157:           for (Interval* interval = iw->active_first(fixedKind);
never@1157:                interval != Interval::end();
never@1157:                interval = interval->next()) {
never@1157:             if (interval->current_to() > op->id() + 1) {
never@1157:               // This interval is live out of this op so make sure
never@1157:               // that this interval represents some value that's
never@1157:               // referenced by this op either as an input or output.
never@1157:               bool ok = false;
never@1157:               for_each_visitor_mode(mode) {
never@1157:                 int n = visitor.opr_count(mode);
never@1157:                 for (int k = 0; k < n; k++) {
never@1157:                   LIR_Opr opr = visitor.opr_at(mode, k);
never@1157:                   if (opr->is_fixed_cpu()) {
never@1157:                     if (interval_at(reg_num(opr)) == interval) {
never@1157:                       ok = true;
never@1157:                       break;
never@1157:                     }
never@1157:                     int hi = reg_numHi(opr);
never@1157:                     if (hi != -1 && interval_at(hi) == interval) {
never@1157:                       ok = true;
never@1157:                       break;
never@1157:                     }
never@1157:                   }
never@1157:                 }
never@1157:               }
never@1157:               assert(ok, "fixed intervals should never be live across an oopmap point");
never@1157:             }
never@1157:           }
never@1157:         }
never@1157:       }
never@1157: 
duke@435:       // oop-maps at calls do not contain registers, so check is not needed
duke@435:       if (!visitor.has_call()) {
duke@435: 
duke@435:         for_each_visitor_mode(mode) {
duke@435:           int n = visitor.opr_count(mode);
duke@435:           for (int k = 0; k < n; k++) {
duke@435:             LIR_Opr opr = visitor.opr_at(mode, k);
duke@435: 
duke@435:             if (opr->is_fixed_cpu() && opr->is_oop()) {
duke@435:               // operand is a non-virtual cpu register and contains an oop
duke@435:               TRACE_LINEAR_SCAN(4, op->print_on(tty); tty->print("checking operand "); opr->print(); tty->cr());
duke@435: 
duke@435:               Interval* interval = interval_at(reg_num(opr));
duke@435:               assert(interval != NULL, "no interval");
duke@435: 
duke@435:               if (mode == LIR_OpVisitState::inputMode) {
duke@435:                 if (interval->to() >= op_id + 1) {
duke@435:                   assert(interval->to() < op_id + 2 ||
duke@435:                          interval->has_hole_between(op_id, op_id + 2),
duke@435:                          "oop input operand live after instruction");
duke@435:                 }
duke@435:               } else if (mode == LIR_OpVisitState::outputMode) {
duke@435:                 if (interval->from() <= op_id - 1) {
duke@435:                   assert(interval->has_hole_between(op_id - 1, op_id),
duke@435:                          "oop input operand live after instruction");
duke@435:                 }
duke@435:               }
duke@435:             }
duke@435:           }
duke@435:         }
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScan::verify_constants() {
duke@435:   int num_regs = num_virtual_regs();
duke@435:   int size = live_set_size();
duke@435:   int num_blocks = block_count();
duke@435: 
duke@435:   for (int i = 0; i < num_blocks; i++) {
duke@435:     BlockBegin* block = block_at(i);
duke@435:     BitMap live_at_edge = block->live_in();
duke@435: 
duke@435:     // visit all registers where the live_at_edge bit is set
never@739:     for (int r = (int)live_at_edge.get_next_one_offset(0, size); r < size; r = (int)live_at_edge.get_next_one_offset(r + 1, size)) {
duke@435:       TRACE_LINEAR_SCAN(4, tty->print("checking interval %d of block B%d", r, block->block_id()));
duke@435: 
duke@435:       Value value = gen()->instruction_for_vreg(r);
duke@435: 
duke@435:       assert(value != NULL, "all intervals live across block boundaries must have Value");
duke@435:       assert(value->operand()->is_register() && value->operand()->is_virtual(), "value must have virtual operand");
duke@435:       assert(value->operand()->vreg_number() == r, "register number must match");
duke@435:       // TKR assert(value->as_Constant() == NULL || value->is_pinned(), "only pinned constants can be alive accross block boundaries");
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: class RegisterVerifier: public StackObj {
duke@435:  private:
duke@435:   LinearScan*   _allocator;
duke@435:   BlockList     _work_list;      // all blocks that must be processed
duke@435:   IntervalsList _saved_states;   // saved information of previous check
duke@435: 
duke@435:   // simplified access to methods of LinearScan
duke@435:   Compilation*  compilation() const              { return _allocator->compilation(); }
duke@435:   Interval*     interval_at(int reg_num) const   { return _allocator->interval_at(reg_num); }
duke@435:   int           reg_num(LIR_Opr opr) const       { return _allocator->reg_num(opr); }
duke@435: 
duke@435:   // currently, only registers are processed
duke@435:   int           state_size()                     { return LinearScan::nof_regs; }
duke@435: 
duke@435:   // accessors
duke@435:   IntervalList* state_for_block(BlockBegin* block) { return _saved_states.at(block->block_id()); }
duke@435:   void          set_state_for_block(BlockBegin* block, IntervalList* saved_state) { _saved_states.at_put(block->block_id(), saved_state); }
duke@435:   void          add_to_work_list(BlockBegin* block) { if (!_work_list.contains(block)) _work_list.append(block); }
duke@435: 
duke@435:   // helper functions
duke@435:   IntervalList* copy(IntervalList* input_state);
duke@435:   void          state_put(IntervalList* input_state, int reg, Interval* interval);
duke@435:   bool          check_state(IntervalList* input_state, int reg, Interval* interval);
duke@435: 
duke@435:   void process_block(BlockBegin* block);
duke@435:   void process_xhandler(XHandler* xhandler, IntervalList* input_state);
duke@435:   void process_successor(BlockBegin* block, IntervalList* input_state);
duke@435:   void process_operations(LIR_List* ops, IntervalList* input_state);
duke@435: 
duke@435:  public:
duke@435:   RegisterVerifier(LinearScan* allocator)
duke@435:     : _allocator(allocator)
duke@435:     , _work_list(16)
duke@435:     , _saved_states(BlockBegin::number_of_blocks(), NULL)
duke@435:   { }
duke@435: 
duke@435:   void verify(BlockBegin* start);
duke@435: };
duke@435: 
duke@435: 
duke@435: // entry function from LinearScan that starts the verification
duke@435: void LinearScan::verify_registers() {
duke@435:   RegisterVerifier verifier(this);
duke@435:   verifier.verify(block_at(0));
duke@435: }
duke@435: 
duke@435: 
duke@435: void RegisterVerifier::verify(BlockBegin* start) {
duke@435:   // setup input registers (method arguments) for first block
duke@435:   IntervalList* input_state = new IntervalList(state_size(), NULL);
duke@435:   CallingConvention* args = compilation()->frame_map()->incoming_arguments();
duke@435:   for (int n = 0; n < args->length(); n++) {
duke@435:     LIR_Opr opr = args->at(n);
duke@435:     if (opr->is_register()) {
duke@435:       Interval* interval = interval_at(reg_num(opr));
duke@435: 
duke@435:       if (interval->assigned_reg() < state_size()) {
duke@435:         input_state->at_put(interval->assigned_reg(), interval);
duke@435:       }
duke@435:       if (interval->assigned_regHi() != LinearScan::any_reg && interval->assigned_regHi() < state_size()) {
duke@435:         input_state->at_put(interval->assigned_regHi(), interval);
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   set_state_for_block(start, input_state);
duke@435:   add_to_work_list(start);
duke@435: 
duke@435:   // main loop for verification
duke@435:   do {
duke@435:     BlockBegin* block = _work_list.at(0);
duke@435:     _work_list.remove_at(0);
duke@435: 
duke@435:     process_block(block);
duke@435:   } while (!_work_list.is_empty());
duke@435: }
duke@435: 
duke@435: void RegisterVerifier::process_block(BlockBegin* block) {
duke@435:   TRACE_LINEAR_SCAN(2, tty->cr(); tty->print_cr("process_block B%d", block->block_id()));
duke@435: 
duke@435:   // must copy state because it is modified
duke@435:   IntervalList* input_state = copy(state_for_block(block));
duke@435: 
duke@435:   if (TraceLinearScanLevel >= 4) {
duke@435:     tty->print_cr("Input-State of intervals:");
duke@435:     tty->print("    ");
duke@435:     for (int i = 0; i < state_size(); i++) {
duke@435:       if (input_state->at(i) != NULL) {
duke@435:         tty->print(" %4d", input_state->at(i)->reg_num());
duke@435:       } else {
duke@435:         tty->print("   __");
duke@435:       }
duke@435:     }
duke@435:     tty->cr();
duke@435:     tty->cr();
duke@435:   }
duke@435: 
duke@435:   // process all operations of the block
duke@435:   process_operations(block->lir(), input_state);
duke@435: 
duke@435:   // iterate all successors
duke@435:   for (int i = 0; i < block->number_of_sux(); i++) {
duke@435:     process_successor(block->sux_at(i), input_state);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void RegisterVerifier::process_xhandler(XHandler* xhandler, IntervalList* input_state) {
duke@435:   TRACE_LINEAR_SCAN(2, tty->print_cr("process_xhandler B%d", xhandler->entry_block()->block_id()));
duke@435: 
duke@435:   // must copy state because it is modified
duke@435:   input_state = copy(input_state);
duke@435: 
duke@435:   if (xhandler->entry_code() != NULL) {
duke@435:     process_operations(xhandler->entry_code(), input_state);
duke@435:   }
duke@435:   process_successor(xhandler->entry_block(), input_state);
duke@435: }
duke@435: 
duke@435: void RegisterVerifier::process_successor(BlockBegin* block, IntervalList* input_state) {
duke@435:   IntervalList* saved_state = state_for_block(block);
duke@435: 
duke@435:   if (saved_state != NULL) {
duke@435:     // this block was already processed before.
duke@435:     // check if new input_state is consistent with saved_state
duke@435: 
duke@435:     bool saved_state_correct = true;
duke@435:     for (int i = 0; i < state_size(); i++) {
duke@435:       if (input_state->at(i) != saved_state->at(i)) {
duke@435:         // current input_state and previous saved_state assume a different
duke@435:         // interval in this register -> assume that this register is invalid
duke@435:         if (saved_state->at(i) != NULL) {
duke@435:           // invalidate old calculation only if it assumed that
duke@435:           // register was valid. when the register was already invalid,
duke@435:           // then the old calculation was correct.
duke@435:           saved_state_correct = false;
duke@435:           saved_state->at_put(i, NULL);
duke@435: 
duke@435:           TRACE_LINEAR_SCAN(4, tty->print_cr("process_successor B%d: invalidating slot %d", block->block_id(), i));
duke@435:         }
duke@435:       }
duke@435:     }
duke@435: 
duke@435:     if (saved_state_correct) {
duke@435:       // already processed block with correct input_state
duke@435:       TRACE_LINEAR_SCAN(2, tty->print_cr("process_successor B%d: previous visit already correct", block->block_id()));
duke@435:     } else {
duke@435:       // must re-visit this block
duke@435:       TRACE_LINEAR_SCAN(2, tty->print_cr("process_successor B%d: must re-visit because input state changed", block->block_id()));
duke@435:       add_to_work_list(block);
duke@435:     }
duke@435: 
duke@435:   } else {
duke@435:     // block was not processed before, so set initial input_state
duke@435:     TRACE_LINEAR_SCAN(2, tty->print_cr("process_successor B%d: initial visit", block->block_id()));
duke@435: 
duke@435:     set_state_for_block(block, copy(input_state));
duke@435:     add_to_work_list(block);
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: IntervalList* RegisterVerifier::copy(IntervalList* input_state) {
duke@435:   IntervalList* copy_state = new IntervalList(input_state->length());
duke@435:   copy_state->push_all(input_state);
duke@435:   return copy_state;
duke@435: }
duke@435: 
duke@435: void RegisterVerifier::state_put(IntervalList* input_state, int reg, Interval* interval) {
duke@435:   if (reg != LinearScan::any_reg && reg < state_size()) {
duke@435:     if (interval != NULL) {
duke@435:       TRACE_LINEAR_SCAN(4, tty->print_cr("        reg[%d] = %d", reg, interval->reg_num()));
duke@435:     } else if (input_state->at(reg) != NULL) {
duke@435:       TRACE_LINEAR_SCAN(4, tty->print_cr("        reg[%d] = NULL", reg));
duke@435:     }
duke@435: 
duke@435:     input_state->at_put(reg, interval);
duke@435:   }
duke@435: }
duke@435: 
duke@435: bool RegisterVerifier::check_state(IntervalList* input_state, int reg, Interval* interval) {
duke@435:   if (reg != LinearScan::any_reg && reg < state_size()) {
duke@435:     if (input_state->at(reg) != interval) {
duke@435:       tty->print_cr("!! Error in register allocation: register %d does not contain interval %d", reg, interval->reg_num());
duke@435:       return true;
duke@435:     }
duke@435:   }
duke@435:   return false;
duke@435: }
duke@435: 
duke@435: void RegisterVerifier::process_operations(LIR_List* ops, IntervalList* input_state) {
duke@435:   // visit all instructions of the block
duke@435:   LIR_OpVisitState visitor;
duke@435:   bool has_error = false;
duke@435: 
duke@435:   for (int i = 0; i < ops->length(); i++) {
duke@435:     LIR_Op* op = ops->at(i);
duke@435:     visitor.visit(op);
duke@435: 
duke@435:     TRACE_LINEAR_SCAN(4, op->print_on(tty));
duke@435: 
duke@435:     // check if input operands are correct
duke@435:     int j;
duke@435:     int n = visitor.opr_count(LIR_OpVisitState::inputMode);
duke@435:     for (j = 0; j < n; j++) {
duke@435:       LIR_Opr opr = visitor.opr_at(LIR_OpVisitState::inputMode, j);
duke@435:       if (opr->is_register() && LinearScan::is_processed_reg_num(reg_num(opr))) {
duke@435:         Interval* interval = interval_at(reg_num(opr));
duke@435:         if (op->id() != -1) {
duke@435:           interval = interval->split_child_at_op_id(op->id(), LIR_OpVisitState::inputMode);
duke@435:         }
duke@435: 
duke@435:         has_error |= check_state(input_state, interval->assigned_reg(),   interval->split_parent());
duke@435:         has_error |= check_state(input_state, interval->assigned_regHi(), interval->split_parent());
duke@435: 
duke@435:         // When an operand is marked with is_last_use, then the fpu stack allocator
duke@435:         // removes the register from the fpu stack -> the register contains no value
duke@435:         if (opr->is_last_use()) {
duke@435:           state_put(input_state, interval->assigned_reg(),   NULL);
duke@435:           state_put(input_state, interval->assigned_regHi(), NULL);
duke@435:         }
duke@435:       }
duke@435:     }
duke@435: 
duke@435:     // invalidate all caller save registers at calls
duke@435:     if (visitor.has_call()) {
iveresov@2344:       for (j = 0; j < FrameMap::nof_caller_save_cpu_regs(); j++) {
duke@435:         state_put(input_state, reg_num(FrameMap::caller_save_cpu_reg_at(j)), NULL);
duke@435:       }
duke@435:       for (j = 0; j < FrameMap::nof_caller_save_fpu_regs; j++) {
duke@435:         state_put(input_state, reg_num(FrameMap::caller_save_fpu_reg_at(j)), NULL);
duke@435:       }
duke@435: 
never@739: #ifdef X86
duke@435:       for (j = 0; j < FrameMap::nof_caller_save_xmm_regs; j++) {
duke@435:         state_put(input_state, reg_num(FrameMap::caller_save_xmm_reg_at(j)), NULL);
duke@435:       }
duke@435: #endif
duke@435:     }
duke@435: 
duke@435:     // process xhandler before output and temp operands
duke@435:     XHandlers* xhandlers = visitor.all_xhandler();
duke@435:     n = xhandlers->length();
duke@435:     for (int k = 0; k < n; k++) {
duke@435:       process_xhandler(xhandlers->handler_at(k), input_state);
duke@435:     }
duke@435: 
duke@435:     // set temp operands (some operations use temp operands also as output operands, so can't set them NULL)
duke@435:     n = visitor.opr_count(LIR_OpVisitState::tempMode);
duke@435:     for (j = 0; j < n; j++) {
duke@435:       LIR_Opr opr = visitor.opr_at(LIR_OpVisitState::tempMode, j);
duke@435:       if (opr->is_register() && LinearScan::is_processed_reg_num(reg_num(opr))) {
duke@435:         Interval* interval = interval_at(reg_num(opr));
duke@435:         if (op->id() != -1) {
duke@435:           interval = interval->split_child_at_op_id(op->id(), LIR_OpVisitState::tempMode);
duke@435:         }
duke@435: 
duke@435:         state_put(input_state, interval->assigned_reg(),   interval->split_parent());
duke@435:         state_put(input_state, interval->assigned_regHi(), interval->split_parent());
duke@435:       }
duke@435:     }
duke@435: 
duke@435:     // set output operands
duke@435:     n = visitor.opr_count(LIR_OpVisitState::outputMode);
duke@435:     for (j = 0; j < n; j++) {
duke@435:       LIR_Opr opr = visitor.opr_at(LIR_OpVisitState::outputMode, j);
duke@435:       if (opr->is_register() && LinearScan::is_processed_reg_num(reg_num(opr))) {
duke@435:         Interval* interval = interval_at(reg_num(opr));
duke@435:         if (op->id() != -1) {
duke@435:           interval = interval->split_child_at_op_id(op->id(), LIR_OpVisitState::outputMode);
duke@435:         }
duke@435: 
duke@435:         state_put(input_state, interval->assigned_reg(),   interval->split_parent());
duke@435:         state_put(input_state, interval->assigned_regHi(), interval->split_parent());
duke@435:       }
duke@435:     }
duke@435:   }
duke@435:   assert(has_error == false, "Error in register allocation");
duke@435: }
duke@435: 
duke@435: #endif // ASSERT
duke@435: 
duke@435: 
duke@435: 
duke@435: // **** Implementation of MoveResolver ******************************
duke@435: 
duke@435: MoveResolver::MoveResolver(LinearScan* allocator) :
duke@435:   _allocator(allocator),
duke@435:   _multiple_reads_allowed(false),
duke@435:   _mapping_from(8),
duke@435:   _mapping_from_opr(8),
duke@435:   _mapping_to(8),
duke@435:   _insert_list(NULL),
duke@435:   _insert_idx(-1),
duke@435:   _insertion_buffer()
duke@435: {
duke@435:   for (int i = 0; i < LinearScan::nof_regs; i++) {
duke@435:     _register_blocked[i] = 0;
duke@435:   }
duke@435:   DEBUG_ONLY(check_empty());
duke@435: }
duke@435: 
duke@435: 
duke@435: #ifdef ASSERT
duke@435: 
duke@435: void MoveResolver::check_empty() {
duke@435:   assert(_mapping_from.length() == 0 && _mapping_from_opr.length() == 0 && _mapping_to.length() == 0, "list must be empty before and after processing");
duke@435:   for (int i = 0; i < LinearScan::nof_regs; i++) {
duke@435:     assert(register_blocked(i) == 0, "register map must be empty before and after processing");
duke@435:   }
duke@435:   assert(_multiple_reads_allowed == false, "must have default value");
duke@435: }
duke@435: 
duke@435: void MoveResolver::verify_before_resolve() {
duke@435:   assert(_mapping_from.length() == _mapping_from_opr.length(), "length must be equal");
duke@435:   assert(_mapping_from.length() == _mapping_to.length(), "length must be equal");
duke@435:   assert(_insert_list != NULL && _insert_idx != -1, "insert position not set");
duke@435: 
duke@435:   int i, j;
duke@435:   if (!_multiple_reads_allowed) {
duke@435:     for (i = 0; i < _mapping_from.length(); i++) {
duke@435:       for (j = i + 1; j < _mapping_from.length(); j++) {
duke@435:         assert(_mapping_from.at(i) == NULL || _mapping_from.at(i) != _mapping_from.at(j), "cannot read from same interval twice");
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   for (i = 0; i < _mapping_to.length(); i++) {
duke@435:     for (j = i + 1; j < _mapping_to.length(); j++) {
duke@435:       assert(_mapping_to.at(i) != _mapping_to.at(j), "cannot write to same interval twice");
duke@435:     }
duke@435:   }
duke@435: 
duke@435: 
duke@435:   BitMap used_regs(LinearScan::nof_regs + allocator()->frame_map()->argcount() + allocator()->max_spills());
duke@435:   used_regs.clear();
duke@435:   if (!_multiple_reads_allowed) {
duke@435:     for (i = 0; i < _mapping_from.length(); i++) {
duke@435:       Interval* it = _mapping_from.at(i);
duke@435:       if (it != NULL) {
duke@435:         assert(!used_regs.at(it->assigned_reg()), "cannot read from same register twice");
duke@435:         used_regs.set_bit(it->assigned_reg());
duke@435: 
duke@435:         if (it->assigned_regHi() != LinearScan::any_reg) {
duke@435:           assert(!used_regs.at(it->assigned_regHi()), "cannot read from same register twice");
duke@435:           used_regs.set_bit(it->assigned_regHi());
duke@435:         }
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   used_regs.clear();
duke@435:   for (i = 0; i < _mapping_to.length(); i++) {
duke@435:     Interval* it = _mapping_to.at(i);
duke@435:     assert(!used_regs.at(it->assigned_reg()), "cannot write to same register twice");
duke@435:     used_regs.set_bit(it->assigned_reg());
duke@435: 
duke@435:     if (it->assigned_regHi() != LinearScan::any_reg) {
duke@435:       assert(!used_regs.at(it->assigned_regHi()), "cannot write to same register twice");
duke@435:       used_regs.set_bit(it->assigned_regHi());
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   used_regs.clear();
duke@435:   for (i = 0; i < _mapping_from.length(); i++) {
duke@435:     Interval* it = _mapping_from.at(i);
duke@435:     if (it != NULL && it->assigned_reg() >= LinearScan::nof_regs) {
duke@435:       used_regs.set_bit(it->assigned_reg());
duke@435:     }
duke@435:   }
duke@435:   for (i = 0; i < _mapping_to.length(); i++) {
duke@435:     Interval* it = _mapping_to.at(i);
duke@435:     assert(!used_regs.at(it->assigned_reg()) || it->assigned_reg() == _mapping_from.at(i)->assigned_reg(), "stack slots used in _mapping_from must be disjoint to _mapping_to");
duke@435:   }
duke@435: }
duke@435: 
duke@435: #endif // ASSERT
duke@435: 
duke@435: 
duke@435: // mark assigned_reg and assigned_regHi of the interval as blocked
duke@435: void MoveResolver::block_registers(Interval* it) {
duke@435:   int reg = it->assigned_reg();
duke@435:   if (reg < LinearScan::nof_regs) {
duke@435:     assert(_multiple_reads_allowed || register_blocked(reg) == 0, "register already marked as used");
duke@435:     set_register_blocked(reg, 1);
duke@435:   }
duke@435:   reg = it->assigned_regHi();
duke@435:   if (reg != LinearScan::any_reg && reg < LinearScan::nof_regs) {
duke@435:     assert(_multiple_reads_allowed || register_blocked(reg) == 0, "register already marked as used");
duke@435:     set_register_blocked(reg, 1);
duke@435:   }
duke@435: }
duke@435: 
duke@435: // mark assigned_reg and assigned_regHi of the interval as unblocked
duke@435: void MoveResolver::unblock_registers(Interval* it) {
duke@435:   int reg = it->assigned_reg();
duke@435:   if (reg < LinearScan::nof_regs) {
duke@435:     assert(register_blocked(reg) > 0, "register already marked as unused");
duke@435:     set_register_blocked(reg, -1);
duke@435:   }
duke@435:   reg = it->assigned_regHi();
duke@435:   if (reg != LinearScan::any_reg && reg < LinearScan::nof_regs) {
duke@435:     assert(register_blocked(reg) > 0, "register already marked as unused");
duke@435:     set_register_blocked(reg, -1);
duke@435:   }
duke@435: }
duke@435: 
duke@435: // check if assigned_reg and assigned_regHi of the to-interval are not blocked (or only blocked by from)
duke@435: bool MoveResolver::save_to_process_move(Interval* from, Interval* to) {
duke@435:   int from_reg = -1;
duke@435:   int from_regHi = -1;
duke@435:   if (from != NULL) {
duke@435:     from_reg = from->assigned_reg();
duke@435:     from_regHi = from->assigned_regHi();
duke@435:   }
duke@435: 
duke@435:   int reg = to->assigned_reg();
duke@435:   if (reg < LinearScan::nof_regs) {
duke@435:     if (register_blocked(reg) > 1 || (register_blocked(reg) == 1 && reg != from_reg && reg != from_regHi)) {
duke@435:       return false;
duke@435:     }
duke@435:   }
duke@435:   reg = to->assigned_regHi();
duke@435:   if (reg != LinearScan::any_reg && reg < LinearScan::nof_regs) {
duke@435:     if (register_blocked(reg) > 1 || (register_blocked(reg) == 1 && reg != from_reg && reg != from_regHi)) {
duke@435:       return false;
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   return true;
duke@435: }
duke@435: 
duke@435: 
duke@435: void MoveResolver::create_insertion_buffer(LIR_List* list) {
duke@435:   assert(!_insertion_buffer.initialized(), "overwriting existing buffer");
duke@435:   _insertion_buffer.init(list);
duke@435: }
duke@435: 
duke@435: void MoveResolver::append_insertion_buffer() {
duke@435:   if (_insertion_buffer.initialized()) {
duke@435:     _insertion_buffer.lir_list()->append(&_insertion_buffer);
duke@435:   }
duke@435:   assert(!_insertion_buffer.initialized(), "must be uninitialized now");
duke@435: 
duke@435:   _insert_list = NULL;
duke@435:   _insert_idx = -1;
duke@435: }
duke@435: 
duke@435: void MoveResolver::insert_move(Interval* from_interval, Interval* to_interval) {
duke@435:   assert(from_interval->reg_num() != to_interval->reg_num(), "from and to interval equal");
duke@435:   assert(from_interval->type() == to_interval->type(), "move between different types");
duke@435:   assert(_insert_list != NULL && _insert_idx != -1, "must setup insert position first");
duke@435:   assert(_insertion_buffer.lir_list() == _insert_list, "wrong insertion buffer");
duke@435: 
duke@435:   LIR_Opr from_opr = LIR_OprFact::virtual_register(from_interval->reg_num(), from_interval->type());
duke@435:   LIR_Opr to_opr = LIR_OprFact::virtual_register(to_interval->reg_num(), to_interval->type());
duke@435: 
duke@435:   if (!_multiple_reads_allowed) {
duke@435:     // the last_use flag is an optimization for FPU stack allocation. When the same
duke@435:     // input interval is used in more than one move, then it is too difficult to determine
duke@435:     // if this move is really the last use.
duke@435:     from_opr = from_opr->make_last_use();
duke@435:   }
duke@435:   _insertion_buffer.move(_insert_idx, from_opr, to_opr);
duke@435: 
duke@435:   TRACE_LINEAR_SCAN(4, tty->print_cr("MoveResolver: inserted move from register %d (%d, %d) to %d (%d, %d)", from_interval->reg_num(), from_interval->assigned_reg(), from_interval->assigned_regHi(), to_interval->reg_num(), to_interval->assigned_reg(), to_interval->assigned_regHi()));
duke@435: }
duke@435: 
duke@435: void MoveResolver::insert_move(LIR_Opr from_opr, Interval* to_interval) {
duke@435:   assert(from_opr->type() == to_interval->type(), "move between different types");
duke@435:   assert(_insert_list != NULL && _insert_idx != -1, "must setup insert position first");
duke@435:   assert(_insertion_buffer.lir_list() == _insert_list, "wrong insertion buffer");
duke@435: 
duke@435:   LIR_Opr to_opr = LIR_OprFact::virtual_register(to_interval->reg_num(), to_interval->type());
duke@435:   _insertion_buffer.move(_insert_idx, from_opr, to_opr);
duke@435: 
duke@435:   TRACE_LINEAR_SCAN(4, tty->print("MoveResolver: inserted move from constant "); from_opr->print(); tty->print_cr("  to %d (%d, %d)", to_interval->reg_num(), to_interval->assigned_reg(), to_interval->assigned_regHi()));
duke@435: }
duke@435: 
duke@435: 
duke@435: void MoveResolver::resolve_mappings() {
duke@435:   TRACE_LINEAR_SCAN(4, tty->print_cr("MoveResolver: resolving mappings for Block B%d, index %d", _insert_list->block() != NULL ? _insert_list->block()->block_id() : -1, _insert_idx));
duke@435:   DEBUG_ONLY(verify_before_resolve());
duke@435: 
duke@435:   // Block all registers that are used as input operands of a move.
duke@435:   // When a register is blocked, no move to this register is emitted.
duke@435:   // This is necessary for detecting cycles in moves.
duke@435:   int i;
duke@435:   for (i = _mapping_from.length() - 1; i >= 0; i--) {
duke@435:     Interval* from_interval = _mapping_from.at(i);
duke@435:     if (from_interval != NULL) {
duke@435:       block_registers(from_interval);
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   int spill_candidate = -1;
duke@435:   while (_mapping_from.length() > 0) {
duke@435:     bool processed_interval = false;
duke@435: 
duke@435:     for (i = _mapping_from.length() - 1; i >= 0; i--) {
duke@435:       Interval* from_interval = _mapping_from.at(i);
duke@435:       Interval* to_interval = _mapping_to.at(i);
duke@435: 
duke@435:       if (save_to_process_move(from_interval, to_interval)) {
duke@435:         // this inverval can be processed because target is free
duke@435:         if (from_interval != NULL) {
duke@435:           insert_move(from_interval, to_interval);
duke@435:           unblock_registers(from_interval);
duke@435:         } else {
duke@435:           insert_move(_mapping_from_opr.at(i), to_interval);
duke@435:         }
duke@435:         _mapping_from.remove_at(i);
duke@435:         _mapping_from_opr.remove_at(i);
duke@435:         _mapping_to.remove_at(i);
duke@435: 
duke@435:         processed_interval = true;
duke@435:       } else if (from_interval != NULL && from_interval->assigned_reg() < LinearScan::nof_regs) {
duke@435:         // this interval cannot be processed now because target is not free
duke@435:         // it starts in a register, so it is a possible candidate for spilling
duke@435:         spill_candidate = i;
duke@435:       }
duke@435:     }
duke@435: 
duke@435:     if (!processed_interval) {
duke@435:       // no move could be processed because there is a cycle in the move list
duke@435:       // (e.g. r1 -> r2, r2 -> r1), so one interval must be spilled to memory
duke@435:       assert(spill_candidate != -1, "no interval in register for spilling found");
duke@435: 
duke@435:       // create a new spill interval and assign a stack slot to it
duke@435:       Interval* from_interval = _mapping_from.at(spill_candidate);
duke@435:       Interval* spill_interval = new Interval(-1);
duke@435:       spill_interval->set_type(from_interval->type());
duke@435: 
duke@435:       // add a dummy range because real position is difficult to calculate
duke@435:       // Note: this range is a special case when the integrity of the allocation is checked
duke@435:       spill_interval->add_range(1, 2);
duke@435: 
duke@435:       //       do not allocate a new spill slot for temporary interval, but
duke@435:       //       use spill slot assigned to from_interval. Otherwise moves from
duke@435:       //       one stack slot to another can happen (not allowed by LIR_Assembler
duke@435:       int spill_slot = from_interval->canonical_spill_slot();
duke@435:       if (spill_slot < 0) {
duke@435:         spill_slot = allocator()->allocate_spill_slot(type2spill_size[spill_interval->type()] == 2);
duke@435:         from_interval->set_canonical_spill_slot(spill_slot);
duke@435:       }
duke@435:       spill_interval->assign_reg(spill_slot);
duke@435:       allocator()->append_interval(spill_interval);
duke@435: 
duke@435:       TRACE_LINEAR_SCAN(4, tty->print_cr("created new Interval %d for spilling", spill_interval->reg_num()));
duke@435: 
duke@435:       // insert a move from register to stack and update the mapping
duke@435:       insert_move(from_interval, spill_interval);
duke@435:       _mapping_from.at_put(spill_candidate, spill_interval);
duke@435:       unblock_registers(from_interval);
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   // reset to default value
duke@435:   _multiple_reads_allowed = false;
duke@435: 
duke@435:   // check that all intervals have been processed
duke@435:   DEBUG_ONLY(check_empty());
duke@435: }
duke@435: 
duke@435: 
duke@435: void MoveResolver::set_insert_position(LIR_List* insert_list, int insert_idx) {
duke@435:   TRACE_LINEAR_SCAN(4, tty->print_cr("MoveResolver: setting insert position to Block B%d, index %d", insert_list->block() != NULL ? insert_list->block()->block_id() : -1, insert_idx));
duke@435:   assert(_insert_list == NULL && _insert_idx == -1, "use move_insert_position instead of set_insert_position when data already set");
duke@435: 
duke@435:   create_insertion_buffer(insert_list);
duke@435:   _insert_list = insert_list;
duke@435:   _insert_idx = insert_idx;
duke@435: }
duke@435: 
duke@435: void MoveResolver::move_insert_position(LIR_List* insert_list, int insert_idx) {
duke@435:   TRACE_LINEAR_SCAN(4, tty->print_cr("MoveResolver: moving insert position to Block B%d, index %d", insert_list->block() != NULL ? insert_list->block()->block_id() : -1, insert_idx));
duke@435: 
duke@435:   if (_insert_list != NULL && (insert_list != _insert_list || insert_idx != _insert_idx)) {
duke@435:     // insert position changed -> resolve current mappings
duke@435:     resolve_mappings();
duke@435:   }
duke@435: 
duke@435:   if (insert_list != _insert_list) {
duke@435:     // block changed -> append insertion_buffer because it is
duke@435:     // bound to a specific block and create a new insertion_buffer
duke@435:     append_insertion_buffer();
duke@435:     create_insertion_buffer(insert_list);
duke@435:   }
duke@435: 
duke@435:   _insert_list = insert_list;
duke@435:   _insert_idx = insert_idx;
duke@435: }
duke@435: 
duke@435: void MoveResolver::add_mapping(Interval* from_interval, Interval* to_interval) {
duke@435:   TRACE_LINEAR_SCAN(4, tty->print_cr("MoveResolver: adding mapping from %d (%d, %d) to %d (%d, %d)", from_interval->reg_num(), from_interval->assigned_reg(), from_interval->assigned_regHi(), to_interval->reg_num(), to_interval->assigned_reg(), to_interval->assigned_regHi()));
duke@435: 
duke@435:   _mapping_from.append(from_interval);
duke@435:   _mapping_from_opr.append(LIR_OprFact::illegalOpr);
duke@435:   _mapping_to.append(to_interval);
duke@435: }
duke@435: 
duke@435: 
duke@435: void MoveResolver::add_mapping(LIR_Opr from_opr, Interval* to_interval) {
duke@435:   TRACE_LINEAR_SCAN(4, tty->print("MoveResolver: adding mapping from "); from_opr->print(); tty->print_cr(" to %d (%d, %d)", to_interval->reg_num(), to_interval->assigned_reg(), to_interval->assigned_regHi()));
duke@435:   assert(from_opr->is_constant(), "only for constants");
duke@435: 
duke@435:   _mapping_from.append(NULL);
duke@435:   _mapping_from_opr.append(from_opr);
duke@435:   _mapping_to.append(to_interval);
duke@435: }
duke@435: 
duke@435: void MoveResolver::resolve_and_append_moves() {
duke@435:   if (has_mappings()) {
duke@435:     resolve_mappings();
duke@435:   }
duke@435:   append_insertion_buffer();
duke@435: }
duke@435: 
duke@435: 
duke@435: 
duke@435: // **** Implementation of Range *************************************
duke@435: 
duke@435: Range::Range(int from, int to, Range* next) :
duke@435:   _from(from),
duke@435:   _to(to),
duke@435:   _next(next)
duke@435: {
duke@435: }
duke@435: 
duke@435: // initialize sentinel
duke@435: Range* Range::_end = NULL;
iveresov@1939: void Range::initialize(Arena* arena) {
iveresov@1939:   _end = new (arena) Range(max_jint, max_jint, NULL);
duke@435: }
duke@435: 
duke@435: int Range::intersects_at(Range* r2) const {
duke@435:   const Range* r1 = this;
duke@435: 
duke@435:   assert(r1 != NULL && r2 != NULL, "null ranges not allowed");
duke@435:   assert(r1 != _end && r2 != _end, "empty ranges not allowed");
duke@435: 
duke@435:   do {
duke@435:     if (r1->from() < r2->from()) {
duke@435:       if (r1->to() <= r2->from()) {
duke@435:         r1 = r1->next(); if (r1 == _end) return -1;
duke@435:       } else {
duke@435:         return r2->from();
duke@435:       }
duke@435:     } else if (r2->from() < r1->from()) {
duke@435:       if (r2->to() <= r1->from()) {
duke@435:         r2 = r2->next(); if (r2 == _end) return -1;
duke@435:       } else {
duke@435:         return r1->from();
duke@435:       }
duke@435:     } else { // r1->from() == r2->from()
duke@435:       if (r1->from() == r1->to()) {
duke@435:         r1 = r1->next(); if (r1 == _end) return -1;
duke@435:       } else if (r2->from() == r2->to()) {
duke@435:         r2 = r2->next(); if (r2 == _end) return -1;
duke@435:       } else {
duke@435:         return r1->from();
duke@435:       }
duke@435:     }
duke@435:   } while (true);
duke@435: }
duke@435: 
duke@435: #ifndef PRODUCT
duke@435: void Range::print(outputStream* out) const {
duke@435:   out->print("[%d, %d[ ", _from, _to);
duke@435: }
duke@435: #endif
duke@435: 
duke@435: 
duke@435: 
duke@435: // **** Implementation of Interval **********************************
duke@435: 
duke@435: // initialize sentinel
duke@435: Interval* Interval::_end = NULL;
iveresov@1939: void Interval::initialize(Arena* arena) {
iveresov@1939:   Range::initialize(arena);
iveresov@1939:   _end = new (arena) Interval(-1);
duke@435: }
duke@435: 
duke@435: Interval::Interval(int reg_num) :
duke@435:   _reg_num(reg_num),
duke@435:   _type(T_ILLEGAL),
duke@435:   _first(Range::end()),
duke@435:   _use_pos_and_kinds(12),
duke@435:   _current(Range::end()),
duke@435:   _next(_end),
duke@435:   _state(invalidState),
duke@435:   _assigned_reg(LinearScan::any_reg),
duke@435:   _assigned_regHi(LinearScan::any_reg),
duke@435:   _cached_to(-1),
duke@435:   _cached_opr(LIR_OprFact::illegalOpr),
duke@435:   _cached_vm_reg(VMRegImpl::Bad()),
duke@435:   _split_children(0),
duke@435:   _canonical_spill_slot(-1),
duke@435:   _insert_move_when_activated(false),
duke@435:   _register_hint(NULL),
duke@435:   _spill_state(noDefinitionFound),
duke@435:   _spill_definition_pos(-1)
duke@435: {
duke@435:   _split_parent = this;
duke@435:   _current_split_child = this;
duke@435: }
duke@435: 
duke@435: int Interval::calc_to() {
duke@435:   assert(_first != Range::end(), "interval has no range");
duke@435: 
duke@435:   Range* r = _first;
duke@435:   while (r->next() != Range::end()) {
duke@435:     r = r->next();
duke@435:   }
duke@435:   return r->to();
duke@435: }
duke@435: 
duke@435: 
duke@435: #ifdef ASSERT
duke@435: // consistency check of split-children
duke@435: void Interval::check_split_children() {
duke@435:   if (_split_children.length() > 0) {
duke@435:     assert(is_split_parent(), "only split parents can have children");
duke@435: 
duke@435:     for (int i = 0; i < _split_children.length(); i++) {
duke@435:       Interval* i1 = _split_children.at(i);
duke@435: 
duke@435:       assert(i1->split_parent() == this, "not a split child of this interval");
duke@435:       assert(i1->type() == type(), "must be equal for all split children");
duke@435:       assert(i1->canonical_spill_slot() == canonical_spill_slot(), "must be equal for all split children");
duke@435: 
duke@435:       for (int j = i + 1; j < _split_children.length(); j++) {
duke@435:         Interval* i2 = _split_children.at(j);
duke@435: 
duke@435:         assert(i1->reg_num() != i2->reg_num(), "same register number");
duke@435: 
duke@435:         if (i1->from() < i2->from()) {
duke@435:           assert(i1->to() <= i2->from() && i1->to() < i2->to(), "intervals overlapping");
duke@435:         } else {
duke@435:           assert(i2->from() < i1->from(), "intervals start at same op_id");
duke@435:           assert(i2->to() <= i1->from() && i2->to() < i1->to(), "intervals overlapping");
duke@435:         }
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: }
duke@435: #endif // ASSERT
duke@435: 
duke@435: Interval* Interval::register_hint(bool search_split_child) const {
duke@435:   if (!search_split_child) {
duke@435:     return _register_hint;
duke@435:   }
duke@435: 
duke@435:   if (_register_hint != NULL) {
duke@435:     assert(_register_hint->is_split_parent(), "ony split parents are valid hint registers");
duke@435: 
duke@435:     if (_register_hint->assigned_reg() >= 0 && _register_hint->assigned_reg() < LinearScan::nof_regs) {
duke@435:       return _register_hint;
duke@435: 
duke@435:     } else if (_register_hint->_split_children.length() > 0) {
duke@435:       // search the first split child that has a register assigned
duke@435:       int len = _register_hint->_split_children.length();
duke@435:       for (int i = 0; i < len; i++) {
duke@435:         Interval* cur = _register_hint->_split_children.at(i);
duke@435: 
duke@435:         if (cur->assigned_reg() >= 0 && cur->assigned_reg() < LinearScan::nof_regs) {
duke@435:           return cur;
duke@435:         }
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   // no hint interval found that has a register assigned
duke@435:   return NULL;
duke@435: }
duke@435: 
duke@435: 
duke@435: Interval* Interval::split_child_at_op_id(int op_id, LIR_OpVisitState::OprMode mode) {
duke@435:   assert(is_split_parent(), "can only be called for split parents");
duke@435:   assert(op_id >= 0, "invalid op_id (method can not be called for spill moves)");
duke@435: 
duke@435:   Interval* result;
duke@435:   if (_split_children.length() == 0) {
duke@435:     result = this;
duke@435:   } else {
duke@435:     result = NULL;
duke@435:     int len = _split_children.length();
duke@435: 
duke@435:     // in outputMode, the end of the interval (op_id == cur->to()) is not valid
duke@435:     int to_offset = (mode == LIR_OpVisitState::outputMode ? 0 : 1);
duke@435: 
duke@435:     int i;
duke@435:     for (i = 0; i < len; i++) {
duke@435:       Interval* cur = _split_children.at(i);
duke@435:       if (cur->from() <= op_id && op_id < cur->to() + to_offset) {
duke@435:         if (i > 0) {
duke@435:           // exchange current split child to start of list (faster access for next call)
duke@435:           _split_children.at_put(i, _split_children.at(0));
duke@435:           _split_children.at_put(0, cur);
duke@435:         }
duke@435: 
duke@435:         // interval found
duke@435:         result = cur;
duke@435:         break;
duke@435:       }
duke@435:     }
duke@435: 
duke@435: #ifdef ASSERT
duke@435:     for (i = 0; i < len; i++) {
duke@435:       Interval* tmp = _split_children.at(i);
duke@435:       if (tmp != result && tmp->from() <= op_id && op_id < tmp->to() + to_offset) {
duke@435:         tty->print_cr("two valid result intervals found for op_id %d: %d and %d", op_id, result->reg_num(), tmp->reg_num());
duke@435:         result->print();
duke@435:         tmp->print();
duke@435:         assert(false, "two valid result intervals found");
duke@435:       }
duke@435:     }
duke@435: #endif
duke@435:   }
duke@435: 
duke@435:   assert(result != NULL, "no matching interval found");
duke@435:   assert(result->covers(op_id, mode), "op_id not covered by interval");
duke@435: 
duke@435:   return result;
duke@435: }
duke@435: 
duke@435: 
duke@435: // returns the last split child that ends before the given op_id
duke@435: Interval* Interval::split_child_before_op_id(int op_id) {
duke@435:   assert(op_id >= 0, "invalid op_id");
duke@435: 
duke@435:   Interval* parent = split_parent();
duke@435:   Interval* result = NULL;
duke@435: 
duke@435:   int len = parent->_split_children.length();
duke@435:   assert(len > 0, "no split children available");
duke@435: 
duke@435:   for (int i = len - 1; i >= 0; i--) {
duke@435:     Interval* cur = parent->_split_children.at(i);
duke@435:     if (cur->to() <= op_id && (result == NULL || result->to() < cur->to())) {
duke@435:       result = cur;
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   assert(result != NULL, "no split child found");
duke@435:   return result;
duke@435: }
duke@435: 
duke@435: 
duke@435: // checks if op_id is covered by any split child
duke@435: bool Interval::split_child_covers(int op_id, LIR_OpVisitState::OprMode mode) {
duke@435:   assert(is_split_parent(), "can only be called for split parents");
duke@435:   assert(op_id >= 0, "invalid op_id (method can not be called for spill moves)");
duke@435: 
duke@435:   if (_split_children.length() == 0) {
duke@435:     // simple case if interval was not split
duke@435:     return covers(op_id, mode);
duke@435: 
duke@435:   } else {
duke@435:     // extended case: check all split children
duke@435:     int len = _split_children.length();
duke@435:     for (int i = 0; i < len; i++) {
duke@435:       Interval* cur = _split_children.at(i);
duke@435:       if (cur->covers(op_id, mode)) {
duke@435:         return true;
duke@435:       }
duke@435:     }
duke@435:     return false;
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: // Note: use positions are sorted descending -> first use has highest index
duke@435: int Interval::first_usage(IntervalUseKind min_use_kind) const {
duke@435:   assert(LinearScan::is_virtual_interval(this), "cannot access use positions for fixed intervals");
duke@435: 
duke@435:   for (int i = _use_pos_and_kinds.length() - 2; i >= 0; i -= 2) {
duke@435:     if (_use_pos_and_kinds.at(i + 1) >= min_use_kind) {
duke@435:       return _use_pos_and_kinds.at(i);
duke@435:     }
duke@435:   }
duke@435:   return max_jint;
duke@435: }
duke@435: 
duke@435: int Interval::next_usage(IntervalUseKind min_use_kind, int from) const {
duke@435:   assert(LinearScan::is_virtual_interval(this), "cannot access use positions for fixed intervals");
duke@435: 
duke@435:   for (int i = _use_pos_and_kinds.length() - 2; i >= 0; i -= 2) {
duke@435:     if (_use_pos_and_kinds.at(i) >= from && _use_pos_and_kinds.at(i + 1) >= min_use_kind) {
duke@435:       return _use_pos_and_kinds.at(i);
duke@435:     }
duke@435:   }
duke@435:   return max_jint;
duke@435: }
duke@435: 
duke@435: int Interval::next_usage_exact(IntervalUseKind exact_use_kind, int from) const {
duke@435:   assert(LinearScan::is_virtual_interval(this), "cannot access use positions for fixed intervals");
duke@435: 
duke@435:   for (int i = _use_pos_and_kinds.length() - 2; i >= 0; i -= 2) {
duke@435:     if (_use_pos_and_kinds.at(i) >= from && _use_pos_and_kinds.at(i + 1) == exact_use_kind) {
duke@435:       return _use_pos_and_kinds.at(i);
duke@435:     }
duke@435:   }
duke@435:   return max_jint;
duke@435: }
duke@435: 
duke@435: int Interval::previous_usage(IntervalUseKind min_use_kind, int from) const {
duke@435:   assert(LinearScan::is_virtual_interval(this), "cannot access use positions for fixed intervals");
duke@435: 
duke@435:   int prev = 0;
duke@435:   for (int i = _use_pos_and_kinds.length() - 2; i >= 0; i -= 2) {
duke@435:     if (_use_pos_and_kinds.at(i) > from) {
duke@435:       return prev;
duke@435:     }
duke@435:     if (_use_pos_and_kinds.at(i + 1) >= min_use_kind) {
duke@435:       prev = _use_pos_and_kinds.at(i);
duke@435:     }
duke@435:   }
duke@435:   return prev;
duke@435: }
duke@435: 
duke@435: void Interval::add_use_pos(int pos, IntervalUseKind use_kind) {
duke@435:   assert(covers(pos, LIR_OpVisitState::inputMode), "use position not covered by live range");
duke@435: 
duke@435:   // do not add use positions for precolored intervals because
duke@435:   // they are never used
duke@435:   if (use_kind != noUse && reg_num() >= LIR_OprDesc::vreg_base) {
duke@435: #ifdef ASSERT
duke@435:     assert(_use_pos_and_kinds.length() % 2 == 0, "must be");
duke@435:     for (int i = 0; i < _use_pos_and_kinds.length(); i += 2) {
duke@435:       assert(pos <= _use_pos_and_kinds.at(i), "already added a use-position with lower position");
duke@435:       assert(_use_pos_and_kinds.at(i + 1) >= firstValidKind && _use_pos_and_kinds.at(i + 1) <= lastValidKind, "invalid use kind");
duke@435:       if (i > 0) {
duke@435:         assert(_use_pos_and_kinds.at(i) < _use_pos_and_kinds.at(i - 2), "not sorted descending");
duke@435:       }
duke@435:     }
duke@435: #endif
duke@435: 
duke@435:     // Note: add_use is called in descending order, so list gets sorted
duke@435:     //       automatically by just appending new use positions
duke@435:     int len = _use_pos_and_kinds.length();
duke@435:     if (len == 0 || _use_pos_and_kinds.at(len - 2) > pos) {
duke@435:       _use_pos_and_kinds.append(pos);
duke@435:       _use_pos_and_kinds.append(use_kind);
duke@435:     } else if (_use_pos_and_kinds.at(len - 1) < use_kind) {
duke@435:       assert(_use_pos_and_kinds.at(len - 2) == pos, "list not sorted correctly");
duke@435:       _use_pos_and_kinds.at_put(len - 1, use_kind);
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Interval::add_range(int from, int to) {
duke@435:   assert(from < to, "invalid range");
duke@435:   assert(first() == Range::end() || to < first()->next()->from(), "not inserting at begin of interval");
duke@435:   assert(from <= first()->to(), "not inserting at begin of interval");
duke@435: 
duke@435:   if (first()->from() <= to) {
duke@435:     // join intersecting ranges
duke@435:     first()->set_from(MIN2(from, first()->from()));
duke@435:     first()->set_to  (MAX2(to,   first()->to()));
duke@435:   } else {
duke@435:     // insert new range
duke@435:     _first = new Range(from, to, first());
duke@435:   }
duke@435: }
duke@435: 
duke@435: Interval* Interval::new_split_child() {
duke@435:   // allocate new interval
duke@435:   Interval* result = new Interval(-1);
duke@435:   result->set_type(type());
duke@435: 
duke@435:   Interval* parent = split_parent();
duke@435:   result->_split_parent = parent;
duke@435:   result->set_register_hint(parent);
duke@435: 
duke@435:   // insert new interval in children-list of parent
duke@435:   if (parent->_split_children.length() == 0) {
duke@435:     assert(is_split_parent(), "list must be initialized at first split");
duke@435: 
duke@435:     parent->_split_children = IntervalList(4);
duke@435:     parent->_split_children.append(this);
duke@435:   }
duke@435:   parent->_split_children.append(result);
duke@435: 
duke@435:   return result;
duke@435: }
duke@435: 
duke@435: // split this interval at the specified position and return
duke@435: // the remainder as a new interval.
duke@435: //
duke@435: // when an interval is split, a bi-directional link is established between the original interval
duke@435: // (the split parent) and the intervals that are split off this interval (the split children)
duke@435: // When a split child is split again, the new created interval is also a direct child
duke@435: // of the original parent (there is no tree of split children stored, but a flat list)
duke@435: // All split children are spilled to the same stack slot (stored in _canonical_spill_slot)
duke@435: //
duke@435: // Note: The new interval has no valid reg_num
duke@435: Interval* Interval::split(int split_pos) {
duke@435:   assert(LinearScan::is_virtual_interval(this), "cannot split fixed intervals");
duke@435: 
duke@435:   // allocate new interval
duke@435:   Interval* result = new_split_child();
duke@435: 
duke@435:   // split the ranges
duke@435:   Range* prev = NULL;
duke@435:   Range* cur = _first;
duke@435:   while (cur != Range::end() && cur->to() <= split_pos) {
duke@435:     prev = cur;
duke@435:     cur = cur->next();
duke@435:   }
duke@435:   assert(cur != Range::end(), "split interval after end of last range");
duke@435: 
duke@435:   if (cur->from() < split_pos) {
duke@435:     result->_first = new Range(split_pos, cur->to(), cur->next());
duke@435:     cur->set_to(split_pos);
duke@435:     cur->set_next(Range::end());
duke@435: 
duke@435:   } else {
duke@435:     assert(prev != NULL, "split before start of first range");
duke@435:     result->_first = cur;
duke@435:     prev->set_next(Range::end());
duke@435:   }
duke@435:   result->_current = result->_first;
duke@435:   _cached_to = -1; // clear cached value
duke@435: 
duke@435:   // split list of use positions
duke@435:   int total_len = _use_pos_and_kinds.length();
duke@435:   int start_idx = total_len - 2;
duke@435:   while (start_idx >= 0 && _use_pos_and_kinds.at(start_idx) < split_pos) {
duke@435:     start_idx -= 2;
duke@435:   }
duke@435: 
duke@435:   intStack new_use_pos_and_kinds(total_len - start_idx);
duke@435:   int i;
duke@435:   for (i = start_idx + 2; i < total_len; i++) {
duke@435:     new_use_pos_and_kinds.append(_use_pos_and_kinds.at(i));
duke@435:   }
duke@435: 
duke@435:   _use_pos_and_kinds.truncate(start_idx + 2);
duke@435:   result->_use_pos_and_kinds = _use_pos_and_kinds;
duke@435:   _use_pos_and_kinds = new_use_pos_and_kinds;
duke@435: 
duke@435: #ifdef ASSERT
duke@435:   assert(_use_pos_and_kinds.length() % 2 == 0, "must have use kind for each use pos");
duke@435:   assert(result->_use_pos_and_kinds.length() % 2 == 0, "must have use kind for each use pos");
duke@435:   assert(_use_pos_and_kinds.length() + result->_use_pos_and_kinds.length() == total_len, "missed some entries");
duke@435: 
duke@435:   for (i = 0; i < _use_pos_and_kinds.length(); i += 2) {
duke@435:     assert(_use_pos_and_kinds.at(i) < split_pos, "must be");
duke@435:     assert(_use_pos_and_kinds.at(i + 1) >= firstValidKind && _use_pos_and_kinds.at(i + 1) <= lastValidKind, "invalid use kind");
duke@435:   }
duke@435:   for (i = 0; i < result->_use_pos_and_kinds.length(); i += 2) {
duke@435:     assert(result->_use_pos_and_kinds.at(i) >= split_pos, "must be");
duke@435:     assert(result->_use_pos_and_kinds.at(i + 1) >= firstValidKind && result->_use_pos_and_kinds.at(i + 1) <= lastValidKind, "invalid use kind");
duke@435:   }
duke@435: #endif
duke@435: 
duke@435:   return result;
duke@435: }
duke@435: 
duke@435: // split this interval at the specified position and return
duke@435: // the head as a new interval (the original interval is the tail)
duke@435: //
duke@435: // Currently, only the first range can be split, and the new interval
duke@435: // must not have split positions
duke@435: Interval* Interval::split_from_start(int split_pos) {
duke@435:   assert(LinearScan::is_virtual_interval(this), "cannot split fixed intervals");
duke@435:   assert(split_pos > from() && split_pos < to(), "can only split inside interval");
duke@435:   assert(split_pos > _first->from() && split_pos <= _first->to(), "can only split inside first range");
duke@435:   assert(first_usage(noUse) > split_pos, "can not split when use positions are present");
duke@435: 
duke@435:   // allocate new interval
duke@435:   Interval* result = new_split_child();
duke@435: 
duke@435:   // the new created interval has only one range (checked by assertion above),
duke@435:   // so the splitting of the ranges is very simple
duke@435:   result->add_range(_first->from(), split_pos);
duke@435: 
duke@435:   if (split_pos == _first->to()) {
duke@435:     assert(_first->next() != Range::end(), "must not be at end");
duke@435:     _first = _first->next();
duke@435:   } else {
duke@435:     _first->set_from(split_pos);
duke@435:   }
duke@435: 
duke@435:   return result;
duke@435: }
duke@435: 
duke@435: 
duke@435: // returns true if the op_id is inside the interval
duke@435: bool Interval::covers(int op_id, LIR_OpVisitState::OprMode mode) const {
duke@435:   Range* cur  = _first;
duke@435: 
duke@435:   while (cur != Range::end() && cur->to() < op_id) {
duke@435:     cur = cur->next();
duke@435:   }
duke@435:   if (cur != Range::end()) {
duke@435:     assert(cur->to() != cur->next()->from(), "ranges not separated");
duke@435: 
duke@435:     if (mode == LIR_OpVisitState::outputMode) {
duke@435:       return cur->from() <= op_id && op_id < cur->to();
duke@435:     } else {
duke@435:       return cur->from() <= op_id && op_id <= cur->to();
duke@435:     }
duke@435:   }
duke@435:   return false;
duke@435: }
duke@435: 
duke@435: // returns true if the interval has any hole between hole_from and hole_to
duke@435: // (even if the hole has only the length 1)
duke@435: bool Interval::has_hole_between(int hole_from, int hole_to) {
duke@435:   assert(hole_from < hole_to, "check");
duke@435:   assert(from() <= hole_from && hole_to <= to(), "index out of interval");
duke@435: 
duke@435:   Range* cur  = _first;
duke@435:   while (cur != Range::end()) {
duke@435:     assert(cur->to() < cur->next()->from(), "no space between ranges");
duke@435: 
duke@435:     // hole-range starts before this range -> hole
duke@435:     if (hole_from < cur->from()) {
duke@435:       return true;
duke@435: 
duke@435:     // hole-range completely inside this range -> no hole
duke@435:     } else if (hole_to <= cur->to()) {
duke@435:       return false;
duke@435: 
duke@435:     // overlapping of hole-range with this range -> hole
duke@435:     } else if (hole_from <= cur->to()) {
duke@435:       return true;
duke@435:     }
duke@435: 
duke@435:     cur = cur->next();
duke@435:   }
duke@435: 
duke@435:   return false;
duke@435: }
duke@435: 
duke@435: 
duke@435: #ifndef PRODUCT
duke@435: void Interval::print(outputStream* out) const {
duke@435:   const char* SpillState2Name[] = { "no definition", "no spill store", "one spill store", "store at definition", "start in memory", "no optimization" };
duke@435:   const char* UseKind2Name[] = { "N", "L", "S", "M" };
duke@435: 
duke@435:   const char* type_name;
duke@435:   LIR_Opr opr = LIR_OprFact::illegal();
duke@435:   if (reg_num() < LIR_OprDesc::vreg_base) {
duke@435:     type_name = "fixed";
duke@435:     // need a temporary operand for fixed intervals because type() cannot be called
duke@435:     if (assigned_reg() >= pd_first_cpu_reg && assigned_reg() <= pd_last_cpu_reg) {
duke@435:       opr = LIR_OprFact::single_cpu(assigned_reg());
duke@435:     } else if (assigned_reg() >= pd_first_fpu_reg && assigned_reg() <= pd_last_fpu_reg) {
duke@435:       opr = LIR_OprFact::single_fpu(assigned_reg() - pd_first_fpu_reg);
never@739: #ifdef X86
duke@435:     } else if (assigned_reg() >= pd_first_xmm_reg && assigned_reg() <= pd_last_xmm_reg) {
duke@435:       opr = LIR_OprFact::single_xmm(assigned_reg() - pd_first_xmm_reg);
duke@435: #endif
duke@435:     } else {
duke@435:       ShouldNotReachHere();
duke@435:     }
duke@435:   } else {
duke@435:     type_name = type2name(type());
never@2404:     if (assigned_reg() != -1 &&
never@2404:         (LinearScan::num_physical_regs(type()) == 1 || assigned_regHi() != -1)) {
duke@435:       opr = LinearScan::calc_operand_for_interval(this);
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   out->print("%d %s ", reg_num(), type_name);
duke@435:   if (opr->is_valid()) {
duke@435:     out->print("\"");
duke@435:     opr->print(out);
duke@435:     out->print("\" ");
duke@435:   }
duke@435:   out->print("%d %d ", split_parent()->reg_num(), (register_hint(false) != NULL ? register_hint(false)->reg_num() : -1));
duke@435: 
duke@435:   // print ranges
duke@435:   Range* cur = _first;
duke@435:   while (cur != Range::end()) {
duke@435:     cur->print(out);
duke@435:     cur = cur->next();
duke@435:     assert(cur != NULL, "range list not closed with range sentinel");
duke@435:   }
duke@435: 
duke@435:   // print use positions
duke@435:   int prev = 0;
duke@435:   assert(_use_pos_and_kinds.length() % 2 == 0, "must be");
duke@435:   for (int i =_use_pos_and_kinds.length() - 2; i >= 0; i -= 2) {
duke@435:     assert(_use_pos_and_kinds.at(i + 1) >= firstValidKind && _use_pos_and_kinds.at(i + 1) <= lastValidKind, "invalid use kind");
duke@435:     assert(prev < _use_pos_and_kinds.at(i), "use positions not sorted");
duke@435: 
duke@435:     out->print("%d %s ", _use_pos_and_kinds.at(i), UseKind2Name[_use_pos_and_kinds.at(i + 1)]);
duke@435:     prev = _use_pos_and_kinds.at(i);
duke@435:   }
duke@435: 
duke@435:   out->print(" \"%s\"", SpillState2Name[spill_state()]);
duke@435:   out->cr();
duke@435: }
duke@435: #endif
duke@435: 
duke@435: 
duke@435: 
duke@435: // **** Implementation of IntervalWalker ****************************
duke@435: 
duke@435: IntervalWalker::IntervalWalker(LinearScan* allocator, Interval* unhandled_fixed_first, Interval* unhandled_any_first)
duke@435:  : _compilation(allocator->compilation())
duke@435:  , _allocator(allocator)
duke@435: {
duke@435:   _unhandled_first[fixedKind] = unhandled_fixed_first;
duke@435:   _unhandled_first[anyKind]   = unhandled_any_first;
duke@435:   _active_first[fixedKind]    = Interval::end();
duke@435:   _inactive_first[fixedKind]  = Interval::end();
duke@435:   _active_first[anyKind]      = Interval::end();
duke@435:   _inactive_first[anyKind]    = Interval::end();
duke@435:   _current_position = -1;
duke@435:   _current = NULL;
duke@435:   next_interval();
duke@435: }
duke@435: 
duke@435: 
duke@435: // append interval at top of list
duke@435: void IntervalWalker::append_unsorted(Interval** list, Interval* interval) {
duke@435:   interval->set_next(*list); *list = interval;
duke@435: }
duke@435: 
duke@435: 
duke@435: // append interval in order of current range from()
duke@435: void IntervalWalker::append_sorted(Interval** list, Interval* interval) {
duke@435:   Interval* prev = NULL;
duke@435:   Interval* cur  = *list;
duke@435:   while (cur->current_from() < interval->current_from()) {
duke@435:     prev = cur; cur = cur->next();
duke@435:   }
duke@435:   if (prev == NULL) {
duke@435:     *list = interval;
duke@435:   } else {
duke@435:     prev->set_next(interval);
duke@435:   }
duke@435:   interval->set_next(cur);
duke@435: }
duke@435: 
duke@435: void IntervalWalker::append_to_unhandled(Interval** list, Interval* interval) {
duke@435:   assert(interval->from() >= current()->current_from(), "cannot append new interval before current walk position");
duke@435: 
duke@435:   Interval* prev = NULL;
duke@435:   Interval* cur  = *list;
duke@435:   while (cur->from() < interval->from() || (cur->from() == interval->from() && cur->first_usage(noUse) < interval->first_usage(noUse))) {
duke@435:     prev = cur; cur = cur->next();
duke@435:   }
duke@435:   if (prev == NULL) {
duke@435:     *list = interval;
duke@435:   } else {
duke@435:     prev->set_next(interval);
duke@435:   }
duke@435:   interval->set_next(cur);
duke@435: }
duke@435: 
duke@435: 
duke@435: inline bool IntervalWalker::remove_from_list(Interval** list, Interval* i) {
duke@435:   while (*list != Interval::end() && *list != i) {
duke@435:     list = (*list)->next_addr();
duke@435:   }
duke@435:   if (*list != Interval::end()) {
duke@435:     assert(*list == i, "check");
duke@435:     *list = (*list)->next();
duke@435:     return true;
duke@435:   } else {
duke@435:     return false;
duke@435:   }
duke@435: }
duke@435: 
duke@435: void IntervalWalker::remove_from_list(Interval* i) {
duke@435:   bool deleted;
duke@435: 
duke@435:   if (i->state() == activeState) {
duke@435:     deleted = remove_from_list(active_first_addr(anyKind), i);
duke@435:   } else {
duke@435:     assert(i->state() == inactiveState, "invalid state");
duke@435:     deleted = remove_from_list(inactive_first_addr(anyKind), i);
duke@435:   }
duke@435: 
duke@435:   assert(deleted, "interval has not been found in list");
duke@435: }
duke@435: 
duke@435: 
duke@435: void IntervalWalker::walk_to(IntervalState state, int from) {
duke@435:   assert (state == activeState || state == inactiveState, "wrong state");
duke@435:   for_each_interval_kind(kind) {
duke@435:     Interval** prev = state == activeState ? active_first_addr(kind) : inactive_first_addr(kind);
duke@435:     Interval* next   = *prev;
duke@435:     while (next->current_from() <= from) {
duke@435:       Interval* cur = next;
duke@435:       next = cur->next();
duke@435: 
duke@435:       bool range_has_changed = false;
duke@435:       while (cur->current_to() <= from) {
duke@435:         cur->next_range();
duke@435:         range_has_changed = true;
duke@435:       }
duke@435: 
duke@435:       // also handle move from inactive list to active list
duke@435:       range_has_changed = range_has_changed || (state == inactiveState && cur->current_from() <= from);
duke@435: 
duke@435:       if (range_has_changed) {
duke@435:         // remove cur from list
duke@435:         *prev = next;
duke@435:         if (cur->current_at_end()) {
duke@435:           // move to handled state (not maintained as a list)
duke@435:           cur->set_state(handledState);
duke@435:           interval_moved(cur, kind, state, handledState);
duke@435:         } else if (cur->current_from() <= from){
duke@435:           // sort into active list
duke@435:           append_sorted(active_first_addr(kind), cur);
duke@435:           cur->set_state(activeState);
duke@435:           if (*prev == cur) {
duke@435:             assert(state == activeState, "check");
duke@435:             prev = cur->next_addr();
duke@435:           }
duke@435:           interval_moved(cur, kind, state, activeState);
duke@435:         } else {
duke@435:           // sort into inactive list
duke@435:           append_sorted(inactive_first_addr(kind), cur);
duke@435:           cur->set_state(inactiveState);
duke@435:           if (*prev == cur) {
duke@435:             assert(state == inactiveState, "check");
duke@435:             prev = cur->next_addr();
duke@435:           }
duke@435:           interval_moved(cur, kind, state, inactiveState);
duke@435:         }
duke@435:       } else {
duke@435:         prev = cur->next_addr();
duke@435:         continue;
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void IntervalWalker::next_interval() {
duke@435:   IntervalKind kind;
duke@435:   Interval* any   = _unhandled_first[anyKind];
duke@435:   Interval* fixed = _unhandled_first[fixedKind];
duke@435: 
duke@435:   if (any != Interval::end()) {
duke@435:     // intervals may start at same position -> prefer fixed interval
duke@435:     kind = fixed != Interval::end() && fixed->from() <= any->from() ? fixedKind : anyKind;
duke@435: 
duke@435:     assert (kind == fixedKind && fixed->from() <= any->from() ||
duke@435:             kind == anyKind   && any->from() <= fixed->from(), "wrong interval!!!");
duke@435:     assert(any == Interval::end() || fixed == Interval::end() || any->from() != fixed->from() || kind == fixedKind, "if fixed and any-Interval start at same position, fixed must be processed first");
duke@435: 
duke@435:   } else if (fixed != Interval::end()) {
duke@435:     kind = fixedKind;
duke@435:   } else {
duke@435:     _current = NULL; return;
duke@435:   }
duke@435:   _current_kind = kind;
duke@435:   _current = _unhandled_first[kind];
duke@435:   _unhandled_first[kind] = _current->next();
duke@435:   _current->set_next(Interval::end());
duke@435:   _current->rewind_range();
duke@435: }
duke@435: 
duke@435: 
duke@435: void IntervalWalker::walk_to(int lir_op_id) {
duke@435:   assert(_current_position <= lir_op_id, "can not walk backwards");
duke@435:   while (current() != NULL) {
duke@435:     bool is_active = current()->from() <= lir_op_id;
duke@435:     int id = is_active ? current()->from() : lir_op_id;
duke@435: 
duke@435:     TRACE_LINEAR_SCAN(2, if (_current_position < id) { tty->cr(); tty->print_cr("walk_to(%d) **************************************************************", id); })
duke@435: 
duke@435:     // set _current_position prior to call of walk_to
duke@435:     _current_position = id;
duke@435: 
duke@435:     // call walk_to even if _current_position == id
duke@435:     walk_to(activeState, id);
duke@435:     walk_to(inactiveState, id);
duke@435: 
duke@435:     if (is_active) {
duke@435:       current()->set_state(activeState);
duke@435:       if (activate_current()) {
duke@435:         append_sorted(active_first_addr(current_kind()), current());
duke@435:         interval_moved(current(), current_kind(), unhandledState, activeState);
duke@435:       }
duke@435: 
duke@435:       next_interval();
duke@435:     } else {
duke@435:       return;
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: void IntervalWalker::interval_moved(Interval* interval, IntervalKind kind, IntervalState from, IntervalState to) {
duke@435: #ifndef PRODUCT
duke@435:   if (TraceLinearScanLevel >= 4) {
duke@435:     #define print_state(state) \
duke@435:     switch(state) {\
duke@435:       case unhandledState: tty->print("unhandled"); break;\
duke@435:       case activeState: tty->print("active"); break;\
duke@435:       case inactiveState: tty->print("inactive"); break;\
duke@435:       case handledState: tty->print("handled"); break;\
duke@435:       default: ShouldNotReachHere(); \
duke@435:     }
duke@435: 
duke@435:     print_state(from); tty->print(" to "); print_state(to);
duke@435:     tty->fill_to(23);
duke@435:     interval->print();
duke@435: 
duke@435:     #undef print_state
duke@435:   }
duke@435: #endif
duke@435: }
duke@435: 
duke@435: 
duke@435: 
duke@435: // **** Implementation of LinearScanWalker **************************
duke@435: 
duke@435: LinearScanWalker::LinearScanWalker(LinearScan* allocator, Interval* unhandled_fixed_first, Interval* unhandled_any_first)
duke@435:   : IntervalWalker(allocator, unhandled_fixed_first, unhandled_any_first)
duke@435:   , _move_resolver(allocator)
duke@435: {
duke@435:   for (int i = 0; i < LinearScan::nof_regs; i++) {
duke@435:     _spill_intervals[i] = new IntervalList(2);
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: inline void LinearScanWalker::init_use_lists(bool only_process_use_pos) {
duke@435:   for (int i = _first_reg; i <= _last_reg; i++) {
duke@435:     _use_pos[i] = max_jint;
duke@435: 
duke@435:     if (!only_process_use_pos) {
duke@435:       _block_pos[i] = max_jint;
duke@435:       _spill_intervals[i]->clear();
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: inline void LinearScanWalker::exclude_from_use(int reg) {
duke@435:   assert(reg < LinearScan::nof_regs, "interval must have a register assigned (stack slots not allowed)");
duke@435:   if (reg >= _first_reg && reg <= _last_reg) {
duke@435:     _use_pos[reg] = 0;
duke@435:   }
duke@435: }
duke@435: inline void LinearScanWalker::exclude_from_use(Interval* i) {
duke@435:   assert(i->assigned_reg() != any_reg, "interval has no register assigned");
duke@435: 
duke@435:   exclude_from_use(i->assigned_reg());
duke@435:   exclude_from_use(i->assigned_regHi());
duke@435: }
duke@435: 
duke@435: inline void LinearScanWalker::set_use_pos(int reg, Interval* i, int use_pos, bool only_process_use_pos) {
duke@435:   assert(use_pos != 0, "must use exclude_from_use to set use_pos to 0");
duke@435: 
duke@435:   if (reg >= _first_reg && reg <= _last_reg) {
duke@435:     if (_use_pos[reg] > use_pos) {
duke@435:       _use_pos[reg] = use_pos;
duke@435:     }
duke@435:     if (!only_process_use_pos) {
duke@435:       _spill_intervals[reg]->append(i);
duke@435:     }
duke@435:   }
duke@435: }
duke@435: inline void LinearScanWalker::set_use_pos(Interval* i, int use_pos, bool only_process_use_pos) {
duke@435:   assert(i->assigned_reg() != any_reg, "interval has no register assigned");
duke@435:   if (use_pos != -1) {
duke@435:     set_use_pos(i->assigned_reg(), i, use_pos, only_process_use_pos);
duke@435:     set_use_pos(i->assigned_regHi(), i, use_pos, only_process_use_pos);
duke@435:   }
duke@435: }
duke@435: 
duke@435: inline void LinearScanWalker::set_block_pos(int reg, Interval* i, int block_pos) {
duke@435:   if (reg >= _first_reg && reg <= _last_reg) {
duke@435:     if (_block_pos[reg] > block_pos) {
duke@435:       _block_pos[reg] = block_pos;
duke@435:     }
duke@435:     if (_use_pos[reg] > block_pos) {
duke@435:       _use_pos[reg] = block_pos;
duke@435:     }
duke@435:   }
duke@435: }
duke@435: inline void LinearScanWalker::set_block_pos(Interval* i, int block_pos) {
duke@435:   assert(i->assigned_reg() != any_reg, "interval has no register assigned");
duke@435:   if (block_pos != -1) {
duke@435:     set_block_pos(i->assigned_reg(), i, block_pos);
duke@435:     set_block_pos(i->assigned_regHi(), i, block_pos);
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScanWalker::free_exclude_active_fixed() {
duke@435:   Interval* list = active_first(fixedKind);
duke@435:   while (list != Interval::end()) {
duke@435:     assert(list->assigned_reg() < LinearScan::nof_regs, "active interval must have a register assigned");
duke@435:     exclude_from_use(list);
duke@435:     list = list->next();
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScanWalker::free_exclude_active_any() {
duke@435:   Interval* list = active_first(anyKind);
duke@435:   while (list != Interval::end()) {
duke@435:     exclude_from_use(list);
duke@435:     list = list->next();
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScanWalker::free_collect_inactive_fixed(Interval* cur) {
duke@435:   Interval* list = inactive_first(fixedKind);
duke@435:   while (list != Interval::end()) {
duke@435:     if (cur->to() <= list->current_from()) {
duke@435:       assert(list->current_intersects_at(cur) == -1, "must not intersect");
duke@435:       set_use_pos(list, list->current_from(), true);
duke@435:     } else {
duke@435:       set_use_pos(list, list->current_intersects_at(cur), true);
duke@435:     }
duke@435:     list = list->next();
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScanWalker::free_collect_inactive_any(Interval* cur) {
duke@435:   Interval* list = inactive_first(anyKind);
duke@435:   while (list != Interval::end()) {
duke@435:     set_use_pos(list, list->current_intersects_at(cur), true);
duke@435:     list = list->next();
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScanWalker::free_collect_unhandled(IntervalKind kind, Interval* cur) {
duke@435:   Interval* list = unhandled_first(kind);
duke@435:   while (list != Interval::end()) {
duke@435:     set_use_pos(list, list->intersects_at(cur), true);
duke@435:     if (kind == fixedKind && cur->to() <= list->from()) {
duke@435:       set_use_pos(list, list->from(), true);
duke@435:     }
duke@435:     list = list->next();
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScanWalker::spill_exclude_active_fixed() {
duke@435:   Interval* list = active_first(fixedKind);
duke@435:   while (list != Interval::end()) {
duke@435:     exclude_from_use(list);
duke@435:     list = list->next();
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScanWalker::spill_block_unhandled_fixed(Interval* cur) {
duke@435:   Interval* list = unhandled_first(fixedKind);
duke@435:   while (list != Interval::end()) {
duke@435:     set_block_pos(list, list->intersects_at(cur));
duke@435:     list = list->next();
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScanWalker::spill_block_inactive_fixed(Interval* cur) {
duke@435:   Interval* list = inactive_first(fixedKind);
duke@435:   while (list != Interval::end()) {
duke@435:     if (cur->to() > list->current_from()) {
duke@435:       set_block_pos(list, list->current_intersects_at(cur));
duke@435:     } else {
duke@435:       assert(list->current_intersects_at(cur) == -1, "invalid optimization: intervals intersect");
duke@435:     }
duke@435: 
duke@435:     list = list->next();
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScanWalker::spill_collect_active_any() {
duke@435:   Interval* list = active_first(anyKind);
duke@435:   while (list != Interval::end()) {
duke@435:     set_use_pos(list, MIN2(list->next_usage(loopEndMarker, _current_position), list->to()), false);
duke@435:     list = list->next();
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScanWalker::spill_collect_inactive_any(Interval* cur) {
duke@435:   Interval* list = inactive_first(anyKind);
duke@435:   while (list != Interval::end()) {
duke@435:     if (list->current_intersects(cur)) {
duke@435:       set_use_pos(list, MIN2(list->next_usage(loopEndMarker, _current_position), list->to()), false);
duke@435:     }
duke@435:     list = list->next();
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScanWalker::insert_move(int op_id, Interval* src_it, Interval* dst_it) {
duke@435:   // output all moves here. When source and target are equal, the move is
duke@435:   // optimized away later in assign_reg_nums
duke@435: 
duke@435:   op_id = (op_id + 1) & ~1;
duke@435:   BlockBegin* op_block = allocator()->block_of_op_with_id(op_id);
duke@435:   assert(op_id > 0 && allocator()->block_of_op_with_id(op_id - 2) == op_block, "cannot insert move at block boundary");
duke@435: 
duke@435:   // calculate index of instruction inside instruction list of current block
duke@435:   // the minimal index (for a block with no spill moves) can be calculated because the
duke@435:   // numbering of instructions is known.
duke@435:   // When the block already contains spill moves, the index must be increased until the
duke@435:   // correct index is reached.
duke@435:   LIR_OpList* list = op_block->lir()->instructions_list();
duke@435:   int index = (op_id - list->at(0)->id()) / 2;
duke@435:   assert(list->at(index)->id() <= op_id, "error in calculation");
duke@435: 
duke@435:   while (list->at(index)->id() != op_id) {
duke@435:     index++;
duke@435:     assert(0 <= index && index < list->length(), "index out of bounds");
duke@435:   }
duke@435:   assert(1 <= index && index < list->length(), "index out of bounds");
duke@435:   assert(list->at(index)->id() == op_id, "error in calculation");
duke@435: 
duke@435:   // insert new instruction before instruction at position index
duke@435:   _move_resolver.move_insert_position(op_block->lir(), index - 1);
duke@435:   _move_resolver.add_mapping(src_it, dst_it);
duke@435: }
duke@435: 
duke@435: 
duke@435: int LinearScanWalker::find_optimal_split_pos(BlockBegin* min_block, BlockBegin* max_block, int max_split_pos) {
duke@435:   int from_block_nr = min_block->linear_scan_number();
duke@435:   int to_block_nr = max_block->linear_scan_number();
duke@435: 
duke@435:   assert(0 <= from_block_nr && from_block_nr < block_count(), "out of range");
duke@435:   assert(0 <= to_block_nr && to_block_nr < block_count(), "out of range");
duke@435:   assert(from_block_nr < to_block_nr, "must cross block boundary");
duke@435: 
duke@435:   // Try to split at end of max_block. If this would be after
duke@435:   // max_split_pos, then use the begin of max_block
duke@435:   int optimal_split_pos = max_block->last_lir_instruction_id() + 2;
duke@435:   if (optimal_split_pos > max_split_pos) {
duke@435:     optimal_split_pos = max_block->first_lir_instruction_id();
duke@435:   }
duke@435: 
duke@435:   int min_loop_depth = max_block->loop_depth();
duke@435:   for (int i = to_block_nr - 1; i >= from_block_nr; i--) {
duke@435:     BlockBegin* cur = block_at(i);
duke@435: 
duke@435:     if (cur->loop_depth() < min_loop_depth) {
duke@435:       // block with lower loop-depth found -> split at the end of this block
duke@435:       min_loop_depth = cur->loop_depth();
duke@435:       optimal_split_pos = cur->last_lir_instruction_id() + 2;
duke@435:     }
duke@435:   }
duke@435:   assert(optimal_split_pos > allocator()->max_lir_op_id() || allocator()->is_block_begin(optimal_split_pos), "algorithm must move split pos to block boundary");
duke@435: 
duke@435:   return optimal_split_pos;
duke@435: }
duke@435: 
duke@435: 
duke@435: int LinearScanWalker::find_optimal_split_pos(Interval* it, int min_split_pos, int max_split_pos, bool do_loop_optimization) {
duke@435:   int optimal_split_pos = -1;
duke@435:   if (min_split_pos == max_split_pos) {
duke@435:     // trivial case, no optimization of split position possible
duke@435:     TRACE_LINEAR_SCAN(4, tty->print_cr("      min-pos and max-pos are equal, no optimization possible"));
duke@435:     optimal_split_pos = min_split_pos;
duke@435: 
duke@435:   } else {
duke@435:     assert(min_split_pos < max_split_pos, "must be true then");
duke@435:     assert(min_split_pos > 0, "cannot access min_split_pos - 1 otherwise");
duke@435: 
duke@435:     // reason for using min_split_pos - 1: when the minimal split pos is exactly at the
duke@435:     // beginning of a block, then min_split_pos is also a possible split position.
duke@435:     // Use the block before as min_block, because then min_block->last_lir_instruction_id() + 2 == min_split_pos
duke@435:     BlockBegin* min_block = allocator()->block_of_op_with_id(min_split_pos - 1);
duke@435: 
duke@435:     // reason for using max_split_pos - 1: otherwise there would be an assertion failure
duke@435:     // when an interval ends at the end of the last block of the method
duke@435:     // (in this case, max_split_pos == allocator()->max_lir_op_id() + 2, and there is no
duke@435:     // block at this op_id)
duke@435:     BlockBegin* max_block = allocator()->block_of_op_with_id(max_split_pos - 1);
duke@435: 
duke@435:     assert(min_block->linear_scan_number() <= max_block->linear_scan_number(), "invalid order");
duke@435:     if (min_block == max_block) {
duke@435:       // split position cannot be moved to block boundary, so split as late as possible
duke@435:       TRACE_LINEAR_SCAN(4, tty->print_cr("      cannot move split pos to block boundary because min_pos and max_pos are in same block"));
duke@435:       optimal_split_pos = max_split_pos;
duke@435: 
duke@435:     } else if (it->has_hole_between(max_split_pos - 1, max_split_pos) && !allocator()->is_block_begin(max_split_pos)) {
duke@435:       // Do not move split position if the interval has a hole before max_split_pos.
duke@435:       // Intervals resulting from Phi-Functions have more than one definition (marked
duke@435:       // as mustHaveRegister) with a hole before each definition. When the register is needed
duke@435:       // for the second definition, an earlier reloading is unnecessary.
duke@435:       TRACE_LINEAR_SCAN(4, tty->print_cr("      interval has hole just before max_split_pos, so splitting at max_split_pos"));
duke@435:       optimal_split_pos = max_split_pos;
duke@435: 
duke@435:     } else {
duke@435:       // seach optimal block boundary between min_split_pos and max_split_pos
duke@435:       TRACE_LINEAR_SCAN(4, tty->print_cr("      moving split pos to optimal block boundary between block B%d and B%d", min_block->block_id(), max_block->block_id()));
duke@435: 
duke@435:       if (do_loop_optimization) {
duke@435:         // Loop optimization: if a loop-end marker is found between min- and max-position,
duke@435:         // then split before this loop
duke@435:         int loop_end_pos = it->next_usage_exact(loopEndMarker, min_block->last_lir_instruction_id() + 2);
duke@435:         TRACE_LINEAR_SCAN(4, tty->print_cr("      loop optimization: loop end found at pos %d", loop_end_pos));
duke@435: 
duke@435:         assert(loop_end_pos > min_split_pos, "invalid order");
duke@435:         if (loop_end_pos < max_split_pos) {
duke@435:           // loop-end marker found between min- and max-position
duke@435:           // if it is not the end marker for the same loop as the min-position, then move
duke@435:           // the max-position to this loop block.
duke@435:           // Desired result: uses tagged as shouldHaveRegister inside a loop cause a reloading
duke@435:           // of the interval (normally, only mustHaveRegister causes a reloading)
duke@435:           BlockBegin* loop_block = allocator()->block_of_op_with_id(loop_end_pos);
duke@435: 
duke@435:           TRACE_LINEAR_SCAN(4, tty->print_cr("      interval is used in loop that ends in block B%d, so trying to move max_block back from B%d to B%d", loop_block->block_id(), max_block->block_id(), loop_block->block_id()));
duke@435:           assert(loop_block != min_block, "loop_block and min_block must be different because block boundary is needed between");
duke@435: 
duke@435:           optimal_split_pos = find_optimal_split_pos(min_block, loop_block, loop_block->last_lir_instruction_id() + 2);
duke@435:           if (optimal_split_pos == loop_block->last_lir_instruction_id() + 2) {
duke@435:             optimal_split_pos = -1;
duke@435:             TRACE_LINEAR_SCAN(4, tty->print_cr("      loop optimization not necessary"));
duke@435:           } else {
duke@435:             TRACE_LINEAR_SCAN(4, tty->print_cr("      loop optimization successful"));
duke@435:           }
duke@435:         }
duke@435:       }
duke@435: 
duke@435:       if (optimal_split_pos == -1) {
duke@435:         // not calculated by loop optimization
duke@435:         optimal_split_pos = find_optimal_split_pos(min_block, max_block, max_split_pos);
duke@435:       }
duke@435:     }
duke@435:   }
duke@435:   TRACE_LINEAR_SCAN(4, tty->print_cr("      optimal split position: %d", optimal_split_pos));
duke@435: 
duke@435:   return optimal_split_pos;
duke@435: }
duke@435: 
duke@435: 
duke@435: /*
duke@435:   split an interval at the optimal position between min_split_pos and
duke@435:   max_split_pos in two parts:
duke@435:   1) the left part has already a location assigned
duke@435:   2) the right part is sorted into to the unhandled-list
duke@435: */
duke@435: void LinearScanWalker::split_before_usage(Interval* it, int min_split_pos, int max_split_pos) {
duke@435:   TRACE_LINEAR_SCAN(2, tty->print   ("----- splitting interval: "); it->print());
duke@435:   TRACE_LINEAR_SCAN(2, tty->print_cr("      between %d and %d", min_split_pos, max_split_pos));
duke@435: 
duke@435:   assert(it->from() < min_split_pos,         "cannot split at start of interval");
duke@435:   assert(current_position() < min_split_pos, "cannot split before current position");
duke@435:   assert(min_split_pos <= max_split_pos,     "invalid order");
duke@435:   assert(max_split_pos <= it->to(),          "cannot split after end of interval");
duke@435: 
duke@435:   int optimal_split_pos = find_optimal_split_pos(it, min_split_pos, max_split_pos, true);
duke@435: 
duke@435:   assert(min_split_pos <= optimal_split_pos && optimal_split_pos <= max_split_pos, "out of range");
duke@435:   assert(optimal_split_pos <= it->to(),  "cannot split after end of interval");
duke@435:   assert(optimal_split_pos > it->from(), "cannot split at start of interval");
duke@435: 
duke@435:   if (optimal_split_pos == it->to() && it->next_usage(mustHaveRegister, min_split_pos) == max_jint) {
duke@435:     // the split position would be just before the end of the interval
duke@435:     // -> no split at all necessary
duke@435:     TRACE_LINEAR_SCAN(4, tty->print_cr("      no split necessary because optimal split position is at end of interval"));
duke@435:     return;
duke@435:   }
duke@435: 
duke@435:   // must calculate this before the actual split is performed and before split position is moved to odd op_id
duke@435:   bool move_necessary = !allocator()->is_block_begin(optimal_split_pos) && !it->has_hole_between(optimal_split_pos - 1, optimal_split_pos);
duke@435: 
duke@435:   if (!allocator()->is_block_begin(optimal_split_pos)) {
duke@435:     // move position before actual instruction (odd op_id)
duke@435:     optimal_split_pos = (optimal_split_pos - 1) | 1;
duke@435:   }
duke@435: 
duke@435:   TRACE_LINEAR_SCAN(4, tty->print_cr("      splitting at position %d", optimal_split_pos));
duke@435:   assert(allocator()->is_block_begin(optimal_split_pos) || (optimal_split_pos % 2 == 1), "split pos must be odd when not on block boundary");
duke@435:   assert(!allocator()->is_block_begin(optimal_split_pos) || (optimal_split_pos % 2 == 0), "split pos must be even on block boundary");
duke@435: 
duke@435:   Interval* split_part = it->split(optimal_split_pos);
duke@435: 
duke@435:   allocator()->append_interval(split_part);
duke@435:   allocator()->copy_register_flags(it, split_part);
duke@435:   split_part->set_insert_move_when_activated(move_necessary);
duke@435:   append_to_unhandled(unhandled_first_addr(anyKind), split_part);
duke@435: 
duke@435:   TRACE_LINEAR_SCAN(2, tty->print_cr("      split interval in two parts (insert_move_when_activated: %d)", move_necessary));
duke@435:   TRACE_LINEAR_SCAN(2, tty->print   ("      "); it->print());
duke@435:   TRACE_LINEAR_SCAN(2, tty->print   ("      "); split_part->print());
duke@435: }
duke@435: 
duke@435: /*
duke@435:   split an interval at the optimal position between min_split_pos and
duke@435:   max_split_pos in two parts:
duke@435:   1) the left part has already a location assigned
duke@435:   2) the right part is always on the stack and therefore ignored in further processing
duke@435: */
duke@435: void LinearScanWalker::split_for_spilling(Interval* it) {
duke@435:   // calculate allowed range of splitting position
duke@435:   int max_split_pos = current_position();
duke@435:   int min_split_pos = MAX2(it->previous_usage(shouldHaveRegister, max_split_pos) + 1, it->from());
duke@435: 
duke@435:   TRACE_LINEAR_SCAN(2, tty->print   ("----- splitting and spilling interval: "); it->print());
duke@435:   TRACE_LINEAR_SCAN(2, tty->print_cr("      between %d and %d", min_split_pos, max_split_pos));
duke@435: 
duke@435:   assert(it->state() == activeState,     "why spill interval that is not active?");
duke@435:   assert(it->from() <= min_split_pos,    "cannot split before start of interval");
duke@435:   assert(min_split_pos <= max_split_pos, "invalid order");
duke@435:   assert(max_split_pos < it->to(),       "cannot split at end end of interval");
duke@435:   assert(current_position() < it->to(),  "interval must not end before current position");
duke@435: 
duke@435:   if (min_split_pos == it->from()) {
duke@435:     // the whole interval is never used, so spill it entirely to memory
duke@435:     TRACE_LINEAR_SCAN(2, tty->print_cr("      spilling entire interval because split pos is at beginning of interval"));
duke@435:     assert(it->first_usage(shouldHaveRegister) > current_position(), "interval must not have use position before current_position");
duke@435: 
duke@435:     allocator()->assign_spill_slot(it);
duke@435:     allocator()->change_spill_state(it, min_split_pos);
duke@435: 
duke@435:     // Also kick parent intervals out of register to memory when they have no use
duke@435:     // position. This avoids short interval in register surrounded by intervals in
duke@435:     // memory -> avoid useless moves from memory to register and back
duke@435:     Interval* parent = it;
duke@435:     while (parent != NULL && parent->is_split_child()) {
duke@435:       parent = parent->split_child_before_op_id(parent->from());
duke@435: 
duke@435:       if (parent->assigned_reg() < LinearScan::nof_regs) {
duke@435:         if (parent->first_usage(shouldHaveRegister) == max_jint) {
duke@435:           // parent is never used, so kick it out of its assigned register
duke@435:           TRACE_LINEAR_SCAN(4, tty->print_cr("      kicking out interval %d out of its register because it is never used", parent->reg_num()));
duke@435:           allocator()->assign_spill_slot(parent);
duke@435:         } else {
duke@435:           // do not go further back because the register is actually used by the interval
duke@435:           parent = NULL;
duke@435:         }
duke@435:       }
duke@435:     }
duke@435: 
duke@435:   } else {
duke@435:     // search optimal split pos, split interval and spill only the right hand part
duke@435:     int optimal_split_pos = find_optimal_split_pos(it, min_split_pos, max_split_pos, false);
duke@435: 
duke@435:     assert(min_split_pos <= optimal_split_pos && optimal_split_pos <= max_split_pos, "out of range");
duke@435:     assert(optimal_split_pos < it->to(), "cannot split at end of interval");
duke@435:     assert(optimal_split_pos >= it->from(), "cannot split before start of interval");
duke@435: 
duke@435:     if (!allocator()->is_block_begin(optimal_split_pos)) {
duke@435:       // move position before actual instruction (odd op_id)
duke@435:       optimal_split_pos = (optimal_split_pos - 1) | 1;
duke@435:     }
duke@435: 
duke@435:     TRACE_LINEAR_SCAN(4, tty->print_cr("      splitting at position %d", optimal_split_pos));
duke@435:     assert(allocator()->is_block_begin(optimal_split_pos)  || (optimal_split_pos % 2 == 1), "split pos must be odd when not on block boundary");
duke@435:     assert(!allocator()->is_block_begin(optimal_split_pos) || (optimal_split_pos % 2 == 0), "split pos must be even on block boundary");
duke@435: 
duke@435:     Interval* spilled_part = it->split(optimal_split_pos);
duke@435:     allocator()->append_interval(spilled_part);
duke@435:     allocator()->assign_spill_slot(spilled_part);
duke@435:     allocator()->change_spill_state(spilled_part, optimal_split_pos);
duke@435: 
duke@435:     if (!allocator()->is_block_begin(optimal_split_pos)) {
duke@435:       TRACE_LINEAR_SCAN(4, tty->print_cr("      inserting move from interval %d to %d", it->reg_num(), spilled_part->reg_num()));
duke@435:       insert_move(optimal_split_pos, it, spilled_part);
duke@435:     }
duke@435: 
duke@435:     // the current_split_child is needed later when moves are inserted for reloading
duke@435:     assert(spilled_part->current_split_child() == it, "overwriting wrong current_split_child");
duke@435:     spilled_part->make_current_split_child();
duke@435: 
duke@435:     TRACE_LINEAR_SCAN(2, tty->print_cr("      split interval in two parts"));
duke@435:     TRACE_LINEAR_SCAN(2, tty->print   ("      "); it->print());
duke@435:     TRACE_LINEAR_SCAN(2, tty->print   ("      "); spilled_part->print());
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LinearScanWalker::split_stack_interval(Interval* it) {
duke@435:   int min_split_pos = current_position() + 1;
duke@435:   int max_split_pos = MIN2(it->first_usage(shouldHaveRegister), it->to());
duke@435: 
duke@435:   split_before_usage(it, min_split_pos, max_split_pos);
duke@435: }
duke@435: 
duke@435: void LinearScanWalker::split_when_partial_register_available(Interval* it, int register_available_until) {
duke@435:   int min_split_pos = MAX2(it->previous_usage(shouldHaveRegister, register_available_until), it->from() + 1);
duke@435:   int max_split_pos = register_available_until;
duke@435: 
duke@435:   split_before_usage(it, min_split_pos, max_split_pos);
duke@435: }
duke@435: 
duke@435: void LinearScanWalker::split_and_spill_interval(Interval* it) {
duke@435:   assert(it->state() == activeState || it->state() == inactiveState, "other states not allowed");
duke@435: 
duke@435:   int current_pos = current_position();
duke@435:   if (it->state() == inactiveState) {
duke@435:     // the interval is currently inactive, so no spill slot is needed for now.
duke@435:     // when the split part is activated, the interval has a new chance to get a register,
duke@435:     // so in the best case no stack slot is necessary
duke@435:     assert(it->has_hole_between(current_pos - 1, current_pos + 1), "interval can not be inactive otherwise");
duke@435:     split_before_usage(it, current_pos + 1, current_pos + 1);
duke@435: 
duke@435:   } else {
duke@435:     // search the position where the interval must have a register and split
duke@435:     // at the optimal position before.
duke@435:     // The new created part is added to the unhandled list and will get a register
duke@435:     // when it is activated
duke@435:     int min_split_pos = current_pos + 1;
duke@435:     int max_split_pos = MIN2(it->next_usage(mustHaveRegister, min_split_pos), it->to());
duke@435: 
duke@435:     split_before_usage(it, min_split_pos, max_split_pos);
duke@435: 
duke@435:     assert(it->next_usage(mustHaveRegister, current_pos) == max_jint, "the remaining part is spilled to stack and therefore has no register");
duke@435:     split_for_spilling(it);
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: int LinearScanWalker::find_free_reg(int reg_needed_until, int interval_to, int hint_reg, int ignore_reg, bool* need_split) {
duke@435:   int min_full_reg = any_reg;
duke@435:   int max_partial_reg = any_reg;
duke@435: 
duke@435:   for (int i = _first_reg; i <= _last_reg; i++) {
duke@435:     if (i == ignore_reg) {
duke@435:       // this register must be ignored
duke@435: 
duke@435:     } else if (_use_pos[i] >= interval_to) {
duke@435:       // this register is free for the full interval
duke@435:       if (min_full_reg == any_reg || i == hint_reg || (_use_pos[i] < _use_pos[min_full_reg] && min_full_reg != hint_reg)) {
duke@435:         min_full_reg = i;
duke@435:       }
duke@435:     } else if (_use_pos[i] > reg_needed_until) {
duke@435:       // this register is at least free until reg_needed_until
duke@435:       if (max_partial_reg == any_reg || i == hint_reg || (_use_pos[i] > _use_pos[max_partial_reg] && max_partial_reg != hint_reg)) {
duke@435:         max_partial_reg = i;
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   if (min_full_reg != any_reg) {
duke@435:     return min_full_reg;
duke@435:   } else if (max_partial_reg != any_reg) {
duke@435:     *need_split = true;
duke@435:     return max_partial_reg;
duke@435:   } else {
duke@435:     return any_reg;
duke@435:   }
duke@435: }
duke@435: 
duke@435: int LinearScanWalker::find_free_double_reg(int reg_needed_until, int interval_to, int hint_reg, bool* need_split) {
duke@435:   assert((_last_reg - _first_reg + 1) % 2 == 0, "adjust algorithm");
duke@435: 
duke@435:   int min_full_reg = any_reg;
duke@435:   int max_partial_reg = any_reg;
duke@435: 
duke@435:   for (int i = _first_reg; i < _last_reg; i+=2) {
duke@435:     if (_use_pos[i] >= interval_to && _use_pos[i + 1] >= interval_to) {
duke@435:       // this register is free for the full interval
duke@435:       if (min_full_reg == any_reg || i == hint_reg || (_use_pos[i] < _use_pos[min_full_reg] && min_full_reg != hint_reg)) {
duke@435:         min_full_reg = i;
duke@435:       }
duke@435:     } else if (_use_pos[i] > reg_needed_until && _use_pos[i + 1] > reg_needed_until) {
duke@435:       // this register is at least free until reg_needed_until
duke@435:       if (max_partial_reg == any_reg || i == hint_reg || (_use_pos[i] > _use_pos[max_partial_reg] && max_partial_reg != hint_reg)) {
duke@435:         max_partial_reg = i;
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   if (min_full_reg != any_reg) {
duke@435:     return min_full_reg;
duke@435:   } else if (max_partial_reg != any_reg) {
duke@435:     *need_split = true;
duke@435:     return max_partial_reg;
duke@435:   } else {
duke@435:     return any_reg;
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: bool LinearScanWalker::alloc_free_reg(Interval* cur) {
duke@435:   TRACE_LINEAR_SCAN(2, tty->print("trying to find free register for "); cur->print());
duke@435: 
duke@435:   init_use_lists(true);
duke@435:   free_exclude_active_fixed();
duke@435:   free_exclude_active_any();
duke@435:   free_collect_inactive_fixed(cur);
duke@435:   free_collect_inactive_any(cur);
duke@435: //  free_collect_unhandled(fixedKind, cur);
duke@435:   assert(unhandled_first(fixedKind) == Interval::end(), "must not have unhandled fixed intervals because all fixed intervals have a use at position 0");
duke@435: 
duke@435:   // _use_pos contains the start of the next interval that has this register assigned
duke@435:   // (either as a fixed register or a normal allocated register in the past)
duke@435:   // only intervals overlapping with cur are processed, non-overlapping invervals can be ignored safely
duke@435:   TRACE_LINEAR_SCAN(4, tty->print_cr("      state of registers:"));
duke@435:   TRACE_LINEAR_SCAN(4, for (int i = _first_reg; i <= _last_reg; i++) tty->print_cr("      reg %d: use_pos: %d", i, _use_pos[i]));
duke@435: 
duke@435:   int hint_reg, hint_regHi;
duke@435:   Interval* register_hint = cur->register_hint();
duke@435:   if (register_hint != NULL) {
duke@435:     hint_reg = register_hint->assigned_reg();
duke@435:     hint_regHi = register_hint->assigned_regHi();
duke@435: 
duke@435:     if (allocator()->is_precolored_cpu_interval(register_hint)) {
duke@435:       assert(hint_reg != any_reg && hint_regHi == any_reg, "must be for fixed intervals");
duke@435:       hint_regHi = hint_reg + 1;  // connect e.g. eax-edx
duke@435:     }
duke@435:     TRACE_LINEAR_SCAN(4, tty->print("      hint registers %d, %d from interval ", hint_reg, hint_regHi); register_hint->print());
duke@435: 
duke@435:   } else {
duke@435:     hint_reg = any_reg;
duke@435:     hint_regHi = any_reg;
duke@435:   }
duke@435:   assert(hint_reg == any_reg || hint_reg != hint_regHi, "hint reg and regHi equal");
duke@435:   assert(cur->assigned_reg() == any_reg && cur->assigned_regHi() == any_reg, "register already assigned to interval");
duke@435: 
duke@435:   // the register must be free at least until this position
duke@435:   int reg_needed_until = cur->from() + 1;
duke@435:   int interval_to = cur->to();
duke@435: 
duke@435:   bool need_split = false;
duke@435:   int split_pos = -1;
duke@435:   int reg = any_reg;
duke@435:   int regHi = any_reg;
duke@435: 
duke@435:   if (_adjacent_regs) {
duke@435:     reg = find_free_double_reg(reg_needed_until, interval_to, hint_reg, &need_split);
duke@435:     regHi = reg + 1;
duke@435:     if (reg == any_reg) {
duke@435:       return false;
duke@435:     }
duke@435:     split_pos = MIN2(_use_pos[reg], _use_pos[regHi]);
duke@435: 
duke@435:   } else {
duke@435:     reg = find_free_reg(reg_needed_until, interval_to, hint_reg, any_reg, &need_split);
duke@435:     if (reg == any_reg) {
duke@435:       return false;
duke@435:     }
duke@435:     split_pos = _use_pos[reg];
duke@435: 
duke@435:     if (_num_phys_regs == 2) {
duke@435:       regHi = find_free_reg(reg_needed_until, interval_to, hint_regHi, reg, &need_split);
duke@435: 
duke@435:       if (_use_pos[reg] < interval_to && regHi == any_reg) {
duke@435:         // do not split interval if only one register can be assigned until the split pos
duke@435:         // (when one register is found for the whole interval, split&spill is only
duke@435:         // performed for the hi register)
duke@435:         return false;
duke@435: 
duke@435:       } else if (regHi != any_reg) {
duke@435:         split_pos = MIN2(split_pos, _use_pos[regHi]);
duke@435: 
duke@435:         // sort register numbers to prevent e.g. a move from eax,ebx to ebx,eax
duke@435:         if (reg > regHi) {
duke@435:           int temp = reg;
duke@435:           reg = regHi;
duke@435:           regHi = temp;
duke@435:         }
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   cur->assign_reg(reg, regHi);
duke@435:   TRACE_LINEAR_SCAN(2, tty->print_cr("selected register %d, %d", reg, regHi));
duke@435: 
duke@435:   assert(split_pos > 0, "invalid split_pos");
duke@435:   if (need_split) {
duke@435:     // register not available for full interval, so split it
duke@435:     split_when_partial_register_available(cur, split_pos);
duke@435:   }
duke@435: 
duke@435:   // only return true if interval is completely assigned
duke@435:   return _num_phys_regs == 1 || regHi != any_reg;
duke@435: }
duke@435: 
duke@435: 
duke@435: int LinearScanWalker::find_locked_reg(int reg_needed_until, int interval_to, int hint_reg, int ignore_reg, bool* need_split) {
duke@435:   int max_reg = any_reg;
duke@435: 
duke@435:   for (int i = _first_reg; i <= _last_reg; i++) {
duke@435:     if (i == ignore_reg) {
duke@435:       // this register must be ignored
duke@435: 
duke@435:     } else if (_use_pos[i] > reg_needed_until) {
duke@435:       if (max_reg == any_reg || i == hint_reg || (_use_pos[i] > _use_pos[max_reg] && max_reg != hint_reg)) {
duke@435:         max_reg = i;
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   if (max_reg != any_reg && _block_pos[max_reg] <= interval_to) {
duke@435:     *need_split = true;
duke@435:   }
duke@435: 
duke@435:   return max_reg;
duke@435: }
duke@435: 
duke@435: int LinearScanWalker::find_locked_double_reg(int reg_needed_until, int interval_to, int hint_reg, bool* need_split) {
duke@435:   assert((_last_reg - _first_reg + 1) % 2 == 0, "adjust algorithm");
duke@435: 
duke@435:   int max_reg = any_reg;
duke@435: 
duke@435:   for (int i = _first_reg; i < _last_reg; i+=2) {
duke@435:     if (_use_pos[i] > reg_needed_until && _use_pos[i + 1] > reg_needed_until) {
duke@435:       if (max_reg == any_reg || _use_pos[i] > _use_pos[max_reg]) {
duke@435:         max_reg = i;
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   if (_block_pos[max_reg] <= interval_to || _block_pos[max_reg + 1] <= interval_to) {
duke@435:     *need_split = true;
duke@435:   }
duke@435: 
duke@435:   return max_reg;
duke@435: }
duke@435: 
duke@435: void LinearScanWalker::split_and_spill_intersecting_intervals(int reg, int regHi) {
duke@435:   assert(reg != any_reg, "no register assigned");
duke@435: 
duke@435:   for (int i = 0; i < _spill_intervals[reg]->length(); i++) {
duke@435:     Interval* it = _spill_intervals[reg]->at(i);
duke@435:     remove_from_list(it);
duke@435:     split_and_spill_interval(it);
duke@435:   }
duke@435: 
duke@435:   if (regHi != any_reg) {
duke@435:     IntervalList* processed = _spill_intervals[reg];
duke@435:     for (int i = 0; i < _spill_intervals[regHi]->length(); i++) {
duke@435:       Interval* it = _spill_intervals[regHi]->at(i);
duke@435:       if (processed->index_of(it) == -1) {
duke@435:         remove_from_list(it);
duke@435:         split_and_spill_interval(it);
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: // Split an Interval and spill it to memory so that cur can be placed in a register
duke@435: void LinearScanWalker::alloc_locked_reg(Interval* cur) {
duke@435:   TRACE_LINEAR_SCAN(2, tty->print("need to split and spill to get register for "); cur->print());
duke@435: 
duke@435:   // collect current usage of registers
duke@435:   init_use_lists(false);
duke@435:   spill_exclude_active_fixed();
duke@435: //  spill_block_unhandled_fixed(cur);
duke@435:   assert(unhandled_first(fixedKind) == Interval::end(), "must not have unhandled fixed intervals because all fixed intervals have a use at position 0");
duke@435:   spill_block_inactive_fixed(cur);
duke@435:   spill_collect_active_any();
duke@435:   spill_collect_inactive_any(cur);
duke@435: 
duke@435: #ifndef PRODUCT
duke@435:   if (TraceLinearScanLevel >= 4) {
duke@435:     tty->print_cr("      state of registers:");
duke@435:     for (int i = _first_reg; i <= _last_reg; i++) {
duke@435:       tty->print("      reg %d: use_pos: %d, block_pos: %d, intervals: ", i, _use_pos[i], _block_pos[i]);
duke@435:       for (int j = 0; j < _spill_intervals[i]->length(); j++) {
duke@435:         tty->print("%d ", _spill_intervals[i]->at(j)->reg_num());
duke@435:       }
duke@435:       tty->cr();
duke@435:     }
duke@435:   }
duke@435: #endif
duke@435: 
duke@435:   // the register must be free at least until this position
duke@435:   int reg_needed_until = MIN2(cur->first_usage(mustHaveRegister), cur->from() + 1);
duke@435:   int interval_to = cur->to();
duke@435:   assert (reg_needed_until > 0 && reg_needed_until < max_jint, "interval has no use");
duke@435: 
duke@435:   int split_pos = 0;
duke@435:   int use_pos = 0;
duke@435:   bool need_split = false;
duke@435:   int reg, regHi;
duke@435: 
duke@435:   if (_adjacent_regs) {
duke@435:     reg = find_locked_double_reg(reg_needed_until, interval_to, any_reg, &need_split);
duke@435:     regHi = reg + 1;
duke@435: 
duke@435:     if (reg != any_reg) {
duke@435:       use_pos = MIN2(_use_pos[reg], _use_pos[regHi]);
duke@435:       split_pos = MIN2(_block_pos[reg], _block_pos[regHi]);
duke@435:     }
duke@435:   } else {
duke@435:     reg = find_locked_reg(reg_needed_until, interval_to, any_reg, cur->assigned_reg(), &need_split);
duke@435:     regHi = any_reg;
duke@435: 
duke@435:     if (reg != any_reg) {
duke@435:       use_pos = _use_pos[reg];
duke@435:       split_pos = _block_pos[reg];
duke@435: 
duke@435:       if (_num_phys_regs == 2) {
duke@435:         if (cur->assigned_reg() != any_reg) {
duke@435:           regHi = reg;
duke@435:           reg = cur->assigned_reg();
duke@435:         } else {
duke@435:           regHi = find_locked_reg(reg_needed_until, interval_to, any_reg, reg, &need_split);
duke@435:           if (regHi != any_reg) {
duke@435:             use_pos = MIN2(use_pos, _use_pos[regHi]);
duke@435:             split_pos = MIN2(split_pos, _block_pos[regHi]);
duke@435:           }
duke@435:         }
duke@435: 
duke@435:         if (regHi != any_reg && reg > regHi) {
duke@435:           // sort register numbers to prevent e.g. a move from eax,ebx to ebx,eax
duke@435:           int temp = reg;
duke@435:           reg = regHi;
duke@435:           regHi = temp;
duke@435:         }
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   if (reg == any_reg || (_num_phys_regs == 2 && regHi == any_reg) || use_pos <= cur->first_usage(mustHaveRegister)) {
duke@435:     // the first use of cur is later than the spilling position -> spill cur
duke@435:     TRACE_LINEAR_SCAN(4, tty->print_cr("able to spill current interval. first_usage(register): %d, use_pos: %d", cur->first_usage(mustHaveRegister), use_pos));
duke@435: 
duke@435:     if (cur->first_usage(mustHaveRegister) <= cur->from() + 1) {
duke@435:       assert(false, "cannot spill interval that is used in first instruction (possible reason: no register found)");
duke@435:       // assign a reasonable register and do a bailout in product mode to avoid errors
duke@435:       allocator()->assign_spill_slot(cur);
duke@435:       BAILOUT("LinearScan: no register found");
duke@435:     }
duke@435: 
duke@435:     split_and_spill_interval(cur);
duke@435:   } else {
duke@435:     TRACE_LINEAR_SCAN(4, tty->print_cr("decided to use register %d, %d", reg, regHi));
duke@435:     assert(reg != any_reg && (_num_phys_regs == 1 || regHi != any_reg), "no register found");
duke@435:     assert(split_pos > 0, "invalid split_pos");
duke@435:     assert(need_split == false || split_pos > cur->from(), "splitting interval at from");
duke@435: 
duke@435:     cur->assign_reg(reg, regHi);
duke@435:     if (need_split) {
duke@435:       // register not available for full interval, so split it
duke@435:       split_when_partial_register_available(cur, split_pos);
duke@435:     }
duke@435: 
duke@435:     // perform splitting and spilling for all affected intervalls
duke@435:     split_and_spill_intersecting_intervals(reg, regHi);
duke@435:   }
duke@435: }
duke@435: 
duke@435: bool LinearScanWalker::no_allocation_possible(Interval* cur) {
never@739: #ifdef X86
duke@435:   // fast calculation of intervals that can never get a register because the
duke@435:   // the next instruction is a call that blocks all registers
duke@435:   // Note: this does not work if callee-saved registers are available (e.g. on Sparc)
duke@435: 
duke@435:   // check if this interval is the result of a split operation
duke@435:   // (an interval got a register until this position)
duke@435:   int pos = cur->from();
duke@435:   if ((pos & 1) == 1) {
duke@435:     // the current instruction is a call that blocks all registers
duke@435:     if (pos < allocator()->max_lir_op_id() && allocator()->has_call(pos + 1)) {
duke@435:       TRACE_LINEAR_SCAN(4, tty->print_cr("      free register cannot be available because all registers blocked by following call"));
duke@435: 
duke@435:       // safety check that there is really no register available
duke@435:       assert(alloc_free_reg(cur) == false, "found a register for this interval");
duke@435:       return true;
duke@435:     }
duke@435: 
duke@435:   }
duke@435: #endif
duke@435:   return false;
duke@435: }
duke@435: 
duke@435: void LinearScanWalker::init_vars_for_alloc(Interval* cur) {
duke@435:   BasicType type = cur->type();
duke@435:   _num_phys_regs = LinearScan::num_physical_regs(type);
duke@435:   _adjacent_regs = LinearScan::requires_adjacent_regs(type);
duke@435: 
duke@435:   if (pd_init_regs_for_alloc(cur)) {
duke@435:     // the appropriate register range was selected.
duke@435:   } else if (type == T_FLOAT || type == T_DOUBLE) {
duke@435:     _first_reg = pd_first_fpu_reg;
duke@435:     _last_reg = pd_last_fpu_reg;
duke@435:   } else {
duke@435:     _first_reg = pd_first_cpu_reg;
iveresov@2344:     _last_reg = FrameMap::last_cpu_reg();
duke@435:   }
duke@435: 
duke@435:   assert(0 <= _first_reg && _first_reg < LinearScan::nof_regs, "out of range");
duke@435:   assert(0 <= _last_reg && _last_reg < LinearScan::nof_regs, "out of range");
duke@435: }
duke@435: 
duke@435: 
duke@435: bool LinearScanWalker::is_move(LIR_Op* op, Interval* from, Interval* to) {
duke@435:   if (op->code() != lir_move) {
duke@435:     return false;
duke@435:   }
duke@435:   assert(op->as_Op1() != NULL, "move must be LIR_Op1");
duke@435: 
duke@435:   LIR_Opr in = ((LIR_Op1*)op)->in_opr();
duke@435:   LIR_Opr res = ((LIR_Op1*)op)->result_opr();
duke@435:   return in->is_virtual() && res->is_virtual() && in->vreg_number() == from->reg_num() && res->vreg_number() == to->reg_num();
duke@435: }
duke@435: 
duke@435: // optimization (especially for phi functions of nested loops):
duke@435: // assign same spill slot to non-intersecting intervals
duke@435: void LinearScanWalker::combine_spilled_intervals(Interval* cur) {
duke@435:   if (cur->is_split_child()) {
duke@435:     // optimization is only suitable for split parents
duke@435:     return;
duke@435:   }
duke@435: 
duke@435:   Interval* register_hint = cur->register_hint(false);
duke@435:   if (register_hint == NULL) {
duke@435:     // cur is not the target of a move, otherwise register_hint would be set
duke@435:     return;
duke@435:   }
duke@435:   assert(register_hint->is_split_parent(), "register hint must be split parent");
duke@435: 
duke@435:   if (cur->spill_state() != noOptimization || register_hint->spill_state() != noOptimization) {
duke@435:     // combining the stack slots for intervals where spill move optimization is applied
duke@435:     // is not benefitial and would cause problems
duke@435:     return;
duke@435:   }
duke@435: 
duke@435:   int begin_pos = cur->from();
duke@435:   int end_pos = cur->to();
duke@435:   if (end_pos > allocator()->max_lir_op_id() || (begin_pos & 1) != 0 || (end_pos & 1) != 0) {
duke@435:     // safety check that lir_op_with_id is allowed
duke@435:     return;
duke@435:   }
duke@435: 
duke@435:   if (!is_move(allocator()->lir_op_with_id(begin_pos), register_hint, cur) || !is_move(allocator()->lir_op_with_id(end_pos), cur, register_hint)) {
duke@435:     // cur and register_hint are not connected with two moves
duke@435:     return;
duke@435:   }
duke@435: 
duke@435:   Interval* begin_hint = register_hint->split_child_at_op_id(begin_pos, LIR_OpVisitState::inputMode);
duke@435:   Interval* end_hint = register_hint->split_child_at_op_id(end_pos, LIR_OpVisitState::outputMode);
duke@435:   if (begin_hint == end_hint || begin_hint->to() != begin_pos || end_hint->from() != end_pos) {
duke@435:     // register_hint must be split, otherwise the re-writing of use positions does not work
duke@435:     return;
duke@435:   }
duke@435: 
duke@435:   assert(begin_hint->assigned_reg() != any_reg, "must have register assigned");
duke@435:   assert(end_hint->assigned_reg() == any_reg, "must not have register assigned");
duke@435:   assert(cur->first_usage(mustHaveRegister) == begin_pos, "must have use position at begin of interval because of move");
duke@435:   assert(end_hint->first_usage(mustHaveRegister) == end_pos, "must have use position at begin of interval because of move");
duke@435: 
duke@435:   if (begin_hint->assigned_reg() < LinearScan::nof_regs) {
duke@435:     // register_hint is not spilled at begin_pos, so it would not be benefitial to immediately spill cur
duke@435:     return;
duke@435:   }
duke@435:   assert(register_hint->canonical_spill_slot() != -1, "must be set when part of interval was spilled");
duke@435: 
duke@435:   // modify intervals such that cur gets the same stack slot as register_hint
duke@435:   // delete use positions to prevent the intervals to get a register at beginning
duke@435:   cur->set_canonical_spill_slot(register_hint->canonical_spill_slot());
duke@435:   cur->remove_first_use_pos();
duke@435:   end_hint->remove_first_use_pos();
duke@435: }
duke@435: 
duke@435: 
duke@435: // allocate a physical register or memory location to an interval
duke@435: bool LinearScanWalker::activate_current() {
duke@435:   Interval* cur = current();
duke@435:   bool result = true;
duke@435: 
duke@435:   TRACE_LINEAR_SCAN(2, tty->print   ("+++++ activating interval "); cur->print());
duke@435:   TRACE_LINEAR_SCAN(4, tty->print_cr("      split_parent: %d, insert_move_when_activated: %d", cur->split_parent()->reg_num(), cur->insert_move_when_activated()));
duke@435: 
duke@435:   if (cur->assigned_reg() >= LinearScan::nof_regs) {
duke@435:     // activating an interval that has a stack slot assigned -> split it at first use position
duke@435:     // used for method parameters
duke@435:     TRACE_LINEAR_SCAN(4, tty->print_cr("      interval has spill slot assigned (method parameter) -> split it before first use"));
duke@435: 
duke@435:     split_stack_interval(cur);
duke@435:     result = false;
duke@435: 
duke@435:   } else if (allocator()->gen()->is_vreg_flag_set(cur->reg_num(), LIRGenerator::must_start_in_memory)) {
duke@435:     // activating an interval that must start in a stack slot, but may get a register later
duke@435:     // used for lir_roundfp: rounding is done by store to stack and reload later
duke@435:     TRACE_LINEAR_SCAN(4, tty->print_cr("      interval must start in stack slot -> split it before first use"));
duke@435:     assert(cur->assigned_reg() == any_reg && cur->assigned_regHi() == any_reg, "register already assigned");
duke@435: 
duke@435:     allocator()->assign_spill_slot(cur);
duke@435:     split_stack_interval(cur);
duke@435:     result = false;
duke@435: 
duke@435:   } else if (cur->assigned_reg() == any_reg) {
duke@435:     // interval has not assigned register -> normal allocation
duke@435:     // (this is the normal case for most intervals)
duke@435:     TRACE_LINEAR_SCAN(4, tty->print_cr("      normal allocation of register"));
duke@435: 
duke@435:     // assign same spill slot to non-intersecting intervals
duke@435:     combine_spilled_intervals(cur);
duke@435: 
duke@435:     init_vars_for_alloc(cur);
duke@435:     if (no_allocation_possible(cur) || !alloc_free_reg(cur)) {
duke@435:       // no empty register available.
duke@435:       // split and spill another interval so that this interval gets a register
duke@435:       alloc_locked_reg(cur);
duke@435:     }
duke@435: 
duke@435:     // spilled intervals need not be move to active-list
duke@435:     if (cur->assigned_reg() >= LinearScan::nof_regs) {
duke@435:       result = false;
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   // load spilled values that become active from stack slot to register
duke@435:   if (cur->insert_move_when_activated()) {
duke@435:     assert(cur->is_split_child(), "must be");
duke@435:     assert(cur->current_split_child() != NULL, "must be");
duke@435:     assert(cur->current_split_child()->reg_num() != cur->reg_num(), "cannot insert move between same interval");
duke@435:     TRACE_LINEAR_SCAN(4, tty->print_cr("Inserting move from interval %d to %d because insert_move_when_activated is set", cur->current_split_child()->reg_num(), cur->reg_num()));
duke@435: 
duke@435:     insert_move(cur->from(), cur->current_split_child(), cur);
duke@435:   }
duke@435:   cur->make_current_split_child();
duke@435: 
duke@435:   return result; // true = interval is moved to active list
duke@435: }
duke@435: 
duke@435: 
duke@435: // Implementation of EdgeMoveOptimizer
duke@435: 
duke@435: EdgeMoveOptimizer::EdgeMoveOptimizer() :
duke@435:   _edge_instructions(4),
duke@435:   _edge_instructions_idx(4)
duke@435: {
duke@435: }
duke@435: 
duke@435: void EdgeMoveOptimizer::optimize(BlockList* code) {
duke@435:   EdgeMoveOptimizer optimizer = EdgeMoveOptimizer();
duke@435: 
duke@435:   // ignore the first block in the list (index 0 is not processed)
duke@435:   for (int i = code->length() - 1; i >= 1; i--) {
duke@435:     BlockBegin* block = code->at(i);
duke@435: 
duke@435:     if (block->number_of_preds() > 1 && !block->is_set(BlockBegin::exception_entry_flag)) {
duke@435:       optimizer.optimize_moves_at_block_end(block);
duke@435:     }
duke@435:     if (block->number_of_sux() == 2) {
duke@435:       optimizer.optimize_moves_at_block_begin(block);
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: // clear all internal data structures
duke@435: void EdgeMoveOptimizer::init_instructions() {
duke@435:   _edge_instructions.clear();
duke@435:   _edge_instructions_idx.clear();
duke@435: }
duke@435: 
duke@435: // append a lir-instruction-list and the index of the current operation in to the list
duke@435: void EdgeMoveOptimizer::append_instructions(LIR_OpList* instructions, int instructions_idx) {
duke@435:   _edge_instructions.append(instructions);
duke@435:   _edge_instructions_idx.append(instructions_idx);
duke@435: }
duke@435: 
duke@435: // return the current operation of the given edge (predecessor or successor)
duke@435: LIR_Op* EdgeMoveOptimizer::instruction_at(int edge) {
duke@435:   LIR_OpList* instructions = _edge_instructions.at(edge);
duke@435:   int idx = _edge_instructions_idx.at(edge);
duke@435: 
duke@435:   if (idx < instructions->length()) {
duke@435:     return instructions->at(idx);
duke@435:   } else {
duke@435:     return NULL;
duke@435:   }
duke@435: }
duke@435: 
duke@435: // removes the current operation of the given edge (predecessor or successor)
duke@435: void EdgeMoveOptimizer::remove_cur_instruction(int edge, bool decrement_index) {
duke@435:   LIR_OpList* instructions = _edge_instructions.at(edge);
duke@435:   int idx = _edge_instructions_idx.at(edge);
duke@435:   instructions->remove_at(idx);
duke@435: 
duke@435:   if (decrement_index) {
duke@435:     _edge_instructions_idx.at_put(edge, idx - 1);
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: bool EdgeMoveOptimizer::operations_different(LIR_Op* op1, LIR_Op* op2) {
duke@435:   if (op1 == NULL || op2 == NULL) {
duke@435:     // at least one block is already empty -> no optimization possible
duke@435:     return true;
duke@435:   }
duke@435: 
duke@435:   if (op1->code() == lir_move && op2->code() == lir_move) {
duke@435:     assert(op1->as_Op1() != NULL, "move must be LIR_Op1");
duke@435:     assert(op2->as_Op1() != NULL, "move must be LIR_Op1");
duke@435:     LIR_Op1* move1 = (LIR_Op1*)op1;
duke@435:     LIR_Op1* move2 = (LIR_Op1*)op2;
duke@435:     if (move1->info() == move2->info() && move1->in_opr() == move2->in_opr() && move1->result_opr() == move2->result_opr()) {
duke@435:       // these moves are exactly equal and can be optimized
duke@435:       return false;
duke@435:     }
duke@435: 
duke@435:   } else if (op1->code() == lir_fxch && op2->code() == lir_fxch) {
duke@435:     assert(op1->as_Op1() != NULL, "fxch must be LIR_Op1");
duke@435:     assert(op2->as_Op1() != NULL, "fxch must be LIR_Op1");
duke@435:     LIR_Op1* fxch1 = (LIR_Op1*)op1;
duke@435:     LIR_Op1* fxch2 = (LIR_Op1*)op2;
duke@435:     if (fxch1->in_opr()->as_jint() == fxch2->in_opr()->as_jint()) {
duke@435:       // equal FPU stack operations can be optimized
duke@435:       return false;
duke@435:     }
duke@435: 
duke@435:   } else if (op1->code() == lir_fpop_raw && op2->code() == lir_fpop_raw) {
duke@435:     // equal FPU stack operations can be optimized
duke@435:     return false;
duke@435:   }
duke@435: 
duke@435:   // no optimization possible
duke@435:   return true;
duke@435: }
duke@435: 
duke@435: void EdgeMoveOptimizer::optimize_moves_at_block_end(BlockBegin* block) {
duke@435:   TRACE_LINEAR_SCAN(4, tty->print_cr("optimizing moves at end of block B%d", block->block_id()));
duke@435: 
duke@435:   if (block->is_predecessor(block)) {
duke@435:     // currently we can't handle this correctly.
duke@435:     return;
duke@435:   }
duke@435: 
duke@435:   init_instructions();
duke@435:   int num_preds = block->number_of_preds();
duke@435:   assert(num_preds > 1, "do not call otherwise");
duke@435:   assert(!block->is_set(BlockBegin::exception_entry_flag), "exception handlers not allowed");
duke@435: 
duke@435:   // setup a list with the lir-instructions of all predecessors
duke@435:   int i;
duke@435:   for (i = 0; i < num_preds; i++) {
duke@435:     BlockBegin* pred = block->pred_at(i);
duke@435:     LIR_OpList* pred_instructions = pred->lir()->instructions_list();
duke@435: 
duke@435:     if (pred->number_of_sux() != 1) {
duke@435:       // this can happen with switch-statements where multiple edges are between
duke@435:       // the same blocks.
duke@435:       return;
duke@435:     }
duke@435: 
duke@435:     assert(pred->number_of_sux() == 1, "can handle only one successor");
duke@435:     assert(pred->sux_at(0) == block, "invalid control flow");
duke@435:     assert(pred_instructions->last()->code() == lir_branch, "block with successor must end with branch");
duke@435:     assert(pred_instructions->last()->as_OpBranch() != NULL, "branch must be LIR_OpBranch");
duke@435:     assert(pred_instructions->last()->as_OpBranch()->cond() == lir_cond_always, "block must end with unconditional branch");
duke@435: 
duke@435:     if (pred_instructions->last()->info() != NULL) {
duke@435:       // can not optimize instructions when debug info is needed
duke@435:       return;
duke@435:     }
duke@435: 
duke@435:     // ignore the unconditional branch at the end of the block
duke@435:     append_instructions(pred_instructions, pred_instructions->length() - 2);
duke@435:   }
duke@435: 
duke@435: 
duke@435:   // process lir-instructions while all predecessors end with the same instruction
duke@435:   while (true) {
duke@435:     LIR_Op* op = instruction_at(0);
duke@435:     for (i = 1; i < num_preds; i++) {
duke@435:       if (operations_different(op, instruction_at(i))) {
duke@435:         // these instructions are different and cannot be optimized ->
duke@435:         // no further optimization possible
duke@435:         return;
duke@435:       }
duke@435:     }
duke@435: 
duke@435:     TRACE_LINEAR_SCAN(4, tty->print("found instruction that is equal in all %d predecessors: ", num_preds); op->print());
duke@435: 
duke@435:     // insert the instruction at the beginning of the current block
duke@435:     block->lir()->insert_before(1, op);
duke@435: 
duke@435:     // delete the instruction at the end of all predecessors
duke@435:     for (i = 0; i < num_preds; i++) {
duke@435:       remove_cur_instruction(i, true);
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void EdgeMoveOptimizer::optimize_moves_at_block_begin(BlockBegin* block) {
duke@435:   TRACE_LINEAR_SCAN(4, tty->print_cr("optimization moves at begin of block B%d", block->block_id()));
duke@435: 
duke@435:   init_instructions();
duke@435:   int num_sux = block->number_of_sux();
duke@435: 
duke@435:   LIR_OpList* cur_instructions = block->lir()->instructions_list();
duke@435: 
duke@435:   assert(num_sux == 2, "method should not be called otherwise");
duke@435:   assert(cur_instructions->last()->code() == lir_branch, "block with successor must end with branch");
duke@435:   assert(cur_instructions->last()->as_OpBranch() != NULL, "branch must be LIR_OpBranch");
duke@435:   assert(cur_instructions->last()->as_OpBranch()->cond() == lir_cond_always, "block must end with unconditional branch");
duke@435: 
duke@435:   if (cur_instructions->last()->info() != NULL) {
duke@435:     // can no optimize instructions when debug info is needed
duke@435:     return;
duke@435:   }
duke@435: 
duke@435:   LIR_Op* branch = cur_instructions->at(cur_instructions->length() - 2);
duke@435:   if (branch->info() != NULL || (branch->code() != lir_branch && branch->code() != lir_cond_float_branch)) {
duke@435:     // not a valid case for optimization
duke@435:     // currently, only blocks that end with two branches (conditional branch followed
duke@435:     // by unconditional branch) are optimized
duke@435:     return;
duke@435:   }
duke@435: 
duke@435:   // now it is guaranteed that the block ends with two branch instructions.
duke@435:   // the instructions are inserted at the end of the block before these two branches
duke@435:   int insert_idx = cur_instructions->length() - 2;
duke@435: 
duke@435:   int i;
duke@435: #ifdef ASSERT
duke@435:   for (i = insert_idx - 1; i >= 0; i--) {
duke@435:     LIR_Op* op = cur_instructions->at(i);
duke@435:     if ((op->code() == lir_branch || op->code() == lir_cond_float_branch) && ((LIR_OpBranch*)op)->block() != NULL) {
duke@435:       assert(false, "block with two successors can have only two branch instructions");
duke@435:     }
duke@435:   }
duke@435: #endif
duke@435: 
duke@435:   // setup a list with the lir-instructions of all successors
duke@435:   for (i = 0; i < num_sux; i++) {
duke@435:     BlockBegin* sux = block->sux_at(i);
duke@435:     LIR_OpList* sux_instructions = sux->lir()->instructions_list();
duke@435: 
duke@435:     assert(sux_instructions->at(0)->code() == lir_label, "block must start with label");
duke@435: 
duke@435:     if (sux->number_of_preds() != 1) {
duke@435:       // this can happen with switch-statements where multiple edges are between
duke@435:       // the same blocks.
duke@435:       return;
duke@435:     }
duke@435:     assert(sux->pred_at(0) == block, "invalid control flow");
duke@435:     assert(!sux->is_set(BlockBegin::exception_entry_flag), "exception handlers not allowed");
duke@435: 
duke@435:     // ignore the label at the beginning of the block
duke@435:     append_instructions(sux_instructions, 1);
duke@435:   }
duke@435: 
duke@435:   // process lir-instructions while all successors begin with the same instruction
duke@435:   while (true) {
duke@435:     LIR_Op* op = instruction_at(0);
duke@435:     for (i = 1; i < num_sux; i++) {
duke@435:       if (operations_different(op, instruction_at(i))) {
duke@435:         // these instructions are different and cannot be optimized ->
duke@435:         // no further optimization possible
duke@435:         return;
duke@435:       }
duke@435:     }
duke@435: 
duke@435:     TRACE_LINEAR_SCAN(4, tty->print("----- found instruction that is equal in all %d successors: ", num_sux); op->print());
duke@435: 
duke@435:     // insert instruction at end of current block
duke@435:     block->lir()->insert_before(insert_idx, op);
duke@435:     insert_idx++;
duke@435: 
duke@435:     // delete the instructions at the beginning of all successors
duke@435:     for (i = 0; i < num_sux; i++) {
duke@435:       remove_cur_instruction(i, false);
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: // Implementation of ControlFlowOptimizer
duke@435: 
duke@435: ControlFlowOptimizer::ControlFlowOptimizer() :
duke@435:   _original_preds(4)
duke@435: {
duke@435: }
duke@435: 
duke@435: void ControlFlowOptimizer::optimize(BlockList* code) {
duke@435:   ControlFlowOptimizer optimizer = ControlFlowOptimizer();
duke@435: 
duke@435:   // push the OSR entry block to the end so that we're not jumping over it.
duke@435:   BlockBegin* osr_entry = code->at(0)->end()->as_Base()->osr_entry();
duke@435:   if (osr_entry) {
duke@435:     int index = osr_entry->linear_scan_number();
duke@435:     assert(code->at(index) == osr_entry, "wrong index");
duke@435:     code->remove_at(index);
duke@435:     code->append(osr_entry);
duke@435:   }
duke@435: 
duke@435:   optimizer.reorder_short_loops(code);
duke@435:   optimizer.delete_empty_blocks(code);
duke@435:   optimizer.delete_unnecessary_jumps(code);
duke@435:   optimizer.delete_jumps_to_return(code);
duke@435: }
duke@435: 
duke@435: void ControlFlowOptimizer::reorder_short_loop(BlockList* code, BlockBegin* header_block, int header_idx) {
duke@435:   int i = header_idx + 1;
duke@435:   int max_end = MIN2(header_idx + ShortLoopSize, code->length());
duke@435:   while (i < max_end && code->at(i)->loop_depth() >= header_block->loop_depth()) {
duke@435:     i++;
duke@435:   }
duke@435: 
duke@435:   if (i == code->length() || code->at(i)->loop_depth() < header_block->loop_depth()) {
duke@435:     int end_idx = i - 1;
duke@435:     BlockBegin* end_block = code->at(end_idx);
duke@435: 
duke@435:     if (end_block->number_of_sux() == 1 && end_block->sux_at(0) == header_block) {
duke@435:       // short loop from header_idx to end_idx found -> reorder blocks such that
duke@435:       // the header_block is the last block instead of the first block of the loop
duke@435:       TRACE_LINEAR_SCAN(1, tty->print_cr("Reordering short loop: length %d, header B%d, end B%d",
duke@435:                                          end_idx - header_idx + 1,
duke@435:                                          header_block->block_id(), end_block->block_id()));
duke@435: 
duke@435:       for (int j = header_idx; j < end_idx; j++) {
duke@435:         code->at_put(j, code->at(j + 1));
duke@435:       }
duke@435:       code->at_put(end_idx, header_block);
duke@435: 
duke@435:       // correct the flags so that any loop alignment occurs in the right place.
duke@435:       assert(code->at(end_idx)->is_set(BlockBegin::backward_branch_target_flag), "must be backward branch target");
duke@435:       code->at(end_idx)->clear(BlockBegin::backward_branch_target_flag);
duke@435:       code->at(header_idx)->set(BlockBegin::backward_branch_target_flag);
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: void ControlFlowOptimizer::reorder_short_loops(BlockList* code) {
duke@435:   for (int i = code->length() - 1; i >= 0; i--) {
duke@435:     BlockBegin* block = code->at(i);
duke@435: 
duke@435:     if (block->is_set(BlockBegin::linear_scan_loop_header_flag)) {
duke@435:       reorder_short_loop(code, block, i);
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   DEBUG_ONLY(verify(code));
duke@435: }
duke@435: 
duke@435: // only blocks with exactly one successor can be deleted. Such blocks
duke@435: // must always end with an unconditional branch to this successor
duke@435: bool ControlFlowOptimizer::can_delete_block(BlockBegin* block) {
duke@435:   if (block->number_of_sux() != 1 || block->number_of_exception_handlers() != 0 || block->is_entry_block()) {
duke@435:     return false;
duke@435:   }
duke@435: 
duke@435:   LIR_OpList* instructions = block->lir()->instructions_list();
duke@435: 
duke@435:   assert(instructions->length() >= 2, "block must have label and branch");
duke@435:   assert(instructions->at(0)->code() == lir_label, "first instruction must always be a label");
duke@435:   assert(instructions->last()->as_OpBranch() != NULL, "last instrcution must always be a branch");
duke@435:   assert(instructions->last()->as_OpBranch()->cond() == lir_cond_always, "branch must be unconditional");
duke@435:   assert(instructions->last()->as_OpBranch()->block() == block->sux_at(0), "branch target must be the successor");
duke@435: 
duke@435:   // block must have exactly one successor
duke@435: 
duke@435:   if (instructions->length() == 2 && instructions->last()->info() == NULL) {
duke@435:     return true;
duke@435:   }
duke@435:   return false;
duke@435: }
duke@435: 
duke@435: // substitute branch targets in all branch-instructions of this blocks
duke@435: void ControlFlowOptimizer::substitute_branch_target(BlockBegin* block, BlockBegin* target_from, BlockBegin* target_to) {
duke@435:   TRACE_LINEAR_SCAN(3, tty->print_cr("Deleting empty block: substituting from B%d to B%d inside B%d", target_from->block_id(), target_to->block_id(), block->block_id()));
duke@435: 
duke@435:   LIR_OpList* instructions = block->lir()->instructions_list();
duke@435: 
duke@435:   assert(instructions->at(0)->code() == lir_label, "first instruction must always be a label");
duke@435:   for (int i = instructions->length() - 1; i >= 1; i--) {
duke@435:     LIR_Op* op = instructions->at(i);
duke@435: 
duke@435:     if (op->code() == lir_branch || op->code() == lir_cond_float_branch) {
duke@435:       assert(op->as_OpBranch() != NULL, "branch must be of type LIR_OpBranch");
duke@435:       LIR_OpBranch* branch = (LIR_OpBranch*)op;
duke@435: 
duke@435:       if (branch->block() == target_from) {
duke@435:         branch->change_block(target_to);
duke@435:       }
duke@435:       if (branch->ublock() == target_from) {
duke@435:         branch->change_ublock(target_to);
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: void ControlFlowOptimizer::delete_empty_blocks(BlockList* code) {
duke@435:   int old_pos = 0;
duke@435:   int new_pos = 0;
duke@435:   int num_blocks = code->length();
duke@435: 
duke@435:   while (old_pos < num_blocks) {
duke@435:     BlockBegin* block = code->at(old_pos);
duke@435: 
duke@435:     if (can_delete_block(block)) {
duke@435:       BlockBegin* new_target = block->sux_at(0);
duke@435: 
duke@435:       // propagate backward branch target flag for correct code alignment
duke@435:       if (block->is_set(BlockBegin::backward_branch_target_flag)) {
duke@435:         new_target->set(BlockBegin::backward_branch_target_flag);
duke@435:       }
duke@435: 
duke@435:       // collect a list with all predecessors that contains each predecessor only once
duke@435:       // the predecessors of cur are changed during the substitution, so a copy of the
duke@435:       // predecessor list is necessary
duke@435:       int j;
duke@435:       _original_preds.clear();
duke@435:       for (j = block->number_of_preds() - 1; j >= 0; j--) {
duke@435:         BlockBegin* pred = block->pred_at(j);
duke@435:         if (_original_preds.index_of(pred) == -1) {
duke@435:           _original_preds.append(pred);
duke@435:         }
duke@435:       }
duke@435: 
duke@435:       for (j = _original_preds.length() - 1; j >= 0; j--) {
duke@435:         BlockBegin* pred = _original_preds.at(j);
duke@435:         substitute_branch_target(pred, block, new_target);
duke@435:         pred->substitute_sux(block, new_target);
duke@435:       }
duke@435:     } else {
duke@435:       // adjust position of this block in the block list if blocks before
duke@435:       // have been deleted
duke@435:       if (new_pos != old_pos) {
duke@435:         code->at_put(new_pos, code->at(old_pos));
duke@435:       }
duke@435:       new_pos++;
duke@435:     }
duke@435:     old_pos++;
duke@435:   }
duke@435:   code->truncate(new_pos);
duke@435: 
duke@435:   DEBUG_ONLY(verify(code));
duke@435: }
duke@435: 
duke@435: void ControlFlowOptimizer::delete_unnecessary_jumps(BlockList* code) {
duke@435:   // skip the last block because there a branch is always necessary
duke@435:   for (int i = code->length() - 2; i >= 0; i--) {
duke@435:     BlockBegin* block = code->at(i);
duke@435:     LIR_OpList* instructions = block->lir()->instructions_list();
duke@435: 
duke@435:     LIR_Op* last_op = instructions->last();
duke@435:     if (last_op->code() == lir_branch) {
duke@435:       assert(last_op->as_OpBranch() != NULL, "branch must be of type LIR_OpBranch");
duke@435:       LIR_OpBranch* last_branch = (LIR_OpBranch*)last_op;
duke@435: 
duke@435:       assert(last_branch->block() != NULL, "last branch must always have a block as target");
duke@435:       assert(last_branch->label() == last_branch->block()->label(), "must be equal");
duke@435: 
duke@435:       if (last_branch->info() == NULL) {
duke@435:         if (last_branch->block() == code->at(i + 1)) {
duke@435: 
duke@435:           TRACE_LINEAR_SCAN(3, tty->print_cr("Deleting unconditional branch at end of block B%d", block->block_id()));
duke@435: 
duke@435:           // delete last branch instruction
duke@435:           instructions->truncate(instructions->length() - 1);
duke@435: 
duke@435:         } else {
duke@435:           LIR_Op* prev_op = instructions->at(instructions->length() - 2);
duke@435:           if (prev_op->code() == lir_branch || prev_op->code() == lir_cond_float_branch) {
duke@435:             assert(prev_op->as_OpBranch() != NULL, "branch must be of type LIR_OpBranch");
duke@435:             LIR_OpBranch* prev_branch = (LIR_OpBranch*)prev_op;
duke@435: 
roland@4860:             if (prev_branch->stub() == NULL) {
roland@4860: 
roland@4860:               LIR_Op2* prev_cmp = NULL;
roland@4860: 
roland@4860:               for(int j = instructions->length() - 3; j >= 0 && prev_cmp == NULL; j--) {
roland@4860:                 prev_op = instructions->at(j);
roland@4860:                 if (prev_op->code() == lir_cmp) {
roland@4860:                   assert(prev_op->as_Op2() != NULL, "branch must be of type LIR_Op2");
roland@4860:                   prev_cmp = (LIR_Op2*)prev_op;
roland@4860:                   assert(prev_branch->cond() == prev_cmp->condition(), "should be the same");
roland@4860:                 }
bobv@2036:               }
roland@4860:               assert(prev_cmp != NULL, "should have found comp instruction for branch");
roland@4860:               if (prev_branch->block() == code->at(i + 1) && prev_branch->info() == NULL) {
roland@4860: 
roland@4860:                 TRACE_LINEAR_SCAN(3, tty->print_cr("Negating conditional branch and deleting unconditional branch at end of block B%d", block->block_id()));
roland@4860: 
roland@4860:                 // eliminate a conditional branch to the immediate successor
roland@4860:                 prev_branch->change_block(last_branch->block());
roland@4860:                 prev_branch->negate_cond();
roland@4860:                 prev_cmp->set_condition(prev_branch->cond());
roland@4860:                 instructions->truncate(instructions->length() - 1);
roland@4860:               }
duke@435:             }
duke@435:           }
duke@435:         }
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   DEBUG_ONLY(verify(code));
duke@435: }
duke@435: 
duke@435: void ControlFlowOptimizer::delete_jumps_to_return(BlockList* code) {
duke@435: #ifdef ASSERT
duke@435:   BitMap return_converted(BlockBegin::number_of_blocks());
duke@435:   return_converted.clear();
duke@435: #endif
duke@435: 
duke@435:   for (int i = code->length() - 1; i >= 0; i--) {
duke@435:     BlockBegin* block = code->at(i);
duke@435:     LIR_OpList* cur_instructions = block->lir()->instructions_list();
duke@435:     LIR_Op*     cur_last_op = cur_instructions->last();
duke@435: 
duke@435:     assert(cur_instructions->at(0)->code() == lir_label, "first instruction must always be a label");
duke@435:     if (cur_instructions->length() == 2 && cur_last_op->code() == lir_return) {
duke@435:       // the block contains only a label and a return
duke@435:       // if a predecessor ends with an unconditional jump to this block, then the jump
duke@435:       // can be replaced with a return instruction
duke@435:       //
duke@435:       // Note: the original block with only a return statement cannot be deleted completely
duke@435:       //       because the predecessors might have other (conditional) jumps to this block
duke@435:       //       -> this may lead to unnecesary return instructions in the final code
duke@435: 
duke@435:       assert(cur_last_op->info() == NULL, "return instructions do not have debug information");
duke@435:       assert(block->number_of_sux() == 0 ||
duke@435:              (return_converted.at(block->block_id()) && block->number_of_sux() == 1),
duke@435:              "blocks that end with return must not have successors");
duke@435: 
duke@435:       assert(cur_last_op->as_Op1() != NULL, "return must be LIR_Op1");
duke@435:       LIR_Opr return_opr = ((LIR_Op1*)cur_last_op)->in_opr();
duke@435: 
duke@435:       for (int j = block->number_of_preds() - 1; j >= 0; j--) {
duke@435:         BlockBegin* pred = block->pred_at(j);
duke@435:         LIR_OpList* pred_instructions = pred->lir()->instructions_list();
duke@435:         LIR_Op*     pred_last_op = pred_instructions->last();
duke@435: 
duke@435:         if (pred_last_op->code() == lir_branch) {
duke@435:           assert(pred_last_op->as_OpBranch() != NULL, "branch must be LIR_OpBranch");
duke@435:           LIR_OpBranch* pred_last_branch = (LIR_OpBranch*)pred_last_op;
duke@435: 
duke@435:           if (pred_last_branch->block() == block && pred_last_branch->cond() == lir_cond_always && pred_last_branch->info() == NULL) {
duke@435:             // replace the jump to a return with a direct return
duke@435:             // Note: currently the edge between the blocks is not deleted
duke@435:             pred_instructions->at_put(pred_instructions->length() - 1, new LIR_Op1(lir_return, return_opr));
duke@435: #ifdef ASSERT
duke@435:             return_converted.set_bit(pred->block_id());
duke@435: #endif
duke@435:           }
duke@435:         }
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: #ifdef ASSERT
duke@435: void ControlFlowOptimizer::verify(BlockList* code) {
duke@435:   for (int i = 0; i < code->length(); i++) {
duke@435:     BlockBegin* block = code->at(i);
duke@435:     LIR_OpList* instructions = block->lir()->instructions_list();
duke@435: 
duke@435:     int j;
duke@435:     for (j = 0; j < instructions->length(); j++) {
duke@435:       LIR_OpBranch* op_branch = instructions->at(j)->as_OpBranch();
duke@435: 
duke@435:       if (op_branch != NULL) {
duke@435:         assert(op_branch->block() == NULL || code->index_of(op_branch->block()) != -1, "branch target not valid");
duke@435:         assert(op_branch->ublock() == NULL || code->index_of(op_branch->ublock()) != -1, "branch target not valid");
duke@435:       }
duke@435:     }
duke@435: 
duke@435:     for (j = 0; j < block->number_of_sux() - 1; j++) {
duke@435:       BlockBegin* sux = block->sux_at(j);
duke@435:       assert(code->index_of(sux) != -1, "successor not valid");
duke@435:     }
duke@435: 
duke@435:     for (j = 0; j < block->number_of_preds() - 1; j++) {
duke@435:       BlockBegin* pred = block->pred_at(j);
duke@435:       assert(code->index_of(pred) != -1, "successor not valid");
duke@435:     }
duke@435:   }
duke@435: }
duke@435: #endif
duke@435: 
duke@435: 
duke@435: #ifndef PRODUCT
duke@435: 
duke@435: // Implementation of LinearStatistic
duke@435: 
duke@435: const char* LinearScanStatistic::counter_name(int counter_idx) {
duke@435:   switch (counter_idx) {
duke@435:     case counter_method:          return "compiled methods";
duke@435:     case counter_fpu_method:      return "methods using fpu";
duke@435:     case counter_loop_method:     return "methods with loops";
duke@435:     case counter_exception_method:return "methods with xhandler";
duke@435: 
duke@435:     case counter_loop:            return "loops";
duke@435:     case counter_block:           return "blocks";
duke@435:     case counter_loop_block:      return "blocks inside loop";
duke@435:     case counter_exception_block: return "exception handler entries";
duke@435:     case counter_interval:        return "intervals";
duke@435:     case counter_fixed_interval:  return "fixed intervals";
duke@435:     case counter_range:           return "ranges";
duke@435:     case counter_fixed_range:     return "fixed ranges";
duke@435:     case counter_use_pos:         return "use positions";
duke@435:     case counter_fixed_use_pos:   return "fixed use positions";
duke@435:     case counter_spill_slots:     return "spill slots";
duke@435: 
duke@435:     // counter for classes of lir instructions
duke@435:     case counter_instruction:     return "total instructions";
duke@435:     case counter_label:           return "labels";
duke@435:     case counter_entry:           return "method entries";
duke@435:     case counter_return:          return "method returns";
duke@435:     case counter_call:            return "method calls";
duke@435:     case counter_move:            return "moves";
duke@435:     case counter_cmp:             return "compare";
duke@435:     case counter_cond_branch:     return "conditional branches";
duke@435:     case counter_uncond_branch:   return "unconditional branches";
duke@435:     case counter_stub_branch:     return "branches to stub";
duke@435:     case counter_alu:             return "artithmetic + logic";
duke@435:     case counter_alloc:           return "allocations";
duke@435:     case counter_sync:            return "synchronisation";
duke@435:     case counter_throw:           return "throw";
duke@435:     case counter_unwind:          return "unwind";
duke@435:     case counter_typecheck:       return "type+null-checks";
duke@435:     case counter_fpu_stack:       return "fpu-stack";
duke@435:     case counter_misc_inst:       return "other instructions";
duke@435:     case counter_other_inst:      return "misc. instructions";
duke@435: 
duke@435:     // counter for different types of moves
duke@435:     case counter_move_total:      return "total moves";
duke@435:     case counter_move_reg_reg:    return "register->register";
duke@435:     case counter_move_reg_stack:  return "register->stack";
duke@435:     case counter_move_stack_reg:  return "stack->register";
duke@435:     case counter_move_stack_stack:return "stack->stack";
duke@435:     case counter_move_reg_mem:    return "register->memory";
duke@435:     case counter_move_mem_reg:    return "memory->register";
duke@435:     case counter_move_const_any:  return "constant->any";
duke@435: 
duke@435:     case blank_line_1:            return "";
duke@435:     case blank_line_2:            return "";
duke@435: 
duke@435:     default: ShouldNotReachHere(); return "";
duke@435:   }
duke@435: }
duke@435: 
duke@435: LinearScanStatistic::Counter LinearScanStatistic::base_counter(int counter_idx) {
duke@435:   if (counter_idx == counter_fpu_method || counter_idx == counter_loop_method || counter_idx == counter_exception_method) {
duke@435:     return counter_method;
duke@435:   } else if (counter_idx == counter_loop_block || counter_idx == counter_exception_block) {
duke@435:     return counter_block;
duke@435:   } else if (counter_idx >= counter_instruction && counter_idx <= counter_other_inst) {
duke@435:     return counter_instruction;
duke@435:   } else if (counter_idx >= counter_move_total && counter_idx <= counter_move_const_any) {
duke@435:     return counter_move_total;
duke@435:   }
duke@435:   return invalid_counter;
duke@435: }
duke@435: 
duke@435: LinearScanStatistic::LinearScanStatistic() {
duke@435:   for (int i = 0; i < number_of_counters; i++) {
duke@435:     _counters_sum[i] = 0;
duke@435:     _counters_max[i] = -1;
duke@435:   }
duke@435: 
duke@435: }
duke@435: 
duke@435: // add the method-local numbers to the total sum
duke@435: void LinearScanStatistic::sum_up(LinearScanStatistic &method_statistic) {
duke@435:   for (int i = 0; i < number_of_counters; i++) {
duke@435:     _counters_sum[i] += method_statistic._counters_sum[i];
duke@435:     _counters_max[i] = MAX2(_counters_max[i], method_statistic._counters_sum[i]);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScanStatistic::print(const char* title) {
duke@435:   if (CountLinearScan || TraceLinearScanLevel > 0) {
duke@435:     tty->cr();
duke@435:     tty->print_cr("***** LinearScan statistic - %s *****", title);
duke@435: 
duke@435:     for (int i = 0; i < number_of_counters; i++) {
duke@435:       if (_counters_sum[i] > 0 || _counters_max[i] >= 0) {
duke@435:         tty->print("%25s: %8d", counter_name(i), _counters_sum[i]);
duke@435: 
duke@435:         if (base_counter(i) != invalid_counter) {
duke@435:           tty->print("  (%5.1f%%) ", _counters_sum[i] * 100.0 / _counters_sum[base_counter(i)]);
duke@435:         } else {
duke@435:           tty->print("           ");
duke@435:         }
duke@435: 
duke@435:         if (_counters_max[i] >= 0) {
duke@435:           tty->print("%8d", _counters_max[i]);
duke@435:         }
duke@435:       }
duke@435:       tty->cr();
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScanStatistic::collect(LinearScan* allocator) {
duke@435:   inc_counter(counter_method);
duke@435:   if (allocator->has_fpu_registers()) {
duke@435:     inc_counter(counter_fpu_method);
duke@435:   }
duke@435:   if (allocator->num_loops() > 0) {
duke@435:     inc_counter(counter_loop_method);
duke@435:   }
duke@435:   inc_counter(counter_loop, allocator->num_loops());
duke@435:   inc_counter(counter_spill_slots, allocator->max_spills());
duke@435: 
duke@435:   int i;
duke@435:   for (i = 0; i < allocator->interval_count(); i++) {
duke@435:     Interval* cur = allocator->interval_at(i);
duke@435: 
duke@435:     if (cur != NULL) {
duke@435:       inc_counter(counter_interval);
duke@435:       inc_counter(counter_use_pos, cur->num_use_positions());
duke@435:       if (LinearScan::is_precolored_interval(cur)) {
duke@435:         inc_counter(counter_fixed_interval);
duke@435:         inc_counter(counter_fixed_use_pos, cur->num_use_positions());
duke@435:       }
duke@435: 
duke@435:       Range* range = cur->first();
duke@435:       while (range != Range::end()) {
duke@435:         inc_counter(counter_range);
duke@435:         if (LinearScan::is_precolored_interval(cur)) {
duke@435:           inc_counter(counter_fixed_range);
duke@435:         }
duke@435:         range = range->next();
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   bool has_xhandlers = false;
duke@435:   // Note: only count blocks that are in code-emit order
duke@435:   for (i = 0; i < allocator->ir()->code()->length(); i++) {
duke@435:     BlockBegin* cur = allocator->ir()->code()->at(i);
duke@435: 
duke@435:     inc_counter(counter_block);
duke@435:     if (cur->loop_depth() > 0) {
duke@435:       inc_counter(counter_loop_block);
duke@435:     }
duke@435:     if (cur->is_set(BlockBegin::exception_entry_flag)) {
duke@435:       inc_counter(counter_exception_block);
duke@435:       has_xhandlers = true;
duke@435:     }
duke@435: 
duke@435:     LIR_OpList* instructions = cur->lir()->instructions_list();
duke@435:     for (int j = 0; j < instructions->length(); j++) {
duke@435:       LIR_Op* op = instructions->at(j);
duke@435: 
duke@435:       inc_counter(counter_instruction);
duke@435: 
duke@435:       switch (op->code()) {
duke@435:         case lir_label:           inc_counter(counter_label); break;
duke@435:         case lir_std_entry:
duke@435:         case lir_osr_entry:       inc_counter(counter_entry); break;
duke@435:         case lir_return:          inc_counter(counter_return); break;
duke@435: 
duke@435:         case lir_rtcall:
duke@435:         case lir_static_call:
duke@435:         case lir_optvirtual_call:
duke@435:         case lir_virtual_call:    inc_counter(counter_call); break;
duke@435: 
duke@435:         case lir_move: {
duke@435:           inc_counter(counter_move);
duke@435:           inc_counter(counter_move_total);
duke@435: 
duke@435:           LIR_Opr in = op->as_Op1()->in_opr();
duke@435:           LIR_Opr res = op->as_Op1()->result_opr();
duke@435:           if (in->is_register()) {
duke@435:             if (res->is_register()) {
duke@435:               inc_counter(counter_move_reg_reg);
duke@435:             } else if (res->is_stack()) {
duke@435:               inc_counter(counter_move_reg_stack);
duke@435:             } else if (res->is_address()) {
duke@435:               inc_counter(counter_move_reg_mem);
duke@435:             } else {
duke@435:               ShouldNotReachHere();
duke@435:             }
duke@435:           } else if (in->is_stack()) {
duke@435:             if (res->is_register()) {
duke@435:               inc_counter(counter_move_stack_reg);
duke@435:             } else {
duke@435:               inc_counter(counter_move_stack_stack);
duke@435:             }
duke@435:           } else if (in->is_address()) {
duke@435:             assert(res->is_register(), "must be");
duke@435:             inc_counter(counter_move_mem_reg);
duke@435:           } else if (in->is_constant()) {
duke@435:             inc_counter(counter_move_const_any);
duke@435:           } else {
duke@435:             ShouldNotReachHere();
duke@435:           }
duke@435:           break;
duke@435:         }
duke@435: 
duke@435:         case lir_cmp:             inc_counter(counter_cmp); break;
duke@435: 
duke@435:         case lir_branch:
duke@435:         case lir_cond_float_branch: {
duke@435:           LIR_OpBranch* branch = op->as_OpBranch();
duke@435:           if (branch->block() == NULL) {
duke@435:             inc_counter(counter_stub_branch);
duke@435:           } else if (branch->cond() == lir_cond_always) {
duke@435:             inc_counter(counter_uncond_branch);
duke@435:           } else {
duke@435:             inc_counter(counter_cond_branch);
duke@435:           }
duke@435:           break;
duke@435:         }
duke@435: 
duke@435:         case lir_neg:
duke@435:         case lir_add:
duke@435:         case lir_sub:
duke@435:         case lir_mul:
duke@435:         case lir_mul_strictfp:
duke@435:         case lir_div:
duke@435:         case lir_div_strictfp:
duke@435:         case lir_rem:
duke@435:         case lir_sqrt:
duke@435:         case lir_sin:
duke@435:         case lir_cos:
duke@435:         case lir_abs:
duke@435:         case lir_log10:
duke@435:         case lir_log:
roland@3787:         case lir_pow:
roland@3787:         case lir_exp:
duke@435:         case lir_logic_and:
duke@435:         case lir_logic_or:
duke@435:         case lir_logic_xor:
duke@435:         case lir_shl:
duke@435:         case lir_shr:
duke@435:         case lir_ushr:            inc_counter(counter_alu); break;
duke@435: 
duke@435:         case lir_alloc_object:
duke@435:         case lir_alloc_array:     inc_counter(counter_alloc); break;
duke@435: 
duke@435:         case lir_monaddr:
duke@435:         case lir_lock:
duke@435:         case lir_unlock:          inc_counter(counter_sync); break;
duke@435: 
duke@435:         case lir_throw:           inc_counter(counter_throw); break;
duke@435: 
duke@435:         case lir_unwind:          inc_counter(counter_unwind); break;
duke@435: 
duke@435:         case lir_null_check:
duke@435:         case lir_leal:
duke@435:         case lir_instanceof:
duke@435:         case lir_checkcast:
duke@435:         case lir_store_check:     inc_counter(counter_typecheck); break;
duke@435: 
duke@435:         case lir_fpop_raw:
duke@435:         case lir_fxch:
duke@435:         case lir_fld:             inc_counter(counter_fpu_stack); break;
duke@435: 
duke@435:         case lir_nop:
duke@435:         case lir_push:
duke@435:         case lir_pop:
duke@435:         case lir_convert:
duke@435:         case lir_roundfp:
duke@435:         case lir_cmove:           inc_counter(counter_misc_inst); break;
duke@435: 
duke@435:         default:                  inc_counter(counter_other_inst); break;
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   if (has_xhandlers) {
duke@435:     inc_counter(counter_exception_method);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScanStatistic::compute(LinearScan* allocator, LinearScanStatistic &global_statistic) {
duke@435:   if (CountLinearScan || TraceLinearScanLevel > 0) {
duke@435: 
duke@435:     LinearScanStatistic local_statistic = LinearScanStatistic();
duke@435: 
duke@435:     local_statistic.collect(allocator);
duke@435:     global_statistic.sum_up(local_statistic);
duke@435: 
duke@435:     if (TraceLinearScanLevel > 2) {
duke@435:       local_statistic.print("current local statistic");
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: // Implementation of LinearTimers
duke@435: 
duke@435: LinearScanTimers::LinearScanTimers() {
duke@435:   for (int i = 0; i < number_of_timers; i++) {
duke@435:     timer(i)->reset();
duke@435:   }
duke@435: }
duke@435: 
duke@435: const char* LinearScanTimers::timer_name(int idx) {
duke@435:   switch (idx) {
duke@435:     case timer_do_nothing:               return "Nothing (Time Check)";
duke@435:     case timer_number_instructions:      return "Number Instructions";
duke@435:     case timer_compute_local_live_sets:  return "Local Live Sets";
duke@435:     case timer_compute_global_live_sets: return "Global Live Sets";
duke@435:     case timer_build_intervals:          return "Build Intervals";
duke@435:     case timer_sort_intervals_before:    return "Sort Intervals Before";
duke@435:     case timer_allocate_registers:       return "Allocate Registers";
duke@435:     case timer_resolve_data_flow:        return "Resolve Data Flow";
duke@435:     case timer_sort_intervals_after:     return "Sort Intervals After";
duke@435:     case timer_eliminate_spill_moves:    return "Spill optimization";
duke@435:     case timer_assign_reg_num:           return "Assign Reg Num";
duke@435:     case timer_allocate_fpu_stack:       return "Allocate FPU Stack";
duke@435:     case timer_optimize_lir:             return "Optimize LIR";
duke@435:     default: ShouldNotReachHere();       return "";
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScanTimers::begin_method() {
duke@435:   if (TimeEachLinearScan) {
duke@435:     // reset all timers to measure only current method
duke@435:     for (int i = 0; i < number_of_timers; i++) {
duke@435:       timer(i)->reset();
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScanTimers::end_method(LinearScan* allocator) {
duke@435:   if (TimeEachLinearScan) {
duke@435: 
duke@435:     double c = timer(timer_do_nothing)->seconds();
duke@435:     double total = 0;
duke@435:     for (int i = 1; i < number_of_timers; i++) {
duke@435:       total += timer(i)->seconds() - c;
duke@435:     }
duke@435: 
duke@435:     if (total >= 0.0005) {
duke@435:       // print all information in one line for automatic processing
duke@435:       tty->print("@"); allocator->compilation()->method()->print_name();
duke@435: 
duke@435:       tty->print("@ %d ", allocator->compilation()->method()->code_size());
duke@435:       tty->print("@ %d ", allocator->block_at(allocator->block_count() - 1)->last_lir_instruction_id() / 2);
duke@435:       tty->print("@ %d ", allocator->block_count());
duke@435:       tty->print("@ %d ", allocator->num_virtual_regs());
duke@435:       tty->print("@ %d ", allocator->interval_count());
duke@435:       tty->print("@ %d ", allocator->_num_calls);
duke@435:       tty->print("@ %d ", allocator->num_loops());
duke@435: 
duke@435:       tty->print("@ %6.6f ", total);
duke@435:       for (int i = 1; i < number_of_timers; i++) {
duke@435:         tty->print("@ %4.1f ", ((timer(i)->seconds() - c) / total) * 100);
duke@435:       }
duke@435:       tty->cr();
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LinearScanTimers::print(double total_time) {
duke@435:   if (TimeLinearScan) {
duke@435:     // correction value: sum of dummy-timer that only measures the time that
duke@435:     // is necesary to start and stop itself
duke@435:     double c = timer(timer_do_nothing)->seconds();
duke@435: 
duke@435:     for (int i = 0; i < number_of_timers; i++) {
duke@435:       double t = timer(i)->seconds();
duke@435:       tty->print_cr("    %25s: %6.3f s (%4.1f%%)  corrected: %6.3f s (%4.1f%%)", timer_name(i), t, (t / total_time) * 100.0, t - c, (t - c) / (total_time - 2 * number_of_timers * c) * 100);
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: #endif // #ifndef PRODUCT