duke@435: /*
stefank@2314:  * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
duke@435:  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435:  *
duke@435:  * This code is free software; you can redistribute it and/or modify it
duke@435:  * under the terms of the GNU General Public License version 2 only, as
duke@435:  * published by the Free Software Foundation.
duke@435:  *
duke@435:  * This code is distributed in the hope that it will be useful, but WITHOUT
duke@435:  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435:  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
duke@435:  * version 2 for more details (a copy is included in the LICENSE file that
duke@435:  * accompanied this code).
duke@435:  *
duke@435:  * You should have received a copy of the GNU General Public License version
duke@435:  * 2 along with this work; if not, write to the Free Software Foundation,
duke@435:  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435:  *
trims@1907:  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907:  * or visit www.oracle.com if you need additional information or have any
trims@1907:  * questions.
duke@435:  *
duke@435:  */
duke@435: 
stefank@2314: #ifndef CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP
stefank@2314: #define CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP
stefank@2314: 
stefank@2314: #include "asm/assembler.inline.hpp"
stefank@2314: #include "asm/codeBuffer.hpp"
stefank@2314: #include "code/codeCache.hpp"
stefank@2314: #include "runtime/handles.inline.hpp"
stefank@2314: 
duke@435: inline void MacroAssembler::pd_patch_instruction(address branch, address target) {
duke@435:   unsigned char op = branch[0];
duke@435:   assert(op == 0xE8 /* call */ ||
duke@435:          op == 0xE9 /* jmp */ ||
duke@435:          op == 0xEB /* short jmp */ ||
duke@435:          (op & 0xF0) == 0x70 /* short jcc */ ||
duke@435:          op == 0x0F && (branch[1] & 0xF0) == 0x80 /* jcc */,
duke@435:          "Invalid opcode at patch point");
duke@435: 
duke@435:   if (op == 0xEB || (op & 0xF0) == 0x70) {
duke@435:     // short offset operators (jmp and jcc)
duke@435:     char* disp = (char*) &branch[1];
duke@435:     int imm8 = target - (address) &disp[1];
duke@435:     guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset");
duke@435:     *disp = imm8;
duke@435:   } else {
duke@435:     int* disp = (int*) &branch[(op == 0x0F)? 2: 1];
duke@435:     int imm32 = target - (address) &disp[1];
duke@435:     *disp = imm32;
duke@435:   }
duke@435: }
duke@435: 
duke@435: #ifndef PRODUCT
duke@435: inline void MacroAssembler::pd_print_patched_instruction(address branch) {
duke@435:   const char* s;
duke@435:   unsigned char op = branch[0];
duke@435:   if (op == 0xE8) {
duke@435:     s = "call";
duke@435:   } else if (op == 0xE9 || op == 0xEB) {
duke@435:     s = "jmp";
duke@435:   } else if ((op & 0xF0) == 0x70) {
duke@435:     s = "jcc";
duke@435:   } else if (op == 0x0F) {
duke@435:     s = "jcc";
duke@435:   } else {
duke@435:     s = "????";
duke@435:   }
duke@435:   tty->print("%s (unresolved)", s);
duke@435: }
duke@435: #endif // ndef PRODUCT
never@739: 
never@739: #ifndef _LP64
never@739: inline int Assembler::prefix_and_encode(int reg_enc, bool byteinst) { return reg_enc; }
never@739: inline int Assembler::prefixq_and_encode(int reg_enc) { return reg_enc; }
never@739: 
never@739: inline int Assembler::prefix_and_encode(int dst_enc, int src_enc, bool byteinst) { return dst_enc << 3 | src_enc; }
never@739: inline int Assembler::prefixq_and_encode(int dst_enc, int src_enc) { return dst_enc << 3 | src_enc; }
never@739: 
never@739: inline void Assembler::prefix(Register reg) {}
never@739: inline void Assembler::prefix(Address adr) {}
never@739: inline void Assembler::prefixq(Address adr) {}
never@739: 
never@739: inline void Assembler::prefix(Address adr, Register reg,  bool byteinst) {}
never@739: inline void Assembler::prefixq(Address adr, Register reg) {}
never@739: 
never@739: inline void Assembler::prefix(Address adr, XMMRegister reg) {}
kvn@3388: inline void Assembler::prefixq(Address adr, XMMRegister reg) {}
never@739: #else
never@739: inline void Assembler::emit_long64(jlong x) {
never@739:   *(jlong*) _code_pos = x;
never@739:   _code_pos += sizeof(jlong);
never@739:   code_section()->set_end(_code_pos);
never@739: }
never@739: #endif // _LP64
stefank@2314: 
stefank@2314: #endif // CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP