aoqi@1: /*
aoqi@1:  * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved.
aoqi@1:  * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.
aoqi@1:  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aoqi@1:  *
aoqi@1:  * This code is free software; you can redistribute it and/or modify it
aoqi@1:  * under the terms of the GNU General Public License version 2 only, as
aoqi@1:  * published by the Free Software Foundation.
aoqi@1:  *
aoqi@1:  * This code is distributed in the hope that it will be useful, but WITHOUT
aoqi@1:  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aoqi@1:  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
aoqi@1:  * version 2 for more details (a copy is included in the LICENSE file that
aoqi@1:  * accompanied this code).
aoqi@1:  *
aoqi@1:  * You should have received a copy of the GNU General Public License version
aoqi@1:  * 2 along with this work; if not, write to the Free Software Foundation,
aoqi@1:  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aoqi@1:  *
aoqi@1:  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aoqi@1:  * or visit www.oracle.com if you need additional information or have any
aoqi@1:  * questions.
aoqi@1:  *
aoqi@1:  */
aoqi@1: 
aoqi@1: #ifndef CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP
aoqi@1: #define CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP
aoqi@1: 
aoqi@1: inline VMReg RegisterImpl::as_VMReg() {
aoqi@1:   if( this==noreg ) return VMRegImpl::Bad();
aoqi@1: #ifdef _LP64
aoqi@1:   //FIXME why encoding << 1? what is the meaning of the VMReg's value
aoqi@1:   return VMRegImpl::as_VMReg(encoding() << 1 );
aoqi@1: #else
aoqi@1:   return VMRegImpl::as_VMReg(encoding() );
aoqi@1: #endif // _LP64
aoqi@1: }
aoqi@1: 
aoqi@1: inline VMReg FloatRegisterImpl::as_VMReg() {
aoqi@1: #ifdef _LP64
aoqi@1:   return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr);
aoqi@1: #else
aoqi@1:   return VMRegImpl::as_VMReg((encoding()) + ConcreteRegisterImpl::max_gpr);
aoqi@1: #endif // _LP64
aoqi@1: }
aoqi@1: 
aoqi@1: inline bool VMRegImpl::is_Register() {
aoqi@1:   return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr;
aoqi@1: }
aoqi@1: 
aoqi@1: inline bool VMRegImpl::is_FloatRegister() {
aoqi@1:   return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr;
aoqi@1: }
aoqi@1: 
aoqi@1: inline Register VMRegImpl::as_Register() {
aoqi@1: 
aoqi@1:   assert( is_Register(), "must be");
aoqi@1:   // Yuk
aoqi@1: #ifdef _LP64
aoqi@1:   return ::as_Register(value() >> 1);
aoqi@1: #else
aoqi@1:   return ::as_Register(value());
aoqi@1: #endif // _LP64
aoqi@1: }
aoqi@1: 
aoqi@1: inline FloatRegister VMRegImpl::as_FloatRegister() {
aoqi@1:   assert( is_FloatRegister(), "must be" );
aoqi@1:   // Yuk
aoqi@1: #ifdef _LP64
aoqi@1:   assert( is_even(value()), "must be" );
aoqi@1:   return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1);
aoqi@1: #else
aoqi@1:   return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr));
aoqi@1: #endif // _LP64
aoqi@1: }
aoqi@1: 
aoqi@1: inline   bool VMRegImpl::is_concrete() {
aoqi@1:   assert(is_reg(), "must be");
aoqi@1:   if(is_Register()) return true;
aoqi@1:   if(is_FloatRegister()) return true;
aoqi@1:   assert(false, "what register?");
aoqi@1:   return false;
aoqi@1: }
aoqi@1: 
aoqi@1: #endif // CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP
aoqi@1: