aoqi@1: /* aoqi@1: * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. aoqi@1: * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. aoqi@1: * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. aoqi@1: * aoqi@1: * This code is free software; you can redistribute it and/or modify it aoqi@1: * under the terms of the GNU General Public License version 2 only, as aoqi@1: * published by the Free Software Foundation. aoqi@1: * aoqi@1: * This code is distributed in the hope that it will be useful, but WITHOUT aoqi@1: * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or aoqi@1: * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License aoqi@1: * version 2 for more details (a copy is included in the LICENSE file that aoqi@1: * accompanied this code). aoqi@1: * aoqi@1: * You should have received a copy of the GNU General Public License version aoqi@1: * 2 along with this work; if not, write to the Free Software Foundation, aoqi@1: * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. aoqi@1: * aoqi@1: * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA aoqi@1: * or visit www.oracle.com if you need additional information or have any aoqi@1: * questions. aoqi@1: * aoqi@1: */ aoqi@1: aoqi@1: #ifndef CPU_MIPS_VM_ASSEMBLER_MIPS_INLINE_HPP aoqi@1: #define CPU_MIPS_VM_ASSEMBLER_MIPS_INLINE_HPP aoqi@1: aoqi@1: #include "asm/assembler.inline.hpp" aoqi@1: #include "asm/codeBuffer.hpp" aoqi@1: #include "code/codeCache.hpp" aoqi@1: aoqi@1: /* aoqi@1: inline void MacroAssembler::pd_patch_instruction(address branch, address target) { aoqi@1: jint& stub_inst = *(jint*) branch; aoqi@1: stub_inst = patched_branch(target - branch, stub_inst, 0); aoqi@1: } aoqi@1: */ aoqi@1: aoqi@1: #ifndef PRODUCT aoqi@1: /* aoqi@1: inline void MacroAssembler::pd_print_patched_instruction(address branch) { aoqi@1: jint stub_inst = *(jint*) branch; aoqi@1: print_instruction(stub_inst); aoqi@1: ::tty->print("%s", " (unresolved)"); aoqi@1: } aoqi@1: */ aoqi@1: #endif // PRODUCT aoqi@1: aoqi@1: //inline bool Address::is_simm13(int offset) { return Assembler::is_simm13(disp() + offset); } aoqi@1: aoqi@1: aoqi@1: inline void Assembler::check_delay() { aoqi@1: # ifdef CHECK_DELAY aoqi@1: // guarantee( delay_state != at_delay_slot, "must say delayed() when filling delay slot"); aoqi@1: delay_state = no_delay; aoqi@1: # endif aoqi@1: } aoqi@1: aoqi@1: inline void Assembler::emit_long(int x) { aoqi@1: check_delay(); aoqi@28: AbstractAssembler::emit_int32(x); aoqi@1: } aoqi@1: aoqi@1: inline void Assembler::emit_data(int x, relocInfo::relocType rtype) { aoqi@1: relocate(rtype); aoqi@1: emit_long(x); aoqi@1: } aoqi@1: aoqi@1: inline void Assembler::emit_data(int x, RelocationHolder const& rspec) { aoqi@1: relocate(rspec); aoqi@1: emit_long(x); aoqi@1: } aoqi@1: /* aoqi@1: inline void MacroAssembler::store_int_argument(Register s, Argument &a) { aoqi@1: if(a.is_Register()) { aoqi@1: move(a.as_Register(), s); aoqi@1: } else { aoqi@1: sw(s, a.as_caller_address()); aoqi@1: } aoqi@1: } aoqi@1: aoqi@1: inline void MacroAssembler::store_long_argument(Register s, Argument &a) { aoqi@1: Argument a1 = a.successor(); aoqi@1: if(a.is_Register() && a1.is_Register()) { aoqi@1: move(a.as_Register(), s); aoqi@1: move(a.as_Register(), s); aoqi@1: } else { aoqi@1: sd(s, a.as_caller_address()); aoqi@1: } aoqi@1: } aoqi@1: aoqi@1: inline void MacroAssembler::store_float_argument(FloatRegister s, Argument &a) { aoqi@1: if(a.is_Register()) { aoqi@1: mov_s(a.as_FloatRegister(), s); aoqi@1: } else { aoqi@1: swc1(s, a.as_caller_address()); aoqi@1: } aoqi@1: } aoqi@1: aoqi@1: inline void MacroAssembler::store_double_argument(FloatRegister s, Argument &a) { aoqi@1: if(a.is_Register()) { aoqi@1: mov_d(a.as_FloatRegister(), s); aoqi@1: } else { aoqi@1: sdc1(s, a.as_caller_address()); aoqi@1: } aoqi@1: } aoqi@1: aoqi@1: inline void MacroAssembler::store_ptr_argument(Register s, Argument &a) { aoqi@1: if(a.is_Register()) { aoqi@1: move(a.as_Register(), s); aoqi@1: } else { aoqi@1: st_ptr(s, a.as_caller_address()); aoqi@1: } aoqi@1: } aoqi@1: inline void MacroAssembler::ld_ptr(Register rt, Register base, int offset16) { aoqi@1: #ifdef _LP64 aoqi@1: ld(rt, base, offset16); aoqi@1: #else aoqi@1: lw(rt, base, offset16); aoqi@1: #endif aoqi@1: } aoqi@1: inline void MacroAssembler::ld_ptr(Register rt, Address a) { aoqi@1: #ifdef _LP64 aoqi@1: ld(rt, a.base(), a.disp()); aoqi@1: #else aoqi@1: lw(rt, a.base(), a.disp()); aoqi@1: #endif aoqi@1: } aoqi@1: aoqi@1: inline void MacroAssembler::st_ptr(Register rt, Address a) { aoqi@1: #ifdef _LP64 aoqi@1: sd(rt, a.base(), a.disp()); aoqi@1: #else aoqi@1: sw(rt, a.base(), a.disp()); aoqi@1: #endif aoqi@1: } aoqi@1: aoqi@1: inline void MacroAssembler::st_ptr(Register rt, Register base, int offset16) { aoqi@1: #ifdef _LP64 aoqi@1: sd(rt, base, offset16); aoqi@1: #else aoqi@1: sw(rt, base, offset16); aoqi@1: #endif aoqi@1: } aoqi@1: aoqi@1: inline void MacroAssembler::ld_long(Register rt, Register base, int offset16) { aoqi@1: #ifdef _LP64 aoqi@1: ld(rt, base, offset16); aoqi@1: #else aoqi@1: lw(rt, base, offset16); aoqi@1: #endif aoqi@1: } aoqi@1: aoqi@1: inline void MacroAssembler::st_long(Register rt, Register base, int offset16) { aoqi@1: #ifdef _LP64 aoqi@1: sd(rt, base, offset16); aoqi@1: #else aoqi@1: sw(rt, base, offset16); aoqi@1: #endif aoqi@1: } aoqi@1: aoqi@1: inline void MacroAssembler::ld_long(Register rt, Address a) { aoqi@1: #ifdef _LP64 aoqi@1: ld(rt, a.base(), a.disp()); aoqi@1: #else aoqi@1: lw(rt, a.base(), a.disp()); aoqi@1: #endif aoqi@1: } aoqi@1: aoqi@1: inline void MacroAssembler::st_long(Register rt, Address a) { aoqi@1: #ifdef _LP64 aoqi@1: sd(rt, a.base(), a.disp()); aoqi@1: #else aoqi@1: sw(rt, a.base(), a.disp()); aoqi@1: #endif aoqi@1: } aoqi@1: aoqi@1: inline void MacroAssembler::addu_long(Register rd, Register rs, Register rt) { aoqi@1: #ifdef _LP64 aoqi@1: daddu(rd, rs, rt); aoqi@1: #else aoqi@1: addu(rd, rs, rt); aoqi@1: #endif aoqi@1: } aoqi@1: aoqi@1: inline void MacroAssembler::addu_long(Register rd, Register rs, long imm32_64) { aoqi@1: #ifdef _LP64 aoqi@1: daddiu(rd, rs, imm32_64); aoqi@1: #else aoqi@1: addiu(rd, rs, imm32_64); aoqi@1: #endif aoqi@1: } */ aoqi@1: aoqi@1: #endif // CPU_MIPS_VM_ASSEMBLER_MIPS_INLINE_HPP aoqi@1: