duke@435: /*
duke@435:  * Copyright 2003-2007 Sun Microsystems, Inc.  All Rights Reserved.
duke@435:  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435:  *
duke@435:  * This code is free software; you can redistribute it and/or modify it
duke@435:  * under the terms of the GNU General Public License version 2 only, as
duke@435:  * published by the Free Software Foundation.
duke@435:  *
duke@435:  * This code is distributed in the hope that it will be useful, but WITHOUT
duke@435:  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435:  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
duke@435:  * version 2 for more details (a copy is included in the LICENSE file that
duke@435:  * accompanied this code).
duke@435:  *
duke@435:  * You should have received a copy of the GNU General Public License version
duke@435:  * 2 along with this work; if not, write to the Free Software Foundation,
duke@435:  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435:  *
duke@435:  * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
duke@435:  * CA 95054 USA or visit www.sun.com if you need additional information or
duke@435:  * have any questions.
duke@435:  *
duke@435:  */
duke@435: 
duke@435: #include "incls/_precompiled.incl"
duke@435: #include "incls/_assembler_x86_64.cpp.incl"
duke@435: 
duke@435: // Implementation of AddressLiteral
duke@435: 
duke@435: AddressLiteral::AddressLiteral(address target, relocInfo::relocType rtype) {
duke@435:   _is_lval = false;
duke@435:   _target = target;
duke@435:   switch (rtype) {
duke@435:   case relocInfo::oop_type:
duke@435:     // Oops are a special case. Normally they would be their own section
duke@435:     // but in cases like icBuffer they are literals in the code stream that
duke@435:     // we don't have a section for. We use none so that we get a literal address
duke@435:     // which is always patchable.
duke@435:     break;
duke@435:   case relocInfo::external_word_type:
duke@435:     _rspec = external_word_Relocation::spec(target);
duke@435:     break;
duke@435:   case relocInfo::internal_word_type:
duke@435:     _rspec = internal_word_Relocation::spec(target);
duke@435:     break;
duke@435:   case relocInfo::opt_virtual_call_type:
duke@435:     _rspec = opt_virtual_call_Relocation::spec();
duke@435:     break;
duke@435:   case relocInfo::static_call_type:
duke@435:     _rspec = static_call_Relocation::spec();
duke@435:     break;
duke@435:   case relocInfo::runtime_call_type:
duke@435:     _rspec = runtime_call_Relocation::spec();
duke@435:     break;
duke@435:   case relocInfo::none:
duke@435:     break;
duke@435:   default:
duke@435:     ShouldNotReachHere();
duke@435:     break;
duke@435:   }
duke@435: }
duke@435: 
duke@435: // Implementation of Address
duke@435: 
duke@435: Address Address::make_array(ArrayAddress adr) {
duke@435: #ifdef _LP64
duke@435:   // Not implementable on 64bit machines
duke@435:   // Should have been handled higher up the call chain.
duke@435:   ShouldNotReachHere();
duke@435:   return Address();
duke@435: #else
duke@435:   AddressLiteral base = adr.base();
duke@435:   Address index = adr.index();
duke@435:   assert(index._disp == 0, "must not have disp"); // maybe it can?
duke@435:   Address array(index._base, index._index, index._scale, (intptr_t) base.target());
duke@435:   array._rspec = base._rspec;
duke@435:   return array;
duke@435: #endif // _LP64
duke@435: }
duke@435: 
duke@435: // exceedingly dangerous constructor
duke@435: Address::Address(int disp, address loc, relocInfo::relocType rtype) {
duke@435:   _base  = noreg;
duke@435:   _index = noreg;
duke@435:   _scale = no_scale;
duke@435:   _disp  = disp;
duke@435:   switch (rtype) {
duke@435:     case relocInfo::external_word_type:
duke@435:       _rspec = external_word_Relocation::spec(loc);
duke@435:       break;
duke@435:     case relocInfo::internal_word_type:
duke@435:       _rspec = internal_word_Relocation::spec(loc);
duke@435:       break;
duke@435:     case relocInfo::runtime_call_type:
duke@435:       // HMM
duke@435:       _rspec = runtime_call_Relocation::spec();
duke@435:       break;
duke@435:     case relocInfo::none:
duke@435:       break;
duke@435:     default:
duke@435:       ShouldNotReachHere();
duke@435:   }
duke@435: }
duke@435: 
duke@435: // Convert the raw encoding form into the form expected by the constructor for
duke@435: // Address.  An index of 4 (rsp) corresponds to having no index, so convert
duke@435: // that to noreg for the Address constructor.
duke@435: Address Address::make_raw(int base, int index, int scale, int disp) {
duke@435:   bool valid_index = index != rsp->encoding();
duke@435:   if (valid_index) {
duke@435:     Address madr(as_Register(base), as_Register(index), (Address::ScaleFactor)scale, in_ByteSize(disp));
duke@435:     return madr;
duke@435:   } else {
duke@435:     Address madr(as_Register(base), noreg, Address::no_scale, in_ByteSize(disp));
duke@435:     return madr;
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: // Implementation of Assembler
duke@435: int AbstractAssembler::code_fill_byte() {
duke@435:   return (u_char)'\xF4'; // hlt
duke@435: }
duke@435: 
duke@435: // This should only be used by 64bit instructions that can use rip-relative
duke@435: // it cannot be used by instructions that want an immediate value.
duke@435: 
duke@435: bool Assembler::reachable(AddressLiteral adr) {
duke@435:   int64_t disp;
duke@435:   // None will force a 64bit literal to the code stream. Likely a placeholder
duke@435:   // for something that will be patched later and we need to certain it will
duke@435:   // always be reachable.
duke@435:   if (adr.reloc() == relocInfo::none) {
duke@435:     return false;
duke@435:   }
duke@435:   if (adr.reloc() == relocInfo::internal_word_type) {
duke@435:     // This should be rip relative and easily reachable.
duke@435:     return true;
duke@435:   }
duke@435:   if (adr.reloc() != relocInfo::external_word_type &&
duke@435:       adr.reloc() != relocInfo::runtime_call_type ) {
duke@435:     return false;
duke@435:   }
duke@435: 
duke@435:   // Stress the correction code
duke@435:   if (ForceUnreachable) {
duke@435:     // Must be runtimecall reloc, see if it is in the codecache
duke@435:     // Flipping stuff in the codecache to be unreachable causes issues
duke@435:     // with things like inline caches where the additional instructions
duke@435:     // are not handled.
duke@435:     if (CodeCache::find_blob(adr._target) == NULL) {
duke@435:       return false;
duke@435:     }
duke@435:   }
duke@435:   // For external_word_type/runtime_call_type if it is reachable from where we
duke@435:   // are now (possibly a temp buffer) and where we might end up
duke@435:   // anywhere in the codeCache then we are always reachable.
duke@435:   // This would have to change if we ever save/restore shared code
duke@435:   // to be more pessimistic.
duke@435: 
duke@435:   disp = (int64_t)adr._target - ((int64_t)CodeCache::low_bound() + sizeof(int));
duke@435:   if (!is_simm32(disp)) return false;
duke@435:   disp = (int64_t)adr._target - ((int64_t)CodeCache::high_bound() + sizeof(int));
duke@435:   if (!is_simm32(disp)) return false;
duke@435: 
duke@435:   disp = (int64_t)adr._target - ((int64_t)_code_pos + sizeof(int));
duke@435: 
duke@435:   // Because rip relative is a disp + address_of_next_instruction and we
duke@435:   // don't know the value of address_of_next_instruction we apply a fudge factor
duke@435:   // to make sure we will be ok no matter the size of the instruction we get placed into.
duke@435:   // We don't have to fudge the checks above here because they are already worst case.
duke@435: 
duke@435:   // 12 == override/rex byte, opcode byte, rm byte, sib byte, a 4-byte disp , 4-byte literal
duke@435:   // + 4 because better safe than sorry.
duke@435:   const int fudge = 12 + 4;
duke@435:   if (disp < 0) {
duke@435:     disp -= fudge;
duke@435:   } else {
duke@435:     disp += fudge;
duke@435:   }
duke@435:   return is_simm32(disp);
duke@435: }
duke@435: 
duke@435: 
duke@435: // make this go away eventually
duke@435: void Assembler::emit_data(jint data,
duke@435:                           relocInfo::relocType rtype,
duke@435:                           int format) {
duke@435:   if (rtype == relocInfo::none) {
duke@435:     emit_long(data);
duke@435:   } else {
duke@435:     emit_data(data, Relocation::spec_simple(rtype), format);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::emit_data(jint data,
duke@435:                           RelocationHolder const& rspec,
duke@435:                           int format) {
duke@435:   assert(imm64_operand == 0, "default format must be imm64 in this file");
duke@435:   assert(imm64_operand != format, "must not be imm64");
duke@435:   assert(inst_mark() != NULL, "must be inside InstructionMark");
duke@435:   if (rspec.type() !=  relocInfo::none) {
duke@435:     #ifdef ASSERT
duke@435:       check_relocation(rspec, format);
duke@435:     #endif
duke@435:     // Do not use AbstractAssembler::relocate, which is not intended for
duke@435:     // embedded words.  Instead, relocate to the enclosing instruction.
duke@435: 
duke@435:     // hack. call32 is too wide for mask so use disp32
duke@435:     if (format == call32_operand)
duke@435:       code_section()->relocate(inst_mark(), rspec, disp32_operand);
duke@435:     else
duke@435:       code_section()->relocate(inst_mark(), rspec, format);
duke@435:   }
duke@435:   emit_long(data);
duke@435: }
duke@435: 
duke@435: void Assembler::emit_data64(jlong data,
duke@435:                             relocInfo::relocType rtype,
duke@435:                             int format) {
duke@435:   if (rtype == relocInfo::none) {
duke@435:     emit_long64(data);
duke@435:   } else {
duke@435:     emit_data64(data, Relocation::spec_simple(rtype), format);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::emit_data64(jlong data,
duke@435:                             RelocationHolder const& rspec,
duke@435:                             int format) {
duke@435:   assert(imm64_operand == 0, "default format must be imm64 in this file");
duke@435:   assert(imm64_operand == format, "must be imm64");
duke@435:   assert(inst_mark() != NULL, "must be inside InstructionMark");
duke@435:   // Do not use AbstractAssembler::relocate, which is not intended for
duke@435:   // embedded words.  Instead, relocate to the enclosing instruction.
duke@435:   code_section()->relocate(inst_mark(), rspec, format);
duke@435: #ifdef ASSERT
duke@435:   check_relocation(rspec, format);
duke@435: #endif
duke@435:   emit_long64(data);
duke@435: }
duke@435: 
duke@435: void Assembler::emit_arith_b(int op1, int op2, Register dst, int imm8) {
duke@435:   assert(isByte(op1) && isByte(op2), "wrong opcode");
duke@435:   assert(isByte(imm8), "not a byte");
duke@435:   assert((op1 & 0x01) == 0, "should be 8bit operation");
duke@435:   int dstenc = dst->encoding();
duke@435:   if (dstenc >= 8) {
duke@435:     dstenc -= 8;
duke@435:   }
duke@435:   emit_byte(op1);
duke@435:   emit_byte(op2 | dstenc);
duke@435:   emit_byte(imm8);
duke@435: }
duke@435: 
duke@435: void Assembler::emit_arith(int op1, int op2, Register dst, int imm32) {
duke@435:   assert(isByte(op1) && isByte(op2), "wrong opcode");
duke@435:   assert((op1 & 0x01) == 1, "should be 32bit operation");
duke@435:   assert((op1 & 0x02) == 0, "sign-extension bit should not be set");
duke@435:   int dstenc = dst->encoding();
duke@435:   if (dstenc >= 8) {
duke@435:     dstenc -= 8;
duke@435:   }
duke@435:   if (is8bit(imm32)) {
duke@435:     emit_byte(op1 | 0x02); // set sign bit
duke@435:     emit_byte(op2 | dstenc);
duke@435:     emit_byte(imm32 & 0xFF);
duke@435:   } else {
duke@435:     emit_byte(op1);
duke@435:     emit_byte(op2 | dstenc);
duke@435:     emit_long(imm32);
duke@435:   }
duke@435: }
duke@435: 
duke@435: // immediate-to-memory forms
duke@435: void Assembler::emit_arith_operand(int op1,
duke@435:                                    Register rm, Address adr,
duke@435:                                    int imm32) {
duke@435:   assert((op1 & 0x01) == 1, "should be 32bit operation");
duke@435:   assert((op1 & 0x02) == 0, "sign-extension bit should not be set");
duke@435:   if (is8bit(imm32)) {
duke@435:     emit_byte(op1 | 0x02); // set sign bit
duke@435:     emit_operand(rm, adr, 1);
duke@435:     emit_byte(imm32 & 0xFF);
duke@435:   } else {
duke@435:     emit_byte(op1);
duke@435:     emit_operand(rm, adr, 4);
duke@435:     emit_long(imm32);
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void Assembler::emit_arith(int op1, int op2, Register dst, Register src) {
duke@435:   assert(isByte(op1) && isByte(op2), "wrong opcode");
duke@435:   int dstenc = dst->encoding();
duke@435:   int srcenc = src->encoding();
duke@435:   if (dstenc >= 8) {
duke@435:     dstenc -= 8;
duke@435:   }
duke@435:   if (srcenc >= 8) {
duke@435:     srcenc -= 8;
duke@435:   }
duke@435:   emit_byte(op1);
duke@435:   emit_byte(op2 | dstenc << 3 | srcenc);
duke@435: }
duke@435: 
duke@435: void Assembler::emit_operand(Register reg, Register base, Register index,
duke@435:                              Address::ScaleFactor scale, int disp,
duke@435:                              RelocationHolder const& rspec,
duke@435:                              int rip_relative_correction) {
duke@435:   relocInfo::relocType rtype = (relocInfo::relocType) rspec.type();
duke@435:   int regenc = reg->encoding();
duke@435:   if (regenc >= 8) {
duke@435:     regenc -= 8;
duke@435:   }
duke@435:   if (base->is_valid()) {
duke@435:     if (index->is_valid()) {
duke@435:       assert(scale != Address::no_scale, "inconsistent address");
duke@435:       int indexenc = index->encoding();
duke@435:       if (indexenc >= 8) {
duke@435:         indexenc -= 8;
duke@435:       }
duke@435:       int baseenc = base->encoding();
duke@435:       if (baseenc >= 8) {
duke@435:         baseenc -= 8;
duke@435:       }
duke@435:       // [base + index*scale + disp]
duke@435:       if (disp == 0 && rtype == relocInfo::none  &&
duke@435:           base != rbp && base != r13) {
duke@435:         // [base + index*scale]
duke@435:         // [00 reg 100][ss index base]
duke@435:         assert(index != rsp, "illegal addressing mode");
duke@435:         emit_byte(0x04 | regenc << 3);
duke@435:         emit_byte(scale << 6 | indexenc << 3 | baseenc);
duke@435:       } else if (is8bit(disp) && rtype == relocInfo::none) {
duke@435:         // [base + index*scale + imm8]
duke@435:         // [01 reg 100][ss index base] imm8
duke@435:         assert(index != rsp, "illegal addressing mode");
duke@435:         emit_byte(0x44 | regenc << 3);
duke@435:         emit_byte(scale << 6 | indexenc << 3 | baseenc);
duke@435:         emit_byte(disp & 0xFF);
duke@435:       } else {
duke@435:         // [base + index*scale + disp32]
duke@435:         // [10 reg 100][ss index base] disp32
duke@435:         assert(index != rsp, "illegal addressing mode");
duke@435:         emit_byte(0x84 | regenc << 3);
duke@435:         emit_byte(scale << 6 | indexenc << 3 | baseenc);
duke@435:         emit_data(disp, rspec, disp32_operand);
duke@435:       }
duke@435:     } else if (base == rsp || base == r12) {
duke@435:       // [rsp + disp]
duke@435:       if (disp == 0 && rtype == relocInfo::none) {
duke@435:         // [rsp]
duke@435:         // [00 reg 100][00 100 100]
duke@435:         emit_byte(0x04 | regenc << 3);
duke@435:         emit_byte(0x24);
duke@435:       } else if (is8bit(disp) && rtype == relocInfo::none) {
duke@435:         // [rsp + imm8]
duke@435:         // [01 reg 100][00 100 100] disp8
duke@435:         emit_byte(0x44 | regenc << 3);
duke@435:         emit_byte(0x24);
duke@435:         emit_byte(disp & 0xFF);
duke@435:       } else {
duke@435:         // [rsp + imm32]
duke@435:         // [10 reg 100][00 100 100] disp32
duke@435:         emit_byte(0x84 | regenc << 3);
duke@435:         emit_byte(0x24);
duke@435:         emit_data(disp, rspec, disp32_operand);
duke@435:       }
duke@435:     } else {
duke@435:       // [base + disp]
duke@435:       assert(base != rsp && base != r12, "illegal addressing mode");
duke@435:       int baseenc = base->encoding();
duke@435:       if (baseenc >= 8) {
duke@435:         baseenc -= 8;
duke@435:       }
duke@435:       if (disp == 0 && rtype == relocInfo::none &&
duke@435:           base != rbp && base != r13) {
duke@435:         // [base]
duke@435:         // [00 reg base]
duke@435:         emit_byte(0x00 | regenc << 3 | baseenc);
duke@435:       } else if (is8bit(disp) && rtype == relocInfo::none) {
duke@435:         // [base + disp8]
duke@435:         // [01 reg base] disp8
duke@435:         emit_byte(0x40 | regenc << 3 | baseenc);
duke@435:         emit_byte(disp & 0xFF);
duke@435:       } else {
duke@435:         // [base + disp32]
duke@435:         // [10 reg base] disp32
duke@435:         emit_byte(0x80 | regenc << 3 | baseenc);
duke@435:         emit_data(disp, rspec, disp32_operand);
duke@435:       }
duke@435:     }
duke@435:   } else {
duke@435:     if (index->is_valid()) {
duke@435:       assert(scale != Address::no_scale, "inconsistent address");
duke@435:       int indexenc = index->encoding();
duke@435:       if (indexenc >= 8) {
duke@435:         indexenc -= 8;
duke@435:       }
duke@435:       // [index*scale + disp]
duke@435:       // [00 reg 100][ss index 101] disp32
duke@435:       assert(index != rsp, "illegal addressing mode");
duke@435:       emit_byte(0x04 | regenc << 3);
duke@435:       emit_byte(scale << 6 | indexenc << 3 | 0x05);
duke@435:       emit_data(disp, rspec, disp32_operand);
duke@435: #ifdef _LP64
duke@435:     } else if (rtype != relocInfo::none ) {
duke@435:       // [disp] RIP-RELATIVE
duke@435:       // [00 000 101] disp32
duke@435: 
duke@435:       emit_byte(0x05 | regenc << 3);
duke@435:       // Note that the RIP-rel. correction applies to the generated
duke@435:       // disp field, but _not_ to the target address in the rspec.
duke@435: 
duke@435:       // disp was created by converting the target address minus the pc
duke@435:       // at the start of the instruction. That needs more correction here.
duke@435:       // intptr_t disp = target - next_ip;
duke@435:       assert(inst_mark() != NULL, "must be inside InstructionMark");
duke@435:       address next_ip = pc() + sizeof(int32_t) + rip_relative_correction;
duke@435:       int64_t adjusted = (int64_t) disp -  (next_ip - inst_mark());
duke@435:       assert(is_simm32(adjusted),
duke@435:              "must be 32bit offset (RIP relative address)");
duke@435:       emit_data((int) adjusted, rspec, disp32_operand);
duke@435: 
duke@435: #endif // _LP64
duke@435:     } else {
duke@435:       // [disp] ABSOLUTE
duke@435:       // [00 reg 100][00 100 101] disp32
duke@435:       emit_byte(0x04 | regenc << 3);
duke@435:       emit_byte(0x25);
duke@435:       emit_data(disp, rspec, disp32_operand);
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::emit_operand(XMMRegister reg, Register base, Register index,
duke@435:                              Address::ScaleFactor scale, int disp,
duke@435:                              RelocationHolder const& rspec,
duke@435:                              int rip_relative_correction) {
duke@435:   relocInfo::relocType rtype = (relocInfo::relocType) rspec.type();
duke@435:   int regenc = reg->encoding();
duke@435:   if (regenc >= 8) {
duke@435:     regenc -= 8;
duke@435:   }
duke@435:   if (base->is_valid()) {
duke@435:     if (index->is_valid()) {
duke@435:       assert(scale != Address::no_scale, "inconsistent address");
duke@435:       int indexenc = index->encoding();
duke@435:       if (indexenc >= 8) {
duke@435:         indexenc -= 8;
duke@435:       }
duke@435:       int baseenc = base->encoding();
duke@435:       if (baseenc >= 8) {
duke@435:         baseenc -= 8;
duke@435:       }
duke@435:       // [base + index*scale + disp]
duke@435:       if (disp == 0 && rtype == relocInfo::none  &&
duke@435:           base != rbp && base != r13) {
duke@435:         // [base + index*scale]
duke@435:         // [00 reg 100][ss index base]
duke@435:         assert(index != rsp, "illegal addressing mode");
duke@435:         emit_byte(0x04 | regenc << 3);
duke@435:         emit_byte(scale << 6 | indexenc << 3 | baseenc);
duke@435:       } else if (is8bit(disp) && rtype == relocInfo::none) {
duke@435:         // [base + index*scale + disp8]
duke@435:         // [01 reg 100][ss index base] disp8
duke@435:         assert(index != rsp, "illegal addressing mode");
duke@435:         emit_byte(0x44 | regenc << 3);
duke@435:         emit_byte(scale << 6 | indexenc << 3 | baseenc);
duke@435:         emit_byte(disp & 0xFF);
duke@435:       } else {
duke@435:         // [base + index*scale + disp32]
duke@435:         // [10 reg 100][ss index base] disp32
duke@435:         assert(index != rsp, "illegal addressing mode");
duke@435:         emit_byte(0x84 | regenc << 3);
duke@435:         emit_byte(scale << 6 | indexenc << 3 | baseenc);
duke@435:         emit_data(disp, rspec, disp32_operand);
duke@435:       }
duke@435:     } else if (base == rsp || base == r12) {
duke@435:       // [rsp + disp]
duke@435:       if (disp == 0 && rtype == relocInfo::none) {
duke@435:         // [rsp]
duke@435:         // [00 reg 100][00 100 100]
duke@435:         emit_byte(0x04 | regenc << 3);
duke@435:         emit_byte(0x24);
duke@435:       } else if (is8bit(disp) && rtype == relocInfo::none) {
duke@435:         // [rsp + imm8]
duke@435:         // [01 reg 100][00 100 100] disp8
duke@435:         emit_byte(0x44 | regenc << 3);
duke@435:         emit_byte(0x24);
duke@435:         emit_byte(disp & 0xFF);
duke@435:       } else {
duke@435:         // [rsp + imm32]
duke@435:         // [10 reg 100][00 100 100] disp32
duke@435:         emit_byte(0x84 | regenc << 3);
duke@435:         emit_byte(0x24);
duke@435:         emit_data(disp, rspec, disp32_operand);
duke@435:       }
duke@435:     } else {
duke@435:       // [base + disp]
duke@435:       assert(base != rsp && base != r12, "illegal addressing mode");
duke@435:       int baseenc = base->encoding();
duke@435:       if (baseenc >= 8) {
duke@435:         baseenc -= 8;
duke@435:       }
duke@435:       if (disp == 0 && rtype == relocInfo::none &&
duke@435:           base != rbp && base != r13) {
duke@435:         // [base]
duke@435:         // [00 reg base]
duke@435:         emit_byte(0x00 | regenc << 3 | baseenc);
duke@435:       } else if (is8bit(disp) && rtype == relocInfo::none) {
duke@435:         // [base + imm8]
duke@435:         // [01 reg base] disp8
duke@435:         emit_byte(0x40 | regenc << 3 | baseenc);
duke@435:         emit_byte(disp & 0xFF);
duke@435:       } else {
duke@435:         // [base + imm32]
duke@435:         // [10 reg base] disp32
duke@435:         emit_byte(0x80 | regenc << 3 | baseenc);
duke@435:         emit_data(disp, rspec, disp32_operand);
duke@435:       }
duke@435:     }
duke@435:   } else {
duke@435:     if (index->is_valid()) {
duke@435:       assert(scale != Address::no_scale, "inconsistent address");
duke@435:       int indexenc = index->encoding();
duke@435:       if (indexenc >= 8) {
duke@435:         indexenc -= 8;
duke@435:       }
duke@435:       // [index*scale + disp]
duke@435:       // [00 reg 100][ss index 101] disp32
duke@435:       assert(index != rsp, "illegal addressing mode");
duke@435:       emit_byte(0x04 | regenc << 3);
duke@435:       emit_byte(scale << 6 | indexenc << 3 | 0x05);
duke@435:       emit_data(disp, rspec, disp32_operand);
duke@435: #ifdef _LP64
duke@435:     } else if ( rtype != relocInfo::none ) {
duke@435:       // [disp] RIP-RELATIVE
duke@435:       // [00 reg 101] disp32
duke@435:       emit_byte(0x05 | regenc << 3);
duke@435:       // Note that the RIP-rel. correction applies to the generated
duke@435:       // disp field, but _not_ to the target address in the rspec.
duke@435: 
duke@435:       // disp was created by converting the target address minus the pc
duke@435:       // at the start of the instruction. That needs more correction here.
duke@435:       // intptr_t disp = target - next_ip;
duke@435: 
duke@435:       assert(inst_mark() != NULL, "must be inside InstructionMark");
duke@435:       address next_ip = pc() + sizeof(int32_t) + rip_relative_correction;
duke@435: 
duke@435:       int64_t adjusted = (int64_t) disp -  (next_ip - inst_mark());
duke@435:       assert(is_simm32(adjusted),
duke@435:              "must be 32bit offset (RIP relative address)");
duke@435:       emit_data((int) adjusted, rspec, disp32_operand);
duke@435: #endif // _LP64
duke@435:     } else {
duke@435:       // [disp] ABSOLUTE
duke@435:       // [00 reg 100][00 100 101] disp32
duke@435:       emit_byte(0x04 | regenc << 3);
duke@435:       emit_byte(0x25);
duke@435:       emit_data(disp, rspec, disp32_operand);
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: // Secret local extension to Assembler::WhichOperand:
duke@435: #define end_pc_operand (_WhichOperand_limit)
duke@435: 
duke@435: address Assembler::locate_operand(address inst, WhichOperand which) {
duke@435:   // Decode the given instruction, and return the address of
duke@435:   // an embedded 32-bit operand word.
duke@435: 
duke@435:   // If "which" is disp32_operand, selects the displacement portion
duke@435:   // of an effective address specifier.
duke@435:   // If "which" is imm64_operand, selects the trailing immediate constant.
duke@435:   // If "which" is call32_operand, selects the displacement of a call or jump.
duke@435:   // Caller is responsible for ensuring that there is such an operand,
duke@435:   // and that it is 32/64 bits wide.
duke@435: 
duke@435:   // If "which" is end_pc_operand, find the end of the instruction.
duke@435: 
duke@435:   address ip = inst;
duke@435:   bool is_64bit = false;
duke@435: 
duke@435:   debug_only(bool has_disp32 = false);
duke@435:   int tail_size = 0; // other random bytes (#32, #16, etc.) at end of insn
duke@435: 
duke@435:   again_after_prefix:
duke@435:   switch (0xFF & *ip++) {
duke@435: 
duke@435:   // These convenience macros generate groups of "case" labels for the switch.
duke@435: #define REP4(x) (x)+0: case (x)+1: case (x)+2: case (x)+3
duke@435: #define REP8(x) (x)+0: case (x)+1: case (x)+2: case (x)+3: \
duke@435:              case (x)+4: case (x)+5: case (x)+6: case (x)+7
duke@435: #define REP16(x) REP8((x)+0): \
duke@435:               case REP8((x)+8)
duke@435: 
duke@435:   case CS_segment:
duke@435:   case SS_segment:
duke@435:   case DS_segment:
duke@435:   case ES_segment:
duke@435:   case FS_segment:
duke@435:   case GS_segment:
duke@435:     assert(0, "shouldn't have that prefix");
duke@435:     assert(ip == inst + 1 || ip == inst + 2, "only two prefixes allowed");
duke@435:     goto again_after_prefix;
duke@435: 
duke@435:   case 0x67:
duke@435:   case REX:
duke@435:   case REX_B:
duke@435:   case REX_X:
duke@435:   case REX_XB:
duke@435:   case REX_R:
duke@435:   case REX_RB:
duke@435:   case REX_RX:
duke@435:   case REX_RXB:
duke@435: //     assert(ip == inst + 1, "only one prefix allowed");
duke@435:     goto again_after_prefix;
duke@435: 
duke@435:   case REX_W:
duke@435:   case REX_WB:
duke@435:   case REX_WX:
duke@435:   case REX_WXB:
duke@435:   case REX_WR:
duke@435:   case REX_WRB:
duke@435:   case REX_WRX:
duke@435:   case REX_WRXB:
duke@435:     is_64bit = true;
duke@435: //     assert(ip == inst + 1, "only one prefix allowed");
duke@435:     goto again_after_prefix;
duke@435: 
duke@435:   case 0xFF: // pushq a; decl a; incl a; call a; jmp a
duke@435:   case 0x88: // movb a, r
duke@435:   case 0x89: // movl a, r
duke@435:   case 0x8A: // movb r, a
duke@435:   case 0x8B: // movl r, a
duke@435:   case 0x8F: // popl a
duke@435:     debug_only(has_disp32 = true);
duke@435:     break;
duke@435: 
duke@435:   case 0x68: // pushq #32
duke@435:     if (which == end_pc_operand) {
duke@435:       return ip + 4;
duke@435:     }
duke@435:     assert(0, "pushq has no disp32 or imm64");
duke@435:     ShouldNotReachHere();
duke@435: 
duke@435:   case 0x66: // movw ... (size prefix)
duke@435:     again_after_size_prefix2:
duke@435:     switch (0xFF & *ip++) {
duke@435:     case REX:
duke@435:     case REX_B:
duke@435:     case REX_X:
duke@435:     case REX_XB:
duke@435:     case REX_R:
duke@435:     case REX_RB:
duke@435:     case REX_RX:
duke@435:     case REX_RXB:
duke@435:     case REX_W:
duke@435:     case REX_WB:
duke@435:     case REX_WX:
duke@435:     case REX_WXB:
duke@435:     case REX_WR:
duke@435:     case REX_WRB:
duke@435:     case REX_WRX:
duke@435:     case REX_WRXB:
duke@435:       goto again_after_size_prefix2;
duke@435:     case 0x8B: // movw r, a
duke@435:     case 0x89: // movw a, r
duke@435:       break;
duke@435:     case 0xC7: // movw a, #16
duke@435:       tail_size = 2;  // the imm16
duke@435:       break;
duke@435:     case 0x0F: // several SSE/SSE2 variants
duke@435:       ip--;    // reparse the 0x0F
duke@435:       goto again_after_prefix;
duke@435:     default:
duke@435:       ShouldNotReachHere();
duke@435:     }
duke@435:     break;
duke@435: 
duke@435:   case REP8(0xB8): // movl/q r, #32/#64(oop?)
duke@435:     if (which == end_pc_operand)  return ip + (is_64bit ? 8 : 4);
duke@435:     assert((which == call32_operand || which == imm64_operand) && is_64bit, "");
duke@435:     return ip;
duke@435: 
duke@435:   case 0x69: // imul r, a, #32
duke@435:   case 0xC7: // movl a, #32(oop?)
duke@435:     tail_size = 4;
duke@435:     debug_only(has_disp32 = true); // has both kinds of operands!
duke@435:     break;
duke@435: 
duke@435:   case 0x0F: // movx..., etc.
duke@435:     switch (0xFF & *ip++) {
duke@435:     case 0x12: // movlps
duke@435:     case 0x28: // movaps
duke@435:     case 0x2E: // ucomiss
duke@435:     case 0x2F: // comiss
duke@435:     case 0x54: // andps
duke@435:     case 0x57: // xorps
duke@435:     case 0x6E: // movd
duke@435:     case 0x7E: // movd
duke@435:     case 0xAE: // ldmxcsr   a
duke@435:       debug_only(has_disp32 = true); // has both kinds of operands!
duke@435:       break;
duke@435:     case 0xAD: // shrd r, a, %cl
duke@435:     case 0xAF: // imul r, a
duke@435:     case 0xBE: // movsbl r, a
duke@435:     case 0xBF: // movswl r, a
duke@435:     case 0xB6: // movzbl r, a
duke@435:     case 0xB7: // movzwl r, a
duke@435:     case REP16(0x40): // cmovl cc, r, a
duke@435:     case 0xB0: // cmpxchgb
duke@435:     case 0xB1: // cmpxchg
duke@435:     case 0xC1: // xaddl
duke@435:     case 0xC7: // cmpxchg8
duke@435:     case REP16(0x90): // setcc a
duke@435:       debug_only(has_disp32 = true);
duke@435:       // fall out of the switch to decode the address
duke@435:       break;
duke@435:     case 0xAC: // shrd r, a, #8
duke@435:       debug_only(has_disp32 = true);
duke@435:       tail_size = 1;  // the imm8
duke@435:       break;
duke@435:     case REP16(0x80): // jcc rdisp32
duke@435:       if (which == end_pc_operand)  return ip + 4;
duke@435:       assert(which == call32_operand, "jcc has no disp32 or imm64");
duke@435:       return ip;
duke@435:     default:
duke@435:       ShouldNotReachHere();
duke@435:     }
duke@435:     break;
duke@435: 
duke@435:   case 0x81: // addl a, #32; addl r, #32
duke@435:     // also: orl, adcl, sbbl, andl, subl, xorl, cmpl
duke@435:     tail_size = 4;
duke@435:     debug_only(has_disp32 = true); // has both kinds of operands!
duke@435:     break;
duke@435: 
duke@435:   case 0x83: // addl a, #8; addl r, #8
duke@435:     // also: orl, adcl, sbbl, andl, subl, xorl, cmpl
duke@435:     debug_only(has_disp32 = true); // has both kinds of operands!
duke@435:     tail_size = 1;
duke@435:     break;
duke@435: 
duke@435:   case 0x9B:
duke@435:     switch (0xFF & *ip++) {
duke@435:     case 0xD9: // fnstcw a
duke@435:       debug_only(has_disp32 = true);
duke@435:       break;
duke@435:     default:
duke@435:       ShouldNotReachHere();
duke@435:     }
duke@435:     break;
duke@435: 
duke@435:   case REP4(0x00): // addb a, r; addl a, r; addb r, a; addl r, a
duke@435:   case REP4(0x10): // adc...
duke@435:   case REP4(0x20): // and...
duke@435:   case REP4(0x30): // xor...
duke@435:   case REP4(0x08): // or...
duke@435:   case REP4(0x18): // sbb...
duke@435:   case REP4(0x28): // sub...
duke@435:   case 0xF7: // mull a
duke@435:   case 0x87: // xchg r, a
duke@435:     debug_only(has_disp32 = true);
duke@435:     break;
duke@435:   case REP4(0x38): // cmp...
duke@435:   case 0x8D: // lea r, a
duke@435:   case 0x85: // test r, a
duke@435:     debug_only(has_disp32 = true); // has both kinds of operands!
duke@435:     break;
duke@435: 
duke@435:   case 0xC1: // sal a, #8; sar a, #8; shl a, #8; shr a, #8
duke@435:   case 0xC6: // movb a, #8
duke@435:   case 0x80: // cmpb a, #8
duke@435:   case 0x6B: // imul r, a, #8
duke@435:     debug_only(has_disp32 = true); // has both kinds of operands!
duke@435:     tail_size = 1; // the imm8
duke@435:     break;
duke@435: 
duke@435:   case 0xE8: // call rdisp32
duke@435:   case 0xE9: // jmp  rdisp32
duke@435:     if (which == end_pc_operand)  return ip + 4;
duke@435:     assert(which == call32_operand, "call has no disp32 or imm32");
duke@435:     return ip;
duke@435: 
duke@435:   case 0xD1: // sal a, 1; sar a, 1; shl a, 1; shr a, 1
duke@435:   case 0xD3: // sal a, %cl; sar a, %cl; shl a, %cl; shr a, %cl
duke@435:   case 0xD9: // fld_s a; fst_s a; fstp_s a; fldcw a
duke@435:   case 0xDD: // fld_d a; fst_d a; fstp_d a
duke@435:   case 0xDB: // fild_s a; fistp_s a; fld_x a; fstp_x a
duke@435:   case 0xDF: // fild_d a; fistp_d a
duke@435:   case 0xD8: // fadd_s a; fsubr_s a; fmul_s a; fdivr_s a; fcomp_s a
duke@435:   case 0xDC: // fadd_d a; fsubr_d a; fmul_d a; fdivr_d a; fcomp_d a
duke@435:   case 0xDE: // faddp_d a; fsubrp_d a; fmulp_d a; fdivrp_d a; fcompp_d a
duke@435:     debug_only(has_disp32 = true);
duke@435:     break;
duke@435: 
duke@435:   case 0xF3:                    // For SSE
duke@435:   case 0xF2:                    // For SSE2
duke@435:     switch (0xFF & *ip++) {
duke@435:     case REX:
duke@435:     case REX_B:
duke@435:     case REX_X:
duke@435:     case REX_XB:
duke@435:     case REX_R:
duke@435:     case REX_RB:
duke@435:     case REX_RX:
duke@435:     case REX_RXB:
duke@435:     case REX_W:
duke@435:     case REX_WB:
duke@435:     case REX_WX:
duke@435:     case REX_WXB:
duke@435:     case REX_WR:
duke@435:     case REX_WRB:
duke@435:     case REX_WRX:
duke@435:     case REX_WRXB:
duke@435:       ip++;
duke@435:     default:
duke@435:       ip++;
duke@435:     }
duke@435:     debug_only(has_disp32 = true); // has both kinds of operands!
duke@435:     break;
duke@435: 
duke@435:   default:
duke@435:     ShouldNotReachHere();
duke@435: 
duke@435: #undef REP8
duke@435: #undef REP16
duke@435:   }
duke@435: 
duke@435:   assert(which != call32_operand, "instruction is not a call, jmp, or jcc");
duke@435:   assert(which != imm64_operand, "instruction is not a movq reg, imm64");
duke@435:   assert(which != disp32_operand || has_disp32, "instruction has no disp32 field");
duke@435: 
duke@435:   // parse the output of emit_operand
duke@435:   int op2 = 0xFF & *ip++;
duke@435:   int base = op2 & 0x07;
duke@435:   int op3 = -1;
duke@435:   const int b100 = 4;
duke@435:   const int b101 = 5;
duke@435:   if (base == b100 && (op2 >> 6) != 3) {
duke@435:     op3 = 0xFF & *ip++;
duke@435:     base = op3 & 0x07;   // refetch the base
duke@435:   }
duke@435:   // now ip points at the disp (if any)
duke@435: 
duke@435:   switch (op2 >> 6) {
duke@435:   case 0:
duke@435:     // [00 reg  100][ss index base]
duke@435:     // [00 reg  100][00   100  esp]
duke@435:     // [00 reg base]
duke@435:     // [00 reg  100][ss index  101][disp32]
duke@435:     // [00 reg  101]               [disp32]
duke@435: 
duke@435:     if (base == b101) {
duke@435:       if (which == disp32_operand)
duke@435:         return ip;              // caller wants the disp32
duke@435:       ip += 4;                  // skip the disp32
duke@435:     }
duke@435:     break;
duke@435: 
duke@435:   case 1:
duke@435:     // [01 reg  100][ss index base][disp8]
duke@435:     // [01 reg  100][00   100  esp][disp8]
duke@435:     // [01 reg base]               [disp8]
duke@435:     ip += 1;                    // skip the disp8
duke@435:     break;
duke@435: 
duke@435:   case 2:
duke@435:     // [10 reg  100][ss index base][disp32]
duke@435:     // [10 reg  100][00   100  esp][disp32]
duke@435:     // [10 reg base]               [disp32]
duke@435:     if (which == disp32_operand)
duke@435:       return ip;                // caller wants the disp32
duke@435:     ip += 4;                    // skip the disp32
duke@435:     break;
duke@435: 
duke@435:   case 3:
duke@435:     // [11 reg base]  (not a memory addressing mode)
duke@435:     break;
duke@435:   }
duke@435: 
duke@435:   if (which == end_pc_operand) {
duke@435:     return ip + tail_size;
duke@435:   }
duke@435: 
duke@435:   assert(0, "fix locate_operand");
duke@435:   return ip;
duke@435: }
duke@435: 
duke@435: address Assembler::locate_next_instruction(address inst) {
duke@435:   // Secretly share code with locate_operand:
duke@435:   return locate_operand(inst, end_pc_operand);
duke@435: }
duke@435: 
duke@435: #ifdef ASSERT
duke@435: void Assembler::check_relocation(RelocationHolder const& rspec, int format) {
duke@435:   address inst = inst_mark();
duke@435:   assert(inst != NULL && inst < pc(),
duke@435:          "must point to beginning of instruction");
duke@435:   address opnd;
duke@435: 
duke@435:   Relocation* r = rspec.reloc();
duke@435:   if (r->type() == relocInfo::none) {
duke@435:     return;
duke@435:   } else if (r->is_call() || format == call32_operand) {
duke@435:     opnd = locate_operand(inst, call32_operand);
duke@435:   } else if (r->is_data()) {
duke@435:     assert(format == imm64_operand || format == disp32_operand, "format ok");
duke@435:     opnd = locate_operand(inst, (WhichOperand) format);
duke@435:   } else {
duke@435:     assert(format == 0, "cannot specify a format");
duke@435:     return;
duke@435:   }
duke@435:   assert(opnd == pc(), "must put operand where relocs can find it");
duke@435: }
duke@435: #endif
duke@435: 
duke@435: int Assembler::prefix_and_encode(int reg_enc, bool byteinst) {
duke@435:   if (reg_enc >= 8) {
duke@435:     prefix(REX_B);
duke@435:     reg_enc -= 8;
duke@435:   } else if (byteinst && reg_enc >= 4) {
duke@435:     prefix(REX);
duke@435:   }
duke@435:   return reg_enc;
duke@435: }
duke@435: 
duke@435: int Assembler::prefixq_and_encode(int reg_enc) {
duke@435:   if (reg_enc < 8) {
duke@435:     prefix(REX_W);
duke@435:   } else {
duke@435:     prefix(REX_WB);
duke@435:     reg_enc -= 8;
duke@435:   }
duke@435:   return reg_enc;
duke@435: }
duke@435: 
duke@435: int Assembler::prefix_and_encode(int dst_enc, int src_enc, bool byteinst) {
duke@435:   if (dst_enc < 8) {
duke@435:     if (src_enc >= 8) {
duke@435:       prefix(REX_B);
duke@435:       src_enc -= 8;
duke@435:     } else if (byteinst && src_enc >= 4) {
duke@435:       prefix(REX);
duke@435:     }
duke@435:   } else {
duke@435:     if (src_enc < 8) {
duke@435:       prefix(REX_R);
duke@435:     } else {
duke@435:       prefix(REX_RB);
duke@435:       src_enc -= 8;
duke@435:     }
duke@435:     dst_enc -= 8;
duke@435:   }
duke@435:   return dst_enc << 3 | src_enc;
duke@435: }
duke@435: 
duke@435: int Assembler::prefixq_and_encode(int dst_enc, int src_enc) {
duke@435:   if (dst_enc < 8) {
duke@435:     if (src_enc < 8) {
duke@435:       prefix(REX_W);
duke@435:     } else {
duke@435:       prefix(REX_WB);
duke@435:       src_enc -= 8;
duke@435:     }
duke@435:   } else {
duke@435:     if (src_enc < 8) {
duke@435:       prefix(REX_WR);
duke@435:     } else {
duke@435:       prefix(REX_WRB);
duke@435:       src_enc -= 8;
duke@435:     }
duke@435:     dst_enc -= 8;
duke@435:   }
duke@435:   return dst_enc << 3 | src_enc;
duke@435: }
duke@435: 
duke@435: void Assembler::prefix(Register reg) {
duke@435:   if (reg->encoding() >= 8) {
duke@435:     prefix(REX_B);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::prefix(Address adr) {
duke@435:   if (adr.base_needs_rex()) {
duke@435:     if (adr.index_needs_rex()) {
duke@435:       prefix(REX_XB);
duke@435:     } else {
duke@435:       prefix(REX_B);
duke@435:     }
duke@435:   } else {
duke@435:     if (adr.index_needs_rex()) {
duke@435:       prefix(REX_X);
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::prefixq(Address adr) {
duke@435:   if (adr.base_needs_rex()) {
duke@435:     if (adr.index_needs_rex()) {
duke@435:       prefix(REX_WXB);
duke@435:     } else {
duke@435:       prefix(REX_WB);
duke@435:     }
duke@435:   } else {
duke@435:     if (adr.index_needs_rex()) {
duke@435:       prefix(REX_WX);
duke@435:     } else {
duke@435:       prefix(REX_W);
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void Assembler::prefix(Address adr, Register reg, bool byteinst) {
duke@435:   if (reg->encoding() < 8) {
duke@435:     if (adr.base_needs_rex()) {
duke@435:       if (adr.index_needs_rex()) {
duke@435:         prefix(REX_XB);
duke@435:       } else {
duke@435:         prefix(REX_B);
duke@435:       }
duke@435:     } else {
duke@435:       if (adr.index_needs_rex()) {
duke@435:         prefix(REX_X);
duke@435:       } else if (reg->encoding() >= 4 ) {
duke@435:         prefix(REX);
duke@435:       }
duke@435:     }
duke@435:   } else {
duke@435:     if (adr.base_needs_rex()) {
duke@435:       if (adr.index_needs_rex()) {
duke@435:         prefix(REX_RXB);
duke@435:       } else {
duke@435:         prefix(REX_RB);
duke@435:       }
duke@435:     } else {
duke@435:       if (adr.index_needs_rex()) {
duke@435:         prefix(REX_RX);
duke@435:       } else {
duke@435:         prefix(REX_R);
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::prefixq(Address adr, Register src) {
duke@435:   if (src->encoding() < 8) {
duke@435:     if (adr.base_needs_rex()) {
duke@435:       if (adr.index_needs_rex()) {
duke@435:         prefix(REX_WXB);
duke@435:       } else {
duke@435:         prefix(REX_WB);
duke@435:       }
duke@435:     } else {
duke@435:       if (adr.index_needs_rex()) {
duke@435:         prefix(REX_WX);
duke@435:       } else {
duke@435:         prefix(REX_W);
duke@435:       }
duke@435:     }
duke@435:   } else {
duke@435:     if (adr.base_needs_rex()) {
duke@435:       if (adr.index_needs_rex()) {
duke@435:         prefix(REX_WRXB);
duke@435:       } else {
duke@435:         prefix(REX_WRB);
duke@435:       }
duke@435:     } else {
duke@435:       if (adr.index_needs_rex()) {
duke@435:         prefix(REX_WRX);
duke@435:       } else {
duke@435:         prefix(REX_WR);
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::prefix(Address adr, XMMRegister reg) {
duke@435:   if (reg->encoding() < 8) {
duke@435:     if (adr.base_needs_rex()) {
duke@435:       if (adr.index_needs_rex()) {
duke@435:         prefix(REX_XB);
duke@435:       } else {
duke@435:         prefix(REX_B);
duke@435:       }
duke@435:     } else {
duke@435:       if (adr.index_needs_rex()) {
duke@435:         prefix(REX_X);
duke@435:       }
duke@435:     }
duke@435:   } else {
duke@435:     if (adr.base_needs_rex()) {
duke@435:       if (adr.index_needs_rex()) {
duke@435:         prefix(REX_RXB);
duke@435:       } else {
duke@435:         prefix(REX_RB);
duke@435:       }
duke@435:     } else {
duke@435:       if (adr.index_needs_rex()) {
duke@435:         prefix(REX_RX);
duke@435:       } else {
duke@435:         prefix(REX_R);
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::emit_operand(Register reg, Address adr,
duke@435:                              int rip_relative_correction) {
duke@435:   emit_operand(reg, adr._base, adr._index, adr._scale, adr._disp,
duke@435:                adr._rspec,
duke@435:                rip_relative_correction);
duke@435: }
duke@435: 
duke@435: void Assembler::emit_operand(XMMRegister reg, Address adr,
duke@435:                              int rip_relative_correction) {
duke@435:   emit_operand(reg, adr._base, adr._index, adr._scale, adr._disp,
duke@435:                adr._rspec,
duke@435:                rip_relative_correction);
duke@435: }
duke@435: 
duke@435: void Assembler::emit_farith(int b1, int b2, int i) {
duke@435:   assert(isByte(b1) && isByte(b2), "wrong opcode");
duke@435:   assert(0 <= i &&  i < 8, "illegal stack offset");
duke@435:   emit_byte(b1);
duke@435:   emit_byte(b2 + i);
duke@435: }
duke@435: 
duke@435: // pushad is invalid, use this instead.
duke@435: // NOTE: Kills flags!!
duke@435: void Assembler::pushaq() {
duke@435:   // we have to store original rsp.  ABI says that 128 bytes
duke@435:   // below rsp are local scratch.
duke@435:   movq(Address(rsp, -5 * wordSize), rsp);
duke@435: 
duke@435:   subq(rsp, 16 * wordSize);
duke@435: 
duke@435:   movq(Address(rsp, 15 * wordSize), rax);
duke@435:   movq(Address(rsp, 14 * wordSize), rcx);
duke@435:   movq(Address(rsp, 13 * wordSize), rdx);
duke@435:   movq(Address(rsp, 12 * wordSize), rbx);
duke@435:   // skip rsp
duke@435:   movq(Address(rsp, 10 * wordSize), rbp);
duke@435:   movq(Address(rsp, 9 * wordSize), rsi);
duke@435:   movq(Address(rsp, 8 * wordSize), rdi);
duke@435:   movq(Address(rsp, 7 * wordSize), r8);
duke@435:   movq(Address(rsp, 6 * wordSize), r9);
duke@435:   movq(Address(rsp, 5 * wordSize), r10);
duke@435:   movq(Address(rsp, 4 * wordSize), r11);
duke@435:   movq(Address(rsp, 3 * wordSize), r12);
duke@435:   movq(Address(rsp, 2 * wordSize), r13);
duke@435:   movq(Address(rsp, wordSize), r14);
duke@435:   movq(Address(rsp, 0), r15);
duke@435: }
duke@435: 
duke@435: // popad is invalid, use this instead
duke@435: // NOTE: Kills flags!!
duke@435: void Assembler::popaq() {
duke@435:   movq(r15, Address(rsp, 0));
duke@435:   movq(r14, Address(rsp, wordSize));
duke@435:   movq(r13, Address(rsp, 2 * wordSize));
duke@435:   movq(r12, Address(rsp, 3 * wordSize));
duke@435:   movq(r11, Address(rsp, 4 * wordSize));
duke@435:   movq(r10, Address(rsp, 5 * wordSize));
duke@435:   movq(r9,  Address(rsp, 6 * wordSize));
duke@435:   movq(r8,  Address(rsp, 7 * wordSize));
duke@435:   movq(rdi, Address(rsp, 8 * wordSize));
duke@435:   movq(rsi, Address(rsp, 9 * wordSize));
duke@435:   movq(rbp, Address(rsp, 10 * wordSize));
duke@435:   // skip rsp
duke@435:   movq(rbx, Address(rsp, 12 * wordSize));
duke@435:   movq(rdx, Address(rsp, 13 * wordSize));
duke@435:   movq(rcx, Address(rsp, 14 * wordSize));
duke@435:   movq(rax, Address(rsp, 15 * wordSize));
duke@435: 
duke@435:   addq(rsp, 16 * wordSize);
duke@435: }
duke@435: 
duke@435: void Assembler::pushfq() {
duke@435:   emit_byte(0x9C);
duke@435: }
duke@435: 
duke@435: void Assembler::popfq() {
duke@435:   emit_byte(0x9D);
duke@435: }
duke@435: 
duke@435: void Assembler::pushq(int imm32) {
duke@435:   emit_byte(0x68);
duke@435:   emit_long(imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::pushq(Register src) {
duke@435:   int encode = prefix_and_encode(src->encoding());
duke@435: 
duke@435:   emit_byte(0x50 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::pushq(Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(src);
duke@435:   emit_byte(0xFF);
duke@435:   emit_operand(rsi, src);
duke@435: }
duke@435: 
duke@435: void Assembler::popq(Register dst) {
duke@435:   int encode = prefix_and_encode(dst->encoding());
duke@435:   emit_byte(0x58 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::popq(Address dst) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(dst);
duke@435:   emit_byte(0x8F);
duke@435:   emit_operand(rax, dst);
duke@435: }
duke@435: 
duke@435: void Assembler::prefix(Prefix p) {
duke@435:   a_byte(p);
duke@435: }
duke@435: 
duke@435: void Assembler::movb(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(src, dst, true);
duke@435:   emit_byte(0x8A);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::movb(Address dst, int imm8) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(dst);
duke@435:   emit_byte(0xC6);
duke@435:   emit_operand(rax, dst, 1);
duke@435:   emit_byte(imm8);
duke@435: }
duke@435: 
duke@435: void Assembler::movb(Address dst, Register src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(dst, src, true);
duke@435:   emit_byte(0x88);
duke@435:   emit_operand(src, dst);
duke@435: }
duke@435: 
duke@435: void Assembler::movw(Address dst, int imm16) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0x66); // switch to 16-bit mode
duke@435:   prefix(dst);
duke@435:   emit_byte(0xC7);
duke@435:   emit_operand(rax, dst, 2);
duke@435:   emit_word(imm16);
duke@435: }
duke@435: 
duke@435: void Assembler::movw(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0x66);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x8B);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::movw(Address dst, Register src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0x66);
duke@435:   prefix(dst, src);
duke@435:   emit_byte(0x89);
duke@435:   emit_operand(src, dst);
duke@435: }
duke@435: 
duke@435: // Uses zero extension.
duke@435: void Assembler::movl(Register dst, int imm32) {
duke@435:   int encode = prefix_and_encode(dst->encoding());
duke@435:   emit_byte(0xB8 | encode);
duke@435:   emit_long(imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::movl(Register dst, Register src) {
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x8B);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::movl(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x8B);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::movl(Address dst, int imm32) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(dst);
duke@435:   emit_byte(0xC7);
duke@435:   emit_operand(rax, dst, 4);
duke@435:   emit_long(imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::movl(Address dst, Register src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(dst, src);
duke@435:   emit_byte(0x89);
duke@435:   emit_operand(src, dst);
duke@435: }
duke@435: 
dcubed@485: void Assembler::mov64(Register dst, intptr_t imm64) {
duke@435:   InstructionMark im(this);
duke@435:   int encode = prefixq_and_encode(dst->encoding());
duke@435:   emit_byte(0xB8 | encode);
duke@435:   emit_long64(imm64);
duke@435: }
duke@435: 
duke@435: void Assembler::mov_literal64(Register dst, intptr_t imm64, RelocationHolder const& rspec) {
duke@435:   InstructionMark im(this);
duke@435:   int encode = prefixq_and_encode(dst->encoding());
duke@435:   emit_byte(0xB8 | encode);
duke@435:   emit_data64(imm64, rspec);
duke@435: }
duke@435: 
duke@435: void Assembler::movq(Register dst, Register src) {
duke@435:   int encode = prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x8B);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::movq(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(src, dst);
duke@435:   emit_byte(0x8B);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
dcubed@485: void Assembler::mov64(Address dst, intptr_t imm32) {
duke@435:   assert(is_simm32(imm32), "lost bits");
duke@435:   InstructionMark im(this);
duke@435:   prefixq(dst);
duke@435:   emit_byte(0xC7);
duke@435:   emit_operand(rax, dst, 4);
duke@435:   emit_long(imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::movq(Address dst, Register src) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(dst, src);
duke@435:   emit_byte(0x89);
duke@435:   emit_operand(src, dst);
duke@435: }
duke@435: 
duke@435: void Assembler::movsbl(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xBE);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::movsbl(Register dst, Register src) {
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding(), true);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xBE);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::movswl(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xBF);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::movswl(Register dst, Register src) {
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xBF);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::movslq(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(src, dst);
duke@435:   emit_byte(0x63);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::movslq(Register dst, Register src) {
duke@435:   int encode = prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x63);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::movzbl(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xB6);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::movzbl(Register dst, Register src) {
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding(), true);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xB6);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::movzwl(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xB7);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::movzwl(Register dst, Register src) {
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xB7);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::movss(XMMRegister dst, XMMRegister src) {
duke@435:   emit_byte(0xF3);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x10);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::movss(XMMRegister dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0xF3);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x10);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::movss(Address dst, XMMRegister src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0xF3);
duke@435:   prefix(dst, src);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x11);
duke@435:   emit_operand(src, dst);
duke@435: }
duke@435: 
duke@435: void Assembler::movsd(XMMRegister dst, XMMRegister src) {
duke@435:   emit_byte(0xF2);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x10);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::movsd(XMMRegister dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0xF2);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x10);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::movsd(Address dst, XMMRegister src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0xF2);
duke@435:   prefix(dst, src);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x11);
duke@435:   emit_operand(src, dst);
duke@435: }
duke@435: 
duke@435: // New cpus require to use movsd and movss to avoid partial register stall
duke@435: // when loading from memory. But for old Opteron use movlpd instead of movsd.
duke@435: // The selection is done in MacroAssembler::movdbl() and movflt().
duke@435: void Assembler::movlpd(XMMRegister dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0x66);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x12);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::movapd(XMMRegister dst, XMMRegister src) {
duke@435:   int dstenc = dst->encoding();
duke@435:   int srcenc = src->encoding();
duke@435:   emit_byte(0x66);
duke@435:   if (dstenc < 8) {
duke@435:     if (srcenc >= 8) {
duke@435:       prefix(REX_B);
duke@435:       srcenc -= 8;
duke@435:     }
duke@435:   } else {
duke@435:     if (srcenc < 8) {
duke@435:       prefix(REX_R);
duke@435:     } else {
duke@435:       prefix(REX_RB);
duke@435:       srcenc -= 8;
duke@435:     }
duke@435:     dstenc -= 8;
duke@435:   }
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x28);
duke@435:   emit_byte(0xC0 | dstenc << 3 | srcenc);
duke@435: }
duke@435: 
duke@435: void Assembler::movaps(XMMRegister dst, XMMRegister src) {
duke@435:   int dstenc = dst->encoding();
duke@435:   int srcenc = src->encoding();
duke@435:   if (dstenc < 8) {
duke@435:     if (srcenc >= 8) {
duke@435:       prefix(REX_B);
duke@435:       srcenc -= 8;
duke@435:     }
duke@435:   } else {
duke@435:     if (srcenc < 8) {
duke@435:       prefix(REX_R);
duke@435:     } else {
duke@435:       prefix(REX_RB);
duke@435:       srcenc -= 8;
duke@435:     }
duke@435:     dstenc -= 8;
duke@435:   }
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x28);
duke@435:   emit_byte(0xC0 | dstenc << 3 | srcenc);
duke@435: }
duke@435: 
duke@435: void Assembler::movdl(XMMRegister dst, Register src) {
duke@435:   emit_byte(0x66);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x6E);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::movdl(Register dst, XMMRegister src) {
duke@435:   emit_byte(0x66);
duke@435:   // swap src/dst to get correct prefix
duke@435:   int encode = prefix_and_encode(src->encoding(), dst->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x7E);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::movdq(XMMRegister dst, Register src) {
duke@435:   emit_byte(0x66);
duke@435:   int encode = prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x6E);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::movdq(Register dst, XMMRegister src) {
duke@435:   emit_byte(0x66);
duke@435:   // swap src/dst to get correct prefix
duke@435:   int encode = prefixq_and_encode(src->encoding(), dst->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x7E);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::pxor(XMMRegister dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0x66);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xEF);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::pxor(XMMRegister dst, XMMRegister src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0x66);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xEF);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::movdqa(XMMRegister dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0x66);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x6F);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::movdqa(XMMRegister dst, XMMRegister src) {
duke@435:   emit_byte(0x66);
duke@435:   int encode = prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x6F);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::movdqa(Address dst, XMMRegister src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0x66);
duke@435:   prefix(dst, src);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x7F);
duke@435:   emit_operand(src, dst);
duke@435: }
duke@435: 
duke@435: void Assembler::movq(XMMRegister dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0xF3);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x7E);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::movq(Address dst, XMMRegister src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0x66);
duke@435:   prefix(dst, src);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xD6);
duke@435:   emit_operand(src, dst);
duke@435: }
duke@435: 
duke@435: void Assembler::pshufd(XMMRegister dst, XMMRegister src, int mode) {
duke@435:   assert(isByte(mode), "invalid value");
duke@435:   emit_byte(0x66);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x70);
duke@435:   emit_byte(0xC0 | encode);
duke@435:   emit_byte(mode & 0xFF);
duke@435: }
duke@435: 
duke@435: void Assembler::pshufd(XMMRegister dst, Address src, int mode) {
duke@435:   assert(isByte(mode), "invalid value");
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0x66);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x70);
duke@435:   emit_operand(dst, src);
duke@435:   emit_byte(mode & 0xFF);
duke@435: }
duke@435: 
duke@435: void Assembler::pshuflw(XMMRegister dst, XMMRegister src, int mode) {
duke@435:   assert(isByte(mode), "invalid value");
duke@435:   emit_byte(0xF2);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x70);
duke@435:   emit_byte(0xC0 | encode);
duke@435:   emit_byte(mode & 0xFF);
duke@435: }
duke@435: 
duke@435: void Assembler::pshuflw(XMMRegister dst, Address src, int mode) {
duke@435:   assert(isByte(mode), "invalid value");
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0xF2);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x70);
duke@435:   emit_operand(dst, src);
duke@435:   emit_byte(mode & 0xFF);
duke@435: }
duke@435: 
duke@435: void Assembler::cmovl(Condition cc, Register dst, Register src) {
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x40 | cc);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::cmovl(Condition cc, Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x40 | cc);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::cmovq(Condition cc, Register dst, Register src) {
duke@435:   int encode = prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x40 | cc);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::cmovq(Condition cc, Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x40 | cc);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::prefetch_prefix(Address src) {
duke@435:   prefix(src);
duke@435:   emit_byte(0x0F);
duke@435: }
duke@435: 
duke@435: void Assembler::prefetcht0(Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefetch_prefix(src);
duke@435:   emit_byte(0x18);
duke@435:   emit_operand(rcx, src); // 1, src
duke@435: }
duke@435: 
duke@435: void Assembler::prefetcht1(Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefetch_prefix(src);
duke@435:   emit_byte(0x18);
duke@435:   emit_operand(rdx, src); // 2, src
duke@435: }
duke@435: 
duke@435: void Assembler::prefetcht2(Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefetch_prefix(src);
duke@435:   emit_byte(0x18);
duke@435:   emit_operand(rbx, src); // 3, src
duke@435: }
duke@435: 
duke@435: void Assembler::prefetchnta(Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefetch_prefix(src);
duke@435:   emit_byte(0x18);
duke@435:   emit_operand(rax, src); // 0, src
duke@435: }
duke@435: 
duke@435: void Assembler::prefetchw(Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefetch_prefix(src);
duke@435:   emit_byte(0x0D);
duke@435:   emit_operand(rcx, src); // 1, src
duke@435: }
duke@435: 
duke@435: void Assembler::adcl(Register dst, int imm32) {
duke@435:   prefix(dst);
duke@435:   emit_arith(0x81, 0xD0, dst, imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::adcl(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x13);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::adcl(Register dst, Register src) {
duke@435:   (void) prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_arith(0x13, 0xC0, dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::adcq(Register dst, int imm32) {
duke@435:   (void) prefixq_and_encode(dst->encoding());
duke@435:   emit_arith(0x81, 0xD0, dst, imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::adcq(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(src, dst);
duke@435:   emit_byte(0x13);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::adcq(Register dst, Register src) {
duke@435:   (int) prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_arith(0x13, 0xC0, dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::addl(Address dst, int imm32) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(dst);
duke@435:   emit_arith_operand(0x81, rax, dst,imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::addl(Address dst, Register src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(dst, src);
duke@435:   emit_byte(0x01);
duke@435:   emit_operand(src, dst);
duke@435: }
duke@435: 
duke@435: void Assembler::addl(Register dst, int imm32) {
duke@435:   prefix(dst);
duke@435:   emit_arith(0x81, 0xC0, dst, imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::addl(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x03);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::addl(Register dst, Register src) {
duke@435:   (void) prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_arith(0x03, 0xC0, dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::addq(Address dst, int imm32) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(dst);
duke@435:   emit_arith_operand(0x81, rax, dst,imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::addq(Address dst, Register src) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(dst, src);
duke@435:   emit_byte(0x01);
duke@435:   emit_operand(src, dst);
duke@435: }
duke@435: 
duke@435: void Assembler::addq(Register dst, int imm32) {
duke@435:   (void) prefixq_and_encode(dst->encoding());
duke@435:   emit_arith(0x81, 0xC0, dst, imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::addq(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(src, dst);
duke@435:   emit_byte(0x03);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::addq(Register dst, Register src) {
duke@435:   (void) prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_arith(0x03, 0xC0, dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::andl(Register dst, int imm32) {
duke@435:   prefix(dst);
duke@435:   emit_arith(0x81, 0xE0, dst, imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::andl(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x23);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::andl(Register dst, Register src) {
duke@435:   (void) prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_arith(0x23, 0xC0, dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::andq(Register dst, int imm32) {
duke@435:   (void) prefixq_and_encode(dst->encoding());
duke@435:   emit_arith(0x81, 0xE0, dst, imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::andq(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(src, dst);
duke@435:   emit_byte(0x23);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::andq(Register dst, Register src) {
duke@435:   (int) prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_arith(0x23, 0xC0, dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::cmpb(Address dst, int imm8) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(dst);
duke@435:   emit_byte(0x80);
duke@435:   emit_operand(rdi, dst, 1);
duke@435:   emit_byte(imm8);
duke@435: }
duke@435: 
duke@435: void Assembler::cmpl(Address dst, int imm32) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(dst);
duke@435:   emit_byte(0x81);
duke@435:   emit_operand(rdi, dst, 4);
duke@435:   emit_long(imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::cmpl(Register dst, int imm32) {
duke@435:   prefix(dst);
duke@435:   emit_arith(0x81, 0xF8, dst, imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::cmpl(Register dst, Register src) {
duke@435:   (void) prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_arith(0x3B, 0xC0, dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::cmpl(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x3B);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::cmpq(Address dst, int imm32) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(dst);
duke@435:   emit_byte(0x81);
duke@435:   emit_operand(rdi, dst, 4);
duke@435:   emit_long(imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::cmpq(Register dst, int imm32) {
duke@435:   (void) prefixq_and_encode(dst->encoding());
duke@435:   emit_arith(0x81, 0xF8, dst, imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::cmpq(Address dst, Register src) {
duke@435:   prefixq(dst, src);
duke@435:   emit_byte(0x3B);
duke@435:   emit_operand(src, dst);
duke@435: }
duke@435: 
duke@435: void Assembler::cmpq(Register dst, Register src) {
duke@435:   (void) prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_arith(0x3B, 0xC0, dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::cmpq(Register dst, Address  src) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(src, dst);
duke@435:   emit_byte(0x3B);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::ucomiss(XMMRegister dst, XMMRegister src) {
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x2E);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::ucomisd(XMMRegister dst, XMMRegister src) {
duke@435:   emit_byte(0x66);
duke@435:   ucomiss(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::decl(Register dst) {
duke@435:   // Don't use it directly. Use MacroAssembler::decrementl() instead.
duke@435:   // Use two-byte form (one-byte from is a REX prefix in 64-bit mode)
duke@435:   int encode = prefix_and_encode(dst->encoding());
duke@435:   emit_byte(0xFF);
duke@435:   emit_byte(0xC8 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::decl(Address dst) {
duke@435:   // Don't use it directly. Use MacroAssembler::decrementl() instead.
duke@435:   InstructionMark im(this);
duke@435:   prefix(dst);
duke@435:   emit_byte(0xFF);
duke@435:   emit_operand(rcx, dst);
duke@435: }
duke@435: 
duke@435: void Assembler::decq(Register dst) {
duke@435:   // Don't use it directly. Use MacroAssembler::decrementq() instead.
duke@435:   // Use two-byte form (one-byte from is a REX prefix in 64-bit mode)
duke@435:   int encode = prefixq_and_encode(dst->encoding());
duke@435:   emit_byte(0xFF);
duke@435:   emit_byte(0xC8 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::decq(Address dst) {
duke@435:   // Don't use it directly. Use MacroAssembler::decrementq() instead.
duke@435:   InstructionMark im(this);
duke@435:   prefixq(dst);
duke@435:   emit_byte(0xFF);
duke@435:   emit_operand(rcx, dst);
duke@435: }
duke@435: 
duke@435: void Assembler::idivl(Register src) {
duke@435:   int encode = prefix_and_encode(src->encoding());
duke@435:   emit_byte(0xF7);
duke@435:   emit_byte(0xF8 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::idivq(Register src) {
duke@435:   int encode = prefixq_and_encode(src->encoding());
duke@435:   emit_byte(0xF7);
duke@435:   emit_byte(0xF8 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::cdql() {
duke@435:   emit_byte(0x99);
duke@435: }
duke@435: 
duke@435: void Assembler::cdqq() {
duke@435:   prefix(REX_W);
duke@435:   emit_byte(0x99);
duke@435: }
duke@435: 
duke@435: void Assembler::imull(Register dst, Register src) {
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xAF);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::imull(Register dst, Register src, int value) {
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   if (is8bit(value)) {
duke@435:     emit_byte(0x6B);
duke@435:     emit_byte(0xC0 | encode);
duke@435:     emit_byte(value);
duke@435:   } else {
duke@435:     emit_byte(0x69);
duke@435:     emit_byte(0xC0 | encode);
duke@435:     emit_long(value);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::imulq(Register dst, Register src) {
duke@435:   int encode = prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xAF);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::imulq(Register dst, Register src, int value) {
duke@435:   int encode = prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   if (is8bit(value)) {
duke@435:     emit_byte(0x6B);
duke@435:     emit_byte(0xC0 | encode);
duke@435:     emit_byte(value);
duke@435:   } else {
duke@435:     emit_byte(0x69);
duke@435:     emit_byte(0xC0 | encode);
duke@435:     emit_long(value);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::incl(Register dst) {
duke@435:   // Don't use it directly. Use MacroAssembler::incrementl() instead.
duke@435:   // Use two-byte form (one-byte from is a REX prefix in 64-bit mode)
duke@435:   int encode = prefix_and_encode(dst->encoding());
duke@435:   emit_byte(0xFF);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::incl(Address dst) {
duke@435:   // Don't use it directly. Use MacroAssembler::incrementl() instead.
duke@435:   InstructionMark im(this);
duke@435:   prefix(dst);
duke@435:   emit_byte(0xFF);
duke@435:   emit_operand(rax, dst);
duke@435: }
duke@435: 
duke@435: void Assembler::incq(Register dst) {
duke@435:   // Don't use it directly. Use MacroAssembler::incrementq() instead.
duke@435:   // Use two-byte form (one-byte from is a REX prefix in 64-bit mode)
duke@435:   int encode = prefixq_and_encode(dst->encoding());
duke@435:   emit_byte(0xFF);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::incq(Address dst) {
duke@435:   // Don't use it directly. Use MacroAssembler::incrementq() instead.
duke@435:   InstructionMark im(this);
duke@435:   prefixq(dst);
duke@435:   emit_byte(0xFF);
duke@435:   emit_operand(rax, dst);
duke@435: }
duke@435: 
duke@435: void Assembler::leal(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0x67); // addr32
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x8D);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::leaq(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(src, dst);
duke@435:   emit_byte(0x8D);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::mull(Address src) {
duke@435:   InstructionMark im(this);
duke@435:   // was missing
duke@435:   prefix(src);
duke@435:   emit_byte(0xF7);
duke@435:   emit_operand(rsp, src);
duke@435: }
duke@435: 
duke@435: void Assembler::mull(Register src) {
duke@435:   // was missing
duke@435:   int encode = prefix_and_encode(src->encoding());
duke@435:   emit_byte(0xF7);
duke@435:   emit_byte(0xE0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::negl(Register dst) {
duke@435:   int encode = prefix_and_encode(dst->encoding());
duke@435:   emit_byte(0xF7);
duke@435:   emit_byte(0xD8 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::negq(Register dst) {
duke@435:   int encode = prefixq_and_encode(dst->encoding());
duke@435:   emit_byte(0xF7);
duke@435:   emit_byte(0xD8 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::notl(Register dst) {
duke@435:   int encode = prefix_and_encode(dst->encoding());
duke@435:   emit_byte(0xF7);
duke@435:   emit_byte(0xD0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::notq(Register dst) {
duke@435:   int encode = prefixq_and_encode(dst->encoding());
duke@435:   emit_byte(0xF7);
duke@435:   emit_byte(0xD0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::orl(Address dst, int imm32) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(dst);
duke@435:   emit_byte(0x81);
duke@435:   emit_operand(rcx, dst, 4);
duke@435:   emit_long(imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::orl(Register dst, int imm32) {
duke@435:   prefix(dst);
duke@435:   emit_arith(0x81, 0xC8, dst, imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::orl(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0B);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::orl(Register dst, Register src) {
duke@435:   (void) prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_arith(0x0B, 0xC0, dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::orq(Address dst, int imm32) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(dst);
duke@435:   emit_byte(0x81);
duke@435:   emit_operand(rcx, dst, 4);
duke@435:   emit_long(imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::orq(Register dst, int imm32) {
duke@435:   (void) prefixq_and_encode(dst->encoding());
duke@435:   emit_arith(0x81, 0xC8, dst, imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::orq(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(src, dst);
duke@435:   emit_byte(0x0B);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::orq(Register dst, Register src) {
duke@435:   (void) prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_arith(0x0B, 0xC0, dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::rcll(Register dst, int imm8) {
duke@435:   assert(isShiftCount(imm8), "illegal shift count");
duke@435:   int encode = prefix_and_encode(dst->encoding());
duke@435:   if (imm8 == 1) {
duke@435:     emit_byte(0xD1);
duke@435:     emit_byte(0xD0 | encode);
duke@435:   } else {
duke@435:     emit_byte(0xC1);
duke@435:     emit_byte(0xD0 | encode);
duke@435:     emit_byte(imm8);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::rclq(Register dst, int imm8) {
duke@435:   assert(isShiftCount(imm8 >> 1), "illegal shift count");
duke@435:   int encode = prefixq_and_encode(dst->encoding());
duke@435:   if (imm8 == 1) {
duke@435:     emit_byte(0xD1);
duke@435:     emit_byte(0xD0 | encode);
duke@435:   } else {
duke@435:     emit_byte(0xC1);
duke@435:     emit_byte(0xD0 | encode);
duke@435:     emit_byte(imm8);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::sarl(Register dst, int imm8) {
duke@435:   int encode = prefix_and_encode(dst->encoding());
duke@435:   assert(isShiftCount(imm8), "illegal shift count");
duke@435:   if (imm8 == 1) {
duke@435:     emit_byte(0xD1);
duke@435:     emit_byte(0xF8 | encode);
duke@435:   } else {
duke@435:     emit_byte(0xC1);
duke@435:     emit_byte(0xF8 | encode);
duke@435:     emit_byte(imm8);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::sarl(Register dst) {
duke@435:   int encode = prefix_and_encode(dst->encoding());
duke@435:   emit_byte(0xD3);
duke@435:   emit_byte(0xF8 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::sarq(Register dst, int imm8) {
duke@435:   assert(isShiftCount(imm8 >> 1), "illegal shift count");
duke@435:   int encode = prefixq_and_encode(dst->encoding());
duke@435:   if (imm8 == 1) {
duke@435:     emit_byte(0xD1);
duke@435:     emit_byte(0xF8 | encode);
duke@435:   } else {
duke@435:     emit_byte(0xC1);
duke@435:     emit_byte(0xF8 | encode);
duke@435:     emit_byte(imm8);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::sarq(Register dst) {
duke@435:   int encode = prefixq_and_encode(dst->encoding());
duke@435:   emit_byte(0xD3);
duke@435:   emit_byte(0xF8 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::sbbl(Address dst, int imm32) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(dst);
duke@435:   emit_arith_operand(0x81, rbx, dst, imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::sbbl(Register dst, int imm32) {
duke@435:   prefix(dst);
duke@435:   emit_arith(0x81, 0xD8, dst, imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::sbbl(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x1B);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::sbbl(Register dst, Register src) {
duke@435:   (void) prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_arith(0x1B, 0xC0, dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::sbbq(Address dst, int imm32) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(dst);
duke@435:   emit_arith_operand(0x81, rbx, dst, imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::sbbq(Register dst, int imm32) {
duke@435:   (void) prefixq_and_encode(dst->encoding());
duke@435:   emit_arith(0x81, 0xD8, dst, imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::sbbq(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(src, dst);
duke@435:   emit_byte(0x1B);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::sbbq(Register dst, Register src) {
duke@435:   (void) prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_arith(0x1B, 0xC0, dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::shll(Register dst, int imm8) {
duke@435:   assert(isShiftCount(imm8), "illegal shift count");
duke@435:   int encode = prefix_and_encode(dst->encoding());
duke@435:   if (imm8 == 1 ) {
duke@435:     emit_byte(0xD1);
duke@435:     emit_byte(0xE0 | encode);
duke@435:   } else {
duke@435:     emit_byte(0xC1);
duke@435:     emit_byte(0xE0 | encode);
duke@435:     emit_byte(imm8);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::shll(Register dst) {
duke@435:   int encode = prefix_and_encode(dst->encoding());
duke@435:   emit_byte(0xD3);
duke@435:   emit_byte(0xE0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::shlq(Register dst, int imm8) {
duke@435:   assert(isShiftCount(imm8 >> 1), "illegal shift count");
duke@435:   int encode = prefixq_and_encode(dst->encoding());
duke@435:   if (imm8 == 1) {
duke@435:     emit_byte(0xD1);
duke@435:     emit_byte(0xE0 | encode);
duke@435:   } else {
duke@435:     emit_byte(0xC1);
duke@435:     emit_byte(0xE0 | encode);
duke@435:     emit_byte(imm8);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::shlq(Register dst) {
duke@435:   int encode = prefixq_and_encode(dst->encoding());
duke@435:   emit_byte(0xD3);
duke@435:   emit_byte(0xE0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::shrl(Register dst, int imm8) {
duke@435:   assert(isShiftCount(imm8), "illegal shift count");
duke@435:   int encode = prefix_and_encode(dst->encoding());
duke@435:   emit_byte(0xC1);
duke@435:   emit_byte(0xE8 | encode);
duke@435:   emit_byte(imm8);
duke@435: }
duke@435: 
duke@435: void Assembler::shrl(Register dst) {
duke@435:   int encode = prefix_and_encode(dst->encoding());
duke@435:   emit_byte(0xD3);
duke@435:   emit_byte(0xE8 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::shrq(Register dst, int imm8) {
duke@435:   assert(isShiftCount(imm8 >> 1), "illegal shift count");
duke@435:   int encode = prefixq_and_encode(dst->encoding());
duke@435:   emit_byte(0xC1);
duke@435:   emit_byte(0xE8 | encode);
duke@435:   emit_byte(imm8);
duke@435: }
duke@435: 
duke@435: void Assembler::shrq(Register dst) {
duke@435:   int encode = prefixq_and_encode(dst->encoding());
duke@435:   emit_byte(0xD3);
duke@435:   emit_byte(0xE8 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::subl(Address dst, int imm32) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(dst);
duke@435:   if (is8bit(imm32)) {
duke@435:     emit_byte(0x83);
duke@435:     emit_operand(rbp, dst, 1);
duke@435:     emit_byte(imm32 & 0xFF);
duke@435:   } else {
duke@435:     emit_byte(0x81);
duke@435:     emit_operand(rbp, dst, 4);
duke@435:     emit_long(imm32);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::subl(Register dst, int imm32) {
duke@435:   prefix(dst);
duke@435:   emit_arith(0x81, 0xE8, dst, imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::subl(Address dst, Register src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(dst, src);
duke@435:   emit_byte(0x29);
duke@435:   emit_operand(src, dst);
duke@435: }
duke@435: 
duke@435: void Assembler::subl(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x2B);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::subl(Register dst, Register src) {
duke@435:   (void) prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_arith(0x2B, 0xC0, dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::subq(Address dst, int imm32) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(dst);
duke@435:   if (is8bit(imm32)) {
duke@435:     emit_byte(0x83);
duke@435:     emit_operand(rbp, dst, 1);
duke@435:     emit_byte(imm32 & 0xFF);
duke@435:   } else {
duke@435:     emit_byte(0x81);
duke@435:     emit_operand(rbp, dst, 4);
duke@435:     emit_long(imm32);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::subq(Register dst, int imm32) {
duke@435:   (void) prefixq_and_encode(dst->encoding());
duke@435:   emit_arith(0x81, 0xE8, dst, imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::subq(Address dst, Register src) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(dst, src);
duke@435:   emit_byte(0x29);
duke@435:   emit_operand(src, dst);
duke@435: }
duke@435: 
duke@435: void Assembler::subq(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(src, dst);
duke@435:   emit_byte(0x2B);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::subq(Register dst, Register src) {
duke@435:   (void) prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_arith(0x2B, 0xC0, dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::testb(Register dst, int imm8) {
duke@435:   (void) prefix_and_encode(dst->encoding(), true);
duke@435:   emit_arith_b(0xF6, 0xC0, dst, imm8);
duke@435: }
duke@435: 
duke@435: void Assembler::testl(Register dst, int imm32) {
duke@435:   // not using emit_arith because test
duke@435:   // doesn't support sign-extension of
duke@435:   // 8bit operands
duke@435:   int encode = dst->encoding();
duke@435:   if (encode == 0) {
duke@435:     emit_byte(0xA9);
duke@435:   } else {
duke@435:     encode = prefix_and_encode(encode);
duke@435:     emit_byte(0xF7);
duke@435:     emit_byte(0xC0 | encode);
duke@435:   }
duke@435:   emit_long(imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::testl(Register dst, Register src) {
duke@435:   (void) prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_arith(0x85, 0xC0, dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::testq(Register dst, int imm32) {
duke@435:   // not using emit_arith because test
duke@435:   // doesn't support sign-extension of
duke@435:   // 8bit operands
duke@435:   int encode = dst->encoding();
duke@435:   if (encode == 0) {
duke@435:     prefix(REX_W);
duke@435:     emit_byte(0xA9);
duke@435:   } else {
duke@435:     encode = prefixq_and_encode(encode);
duke@435:     emit_byte(0xF7);
duke@435:     emit_byte(0xC0 | encode);
duke@435:   }
duke@435:   emit_long(imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::testq(Register dst, Register src) {
duke@435:   (void) prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_arith(0x85, 0xC0, dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::xaddl(Address dst, Register src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(dst, src);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xC1);
duke@435:   emit_operand(src, dst);
duke@435: }
duke@435: 
duke@435: void Assembler::xaddq(Address dst, Register src) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(dst, src);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xC1);
duke@435:   emit_operand(src, dst);
duke@435: }
duke@435: 
duke@435: void Assembler::xorl(Register dst, int imm32) {
duke@435:   prefix(dst);
duke@435:   emit_arith(0x81, 0xF0, dst, imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::xorl(Register dst, Register src) {
duke@435:   (void) prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_arith(0x33, 0xC0, dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::xorl(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x33);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::xorq(Register dst, int imm32) {
duke@435:   (void) prefixq_and_encode(dst->encoding());
duke@435:   emit_arith(0x81, 0xF0, dst, imm32);
duke@435: }
duke@435: 
duke@435: void Assembler::xorq(Register dst, Register src) {
duke@435:   (void) prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_arith(0x33, 0xC0, dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::xorq(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(src, dst);
duke@435:   emit_byte(0x33);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::bswapl(Register reg) {
duke@435:   int encode = prefix_and_encode(reg->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xC8 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::bswapq(Register reg) {
duke@435:   int encode = prefixq_and_encode(reg->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xC8 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::lock() {
duke@435:   emit_byte(0xF0);
duke@435: }
duke@435: 
duke@435: void Assembler::xchgl(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x87);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::xchgl(Register dst, Register src) {
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x87);
duke@435:   emit_byte(0xc0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::xchgq(Register dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(src, dst);
duke@435:   emit_byte(0x87);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::xchgq(Register dst, Register src) {
duke@435:   int encode = prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x87);
duke@435:   emit_byte(0xc0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::cmpxchgl(Register reg, Address adr) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(adr, reg);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xB1);
duke@435:   emit_operand(reg, adr);
duke@435: }
duke@435: 
duke@435: void Assembler::cmpxchgq(Register reg, Address adr) {
duke@435:   InstructionMark im(this);
duke@435:   prefixq(adr, reg);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xB1);
duke@435:   emit_operand(reg, adr);
duke@435: }
duke@435: 
duke@435: void Assembler::hlt() {
duke@435:   emit_byte(0xF4);
duke@435: }
duke@435: 
duke@435: 
duke@435: void Assembler::addr_nop_4() {
duke@435:   // 4 bytes: NOP DWORD PTR [EAX+0]
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x1F);
duke@435:   emit_byte(0x40); // emit_rm(cbuf, 0x1, EAX_enc, EAX_enc);
duke@435:   emit_byte(0);    // 8-bits offset (1 byte)
duke@435: }
duke@435: 
duke@435: void Assembler::addr_nop_5() {
duke@435:   // 5 bytes: NOP DWORD PTR [EAX+EAX*0+0] 8-bits offset
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x1F);
duke@435:   emit_byte(0x44); // emit_rm(cbuf, 0x1, EAX_enc, 0x4);
duke@435:   emit_byte(0x00); // emit_rm(cbuf, 0x0, EAX_enc, EAX_enc);
duke@435:   emit_byte(0);    // 8-bits offset (1 byte)
duke@435: }
duke@435: 
duke@435: void Assembler::addr_nop_7() {
duke@435:   // 7 bytes: NOP DWORD PTR [EAX+0] 32-bits offset
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x1F);
duke@435:   emit_byte(0x80); // emit_rm(cbuf, 0x2, EAX_enc, EAX_enc);
duke@435:   emit_long(0);    // 32-bits offset (4 bytes)
duke@435: }
duke@435: 
duke@435: void Assembler::addr_nop_8() {
duke@435:   // 8 bytes: NOP DWORD PTR [EAX+EAX*0+0] 32-bits offset
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x1F);
duke@435:   emit_byte(0x84); // emit_rm(cbuf, 0x2, EAX_enc, 0x4);
duke@435:   emit_byte(0x00); // emit_rm(cbuf, 0x0, EAX_enc, EAX_enc);
duke@435:   emit_long(0);    // 32-bits offset (4 bytes)
duke@435: }
duke@435: 
duke@435: void Assembler::nop(int i) {
duke@435:   assert(i > 0, " ");
duke@435:   if (UseAddressNop && VM_Version::is_intel()) {
duke@435:     //
duke@435:     // Using multi-bytes nops "0x0F 0x1F [address]" for Intel
duke@435:     //  1: 0x90
duke@435:     //  2: 0x66 0x90
duke@435:     //  3: 0x66 0x66 0x90 (don't use "0x0F 0x1F 0x00" - need patching safe padding)
duke@435:     //  4: 0x0F 0x1F 0x40 0x00
duke@435:     //  5: 0x0F 0x1F 0x44 0x00 0x00
duke@435:     //  6: 0x66 0x0F 0x1F 0x44 0x00 0x00
duke@435:     //  7: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00
duke@435:     //  8: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00
duke@435:     //  9: 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00
duke@435:     // 10: 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00
duke@435:     // 11: 0x66 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00
duke@435: 
duke@435:     // The rest coding is Intel specific - don't use consecutive address nops
duke@435: 
duke@435:     // 12: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90
duke@435:     // 13: 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90
duke@435:     // 14: 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90
duke@435:     // 15: 0x66 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90
duke@435: 
duke@435:     while(i >= 15) {
duke@435:       // For Intel don't generate consecutive addess nops (mix with regular nops)
duke@435:       i -= 15;
duke@435:       emit_byte(0x66);   // size prefix
duke@435:       emit_byte(0x66);   // size prefix
duke@435:       emit_byte(0x66);   // size prefix
duke@435:       addr_nop_8();
duke@435:       emit_byte(0x66);   // size prefix
duke@435:       emit_byte(0x66);   // size prefix
duke@435:       emit_byte(0x66);   // size prefix
duke@435:       emit_byte(0x90);   // nop
duke@435:     }
duke@435:     switch (i) {
duke@435:       case 14:
duke@435:         emit_byte(0x66); // size prefix
duke@435:       case 13:
duke@435:         emit_byte(0x66); // size prefix
duke@435:       case 12:
duke@435:         addr_nop_8();
duke@435:         emit_byte(0x66); // size prefix
duke@435:         emit_byte(0x66); // size prefix
duke@435:         emit_byte(0x66); // size prefix
duke@435:         emit_byte(0x90); // nop
duke@435:         break;
duke@435:       case 11:
duke@435:         emit_byte(0x66); // size prefix
duke@435:       case 10:
duke@435:         emit_byte(0x66); // size prefix
duke@435:       case 9:
duke@435:         emit_byte(0x66); // size prefix
duke@435:       case 8:
duke@435:         addr_nop_8();
duke@435:         break;
duke@435:       case 7:
duke@435:         addr_nop_7();
duke@435:         break;
duke@435:       case 6:
duke@435:         emit_byte(0x66); // size prefix
duke@435:       case 5:
duke@435:         addr_nop_5();
duke@435:         break;
duke@435:       case 4:
duke@435:         addr_nop_4();
duke@435:         break;
duke@435:       case 3:
duke@435:         // Don't use "0x0F 0x1F 0x00" - need patching safe padding
duke@435:         emit_byte(0x66); // size prefix
duke@435:       case 2:
duke@435:         emit_byte(0x66); // size prefix
duke@435:       case 1:
duke@435:         emit_byte(0x90); // nop
duke@435:         break;
duke@435:       default:
duke@435:         assert(i == 0, " ");
duke@435:     }
duke@435:     return;
duke@435:   }
duke@435:   if (UseAddressNop && VM_Version::is_amd()) {
duke@435:     //
duke@435:     // Using multi-bytes nops "0x0F 0x1F [address]" for AMD.
duke@435:     //  1: 0x90
duke@435:     //  2: 0x66 0x90
duke@435:     //  3: 0x66 0x66 0x90 (don't use "0x0F 0x1F 0x00" - need patching safe padding)
duke@435:     //  4: 0x0F 0x1F 0x40 0x00
duke@435:     //  5: 0x0F 0x1F 0x44 0x00 0x00
duke@435:     //  6: 0x66 0x0F 0x1F 0x44 0x00 0x00
duke@435:     //  7: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00
duke@435:     //  8: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00
duke@435:     //  9: 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00
duke@435:     // 10: 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00
duke@435:     // 11: 0x66 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00
duke@435: 
duke@435:     // The rest coding is AMD specific - use consecutive address nops
duke@435: 
duke@435:     // 12: 0x66 0x0F 0x1F 0x44 0x00 0x00 0x66 0x0F 0x1F 0x44 0x00 0x00
duke@435:     // 13: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 0x66 0x0F 0x1F 0x44 0x00 0x00
duke@435:     // 14: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00
duke@435:     // 15: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00
duke@435:     // 16: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00
duke@435:     //     Size prefixes (0x66) are added for larger sizes
duke@435: 
duke@435:     while(i >= 22) {
duke@435:       i -= 11;
duke@435:       emit_byte(0x66); // size prefix
duke@435:       emit_byte(0x66); // size prefix
duke@435:       emit_byte(0x66); // size prefix
duke@435:       addr_nop_8();
duke@435:     }
duke@435:     // Generate first nop for size between 21-12
duke@435:     switch (i) {
duke@435:       case 21:
duke@435:         i -= 1;
duke@435:         emit_byte(0x66); // size prefix
duke@435:       case 20:
duke@435:       case 19:
duke@435:         i -= 1;
duke@435:         emit_byte(0x66); // size prefix
duke@435:       case 18:
duke@435:       case 17:
duke@435:         i -= 1;
duke@435:         emit_byte(0x66); // size prefix
duke@435:       case 16:
duke@435:       case 15:
duke@435:         i -= 8;
duke@435:         addr_nop_8();
duke@435:         break;
duke@435:       case 14:
duke@435:       case 13:
duke@435:         i -= 7;
duke@435:         addr_nop_7();
duke@435:         break;
duke@435:       case 12:
duke@435:         i -= 6;
duke@435:         emit_byte(0x66); // size prefix
duke@435:         addr_nop_5();
duke@435:         break;
duke@435:       default:
duke@435:         assert(i < 12, " ");
duke@435:     }
duke@435: 
duke@435:     // Generate second nop for size between 11-1
duke@435:     switch (i) {
duke@435:       case 11:
duke@435:         emit_byte(0x66); // size prefix
duke@435:       case 10:
duke@435:         emit_byte(0x66); // size prefix
duke@435:       case 9:
duke@435:         emit_byte(0x66); // size prefix
duke@435:       case 8:
duke@435:         addr_nop_8();
duke@435:         break;
duke@435:       case 7:
duke@435:         addr_nop_7();
duke@435:         break;
duke@435:       case 6:
duke@435:         emit_byte(0x66); // size prefix
duke@435:       case 5:
duke@435:         addr_nop_5();
duke@435:         break;
duke@435:       case 4:
duke@435:         addr_nop_4();
duke@435:         break;
duke@435:       case 3:
duke@435:         // Don't use "0x0F 0x1F 0x00" - need patching safe padding
duke@435:         emit_byte(0x66); // size prefix
duke@435:       case 2:
duke@435:         emit_byte(0x66); // size prefix
duke@435:       case 1:
duke@435:         emit_byte(0x90); // nop
duke@435:         break;
duke@435:       default:
duke@435:         assert(i == 0, " ");
duke@435:     }
duke@435:     return;
duke@435:   }
duke@435: 
duke@435:   // Using nops with size prefixes "0x66 0x90".
duke@435:   // From AMD Optimization Guide:
duke@435:   //  1: 0x90
duke@435:   //  2: 0x66 0x90
duke@435:   //  3: 0x66 0x66 0x90
duke@435:   //  4: 0x66 0x66 0x66 0x90
duke@435:   //  5: 0x66 0x66 0x90 0x66 0x90
duke@435:   //  6: 0x66 0x66 0x90 0x66 0x66 0x90
duke@435:   //  7: 0x66 0x66 0x66 0x90 0x66 0x66 0x90
duke@435:   //  8: 0x66 0x66 0x66 0x90 0x66 0x66 0x66 0x90
duke@435:   //  9: 0x66 0x66 0x90 0x66 0x66 0x90 0x66 0x66 0x90
duke@435:   // 10: 0x66 0x66 0x66 0x90 0x66 0x66 0x90 0x66 0x66 0x90
duke@435:   //
duke@435:   while(i > 12) {
duke@435:     i -= 4;
duke@435:     emit_byte(0x66); // size prefix
duke@435:     emit_byte(0x66);
duke@435:     emit_byte(0x66);
duke@435:     emit_byte(0x90); // nop
duke@435:   }
duke@435:   // 1 - 12 nops
duke@435:   if(i > 8) {
duke@435:     if(i > 9) {
duke@435:       i -= 1;
duke@435:       emit_byte(0x66);
duke@435:     }
duke@435:     i -= 3;
duke@435:     emit_byte(0x66);
duke@435:     emit_byte(0x66);
duke@435:     emit_byte(0x90);
duke@435:   }
duke@435:   // 1 - 8 nops
duke@435:   if(i > 4) {
duke@435:     if(i > 6) {
duke@435:       i -= 1;
duke@435:       emit_byte(0x66);
duke@435:     }
duke@435:     i -= 3;
duke@435:     emit_byte(0x66);
duke@435:     emit_byte(0x66);
duke@435:     emit_byte(0x90);
duke@435:   }
duke@435:   switch (i) {
duke@435:     case 4:
duke@435:       emit_byte(0x66);
duke@435:     case 3:
duke@435:       emit_byte(0x66);
duke@435:     case 2:
duke@435:       emit_byte(0x66);
duke@435:     case 1:
duke@435:       emit_byte(0x90);
duke@435:       break;
duke@435:     default:
duke@435:       assert(i == 0, " ");
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::ret(int imm16) {
duke@435:   if (imm16 == 0) {
duke@435:     emit_byte(0xC3);
duke@435:   } else {
duke@435:     emit_byte(0xC2);
duke@435:     emit_word(imm16);
duke@435:   }
duke@435: }
duke@435: 
duke@435: // copies a single word from [esi] to [edi]
duke@435: void Assembler::smovl() {
duke@435:   emit_byte(0xA5);
duke@435: }
duke@435: 
duke@435: // copies data from [rsi] to [rdi] using rcx words (m32)
duke@435: void Assembler::rep_movl() {
duke@435:   // REP
duke@435:   emit_byte(0xF3);
duke@435:   // MOVSL
duke@435:   emit_byte(0xA5);
duke@435: }
duke@435: 
duke@435: // copies data from [rsi] to [rdi] using rcx double words (m64)
duke@435: void Assembler::rep_movq() {
duke@435:   // REP
duke@435:   emit_byte(0xF3);
duke@435:   // MOVSQ
duke@435:   prefix(REX_W);
duke@435:   emit_byte(0xA5);
duke@435: }
duke@435: 
duke@435: // sets rcx double words (m64) with rax value at [rdi]
duke@435: void Assembler::rep_set() {
duke@435:   // REP
duke@435:   emit_byte(0xF3);
duke@435:   // STOSQ
duke@435:   prefix(REX_W);
duke@435:   emit_byte(0xAB);
duke@435: }
duke@435: 
duke@435: // scans rcx double words (m64) at [rdi] for occurance of rax
duke@435: void Assembler::repne_scan() {
duke@435:   // REPNE/REPNZ
duke@435:   emit_byte(0xF2);
duke@435:   // SCASQ
duke@435:   prefix(REX_W);
duke@435:   emit_byte(0xAF);
duke@435: }
duke@435: 
duke@435: void Assembler::setb(Condition cc, Register dst) {
duke@435:   assert(0 <= cc && cc < 16, "illegal cc");
duke@435:   int encode = prefix_and_encode(dst->encoding(), true);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x90 | cc);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::clflush(Address adr) {
duke@435:   prefix(adr);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xAE);
duke@435:   emit_operand(rdi, adr);
duke@435: }
duke@435: 
duke@435: void Assembler::call(Label& L, relocInfo::relocType rtype) {
duke@435:   if (L.is_bound()) {
duke@435:     const int long_size = 5;
duke@435:     int offs = (int)( target(L) - pc() );
duke@435:     assert(offs <= 0, "assembler error");
duke@435:     InstructionMark im(this);
duke@435:     // 1110 1000 #32-bit disp
duke@435:     emit_byte(0xE8);
duke@435:     emit_data(offs - long_size, rtype, disp32_operand);
duke@435:   } else {
duke@435:     InstructionMark im(this);
duke@435:     // 1110 1000 #32-bit disp
duke@435:     L.add_patch_at(code(), locator());
duke@435: 
duke@435:     emit_byte(0xE8);
duke@435:     emit_data(int(0), rtype, disp32_operand);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::call_literal(address entry, RelocationHolder const& rspec) {
duke@435:   assert(entry != NULL, "call most probably wrong");
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0xE8);
duke@435:   intptr_t disp = entry - (_code_pos + sizeof(int32_t));
duke@435:   assert(is_simm32(disp), "must be 32bit offset (call2)");
duke@435:   // Technically, should use call32_operand, but this format is
duke@435:   // implied by the fact that we're emitting a call instruction.
duke@435:   emit_data((int) disp, rspec, disp32_operand);
duke@435: }
duke@435: 
duke@435: 
duke@435: void Assembler::call(Register dst) {
duke@435:   // This was originally using a 32bit register encoding
duke@435:   // and surely we want 64bit!
duke@435:   // this is a 32bit encoding but in 64bit mode the default
duke@435:   // operand size is 64bit so there is no need for the
duke@435:   // wide prefix. So prefix only happens if we use the
duke@435:   // new registers. Much like push/pop.
duke@435:   int encode = prefixq_and_encode(dst->encoding());
duke@435:   emit_byte(0xFF);
duke@435:   emit_byte(0xD0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::call(Address adr) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(adr);
duke@435:   emit_byte(0xFF);
duke@435:   emit_operand(rdx, adr);
duke@435: }
duke@435: 
duke@435: void Assembler::jmp(Register reg) {
duke@435:   int encode = prefix_and_encode(reg->encoding());
duke@435:   emit_byte(0xFF);
duke@435:   emit_byte(0xE0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::jmp(Address adr) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(adr);
duke@435:   emit_byte(0xFF);
duke@435:   emit_operand(rsp, adr);
duke@435: }
duke@435: 
duke@435: void Assembler::jmp_literal(address dest, RelocationHolder const& rspec) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0xE9);
duke@435:   assert(dest != NULL, "must have a target");
duke@435:   intptr_t disp = dest - (_code_pos + sizeof(int32_t));
duke@435:   assert(is_simm32(disp), "must be 32bit offset (jmp)");
duke@435:   emit_data(disp, rspec.reloc(), call32_operand);
duke@435: }
duke@435: 
duke@435: void Assembler::jmp(Label& L, relocInfo::relocType rtype) {
duke@435:   if (L.is_bound()) {
duke@435:     address entry = target(L);
duke@435:     assert(entry != NULL, "jmp most probably wrong");
duke@435:     InstructionMark im(this);
duke@435:     const int short_size = 2;
duke@435:     const int long_size = 5;
duke@435:     intptr_t offs = entry - _code_pos;
duke@435:     if (rtype == relocInfo::none && is8bit(offs - short_size)) {
duke@435:       emit_byte(0xEB);
duke@435:       emit_byte((offs - short_size) & 0xFF);
duke@435:     } else {
duke@435:       emit_byte(0xE9);
duke@435:       emit_long(offs - long_size);
duke@435:     }
duke@435:   } else {
duke@435:     // By default, forward jumps are always 32-bit displacements, since
duke@435:     // we can't yet know where the label will be bound.  If you're sure that
duke@435:     // the forward jump will not run beyond 256 bytes, use jmpb to
duke@435:     // force an 8-bit displacement.
duke@435:     InstructionMark im(this);
duke@435:     relocate(rtype);
duke@435:     L.add_patch_at(code(), locator());
duke@435:     emit_byte(0xE9);
duke@435:     emit_long(0);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::jmpb(Label& L) {
duke@435:   if (L.is_bound()) {
duke@435:     const int short_size = 2;
duke@435:     address entry = target(L);
duke@435:     assert(is8bit((entry - _code_pos) + short_size),
duke@435:            "Dispacement too large for a short jmp");
duke@435:     assert(entry != NULL, "jmp most probably wrong");
duke@435:     intptr_t offs = entry - _code_pos;
duke@435:     emit_byte(0xEB);
duke@435:     emit_byte((offs - short_size) & 0xFF);
duke@435:   } else {
duke@435:     InstructionMark im(this);
duke@435:     L.add_patch_at(code(), locator());
duke@435:     emit_byte(0xEB);
duke@435:     emit_byte(0);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::jcc(Condition cc, Label& L, relocInfo::relocType rtype) {
duke@435:   InstructionMark im(this);
duke@435:   relocate(rtype);
duke@435:   assert((0 <= cc) && (cc < 16), "illegal cc");
duke@435:   if (L.is_bound()) {
duke@435:     address dst = target(L);
duke@435:     assert(dst != NULL, "jcc most probably wrong");
duke@435: 
duke@435:     const int short_size = 2;
duke@435:     const int long_size = 6;
duke@435:     intptr_t offs = (intptr_t)dst - (intptr_t)_code_pos;
duke@435:     if (rtype == relocInfo::none && is8bit(offs - short_size)) {
duke@435:       // 0111 tttn #8-bit disp
duke@435:       emit_byte(0x70 | cc);
duke@435:       emit_byte((offs - short_size) & 0xFF);
duke@435:     } else {
duke@435:       // 0000 1111 1000 tttn #32-bit disp
duke@435:       assert(is_simm32(offs - long_size),
duke@435:              "must be 32bit offset (call4)");
duke@435:       emit_byte(0x0F);
duke@435:       emit_byte(0x80 | cc);
duke@435:       emit_long(offs - long_size);
duke@435:     }
duke@435:   } else {
duke@435:     // Note: could eliminate cond. jumps to this jump if condition
duke@435:     //       is the same however, seems to be rather unlikely case.
duke@435:     // Note: use jccb() if label to be bound is very close to get
duke@435:     //       an 8-bit displacement
duke@435:     L.add_patch_at(code(), locator());
duke@435:     emit_byte(0x0F);
duke@435:     emit_byte(0x80 | cc);
duke@435:     emit_long(0);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void Assembler::jccb(Condition cc, Label& L) {
duke@435:   if (L.is_bound()) {
duke@435:     const int short_size = 2;
duke@435:     const int long_size = 6;
duke@435:     address entry = target(L);
duke@435:     assert(is8bit((intptr_t)entry - ((intptr_t)_code_pos + short_size)),
duke@435:            "Dispacement too large for a short jmp");
duke@435:     intptr_t offs = (intptr_t)entry - (intptr_t)_code_pos;
duke@435:     // 0111 tttn #8-bit disp
duke@435:     emit_byte(0x70 | cc);
duke@435:     emit_byte((offs - short_size) & 0xFF);
duke@435:   } else {
duke@435:     InstructionMark im(this);
duke@435:     L.add_patch_at(code(), locator());
duke@435:     emit_byte(0x70 | cc);
duke@435:     emit_byte(0);
duke@435:   }
duke@435: }
duke@435: 
duke@435: // FP instructions
duke@435: 
duke@435: void Assembler::fxsave(Address dst) {
duke@435:   prefixq(dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xAE);
duke@435:   emit_operand(as_Register(0), dst);
duke@435: }
duke@435: 
duke@435: void Assembler::fxrstor(Address src) {
duke@435:   prefixq(src);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xAE);
duke@435:   emit_operand(as_Register(1), src);
duke@435: }
duke@435: 
duke@435: void Assembler::ldmxcsr(Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(src);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xAE);
duke@435:   emit_operand(as_Register(2), src);
duke@435: }
duke@435: 
duke@435: void Assembler::stmxcsr(Address dst) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0xAE);
duke@435:   emit_operand(as_Register(3), dst);
duke@435: }
duke@435: 
duke@435: void Assembler::addss(XMMRegister dst, XMMRegister src) {
duke@435:   emit_byte(0xF3);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x58);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::addss(XMMRegister dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0xF3);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x58);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::subss(XMMRegister dst, XMMRegister src) {
duke@435:   emit_byte(0xF3);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x5C);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::subss(XMMRegister dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0xF3);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x5C);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::mulss(XMMRegister dst, XMMRegister src) {
duke@435:   emit_byte(0xF3);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x59);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::mulss(XMMRegister dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0xF3);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x59);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::divss(XMMRegister dst, XMMRegister src) {
duke@435:   emit_byte(0xF3);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x5E);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::divss(XMMRegister dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0xF3);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x5E);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::addsd(XMMRegister dst, XMMRegister src) {
duke@435:   emit_byte(0xF2);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x58);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::addsd(XMMRegister dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0xF2);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x58);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::subsd(XMMRegister dst, XMMRegister src) {
duke@435:   emit_byte(0xF2);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x5C);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::subsd(XMMRegister dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0xF2);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x5C);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::mulsd(XMMRegister dst, XMMRegister src) {
duke@435:   emit_byte(0xF2);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x59);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::mulsd(XMMRegister dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0xF2);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x59);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::divsd(XMMRegister dst, XMMRegister src) {
duke@435:   emit_byte(0xF2);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x5E);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::divsd(XMMRegister dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0xF2);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x5E);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) {
duke@435:   emit_byte(0xF2);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x51);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::sqrtsd(XMMRegister dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0xF2);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x51);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::xorps(XMMRegister dst, XMMRegister src) {
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x57);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::xorps(XMMRegister dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x57);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::xorpd(XMMRegister dst, XMMRegister src) {
duke@435:   emit_byte(0x66);
duke@435:   xorps(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::xorpd(XMMRegister dst, Address src) {
duke@435:   InstructionMark im(this);
duke@435:   emit_byte(0x66);
duke@435:   prefix(src, dst);
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x57);
duke@435:   emit_operand(dst, src);
duke@435: }
duke@435: 
duke@435: void Assembler::cvtsi2ssl(XMMRegister dst, Register src) {
duke@435:   emit_byte(0xF3);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x2A);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::cvtsi2ssq(XMMRegister dst, Register src) {
duke@435:   emit_byte(0xF3);
duke@435:   int encode = prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x2A);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::cvtsi2sdl(XMMRegister dst, Register src) {
duke@435:   emit_byte(0xF2);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x2A);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::cvtsi2sdq(XMMRegister dst, Register src) {
duke@435:   emit_byte(0xF2);
duke@435:   int encode = prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x2A);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::cvttss2sil(Register dst, XMMRegister src) {
duke@435:   emit_byte(0xF3);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x2C);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::cvttss2siq(Register dst, XMMRegister src) {
duke@435:   emit_byte(0xF3);
duke@435:   int encode = prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x2C);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::cvttsd2sil(Register dst, XMMRegister src) {
duke@435:   emit_byte(0xF2);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x2C);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::cvttsd2siq(Register dst, XMMRegister src) {
duke@435:   emit_byte(0xF2);
duke@435:   int encode = prefixq_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x2C);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) {
duke@435:   emit_byte(0xF3);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x5A);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
kvn@506: void Assembler::cvtdq2pd(XMMRegister dst, XMMRegister src) {
kvn@506:   emit_byte(0xF3);
kvn@506:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
kvn@506:   emit_byte(0x0F);
kvn@506:   emit_byte(0xE6);
kvn@506:   emit_byte(0xC0 | encode);
kvn@506: }
kvn@506: 
kvn@506: void Assembler::cvtdq2ps(XMMRegister dst, XMMRegister src) {
kvn@506:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
kvn@506:   emit_byte(0x0F);
kvn@506:   emit_byte(0x5B);
kvn@506:   emit_byte(0xC0 | encode);
kvn@506: }
kvn@506: 
duke@435: void Assembler::cvtsd2ss(XMMRegister dst, XMMRegister src) {
duke@435:   emit_byte(0xF2);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x5A);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: void Assembler::punpcklbw(XMMRegister dst, XMMRegister src) {
duke@435:   emit_byte(0x66);
duke@435:   int encode = prefix_and_encode(dst->encoding(), src->encoding());
duke@435:   emit_byte(0x0F);
duke@435:   emit_byte(0x60);
duke@435:   emit_byte(0xC0 | encode);
duke@435: }
duke@435: 
duke@435: // Implementation of MacroAssembler
duke@435: 
duke@435: // On 32 bit it returns a vanilla displacement on 64 bit is a rip relative displacement
duke@435: Address MacroAssembler::as_Address(AddressLiteral adr) {
duke@435:   assert(!adr.is_lval(), "must be rval");
duke@435:   assert(reachable(adr), "must be");
duke@435:   return Address((int)(intptr_t)(adr.target() - pc()), adr.target(), adr.reloc());
duke@435: }
duke@435: 
duke@435: Address MacroAssembler::as_Address(ArrayAddress adr) {
duke@435: #ifdef _LP64
duke@435:   AddressLiteral base = adr.base();
duke@435:   lea(rscratch1, base);
duke@435:   Address index = adr.index();
duke@435:   assert(index._disp == 0, "must not have disp"); // maybe it can?
duke@435:   Address array(rscratch1, index._index, index._scale, index._disp);
duke@435:   return array;
duke@435: #else
duke@435:   return Address::make_array(adr);
duke@435: #endif // _LP64
duke@435: 
duke@435: }
duke@435: 
duke@435: void MacroAssembler::fat_nop() {
duke@435:   // A 5 byte nop that is safe for patching (see patch_verified_entry)
duke@435:   // Recommened sequence from 'Software Optimization Guide for the AMD
duke@435:   // Hammer Processor'
duke@435:   emit_byte(0x66);
duke@435:   emit_byte(0x66);
duke@435:   emit_byte(0x90);
duke@435:   emit_byte(0x66);
duke@435:   emit_byte(0x90);
duke@435: }
duke@435: 
duke@435: static Assembler::Condition reverse[] = {
duke@435:     Assembler::noOverflow     /* overflow      = 0x0 */ ,
duke@435:     Assembler::overflow       /* noOverflow    = 0x1 */ ,
duke@435:     Assembler::aboveEqual     /* carrySet      = 0x2, below         = 0x2 */ ,
duke@435:     Assembler::below          /* aboveEqual    = 0x3, carryClear    = 0x3 */ ,
duke@435:     Assembler::notZero        /* zero          = 0x4, equal         = 0x4 */ ,
duke@435:     Assembler::zero           /* notZero       = 0x5, notEqual      = 0x5 */ ,
duke@435:     Assembler::above          /* belowEqual    = 0x6 */ ,
duke@435:     Assembler::belowEqual     /* above         = 0x7 */ ,
duke@435:     Assembler::positive       /* negative      = 0x8 */ ,
duke@435:     Assembler::negative       /* positive      = 0x9 */ ,
duke@435:     Assembler::noParity       /* parity        = 0xa */ ,
duke@435:     Assembler::parity         /* noParity      = 0xb */ ,
duke@435:     Assembler::greaterEqual   /* less          = 0xc */ ,
duke@435:     Assembler::less           /* greaterEqual  = 0xd */ ,
duke@435:     Assembler::greater        /* lessEqual     = 0xe */ ,
duke@435:     Assembler::lessEqual      /* greater       = 0xf, */
duke@435: 
duke@435: };
duke@435: 
duke@435: // 32bit can do a case table jump in one instruction but we no longer allow the base
duke@435: // to be installed in the Address class
duke@435: void MacroAssembler::jump(ArrayAddress entry) {
duke@435: #ifdef _LP64
duke@435:   lea(rscratch1, entry.base());
duke@435:   Address dispatch = entry.index();
duke@435:   assert(dispatch._base == noreg, "must be");
duke@435:   dispatch._base = rscratch1;
duke@435:   jmp(dispatch);
duke@435: #else
duke@435:   jmp(as_Address(entry));
duke@435: #endif // _LP64
duke@435: }
duke@435: 
duke@435: void MacroAssembler::jump(AddressLiteral dst) {
duke@435:   if (reachable(dst)) {
duke@435:     jmp_literal(dst.target(), dst.rspec());
duke@435:   } else {
duke@435:     lea(rscratch1, dst);
duke@435:     jmp(rscratch1);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::jump_cc(Condition cc, AddressLiteral dst) {
duke@435:   if (reachable(dst)) {
duke@435:     InstructionMark im(this);
duke@435:     relocate(dst.reloc());
duke@435:     const int short_size = 2;
duke@435:     const int long_size = 6;
duke@435:     int offs = (intptr_t)dst.target() - ((intptr_t)_code_pos);
duke@435:     if (dst.reloc() == relocInfo::none && is8bit(offs - short_size)) {
duke@435:       // 0111 tttn #8-bit disp
duke@435:       emit_byte(0x70 | cc);
duke@435:       emit_byte((offs - short_size) & 0xFF);
duke@435:     } else {
duke@435:       // 0000 1111 1000 tttn #32-bit disp
duke@435:       emit_byte(0x0F);
duke@435:       emit_byte(0x80 | cc);
duke@435:       emit_long(offs - long_size);
duke@435:     }
duke@435:   } else {
duke@435: #ifdef ASSERT
duke@435:     warning("reversing conditional branch");
duke@435: #endif /* ASSERT */
duke@435:     Label skip;
duke@435:     jccb(reverse[cc], skip);
duke@435:     lea(rscratch1, dst);
duke@435:     Assembler::jmp(rscratch1);
duke@435:     bind(skip);
duke@435:   }
duke@435: }
duke@435: 
duke@435: // Wouldn't need if AddressLiteral version had new name
duke@435: void MacroAssembler::call(Label& L, relocInfo::relocType rtype) {
duke@435:   Assembler::call(L, rtype);
duke@435: }
duke@435: 
duke@435: // Wouldn't need if AddressLiteral version had new name
duke@435: void MacroAssembler::call(Register entry) {
duke@435:   Assembler::call(entry);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::call(AddressLiteral entry) {
duke@435:   if (reachable(entry)) {
duke@435:     Assembler::call_literal(entry.target(), entry.rspec());
duke@435:   } else {
duke@435:     lea(rscratch1, entry);
duke@435:     Assembler::call(rscratch1);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::cmp8(AddressLiteral src1, int8_t src2) {
duke@435:   if (reachable(src1)) {
duke@435:     cmpb(as_Address(src1), src2);
duke@435:   } else {
duke@435:     lea(rscratch1, src1);
duke@435:     cmpb(Address(rscratch1, 0), src2);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::cmp32(AddressLiteral src1, int32_t src2) {
duke@435:   if (reachable(src1)) {
duke@435:     cmpl(as_Address(src1), src2);
duke@435:   } else {
duke@435:     lea(rscratch1, src1);
duke@435:     cmpl(Address(rscratch1, 0), src2);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::cmp32(Register src1, AddressLiteral src2) {
duke@435:   if (reachable(src2)) {
duke@435:     cmpl(src1, as_Address(src2));
duke@435:   } else {
duke@435:     lea(rscratch1, src2);
duke@435:     cmpl(src1, Address(rscratch1, 0));
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::cmpptr(Register src1, AddressLiteral src2) {
duke@435: #ifdef _LP64
duke@435:   if (src2.is_lval()) {
duke@435:     movptr(rscratch1, src2);
duke@435:     Assembler::cmpq(src1, rscratch1);
duke@435:   } else if (reachable(src2)) {
duke@435:     cmpq(src1, as_Address(src2));
duke@435:   } else {
duke@435:     lea(rscratch1, src2);
duke@435:     Assembler::cmpq(src1, Address(rscratch1, 0));
duke@435:   }
duke@435: #else
duke@435:   if (src2.is_lval()) {
duke@435:     cmp_literal32(src1, (int32_t) src2.target(), src2.rspec());
duke@435:   } else {
duke@435:     cmpl(src1, as_Address(src2));
duke@435:   }
duke@435: #endif // _LP64
duke@435: }
duke@435: 
duke@435: void MacroAssembler::cmpptr(Address src1, AddressLiteral src2) {
duke@435:   assert(src2.is_lval(), "not a mem-mem compare");
duke@435: #ifdef _LP64
duke@435:   // moves src2's literal address
duke@435:   movptr(rscratch1, src2);
duke@435:   Assembler::cmpq(src1, rscratch1);
duke@435: #else
duke@435:   cmp_literal32(src1, (int32_t) src2.target(), src2.rspec());
duke@435: #endif // _LP64
duke@435: }
duke@435: 
duke@435: void MacroAssembler::cmp64(Register src1, AddressLiteral src2) {
duke@435:   assert(!src2.is_lval(), "should use cmpptr");
duke@435: 
duke@435:   if (reachable(src2)) {
duke@435: #ifdef _LP64
duke@435:     cmpq(src1, as_Address(src2));
duke@435: #else
duke@435:     ShouldNotReachHere();
duke@435: #endif // _LP64
duke@435:   } else {
duke@435:     lea(rscratch1, src2);
duke@435:     Assembler::cmpq(src1, Address(rscratch1, 0));
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::cmpxchgptr(Register reg, AddressLiteral adr) {
duke@435:   if (reachable(adr)) {
duke@435: #ifdef _LP64
duke@435:     cmpxchgq(reg, as_Address(adr));
duke@435: #else
duke@435:     cmpxchgl(reg, as_Address(adr));
duke@435: #endif // _LP64
duke@435:   } else {
duke@435:     lea(rscratch1, adr);
duke@435:     cmpxchgq(reg, Address(rscratch1, 0));
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::incrementl(AddressLiteral dst) {
duke@435:   if (reachable(dst)) {
duke@435:     incrementl(as_Address(dst));
duke@435:   } else {
duke@435:     lea(rscratch1, dst);
duke@435:     incrementl(Address(rscratch1, 0));
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::incrementl(ArrayAddress dst) {
duke@435:   incrementl(as_Address(dst));
duke@435: }
duke@435: 
duke@435: void MacroAssembler::lea(Register dst, Address src) {
duke@435: #ifdef _LP64
duke@435:   leaq(dst, src);
duke@435: #else
duke@435:   leal(dst, src);
duke@435: #endif // _LP64
duke@435: }
duke@435: 
duke@435: void MacroAssembler::lea(Register dst, AddressLiteral src) {
duke@435: #ifdef _LP64
duke@435:     mov_literal64(dst, (intptr_t)src.target(), src.rspec());
duke@435: #else
duke@435:     mov_literal32(dst, (intptr_t)src.target(), src.rspec());
duke@435: #endif // _LP64
duke@435: }
duke@435: 
duke@435: void MacroAssembler::mov32(AddressLiteral dst, Register src) {
duke@435:   if (reachable(dst)) {
duke@435:     movl(as_Address(dst), src);
duke@435:   } else {
duke@435:     lea(rscratch1, dst);
duke@435:     movl(Address(rscratch1, 0), src);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::mov32(Register dst, AddressLiteral src) {
duke@435:   if (reachable(src)) {
duke@435:     movl(dst, as_Address(src));
duke@435:   } else {
duke@435:     lea(rscratch1, src);
duke@435:     movl(dst, Address(rscratch1, 0));
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::movdbl(XMMRegister dst, AddressLiteral src) {
duke@435:   if (reachable(src)) {
duke@435:     if (UseXmmLoadAndClearUpper) {
duke@435:       movsd (dst, as_Address(src));
duke@435:     } else {
duke@435:       movlpd(dst, as_Address(src));
duke@435:     }
duke@435:   } else {
duke@435:     lea(rscratch1, src);
duke@435:     if (UseXmmLoadAndClearUpper) {
duke@435:       movsd (dst, Address(rscratch1, 0));
duke@435:     } else {
duke@435:       movlpd(dst, Address(rscratch1, 0));
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::movflt(XMMRegister dst, AddressLiteral src) {
duke@435:   if (reachable(src)) {
duke@435:     movss(dst, as_Address(src));
duke@435:   } else {
duke@435:     lea(rscratch1, src);
duke@435:     movss(dst, Address(rscratch1, 0));
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::movoop(Register dst, jobject obj) {
duke@435:   mov_literal64(dst, (intptr_t)obj, oop_Relocation::spec_for_immediate());
duke@435: }
duke@435: 
duke@435: void MacroAssembler::movoop(Address dst, jobject obj) {
duke@435:   mov_literal64(rscratch1, (intptr_t)obj, oop_Relocation::spec_for_immediate());
duke@435:   movq(dst, rscratch1);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::movptr(Register dst, AddressLiteral src) {
duke@435: #ifdef _LP64
duke@435:   if (src.is_lval()) {
duke@435:     mov_literal64(dst, (intptr_t)src.target(), src.rspec());
duke@435:   } else {
duke@435:     if (reachable(src)) {
duke@435:       movq(dst, as_Address(src));
duke@435:     } else {
duke@435:       lea(rscratch1, src);
duke@435:       movq(dst, Address(rscratch1,0));
duke@435:     }
duke@435:   }
duke@435: #else
duke@435:   if (src.is_lval()) {
duke@435:     mov_literal32(dst, (intptr_t)src.target(), src.rspec());
duke@435:   } else {
duke@435:     movl(dst, as_Address(src));
duke@435:   }
duke@435: #endif // LP64
duke@435: }
duke@435: 
duke@435: void MacroAssembler::movptr(ArrayAddress dst, Register src) {
duke@435: #ifdef _LP64
duke@435:   movq(as_Address(dst), src);
duke@435: #else
duke@435:   movl(as_Address(dst), src);
duke@435: #endif // _LP64
duke@435: }
duke@435: 
duke@435: void MacroAssembler::pushoop(jobject obj) {
duke@435: #ifdef _LP64
duke@435:   movoop(rscratch1, obj);
duke@435:   pushq(rscratch1);
duke@435: #else
duke@435:   push_literal32((int32_t)obj, oop_Relocation::spec_for_immediate());
duke@435: #endif // _LP64
duke@435: }
duke@435: 
duke@435: void MacroAssembler::pushptr(AddressLiteral src) {
duke@435: #ifdef _LP64
duke@435:   lea(rscratch1, src);
duke@435:   if (src.is_lval()) {
duke@435:     pushq(rscratch1);
duke@435:   } else {
duke@435:     pushq(Address(rscratch1, 0));
duke@435:   }
duke@435: #else
duke@435:   if (src.is_lval()) {
duke@435:     push_literal((int32_t)src.target(), src.rspec());
duke@435:   else {
duke@435:     pushl(as_Address(src));
duke@435:   }
duke@435: #endif // _LP64
duke@435: }
duke@435: 
duke@435: void MacroAssembler::ldmxcsr(AddressLiteral src) {
duke@435:   if (reachable(src)) {
duke@435:     Assembler::ldmxcsr(as_Address(src));
duke@435:   } else {
duke@435:     lea(rscratch1, src);
duke@435:     Assembler::ldmxcsr(Address(rscratch1, 0));
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::movlpd(XMMRegister dst, AddressLiteral src) {
duke@435:   if (reachable(src)) {
duke@435:     movlpd(dst, as_Address(src));
duke@435:   } else {
duke@435:     lea(rscratch1, src);
duke@435:     movlpd(dst, Address(rscratch1, 0));
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::movss(XMMRegister dst, AddressLiteral src) {
duke@435:   if (reachable(src)) {
duke@435:     movss(dst, as_Address(src));
duke@435:   } else {
duke@435:     lea(rscratch1, src);
duke@435:     movss(dst, Address(rscratch1, 0));
duke@435:   }
duke@435: }
duke@435: void MacroAssembler::xorpd(XMMRegister dst, AddressLiteral src) {
duke@435:   if (reachable(src)) {
duke@435:     xorpd(dst, as_Address(src));
duke@435:   } else {
duke@435:     lea(rscratch1, src);
duke@435:     xorpd(dst, Address(rscratch1, 0));
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::xorps(XMMRegister dst, AddressLiteral src) {
duke@435:   if (reachable(src)) {
duke@435:     xorps(dst, as_Address(src));
duke@435:   } else {
duke@435:     lea(rscratch1, src);
duke@435:     xorps(dst, Address(rscratch1, 0));
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::null_check(Register reg, int offset) {
duke@435:   if (needs_explicit_null_check(offset)) {
duke@435:     // provoke OS NULL exception if reg = NULL by
duke@435:     // accessing M[reg] w/o changing any (non-CC) registers
duke@435:     cmpq(rax, Address(reg, 0));
duke@435:     // Note: should probably use testl(rax, Address(reg, 0));
duke@435:     //       may be shorter code (however, this version of
duke@435:     //       testl needs to be implemented first)
duke@435:   } else {
duke@435:     // nothing to do, (later) access of M[reg + offset]
duke@435:     // will provoke OS NULL exception if reg = NULL
duke@435:   }
duke@435: }
duke@435: 
duke@435: int MacroAssembler::load_unsigned_byte(Register dst, Address src) {
duke@435:   int off = offset();
duke@435:   movzbl(dst, src);
duke@435:   return off;
duke@435: }
duke@435: 
duke@435: int MacroAssembler::load_unsigned_word(Register dst, Address src) {
duke@435:   int off = offset();
duke@435:   movzwl(dst, src);
duke@435:   return off;
duke@435: }
duke@435: 
duke@435: int MacroAssembler::load_signed_byte(Register dst, Address src) {
duke@435:   int off = offset();
duke@435:   movsbl(dst, src);
duke@435:   return off;
duke@435: }
duke@435: 
duke@435: int MacroAssembler::load_signed_word(Register dst, Address src) {
duke@435:   int off = offset();
duke@435:   movswl(dst, src);
duke@435:   return off;
duke@435: }
duke@435: 
duke@435: void MacroAssembler::incrementl(Register reg, int value) {
duke@435:   if (value == min_jint) { addl(reg, value); return; }
duke@435:   if (value <  0) { decrementl(reg, -value); return; }
duke@435:   if (value == 0) {                        ; return; }
duke@435:   if (value == 1 && UseIncDec) { incl(reg) ; return; }
duke@435:   /* else */      { addl(reg, value)       ; return; }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::decrementl(Register reg, int value) {
duke@435:   if (value == min_jint) { subl(reg, value); return; }
duke@435:   if (value <  0) { incrementl(reg, -value); return; }
duke@435:   if (value == 0) {                        ; return; }
duke@435:   if (value == 1 && UseIncDec) { decl(reg) ; return; }
duke@435:   /* else */      { subl(reg, value)       ; return; }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::incrementq(Register reg, int value) {
duke@435:   if (value == min_jint) { addq(reg, value); return; }
duke@435:   if (value <  0) { decrementq(reg, -value); return; }
duke@435:   if (value == 0) {                        ; return; }
duke@435:   if (value == 1 && UseIncDec) { incq(reg) ; return; }
duke@435:   /* else */      { addq(reg, value)       ; return; }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::decrementq(Register reg, int value) {
duke@435:   if (value == min_jint) { subq(reg, value); return; }
duke@435:   if (value <  0) { incrementq(reg, -value); return; }
duke@435:   if (value == 0) {                        ; return; }
duke@435:   if (value == 1 && UseIncDec) { decq(reg) ; return; }
duke@435:   /* else */      { subq(reg, value)       ; return; }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::incrementl(Address dst, int value) {
duke@435:   if (value == min_jint) { addl(dst, value); return; }
duke@435:   if (value <  0) { decrementl(dst, -value); return; }
duke@435:   if (value == 0) {                        ; return; }
duke@435:   if (value == 1 && UseIncDec) { incl(dst) ; return; }
duke@435:   /* else */      { addl(dst, value)       ; return; }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::decrementl(Address dst, int value) {
duke@435:   if (value == min_jint) { subl(dst, value); return; }
duke@435:   if (value <  0) { incrementl(dst, -value); return; }
duke@435:   if (value == 0) {                        ; return; }
duke@435:   if (value == 1 && UseIncDec) { decl(dst) ; return; }
duke@435:   /* else */      { subl(dst, value)       ; return; }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::incrementq(Address dst, int value) {
duke@435:   if (value == min_jint) { addq(dst, value); return; }
duke@435:   if (value <  0) { decrementq(dst, -value); return; }
duke@435:   if (value == 0) {                        ; return; }
duke@435:   if (value == 1 && UseIncDec) { incq(dst) ; return; }
duke@435:   /* else */      { addq(dst, value)       ; return; }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::decrementq(Address dst, int value) {
duke@435:   if (value == min_jint) { subq(dst, value); return; }
duke@435:   if (value <  0) { incrementq(dst, -value); return; }
duke@435:   if (value == 0) {                        ; return; }
duke@435:   if (value == 1 && UseIncDec) { decq(dst) ; return; }
duke@435:   /* else */      { subq(dst, value)       ; return; }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::align(int modulus) {
duke@435:   if (offset() % modulus != 0) {
duke@435:     nop(modulus - (offset() % modulus));
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::enter() {
duke@435:   pushq(rbp);
duke@435:   movq(rbp, rsp);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::leave() {
duke@435:   emit_byte(0xC9); // LEAVE
duke@435: }
duke@435: 
duke@435: // C++ bool manipulation
duke@435: 
duke@435: void MacroAssembler::movbool(Register dst, Address src) {
duke@435:   if(sizeof(bool) == 1)
duke@435:     movb(dst, src);
duke@435:   else if(sizeof(bool) == 2)
duke@435:     movw(dst, src);
duke@435:   else if(sizeof(bool) == 4)
duke@435:     movl(dst, src);
duke@435:   else {
duke@435:     // unsupported
duke@435:     ShouldNotReachHere();
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::movbool(Address dst, bool boolconst) {
duke@435:   if(sizeof(bool) == 1)
duke@435:     movb(dst, (int) boolconst);
duke@435:   else if(sizeof(bool) == 2)
duke@435:     movw(dst, (int) boolconst);
duke@435:   else if(sizeof(bool) == 4)
duke@435:     movl(dst, (int) boolconst);
duke@435:   else {
duke@435:     // unsupported
duke@435:     ShouldNotReachHere();
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::movbool(Address dst, Register src) {
duke@435:   if(sizeof(bool) == 1)
duke@435:     movb(dst, src);
duke@435:   else if(sizeof(bool) == 2)
duke@435:     movw(dst, src);
duke@435:   else if(sizeof(bool) == 4)
duke@435:     movl(dst, src);
duke@435:   else {
duke@435:     // unsupported
duke@435:     ShouldNotReachHere();
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::testbool(Register dst) {
duke@435:   if(sizeof(bool) == 1)
duke@435:     testb(dst, (int) 0xff);
duke@435:   else if(sizeof(bool) == 2) {
duke@435:     // need testw impl
duke@435:     ShouldNotReachHere();
duke@435:   } else if(sizeof(bool) == 4)
duke@435:     testl(dst, dst);
duke@435:   else {
duke@435:     // unsupported
duke@435:     ShouldNotReachHere();
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::set_last_Java_frame(Register last_java_sp,
duke@435:                                          Register last_java_fp,
duke@435:                                          address  last_java_pc) {
duke@435:   // determine last_java_sp register
duke@435:   if (!last_java_sp->is_valid()) {
duke@435:     last_java_sp = rsp;
duke@435:   }
duke@435: 
duke@435:   // last_java_fp is optional
duke@435:   if (last_java_fp->is_valid()) {
duke@435:     movq(Address(r15_thread, JavaThread::last_Java_fp_offset()),
duke@435:          last_java_fp);
duke@435:   }
duke@435: 
duke@435:   // last_java_pc is optional
duke@435:   if (last_java_pc != NULL) {
duke@435:     Address java_pc(r15_thread,
duke@435:                     JavaThread::frame_anchor_offset() + JavaFrameAnchor::last_Java_pc_offset());
duke@435:     lea(rscratch1, InternalAddress(last_java_pc));
duke@435:     movq(java_pc, rscratch1);
duke@435:   }
duke@435: 
duke@435:   movq(Address(r15_thread, JavaThread::last_Java_sp_offset()), last_java_sp);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::reset_last_Java_frame(bool clear_fp,
duke@435:                                            bool clear_pc) {
duke@435:   // we must set sp to zero to clear frame
duke@435:   movptr(Address(r15_thread, JavaThread::last_Java_sp_offset()), NULL_WORD);
duke@435:   // must clear fp, so that compiled frames are not confused; it is
duke@435:   // possible that we need it only for debugging
duke@435:   if (clear_fp) {
duke@435:     movptr(Address(r15_thread, JavaThread::last_Java_fp_offset()), NULL_WORD);
duke@435:   }
duke@435: 
duke@435:   if (clear_pc) {
duke@435:     movptr(Address(r15_thread, JavaThread::last_Java_pc_offset()), NULL_WORD);
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: // Implementation of call_VM versions
duke@435: 
duke@435: void MacroAssembler::call_VM_leaf_base(address entry_point, int num_args) {
duke@435:   Label L, E;
duke@435: 
duke@435: #ifdef _WIN64
duke@435:   // Windows always allocates space for it's register args
duke@435:   assert(num_args <= 4, "only register arguments supported");
duke@435:   subq(rsp,  frame::arg_reg_save_area_bytes);
duke@435: #endif
duke@435: 
duke@435:   // Align stack if necessary
duke@435:   testl(rsp, 15);
duke@435:   jcc(Assembler::zero, L);
duke@435: 
duke@435:   subq(rsp, 8);
duke@435:   {
duke@435:     call(RuntimeAddress(entry_point));
duke@435:   }
duke@435:   addq(rsp, 8);
duke@435:   jmp(E);
duke@435: 
duke@435:   bind(L);
duke@435:   {
duke@435:     call(RuntimeAddress(entry_point));
duke@435:   }
duke@435: 
duke@435:   bind(E);
duke@435: 
duke@435: #ifdef _WIN64
duke@435:   // restore stack pointer
duke@435:   addq(rsp, frame::arg_reg_save_area_bytes);
duke@435: #endif
duke@435: 
duke@435: }
duke@435: 
duke@435: 
duke@435: void MacroAssembler::call_VM_base(Register oop_result,
duke@435:                                   Register java_thread,
duke@435:                                   Register last_java_sp,
duke@435:                                   address entry_point,
duke@435:                                   int num_args,
duke@435:                                   bool check_exceptions) {
duke@435:   // determine last_java_sp register
duke@435:   if (!last_java_sp->is_valid()) {
duke@435:     last_java_sp = rsp;
duke@435:   }
duke@435: 
duke@435:   // debugging support
duke@435:   assert(num_args >= 0, "cannot have negative number of arguments");
duke@435:   assert(r15_thread != oop_result,
duke@435:          "cannot use the same register for java_thread & oop_result");
duke@435:   assert(r15_thread != last_java_sp,
duke@435:          "cannot use the same register for java_thread & last_java_sp");
duke@435: 
duke@435:   // set last Java frame before call
duke@435: 
duke@435:   // This sets last_Java_fp which is only needed from interpreted frames
duke@435:   // and should really be done only from the interp_masm version before
duke@435:   // calling the underlying call_VM. That doesn't happen yet so we set
duke@435:   // last_Java_fp here even though some callers don't need it and
duke@435:   // also clear it below.
duke@435:   set_last_Java_frame(last_java_sp, rbp, NULL);
duke@435: 
duke@435:   {
duke@435:     Label L, E;
duke@435: 
duke@435:     // Align stack if necessary
duke@435: #ifdef _WIN64
duke@435:     assert(num_args <= 4, "only register arguments supported");
duke@435:     // Windows always allocates space for it's register args
duke@435:     subq(rsp, frame::arg_reg_save_area_bytes);
duke@435: #endif
duke@435:     testl(rsp, 15);
duke@435:     jcc(Assembler::zero, L);
duke@435: 
duke@435:     subq(rsp, 8);
duke@435:     {
duke@435:       call(RuntimeAddress(entry_point));
duke@435:     }
duke@435:     addq(rsp, 8);
duke@435:     jmp(E);
duke@435: 
duke@435: 
duke@435:     bind(L);
duke@435:     {
duke@435:       call(RuntimeAddress(entry_point));
duke@435:     }
duke@435: 
duke@435:     bind(E);
duke@435: 
duke@435: #ifdef _WIN64
duke@435:     // restore stack pointer
duke@435:     addq(rsp, frame::arg_reg_save_area_bytes);
duke@435: #endif
duke@435:   }
duke@435: 
duke@435: #ifdef ASSERT
duke@435:   pushq(rax);
duke@435:   {
duke@435:     Label L;
duke@435:     get_thread(rax);
duke@435:     cmpq(r15_thread, rax);
duke@435:     jcc(Assembler::equal, L);
duke@435:     stop("MacroAssembler::call_VM_base: register not callee saved?");
duke@435:     bind(L);
duke@435:   }
duke@435:   popq(rax);
duke@435: #endif
duke@435: 
duke@435:   // reset last Java frame
duke@435:   // This really shouldn't have to clear fp set note above at the
duke@435:   // call to set_last_Java_frame
duke@435:   reset_last_Java_frame(true, false);
duke@435: 
duke@435:   check_and_handle_popframe(noreg);
duke@435:   check_and_handle_earlyret(noreg);
duke@435: 
duke@435:   if (check_exceptions) {
duke@435:     cmpq(Address(r15_thread, Thread::pending_exception_offset()), (int) NULL);
duke@435:     // This used to conditionally jump to forward_exception however it is
duke@435:     // possible if we relocate that the branch will not reach. So we must jump
duke@435:     // around so we can always reach
duke@435:     Label ok;
duke@435:     jcc(Assembler::equal, ok);
duke@435:     jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
duke@435:     bind(ok);
duke@435:   }
duke@435: 
duke@435:   // get oop result if there is one and reset the value in the thread
duke@435:   if (oop_result->is_valid()) {
duke@435:     movq(oop_result, Address(r15_thread, JavaThread::vm_result_offset()));
duke@435:     movptr(Address(r15_thread, JavaThread::vm_result_offset()), NULL_WORD);
duke@435:     verify_oop(oop_result);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::check_and_handle_popframe(Register java_thread) {}
duke@435: void MacroAssembler::check_and_handle_earlyret(Register java_thread) {}
duke@435: 
duke@435: void MacroAssembler::call_VM_helper(Register oop_result,
duke@435:                                     address entry_point,
duke@435:                                     int num_args,
duke@435:                                     bool check_exceptions) {
duke@435:   // Java thread becomes first argument of C function
duke@435:   movq(c_rarg0, r15_thread);
duke@435: 
duke@435:   // We've pushed one address, correct last_Java_sp
duke@435:   leaq(rax, Address(rsp, wordSize));
duke@435: 
duke@435:   call_VM_base(oop_result, noreg, rax, entry_point, num_args,
duke@435:                check_exceptions);
duke@435: }
duke@435: 
duke@435: 
duke@435: void MacroAssembler::call_VM(Register oop_result,
duke@435:                              address entry_point,
duke@435:                              bool check_exceptions) {
duke@435:   Label C, E;
duke@435:   Assembler::call(C, relocInfo::none);
duke@435:   jmp(E);
duke@435: 
duke@435:   bind(C);
duke@435:   call_VM_helper(oop_result, entry_point, 0, check_exceptions);
duke@435:   ret(0);
duke@435: 
duke@435:   bind(E);
duke@435: }
duke@435: 
duke@435: 
duke@435: void MacroAssembler::call_VM(Register oop_result,
duke@435:                              address entry_point,
duke@435:                              Register arg_1,
duke@435:                              bool check_exceptions) {
duke@435:   assert(rax != arg_1, "smashed argument");
duke@435:   assert(c_rarg0 != arg_1, "smashed argument");
duke@435: 
duke@435:   Label C, E;
duke@435:   Assembler::call(C, relocInfo::none);
duke@435:   jmp(E);
duke@435: 
duke@435:   bind(C);
duke@435:   // c_rarg0 is reserved for thread
duke@435:   if (c_rarg1 != arg_1) {
duke@435:     movq(c_rarg1, arg_1);
duke@435:   }
duke@435:   call_VM_helper(oop_result, entry_point, 1, check_exceptions);
duke@435:   ret(0);
duke@435: 
duke@435:   bind(E);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::call_VM(Register oop_result,
duke@435:                              address entry_point,
duke@435:                              Register arg_1,
duke@435:                              Register arg_2,
duke@435:                              bool check_exceptions) {
duke@435:   assert(rax != arg_1, "smashed argument");
duke@435:   assert(rax != arg_2, "smashed argument");
duke@435:   assert(c_rarg0 != arg_1, "smashed argument");
duke@435:   assert(c_rarg0 != arg_2, "smashed argument");
duke@435:   assert(c_rarg1 != arg_2, "smashed argument");
duke@435:   assert(c_rarg2 != arg_1, "smashed argument");
duke@435: 
duke@435:   Label C, E;
duke@435:   Assembler::call(C, relocInfo::none);
duke@435:   jmp(E);
duke@435: 
duke@435:   bind(C);
duke@435:   // c_rarg0 is reserved for thread
duke@435:   if (c_rarg1 != arg_1) {
duke@435:     movq(c_rarg1, arg_1);
duke@435:   }
duke@435:   if (c_rarg2 != arg_2) {
duke@435:     movq(c_rarg2, arg_2);
duke@435:   }
duke@435:   call_VM_helper(oop_result, entry_point, 2, check_exceptions);
duke@435:   ret(0);
duke@435: 
duke@435:   bind(E);
duke@435: }
duke@435: 
duke@435: 
duke@435: void MacroAssembler::call_VM(Register oop_result,
duke@435:                              address entry_point,
duke@435:                              Register arg_1,
duke@435:                              Register arg_2,
duke@435:                              Register arg_3,
duke@435:                              bool check_exceptions) {
duke@435:   assert(rax != arg_1, "smashed argument");
duke@435:   assert(rax != arg_2, "smashed argument");
duke@435:   assert(rax != arg_3, "smashed argument");
duke@435:   assert(c_rarg0 != arg_1, "smashed argument");
duke@435:   assert(c_rarg0 != arg_2, "smashed argument");
duke@435:   assert(c_rarg0 != arg_3, "smashed argument");
duke@435:   assert(c_rarg1 != arg_2, "smashed argument");
duke@435:   assert(c_rarg1 != arg_3, "smashed argument");
duke@435:   assert(c_rarg2 != arg_1, "smashed argument");
duke@435:   assert(c_rarg2 != arg_3, "smashed argument");
duke@435:   assert(c_rarg3 != arg_1, "smashed argument");
duke@435:   assert(c_rarg3 != arg_2, "smashed argument");
duke@435: 
duke@435:   Label C, E;
duke@435:   Assembler::call(C, relocInfo::none);
duke@435:   jmp(E);
duke@435: 
duke@435:   bind(C);
duke@435:   // c_rarg0 is reserved for thread
duke@435:   if (c_rarg1 != arg_1) {
duke@435:     movq(c_rarg1, arg_1);
duke@435:   }
duke@435:   if (c_rarg2 != arg_2) {
duke@435:     movq(c_rarg2, arg_2);
duke@435:   }
duke@435:   if (c_rarg3 != arg_3) {
duke@435:     movq(c_rarg3, arg_3);
duke@435:   }
duke@435:   call_VM_helper(oop_result, entry_point, 3, check_exceptions);
duke@435:   ret(0);
duke@435: 
duke@435:   bind(E);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::call_VM(Register oop_result,
duke@435:                              Register last_java_sp,
duke@435:                              address entry_point,
duke@435:                              int num_args,
duke@435:                              bool check_exceptions) {
duke@435:   call_VM_base(oop_result, noreg, last_java_sp, entry_point, num_args,
duke@435:                check_exceptions);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::call_VM(Register oop_result,
duke@435:                              Register last_java_sp,
duke@435:                              address entry_point,
duke@435:                              Register arg_1,
duke@435:                              bool check_exceptions) {
duke@435:   assert(c_rarg0 != arg_1, "smashed argument");
duke@435:   assert(c_rarg1 != last_java_sp, "smashed argument");
duke@435:   // c_rarg0 is reserved for thread
duke@435:   if (c_rarg1 != arg_1) {
duke@435:     movq(c_rarg1, arg_1);
duke@435:   }
duke@435:   call_VM(oop_result, last_java_sp, entry_point, 1, check_exceptions);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::call_VM(Register oop_result,
duke@435:                              Register last_java_sp,
duke@435:                              address entry_point,
duke@435:                              Register arg_1,
duke@435:                              Register arg_2,
duke@435:                              bool check_exceptions) {
duke@435:   assert(c_rarg0 != arg_1, "smashed argument");
duke@435:   assert(c_rarg0 != arg_2, "smashed argument");
duke@435:   assert(c_rarg1 != arg_2, "smashed argument");
duke@435:   assert(c_rarg1 != last_java_sp, "smashed argument");
duke@435:   assert(c_rarg2 != arg_1, "smashed argument");
duke@435:   assert(c_rarg2 != last_java_sp, "smashed argument");
duke@435:   // c_rarg0 is reserved for thread
duke@435:   if (c_rarg1 != arg_1) {
duke@435:     movq(c_rarg1, arg_1);
duke@435:   }
duke@435:   if (c_rarg2 != arg_2) {
duke@435:     movq(c_rarg2, arg_2);
duke@435:   }
duke@435:   call_VM(oop_result, last_java_sp, entry_point, 2, check_exceptions);
duke@435: }
duke@435: 
duke@435: 
duke@435: void MacroAssembler::call_VM(Register oop_result,
duke@435:                              Register last_java_sp,
duke@435:                              address entry_point,
duke@435:                              Register arg_1,
duke@435:                              Register arg_2,
duke@435:                              Register arg_3,
duke@435:                              bool check_exceptions) {
duke@435:   assert(c_rarg0 != arg_1, "smashed argument");
duke@435:   assert(c_rarg0 != arg_2, "smashed argument");
duke@435:   assert(c_rarg0 != arg_3, "smashed argument");
duke@435:   assert(c_rarg1 != arg_2, "smashed argument");
duke@435:   assert(c_rarg1 != arg_3, "smashed argument");
duke@435:   assert(c_rarg1 != last_java_sp, "smashed argument");
duke@435:   assert(c_rarg2 != arg_1, "smashed argument");
duke@435:   assert(c_rarg2 != arg_3, "smashed argument");
duke@435:   assert(c_rarg2 != last_java_sp, "smashed argument");
duke@435:   assert(c_rarg3 != arg_1, "smashed argument");
duke@435:   assert(c_rarg3 != arg_2, "smashed argument");
duke@435:   assert(c_rarg3 != last_java_sp, "smashed argument");
duke@435:   // c_rarg0 is reserved for thread
duke@435:   if (c_rarg1 != arg_1) {
duke@435:     movq(c_rarg1, arg_1);
duke@435:   }
duke@435:   if (c_rarg2 != arg_2) {
duke@435:     movq(c_rarg2, arg_2);
duke@435:   }
duke@435:   if (c_rarg3 != arg_3) {
duke@435:     movq(c_rarg2, arg_3);
duke@435:   }
duke@435:   call_VM(oop_result, last_java_sp, entry_point, 3, check_exceptions);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::call_VM_leaf(address entry_point, int num_args) {
duke@435:   call_VM_leaf_base(entry_point, num_args);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::call_VM_leaf(address entry_point, Register arg_1) {
duke@435:   if (c_rarg0 != arg_1) {
duke@435:     movq(c_rarg0, arg_1);
duke@435:   }
duke@435:   call_VM_leaf(entry_point, 1);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::call_VM_leaf(address entry_point,
duke@435:                                   Register arg_1,
duke@435:                                   Register arg_2) {
duke@435:   assert(c_rarg0 != arg_2, "smashed argument");
duke@435:   assert(c_rarg1 != arg_1, "smashed argument");
duke@435:   if (c_rarg0 != arg_1) {
duke@435:     movq(c_rarg0, arg_1);
duke@435:   }
duke@435:   if (c_rarg1 != arg_2) {
duke@435:     movq(c_rarg1, arg_2);
duke@435:   }
duke@435:   call_VM_leaf(entry_point, 2);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::call_VM_leaf(address entry_point,
duke@435:                                   Register arg_1,
duke@435:                                   Register arg_2,
duke@435:                                   Register arg_3) {
duke@435:   assert(c_rarg0 != arg_2, "smashed argument");
duke@435:   assert(c_rarg0 != arg_3, "smashed argument");
duke@435:   assert(c_rarg1 != arg_1, "smashed argument");
duke@435:   assert(c_rarg1 != arg_3, "smashed argument");
duke@435:   assert(c_rarg2 != arg_1, "smashed argument");
duke@435:   assert(c_rarg2 != arg_2, "smashed argument");
duke@435:   if (c_rarg0 != arg_1) {
duke@435:     movq(c_rarg0, arg_1);
duke@435:   }
duke@435:   if (c_rarg1 != arg_2) {
duke@435:     movq(c_rarg1, arg_2);
duke@435:   }
duke@435:   if (c_rarg2 != arg_3) {
duke@435:     movq(c_rarg2, arg_3);
duke@435:   }
duke@435:   call_VM_leaf(entry_point, 3);
duke@435: }
duke@435: 
duke@435: 
duke@435: // Calls to C land
duke@435: //
duke@435: // When entering C land, the rbp & rsp of the last Java frame have to
duke@435: // be recorded in the (thread-local) JavaThread object. When leaving C
duke@435: // land, the last Java fp has to be reset to 0. This is required to
duke@435: // allow proper stack traversal.
duke@435: void MacroAssembler::store_check(Register obj) {
duke@435:   // Does a store check for the oop in register obj. The content of
duke@435:   // register obj is destroyed afterwards.
duke@435:   store_check_part_1(obj);
duke@435:   store_check_part_2(obj);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::store_check(Register obj, Address dst) {
duke@435:   store_check(obj);
duke@435: }
duke@435: 
duke@435: // split the store check operation so that other instructions can be
duke@435: // scheduled inbetween
duke@435: void MacroAssembler::store_check_part_1(Register obj) {
duke@435:   BarrierSet* bs = Universe::heap()->barrier_set();
duke@435:   assert(bs->kind() == BarrierSet::CardTableModRef, "Wrong barrier set kind");
duke@435:   shrq(obj, CardTableModRefBS::card_shift);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::store_check_part_2(Register obj) {
duke@435:   BarrierSet* bs = Universe::heap()->barrier_set();
duke@435:   assert(bs->kind() == BarrierSet::CardTableModRef, "Wrong barrier set kind");
duke@435:   CardTableModRefBS* ct = (CardTableModRefBS*)bs;
duke@435:   assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
duke@435:   ExternalAddress cardtable((address)ct->byte_map_base);
duke@435:   Address index(noreg, obj, Address::times_1);
duke@435:   movb(as_Address(ArrayAddress(cardtable, index)), 0);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::c2bool(Register x) {
duke@435:   // implements x == 0 ? 0 : 1
duke@435:   // note: must only look at least-significant byte of x
duke@435:   //       since C-style booleans are stored in one byte
duke@435:   //       only! (was bug)
duke@435:   andl(x, 0xFF);
duke@435:   setb(Assembler::notZero, x);
duke@435: }
duke@435: 
duke@435: int MacroAssembler::corrected_idivl(Register reg) {
duke@435:   // Full implementation of Java idiv and irem; checks for special
duke@435:   // case as described in JVM spec., p.243 & p.271.  The function
duke@435:   // returns the (pc) offset of the idivl instruction - may be needed
duke@435:   // for implicit exceptions.
duke@435:   //
duke@435:   //         normal case                           special case
duke@435:   //
duke@435:   // input : eax: dividend                         min_int
duke@435:   //         reg: divisor   (may not be eax/edx)   -1
duke@435:   //
duke@435:   // output: eax: quotient  (= eax idiv reg)       min_int
duke@435:   //         edx: remainder (= eax irem reg)       0
duke@435:   assert(reg != rax && reg != rdx, "reg cannot be rax or rdx register");
duke@435:   const int min_int = 0x80000000;
duke@435:   Label normal_case, special_case;
duke@435: 
duke@435:   // check for special case
duke@435:   cmpl(rax, min_int);
duke@435:   jcc(Assembler::notEqual, normal_case);
duke@435:   xorl(rdx, rdx); // prepare edx for possible special case (where
duke@435:                   // remainder = 0)
duke@435:   cmpl(reg, -1);
duke@435:   jcc(Assembler::equal, special_case);
duke@435: 
duke@435:   // handle normal case
duke@435:   bind(normal_case);
duke@435:   cdql();
duke@435:   int idivl_offset = offset();
duke@435:   idivl(reg);
duke@435: 
duke@435:   // normal and special case exit
duke@435:   bind(special_case);
duke@435: 
duke@435:   return idivl_offset;
duke@435: }
duke@435: 
duke@435: int MacroAssembler::corrected_idivq(Register reg) {
duke@435:   // Full implementation of Java ldiv and lrem; checks for special
duke@435:   // case as described in JVM spec., p.243 & p.271.  The function
duke@435:   // returns the (pc) offset of the idivl instruction - may be needed
duke@435:   // for implicit exceptions.
duke@435:   //
duke@435:   //         normal case                           special case
duke@435:   //
duke@435:   // input : rax: dividend                         min_long
duke@435:   //         reg: divisor   (may not be eax/edx)   -1
duke@435:   //
duke@435:   // output: rax: quotient  (= rax idiv reg)       min_long
duke@435:   //         rdx: remainder (= rax irem reg)       0
duke@435:   assert(reg != rax && reg != rdx, "reg cannot be rax or rdx register");
duke@435:   static const int64_t min_long = 0x8000000000000000;
duke@435:   Label normal_case, special_case;
duke@435: 
duke@435:   // check for special case
duke@435:   cmp64(rax, ExternalAddress((address) &min_long));
duke@435:   jcc(Assembler::notEqual, normal_case);
duke@435:   xorl(rdx, rdx); // prepare rdx for possible special case (where
duke@435:                   // remainder = 0)
duke@435:   cmpq(reg, -1);
duke@435:   jcc(Assembler::equal, special_case);
duke@435: 
duke@435:   // handle normal case
duke@435:   bind(normal_case);
duke@435:   cdqq();
duke@435:   int idivq_offset = offset();
duke@435:   idivq(reg);
duke@435: 
duke@435:   // normal and special case exit
duke@435:   bind(special_case);
duke@435: 
duke@435:   return idivq_offset;
duke@435: }
duke@435: 
duke@435: void MacroAssembler::push_IU_state() {
duke@435:   pushfq();     // Push flags first because pushaq kills them
duke@435:   subq(rsp, 8); // Make sure rsp stays 16-byte aligned
duke@435:   pushaq();
duke@435: }
duke@435: 
duke@435: void MacroAssembler::pop_IU_state() {
duke@435:   popaq();
duke@435:   addq(rsp, 8);
duke@435:   popfq();
duke@435: }
duke@435: 
duke@435: void MacroAssembler::push_FPU_state() {
duke@435:   subq(rsp, FPUStateSizeInWords * wordSize);
duke@435:   fxsave(Address(rsp, 0));
duke@435: }
duke@435: 
duke@435: void MacroAssembler::pop_FPU_state() {
duke@435:   fxrstor(Address(rsp, 0));
duke@435:   addq(rsp, FPUStateSizeInWords * wordSize);
duke@435: }
duke@435: 
duke@435: // Save Integer and Float state
duke@435: // Warning: Stack must be 16 byte aligned
duke@435: void MacroAssembler::push_CPU_state() {
duke@435:   push_IU_state();
duke@435:   push_FPU_state();
duke@435: }
duke@435: 
duke@435: void MacroAssembler::pop_CPU_state() {
duke@435:   pop_FPU_state();
duke@435:   pop_IU_state();
duke@435: }
duke@435: 
duke@435: void MacroAssembler::sign_extend_short(Register reg) {
duke@435:   movswl(reg, reg);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::sign_extend_byte(Register reg) {
duke@435:   movsbl(reg, reg);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::division_with_shift(Register reg, int shift_value) {
duke@435:   assert (shift_value > 0, "illegal shift value");
duke@435:   Label _is_positive;
duke@435:   testl (reg, reg);
duke@435:   jcc (Assembler::positive, _is_positive);
duke@435:   int offset = (1 << shift_value) - 1 ;
duke@435: 
duke@435:   if (offset == 1) {
duke@435:     incrementl(reg);
duke@435:   } else {
duke@435:     addl(reg, offset);
duke@435:   }
duke@435: 
duke@435:   bind (_is_positive);
duke@435:   sarl(reg, shift_value);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::round_to_l(Register reg, int modulus) {
duke@435:   addl(reg, modulus - 1);
duke@435:   andl(reg, -modulus);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::round_to_q(Register reg, int modulus) {
duke@435:   addq(reg, modulus - 1);
duke@435:   andq(reg, -modulus);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::verify_oop(Register reg, const char* s) {
duke@435:   if (!VerifyOops) {
duke@435:     return;
duke@435:   }
duke@435: 
duke@435:   // Pass register number to verify_oop_subroutine
duke@435:   char* b = new char[strlen(s) + 50];
duke@435:   sprintf(b, "verify_oop: %s: %s", reg->name(), s);
duke@435: 
duke@435:   pushq(rax); // save rax, restored by receiver
duke@435: 
duke@435:   // pass args on stack, only touch rax
duke@435:   pushq(reg);
duke@435: 
duke@435:   // avoid using pushptr, as it modifies scratch registers
duke@435:   // and our contract is not to modify anything
duke@435:   ExternalAddress buffer((address)b);
duke@435:   movptr(rax, buffer.addr());
duke@435:   pushq(rax);
duke@435: 
duke@435:   // call indirectly to solve generation ordering problem
duke@435:   movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
duke@435:   call(rax); // no alignment requirement
duke@435:   // everything popped by receiver
duke@435: }
duke@435: 
duke@435: void MacroAssembler::verify_oop_addr(Address addr, const char* s) {
duke@435:   if (!VerifyOops) return;
duke@435:   // Pass register number to verify_oop_subroutine
duke@435:   char* b = new char[strlen(s) + 50];
duke@435:   sprintf(b, "verify_oop_addr: %s", s);
duke@435:   pushq(rax);                          // save rax
duke@435:   movq(addr, rax);
duke@435:   pushq(rax);                          // pass register argument
duke@435: 
duke@435: 
duke@435:   // avoid using pushptr, as it modifies scratch registers
duke@435:   // and our contract is not to modify anything
duke@435:   ExternalAddress buffer((address)b);
duke@435:   movptr(rax, buffer.addr());
duke@435:   pushq(rax);
duke@435: 
duke@435:   // call indirectly to solve generation ordering problem
duke@435:   movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
duke@435:   call(rax); // no alignment requirement
duke@435:   // everything popped by receiver
duke@435: }
duke@435: 
duke@435: 
duke@435: void MacroAssembler::stop(const char* msg) {
duke@435:   address rip = pc();
duke@435:   pushaq(); // get regs on stack
duke@435:   lea(c_rarg0, ExternalAddress((address) msg));
duke@435:   lea(c_rarg1, InternalAddress(rip));
duke@435:   movq(c_rarg2, rsp); // pass pointer to regs array
duke@435:   andq(rsp, -16); // align stack as required by ABI
duke@435:   call(RuntimeAddress(CAST_FROM_FN_PTR(address, MacroAssembler::debug)));
duke@435:   hlt();
duke@435: }
duke@435: 
duke@435: void MacroAssembler::warn(const char* msg) {
duke@435:   pushq(r12);
duke@435:   movq(r12, rsp);
duke@435:   andq(rsp, -16);     // align stack as required by push_CPU_state and call
duke@435: 
duke@435:   push_CPU_state();   // keeps alignment at 16 bytes
duke@435:   lea(c_rarg0, ExternalAddress((address) msg));
duke@435:   call_VM_leaf(CAST_FROM_FN_PTR(address, warning), c_rarg0);
duke@435:   pop_CPU_state();
duke@435: 
duke@435:   movq(rsp, r12);
duke@435:   popq(r12);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::debug(char* msg, int64_t pc, int64_t regs[]) {
duke@435:   // In order to get locks to work, we need to fake a in_VM state
duke@435:   if (ShowMessageBoxOnError ) {
duke@435:     JavaThread* thread = JavaThread::current();
duke@435:     JavaThreadState saved_state = thread->thread_state();
duke@435:     thread->set_thread_state(_thread_in_vm);
duke@435:     ttyLocker ttyl;
duke@435: #ifndef PRODUCT
duke@435:     if (CountBytecodes || TraceBytecodes || StopInterpreterAt) {
duke@435:       BytecodeCounter::print();
duke@435:     }
duke@435: #endif
duke@435:     // To see where a verify_oop failed, get $ebx+40/X for this frame.
duke@435:     // XXX correct this offset for amd64
duke@435:     // This is the value of eip which points to where verify_oop will return.
duke@435:     if (os::message_box(msg, "Execution stopped, print registers?")) {
duke@435:       tty->print_cr("rip = 0x%016lx", pc);
duke@435:       tty->print_cr("rax = 0x%016lx", regs[15]);
duke@435:       tty->print_cr("rbx = 0x%016lx", regs[12]);
duke@435:       tty->print_cr("rcx = 0x%016lx", regs[14]);
duke@435:       tty->print_cr("rdx = 0x%016lx", regs[13]);
duke@435:       tty->print_cr("rdi = 0x%016lx", regs[8]);
duke@435:       tty->print_cr("rsi = 0x%016lx", regs[9]);
duke@435:       tty->print_cr("rbp = 0x%016lx", regs[10]);
duke@435:       tty->print_cr("rsp = 0x%016lx", regs[11]);
duke@435:       tty->print_cr("r8  = 0x%016lx", regs[7]);
duke@435:       tty->print_cr("r9  = 0x%016lx", regs[6]);
duke@435:       tty->print_cr("r10 = 0x%016lx", regs[5]);
duke@435:       tty->print_cr("r11 = 0x%016lx", regs[4]);
duke@435:       tty->print_cr("r12 = 0x%016lx", regs[3]);
duke@435:       tty->print_cr("r13 = 0x%016lx", regs[2]);
duke@435:       tty->print_cr("r14 = 0x%016lx", regs[1]);
duke@435:       tty->print_cr("r15 = 0x%016lx", regs[0]);
duke@435:       BREAKPOINT;
duke@435:     }
duke@435:     ThreadStateTransition::transition(thread, _thread_in_vm, saved_state);
duke@435:   } else {
duke@435:     ::tty->print_cr("=============== DEBUG MESSAGE: %s ================\n",
duke@435:                     msg);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void MacroAssembler::os_breakpoint() {
duke@435:   // instead of directly emitting a breakpoint, call os:breakpoint for
duke@435:   // better debugability
duke@435:   // This shouldn't need alignment, it's an empty function
duke@435:   call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
duke@435: }
duke@435: 
duke@435: // Write serialization page so VM thread can do a pseudo remote membar.
duke@435: // We use the current thread pointer to calculate a thread specific
duke@435: // offset to write to within the page. This minimizes bus traffic
duke@435: // due to cache line collision.
duke@435: void MacroAssembler::serialize_memory(Register thread,
duke@435:                                       Register tmp) {
duke@435: 
duke@435:   movl(tmp, thread);
duke@435:   shrl(tmp, os::get_serialize_page_shift_count());
duke@435:   andl(tmp, (os::vm_page_size() - sizeof(int)));
duke@435: 
duke@435:   Address index(noreg, tmp, Address::times_1);
duke@435:   ExternalAddress page(os::get_memory_serialize_page());
duke@435: 
duke@435:   movptr(ArrayAddress(page, index), tmp);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::verify_tlab() {
duke@435: #ifdef ASSERT
duke@435:   if (UseTLAB) {
duke@435:     Label next, ok;
duke@435:     Register t1 = rsi;
duke@435: 
duke@435:     pushq(t1);
duke@435: 
duke@435:     movq(t1, Address(r15_thread, in_bytes(JavaThread::tlab_top_offset())));
duke@435:     cmpq(t1, Address(r15_thread, in_bytes(JavaThread::tlab_start_offset())));
duke@435:     jcc(Assembler::aboveEqual, next);
duke@435:     stop("assert(top >= start)");
duke@435:     should_not_reach_here();
duke@435: 
duke@435:     bind(next);
duke@435:     movq(t1, Address(r15_thread, in_bytes(JavaThread::tlab_end_offset())));
duke@435:     cmpq(t1, Address(r15_thread, in_bytes(JavaThread::tlab_top_offset())));
duke@435:     jcc(Assembler::aboveEqual, ok);
duke@435:     stop("assert(top <= end)");
duke@435:     should_not_reach_here();
duke@435: 
duke@435:     bind(ok);
duke@435: 
duke@435:     popq(t1);
duke@435:   }
duke@435: #endif
duke@435: }
duke@435: 
duke@435: // Defines obj, preserves var_size_in_bytes
duke@435: void MacroAssembler::eden_allocate(Register obj,
duke@435:                                    Register var_size_in_bytes,
duke@435:                                    int con_size_in_bytes,
duke@435:                                    Register t1,
duke@435:                                    Label& slow_case) {
duke@435:   assert(obj == rax, "obj must be in rax for cmpxchg");
duke@435:   assert_different_registers(obj, var_size_in_bytes, t1);
duke@435:   Register end = t1;
duke@435:   Label retry;
duke@435:   bind(retry);
duke@435:   ExternalAddress heap_top((address) Universe::heap()->top_addr());
duke@435:   movptr(obj, heap_top);
duke@435:   if (var_size_in_bytes == noreg) {
duke@435:     leaq(end, Address(obj, con_size_in_bytes));
duke@435:   } else {
duke@435:     leaq(end, Address(obj, var_size_in_bytes, Address::times_1));
duke@435:   }
duke@435:   // if end < obj then we wrapped around => object too long => slow case
duke@435:   cmpq(end, obj);
duke@435:   jcc(Assembler::below, slow_case);
duke@435:   cmpptr(end, ExternalAddress((address) Universe::heap()->end_addr()));
duke@435: 
duke@435:   jcc(Assembler::above, slow_case);
duke@435:   // Compare obj with the top addr, and if still equal, store the new
duke@435:   // top addr in end at the address of the top addr pointer. Sets ZF
duke@435:   // if was equal, and clears it otherwise. Use lock prefix for
duke@435:   // atomicity on MPs.
duke@435:   if (os::is_MP()) {
duke@435:     lock();
duke@435:   }
duke@435:   cmpxchgptr(end, heap_top);
duke@435:   // if someone beat us on the allocation, try again, otherwise continue
duke@435:   jcc(Assembler::notEqual, retry);
duke@435: }
duke@435: 
duke@435: // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes.
duke@435: void MacroAssembler::tlab_allocate(Register obj,
duke@435:                                    Register var_size_in_bytes,
duke@435:                                    int con_size_in_bytes,
duke@435:                                    Register t1,
duke@435:                                    Register t2,
duke@435:                                    Label& slow_case) {
duke@435:   assert_different_registers(obj, t1, t2);
duke@435:   assert_different_registers(obj, var_size_in_bytes, t1);
duke@435:   Register end = t2;
duke@435: 
duke@435:   verify_tlab();
duke@435: 
duke@435:   movq(obj, Address(r15_thread, JavaThread::tlab_top_offset()));
duke@435:   if (var_size_in_bytes == noreg) {
duke@435:     leaq(end, Address(obj, con_size_in_bytes));
duke@435:   } else {
duke@435:     leaq(end, Address(obj, var_size_in_bytes, Address::times_1));
duke@435:   }
duke@435:   cmpq(end, Address(r15_thread, JavaThread::tlab_end_offset()));
duke@435:   jcc(Assembler::above, slow_case);
duke@435: 
duke@435:   // update the tlab top pointer
duke@435:   movq(Address(r15_thread, JavaThread::tlab_top_offset()), end);
duke@435: 
duke@435:   // recover var_size_in_bytes if necessary
duke@435:   if (var_size_in_bytes == end) {
duke@435:     subq(var_size_in_bytes, obj);
duke@435:   }
duke@435:   verify_tlab();
duke@435: }
duke@435: 
duke@435: // Preserves rbx and rdx.
duke@435: void MacroAssembler::tlab_refill(Label& retry,
duke@435:                                  Label& try_eden,
duke@435:                                  Label& slow_case) {
duke@435:   Register top = rax;
duke@435:   Register t1 = rcx;
duke@435:   Register t2 = rsi;
duke@435:   Register t3 = r10;
duke@435:   Register thread_reg = r15_thread;
duke@435:   assert_different_registers(top, thread_reg, t1, t2, t3,
duke@435:                              /* preserve: */ rbx, rdx);
duke@435:   Label do_refill, discard_tlab;
duke@435: 
duke@435:   if (CMSIncrementalMode || !Universe::heap()->supports_inline_contig_alloc()) {
duke@435:     // No allocation in the shared eden.
duke@435:     jmp(slow_case);
duke@435:   }
duke@435: 
duke@435:   movq(top, Address(thread_reg, in_bytes(JavaThread::tlab_top_offset())));
duke@435:   movq(t1, Address(thread_reg, in_bytes(JavaThread::tlab_end_offset())));
duke@435: 
duke@435:   // calculate amount of free space
duke@435:   subq(t1, top);
duke@435:   shrq(t1, LogHeapWordSize);
duke@435: 
duke@435:   // Retain tlab and allocate object in shared space if
duke@435:   // the amount free in the tlab is too large to discard.
duke@435:   cmpq(t1, Address(thread_reg, // size_t
duke@435:                    in_bytes(JavaThread::tlab_refill_waste_limit_offset())));
duke@435:   jcc(Assembler::lessEqual, discard_tlab);
duke@435: 
duke@435:   // Retain
duke@435:   mov64(t2, ThreadLocalAllocBuffer::refill_waste_limit_increment());
duke@435:   addq(Address(thread_reg,  // size_t
duke@435:                in_bytes(JavaThread::tlab_refill_waste_limit_offset())),
duke@435:        t2);
duke@435:   if (TLABStats) {
duke@435:     // increment number of slow_allocations
duke@435:     addl(Address(thread_reg, // unsigned int
duke@435:                  in_bytes(JavaThread::tlab_slow_allocations_offset())),
duke@435:          1);
duke@435:   }
duke@435:   jmp(try_eden);
duke@435: 
duke@435:   bind(discard_tlab);
duke@435:   if (TLABStats) {
duke@435:     // increment number of refills
duke@435:     addl(Address(thread_reg, // unsigned int
duke@435:                  in_bytes(JavaThread::tlab_number_of_refills_offset())),
duke@435:          1);
duke@435:     // accumulate wastage -- t1 is amount free in tlab
duke@435:     addl(Address(thread_reg, // unsigned int
duke@435:                  in_bytes(JavaThread::tlab_fast_refill_waste_offset())),
duke@435:          t1);
duke@435:   }
duke@435: 
duke@435:   // if tlab is currently allocated (top or end != null) then
duke@435:   // fill [top, end + alignment_reserve) with array object
duke@435:   testq(top, top);
duke@435:   jcc(Assembler::zero, do_refill);
duke@435: 
duke@435:   // set up the mark word
duke@435:   mov64(t3, (int64_t) markOopDesc::prototype()->copy_set_hash(0x2));
duke@435:   movq(Address(top, oopDesc::mark_offset_in_bytes()), t3);
duke@435:   // set the length to the remaining space
duke@435:   subq(t1, typeArrayOopDesc::header_size(T_INT));
duke@435:   addq(t1, (int)ThreadLocalAllocBuffer::alignment_reserve());
duke@435:   shlq(t1, log2_intptr(HeapWordSize / sizeof(jint)));
duke@435:   movq(Address(top, arrayOopDesc::length_offset_in_bytes()), t1);
duke@435:   // set klass to intArrayKlass
duke@435:   movptr(t1, ExternalAddress((address) Universe::intArrayKlassObj_addr()));
duke@435:   movq(Address(top, oopDesc::klass_offset_in_bytes()), t1);
duke@435: 
duke@435:   // refill the tlab with an eden allocation
duke@435:   bind(do_refill);
duke@435:   movq(t1, Address(thread_reg, in_bytes(JavaThread::tlab_size_offset())));
duke@435:   shlq(t1, LogHeapWordSize);
duke@435:   // add object_size ??
duke@435:   eden_allocate(top, t1, 0, t2, slow_case);
duke@435: 
duke@435:   // Check that t1 was preserved in eden_allocate.
duke@435: #ifdef ASSERT
duke@435:   if (UseTLAB) {
duke@435:     Label ok;
duke@435:     Register tsize = rsi;
duke@435:     assert_different_registers(tsize, thread_reg, t1);
duke@435:     pushq(tsize);
duke@435:     movq(tsize, Address(thread_reg, in_bytes(JavaThread::tlab_size_offset())));
duke@435:     shlq(tsize, LogHeapWordSize);
duke@435:     cmpq(t1, tsize);
duke@435:     jcc(Assembler::equal, ok);
duke@435:     stop("assert(t1 != tlab size)");
duke@435:     should_not_reach_here();
duke@435: 
duke@435:     bind(ok);
duke@435:     popq(tsize);
duke@435:   }
duke@435: #endif
duke@435:   movq(Address(thread_reg, in_bytes(JavaThread::tlab_start_offset())), top);
duke@435:   movq(Address(thread_reg, in_bytes(JavaThread::tlab_top_offset())), top);
duke@435:   addq(top, t1);
duke@435:   subq(top, (int)ThreadLocalAllocBuffer::alignment_reserve_in_bytes());
duke@435:   movq(Address(thread_reg, in_bytes(JavaThread::tlab_end_offset())), top);
duke@435:   verify_tlab();
duke@435:   jmp(retry);
duke@435: }
duke@435: 
duke@435: 
duke@435: int MacroAssembler::biased_locking_enter(Register lock_reg, Register obj_reg, Register swap_reg, Register tmp_reg,
duke@435:                                          bool swap_reg_contains_mark,
duke@435:                                          Label& done, Label* slow_case,
duke@435:                                          BiasedLockingCounters* counters) {
duke@435:   assert(UseBiasedLocking, "why call this otherwise?");
duke@435:   assert(swap_reg == rax, "swap_reg must be rax for cmpxchgq");
duke@435:   assert(tmp_reg != noreg, "tmp_reg must be supplied");
duke@435:   assert_different_registers(lock_reg, obj_reg, swap_reg, tmp_reg);
duke@435:   assert(markOopDesc::age_shift == markOopDesc::lock_bits + markOopDesc::biased_lock_bits, "biased locking makes assumptions about bit layout");
duke@435:   Address mark_addr      (obj_reg, oopDesc::mark_offset_in_bytes());
duke@435:   Address klass_addr     (obj_reg, oopDesc::klass_offset_in_bytes());
duke@435:   Address saved_mark_addr(lock_reg, 0);
duke@435: 
duke@435:   if (PrintBiasedLockingStatistics && counters == NULL)
duke@435:     counters = BiasedLocking::counters();
duke@435: 
duke@435:   // Biased locking
duke@435:   // See whether the lock is currently biased toward our thread and
duke@435:   // whether the epoch is still valid
duke@435:   // Note that the runtime guarantees sufficient alignment of JavaThread
duke@435:   // pointers to allow age to be placed into low bits
duke@435:   // First check to see whether biasing is even enabled for this object
duke@435:   Label cas_label;
duke@435:   int null_check_offset = -1;
duke@435:   if (!swap_reg_contains_mark) {
duke@435:     null_check_offset = offset();
duke@435:     movq(swap_reg, mark_addr);
duke@435:   }
duke@435:   movq(tmp_reg, swap_reg);
duke@435:   andq(tmp_reg, markOopDesc::biased_lock_mask_in_place);
duke@435:   cmpq(tmp_reg, markOopDesc::biased_lock_pattern);
duke@435:   jcc(Assembler::notEqual, cas_label);
duke@435:   // The bias pattern is present in the object's header. Need to check
duke@435:   // whether the bias owner and the epoch are both still current.
duke@435:   movq(tmp_reg, klass_addr);
duke@435:   movq(tmp_reg, Address(tmp_reg, Klass::prototype_header_offset_in_bytes() + klassOopDesc::klass_part_offset_in_bytes()));
duke@435:   orq(tmp_reg, r15_thread);
duke@435:   xorq(tmp_reg, swap_reg);
duke@435:   andq(tmp_reg, ~((int) markOopDesc::age_mask_in_place));
duke@435:   if (counters != NULL) {
duke@435:     cond_inc32(Assembler::zero,
duke@435:                ExternalAddress((address) counters->anonymously_biased_lock_entry_count_addr()));
duke@435:   }
duke@435:   jcc(Assembler::equal, done);
duke@435: 
duke@435:   Label try_revoke_bias;
duke@435:   Label try_rebias;
duke@435: 
duke@435:   // At this point we know that the header has the bias pattern and
duke@435:   // that we are not the bias owner in the current epoch. We need to
duke@435:   // figure out more details about the state of the header in order to
duke@435:   // know what operations can be legally performed on the object's
duke@435:   // header.
duke@435: 
duke@435:   // If the low three bits in the xor result aren't clear, that means
duke@435:   // the prototype header is no longer biased and we have to revoke
duke@435:   // the bias on this object.
duke@435:   testq(tmp_reg, markOopDesc::biased_lock_mask_in_place);
duke@435:   jcc(Assembler::notZero, try_revoke_bias);
duke@435: 
duke@435:   // Biasing is still enabled for this data type. See whether the
duke@435:   // epoch of the current bias is still valid, meaning that the epoch
duke@435:   // bits of the mark word are equal to the epoch bits of the
duke@435:   // prototype header. (Note that the prototype header's epoch bits
duke@435:   // only change at a safepoint.) If not, attempt to rebias the object
duke@435:   // toward the current thread. Note that we must be absolutely sure
duke@435:   // that the current epoch is invalid in order to do this because
duke@435:   // otherwise the manipulations it performs on the mark word are
duke@435:   // illegal.
duke@435:   testq(tmp_reg, markOopDesc::epoch_mask_in_place);
duke@435:   jcc(Assembler::notZero, try_rebias);
duke@435: 
duke@435:   // The epoch of the current bias is still valid but we know nothing
duke@435:   // about the owner; it might be set or it might be clear. Try to
duke@435:   // acquire the bias of the object using an atomic operation. If this
duke@435:   // fails we will go in to the runtime to revoke the object's bias.
duke@435:   // Note that we first construct the presumed unbiased header so we
duke@435:   // don't accidentally blow away another thread's valid bias.
duke@435:   andq(swap_reg,
duke@435:        markOopDesc::biased_lock_mask_in_place | markOopDesc::age_mask_in_place | markOopDesc::epoch_mask_in_place);
duke@435:   movq(tmp_reg, swap_reg);
duke@435:   orq(tmp_reg, r15_thread);
duke@435:   if (os::is_MP()) {
duke@435:     lock();
duke@435:   }
duke@435:   cmpxchgq(tmp_reg, Address(obj_reg, 0));
duke@435:   // If the biasing toward our thread failed, this means that
duke@435:   // another thread succeeded in biasing it toward itself and we
duke@435:   // need to revoke that bias. The revocation will occur in the
duke@435:   // interpreter runtime in the slow case.
duke@435:   if (counters != NULL) {
duke@435:     cond_inc32(Assembler::zero,
duke@435:                ExternalAddress((address) counters->anonymously_biased_lock_entry_count_addr()));
duke@435:   }
duke@435:   if (slow_case != NULL) {
duke@435:     jcc(Assembler::notZero, *slow_case);
duke@435:   }
duke@435:   jmp(done);
duke@435: 
duke@435:   bind(try_rebias);
duke@435:   // At this point we know the epoch has expired, meaning that the
duke@435:   // current "bias owner", if any, is actually invalid. Under these
duke@435:   // circumstances _only_, we are allowed to use the current header's
duke@435:   // value as the comparison value when doing the cas to acquire the
duke@435:   // bias in the current epoch. In other words, we allow transfer of
duke@435:   // the bias from one thread to another directly in this situation.
duke@435:   //
duke@435:   // FIXME: due to a lack of registers we currently blow away the age
duke@435:   // bits in this situation. Should attempt to preserve them.
duke@435:   movq(tmp_reg, klass_addr);
duke@435:   movq(tmp_reg, Address(tmp_reg, Klass::prototype_header_offset_in_bytes() + klassOopDesc::klass_part_offset_in_bytes()));
duke@435:   orq(tmp_reg, r15_thread);
duke@435:   if (os::is_MP()) {
duke@435:     lock();
duke@435:   }
duke@435:   cmpxchgq(tmp_reg, Address(obj_reg, 0));
duke@435:   // If the biasing toward our thread failed, then another thread
duke@435:   // succeeded in biasing it toward itself and we need to revoke that
duke@435:   // bias. The revocation will occur in the runtime in the slow case.
duke@435:   if (counters != NULL) {
duke@435:     cond_inc32(Assembler::zero,
duke@435:                ExternalAddress((address) counters->rebiased_lock_entry_count_addr()));
duke@435:   }
duke@435:   if (slow_case != NULL) {
duke@435:     jcc(Assembler::notZero, *slow_case);
duke@435:   }
duke@435:   jmp(done);
duke@435: 
duke@435:   bind(try_revoke_bias);
duke@435:   // The prototype mark in the klass doesn't have the bias bit set any
duke@435:   // more, indicating that objects of this data type are not supposed
duke@435:   // to be biased any more. We are going to try to reset the mark of
duke@435:   // this object to the prototype value and fall through to the
duke@435:   // CAS-based locking scheme. Note that if our CAS fails, it means
duke@435:   // that another thread raced us for the privilege of revoking the
duke@435:   // bias of this particular object, so it's okay to continue in the
duke@435:   // normal locking code.
duke@435:   //
duke@435:   // FIXME: due to a lack of registers we currently blow away the age
duke@435:   // bits in this situation. Should attempt to preserve them.
duke@435:   movq(tmp_reg, klass_addr);
duke@435:   movq(tmp_reg, Address(tmp_reg, Klass::prototype_header_offset_in_bytes() + klassOopDesc::klass_part_offset_in_bytes()));
duke@435:   if (os::is_MP()) {
duke@435:     lock();
duke@435:   }
duke@435:   cmpxchgq(tmp_reg, Address(obj_reg, 0));
duke@435:   // Fall through to the normal CAS-based lock, because no matter what
duke@435:   // the result of the above CAS, some thread must have succeeded in
duke@435:   // removing the bias bit from the object's header.
duke@435:   if (counters != NULL) {
duke@435:     cond_inc32(Assembler::zero,
duke@435:                ExternalAddress((address) counters->revoked_lock_entry_count_addr()));
duke@435:   }
duke@435: 
duke@435:   bind(cas_label);
duke@435: 
duke@435:   return null_check_offset;
duke@435: }
duke@435: 
duke@435: 
duke@435: void MacroAssembler::biased_locking_exit(Register obj_reg, Register temp_reg, Label& done) {
duke@435:   assert(UseBiasedLocking, "why call this otherwise?");
duke@435: 
duke@435:   // Check for biased locking unlock case, which is a no-op
duke@435:   // Note: we do not have to check the thread ID for two reasons.
duke@435:   // First, the interpreter checks for IllegalMonitorStateException at
duke@435:   // a higher level. Second, if the bias was revoked while we held the
duke@435:   // lock, the object could not be rebiased toward another thread, so
duke@435:   // the bias bit would be clear.
duke@435:   movq(temp_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
duke@435:   andq(temp_reg, markOopDesc::biased_lock_mask_in_place);
duke@435:   cmpq(temp_reg, markOopDesc::biased_lock_pattern);
duke@435:   jcc(Assembler::equal, done);
duke@435: }
duke@435: 
duke@435: 
duke@435: Assembler::Condition MacroAssembler::negate_condition(Assembler::Condition cond) {
duke@435:   switch (cond) {
duke@435:     // Note some conditions are synonyms for others
duke@435:     case Assembler::zero:         return Assembler::notZero;
duke@435:     case Assembler::notZero:      return Assembler::zero;
duke@435:     case Assembler::less:         return Assembler::greaterEqual;
duke@435:     case Assembler::lessEqual:    return Assembler::greater;
duke@435:     case Assembler::greater:      return Assembler::lessEqual;
duke@435:     case Assembler::greaterEqual: return Assembler::less;
duke@435:     case Assembler::below:        return Assembler::aboveEqual;
duke@435:     case Assembler::belowEqual:   return Assembler::above;
duke@435:     case Assembler::above:        return Assembler::belowEqual;
duke@435:     case Assembler::aboveEqual:   return Assembler::below;
duke@435:     case Assembler::overflow:     return Assembler::noOverflow;
duke@435:     case Assembler::noOverflow:   return Assembler::overflow;
duke@435:     case Assembler::negative:     return Assembler::positive;
duke@435:     case Assembler::positive:     return Assembler::negative;
duke@435:     case Assembler::parity:       return Assembler::noParity;
duke@435:     case Assembler::noParity:     return Assembler::parity;
duke@435:   }
duke@435:   ShouldNotReachHere(); return Assembler::overflow;
duke@435: }
duke@435: 
duke@435: 
duke@435: void MacroAssembler::cond_inc32(Condition cond, AddressLiteral counter_addr) {
duke@435:   Condition negated_cond = negate_condition(cond);
duke@435:   Label L;
duke@435:   jcc(negated_cond, L);
duke@435:   atomic_incl(counter_addr);
duke@435:   bind(L);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::atomic_incl(AddressLiteral counter_addr) {
duke@435:   pushfq();
duke@435:   if (os::is_MP())
duke@435:     lock();
duke@435:   incrementl(counter_addr);
duke@435:   popfq();
duke@435: }
duke@435: 
duke@435: SkipIfEqual::SkipIfEqual(
duke@435:     MacroAssembler* masm, const bool* flag_addr, bool value) {
duke@435:   _masm = masm;
duke@435:   _masm->cmp8(ExternalAddress((address)flag_addr), value);
duke@435:   _masm->jcc(Assembler::equal, _label);
duke@435: }
duke@435: 
duke@435: SkipIfEqual::~SkipIfEqual() {
duke@435:   _masm->bind(_label);
duke@435: }
duke@435: 
duke@435: void MacroAssembler::bang_stack_size(Register size, Register tmp) {
duke@435:   movq(tmp, rsp);
duke@435:   // Bang stack for total size given plus shadow page size.
duke@435:   // Bang one page at a time because large size can bang beyond yellow and
duke@435:   // red zones.
duke@435:   Label loop;
duke@435:   bind(loop);
duke@435:   movl(Address(tmp, (-os::vm_page_size())), size );
duke@435:   subq(tmp, os::vm_page_size());
duke@435:   subl(size, os::vm_page_size());
duke@435:   jcc(Assembler::greater, loop);
duke@435: 
duke@435:   // Bang down shadow pages too.
duke@435:   // The -1 because we already subtracted 1 page.
duke@435:   for (int i = 0; i< StackShadowPages-1; i++) {
duke@435:     movq(Address(tmp, (-i*os::vm_page_size())), size );
duke@435:   }
duke@435: }