duke@435: /* stefank@2314: * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. duke@435: * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. duke@435: * duke@435: * This code is free software; you can redistribute it and/or modify it duke@435: * under the terms of the GNU General Public License version 2 only, as duke@435: * published by the Free Software Foundation. duke@435: * duke@435: * This code is distributed in the hope that it will be useful, but WITHOUT duke@435: * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or duke@435: * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License duke@435: * version 2 for more details (a copy is included in the LICENSE file that duke@435: * accompanied this code). duke@435: * duke@435: * You should have received a copy of the GNU General Public License version duke@435: * 2 along with this work; if not, write to the Free Software Foundation, duke@435: * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. duke@435: * trims@1907: * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA trims@1907: * or visit www.oracle.com if you need additional information or have any trims@1907: * questions. duke@435: * duke@435: */ duke@435: stefank@2314: #include "precompiled.hpp" stefank@2314: #include "memory/allocation.inline.hpp" stefank@2314: #include "opto/chaitin.hpp" stefank@2314: #include "opto/machnode.hpp" duke@435: duke@435: // see if this register kind does not requires two registers duke@435: static bool is_single_register(uint x) { duke@435: #ifdef _LP64 duke@435: return (x != Op_RegD && x != Op_RegL && x != Op_RegP); duke@435: #else duke@435: return (x != Op_RegD && x != Op_RegL); duke@435: #endif duke@435: } duke@435: kvn@835: //---------------------------may_be_copy_of_callee----------------------------- duke@435: // Check to see if we can possibly be a copy of a callee-save value. duke@435: bool PhaseChaitin::may_be_copy_of_callee( Node *def ) const { duke@435: // Short circuit if there are no callee save registers duke@435: if (_matcher.number_of_saved_registers() == 0) return false; duke@435: duke@435: // Expect only a spill-down and reload on exit for callee-save spills. duke@435: // Chains of copies cannot be deep. duke@435: // 5008997 - This is wishful thinking. Register allocator seems to duke@435: // be splitting live ranges for callee save registers to such duke@435: // an extent that in large methods the chains can be very long duke@435: // (50+). The conservative answer is to return true if we don't twisti@1040: // know as this prevents optimizations from occurring. duke@435: duke@435: const int limit = 60; duke@435: int i; duke@435: for( i=0; i < limit; i++ ) { duke@435: if( def->is_Proj() && def->in(0)->is_Start() && duke@435: _matcher.is_save_on_entry(lrgs(n2lidx(def)).reg()) ) duke@435: return true; // Direct use of callee-save proj duke@435: if( def->is_Copy() ) // Copies carry value through duke@435: def = def->in(def->is_Copy()); duke@435: else if( def->is_Phi() ) // Phis can merge it from any direction duke@435: def = def->in(1); duke@435: else duke@435: break; duke@435: guarantee(def != NULL, "must not resurrect dead copy"); duke@435: } duke@435: // If we reached the end and didn't find a callee save proj duke@435: // then this may be a callee save proj so we return true duke@435: // as the conservative answer. If we didn't reach then end duke@435: // we must have discovered that it was not a callee save duke@435: // else we would have returned. duke@435: return i == limit; duke@435: } duke@435: roland@3133: //------------------------------yank----------------------------------- roland@3133: // Helper function for yank_if_dead roland@3133: int PhaseChaitin::yank( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) { roland@3133: int blk_adjust=0; roland@3133: Block *oldb = _cfg._bbs[old->_idx]; roland@3133: oldb->find_remove(old); roland@3133: // Count 1 if deleting an instruction from the current block roland@3133: if( oldb == current_block ) blk_adjust++; roland@3133: _cfg._bbs.map(old->_idx,NULL); roland@3133: OptoReg::Name old_reg = lrgs(n2lidx(old)).reg(); roland@3133: if( regnd && (*regnd)[old_reg]==old ) { // Instruction is currently available? roland@3133: value->map(old_reg,NULL); // Yank from value/regnd maps roland@3133: regnd->map(old_reg,NULL); // This register's value is now unknown roland@3133: } roland@3133: return blk_adjust; roland@3133: } duke@435: kvn@3405: #ifdef ASSERT kvn@3405: static bool expected_yanked_node(Node *old, Node *orig_old) { kvn@3405: // This code is expected only next original nodes: kvn@3405: // - load from constant table node which may have next data input nodes: kvn@3405: // MachConstantBase, Phi, MachTemp, MachSpillCopy kvn@3405: // - load constant node which may have next data input nodes: kvn@3405: // MachTemp, MachSpillCopy kvn@3405: // - MachSpillCopy kvn@3405: // - MachProj and Copy dead nodes kvn@3405: if (old->is_MachSpillCopy()) { kvn@3405: return true; kvn@3405: } else if (old->is_Con()) { kvn@3405: return true; kvn@3405: } else if (old->is_MachProj()) { // Dead kills projection of Con node kvn@3405: return (old == orig_old); kvn@3405: } else if (old->is_Copy()) { // Dead copy of a callee-save value kvn@3405: return (old == orig_old); kvn@3405: } else if (old->is_MachTemp()) { kvn@3405: return orig_old->is_Con(); kvn@3405: } else if (old->is_Phi() || old->is_MachConstantBase()) { kvn@3405: return (orig_old->is_Con() && orig_old->is_MachConstant()); kvn@3405: } kvn@3405: return false; kvn@3405: } kvn@3405: #endif kvn@3405: duke@435: //------------------------------yank_if_dead----------------------------------- kvn@3405: // Removed edges from 'old'. Yank if dead. Return adjustment counts to duke@435: // iterators in the current block. kvn@3405: int PhaseChaitin::yank_if_dead_recurse(Node *old, Node *orig_old, Block *current_block, kvn@3405: Node_List *value, Node_List *regnd) { duke@435: int blk_adjust=0; kvn@3405: if (old->outcnt() == 0 && old != C->top()) { kvn@3405: #ifdef ASSERT kvn@3405: if (!expected_yanked_node(old, orig_old)) { kvn@3405: tty->print_cr("=============================================="); kvn@3405: tty->print_cr("orig_old:"); kvn@3405: orig_old->dump(); kvn@3405: tty->print_cr("old:"); kvn@3405: old->dump(); kvn@3405: assert(false, "unexpected yanked node"); kvn@3405: } kvn@3405: if (old->is_Con()) kvn@3405: orig_old = old; // Reset to satisfy expected nodes checks. kvn@3405: #endif roland@3133: blk_adjust += yank(old, current_block, value, regnd); roland@3133: roland@3133: for (uint i = 1; i < old->req(); i++) { kvn@3405: Node* n = old->in(i); kvn@3405: if (n != NULL) { kvn@3405: old->set_req(i, NULL); kvn@3405: blk_adjust += yank_if_dead_recurse(n, orig_old, current_block, value, regnd); roland@3133: } duke@435: } kvn@3405: // Disconnect control and remove precedence edges if any exist duke@435: old->disconnect_inputs(NULL); duke@435: } duke@435: return blk_adjust; duke@435: } duke@435: duke@435: //------------------------------use_prior_register----------------------------- duke@435: // Use the prior value instead of the current value, in an effort to make duke@435: // the current value go dead. Return block iterator adjustment, in case duke@435: // we yank some instructions from this block. duke@435: int PhaseChaitin::use_prior_register( Node *n, uint idx, Node *def, Block *current_block, Node_List &value, Node_List ®nd ) { duke@435: // No effect? duke@435: if( def == n->in(idx) ) return 0; duke@435: // Def is currently dead and can be removed? Do not resurrect duke@435: if( def->outcnt() == 0 ) return 0; duke@435: duke@435: // Not every pair of physical registers are assignment compatible, duke@435: // e.g. on sparc floating point registers are not assignable to integer duke@435: // registers. duke@435: const LRG &def_lrg = lrgs(n2lidx(def)); duke@435: OptoReg::Name def_reg = def_lrg.reg(); duke@435: const RegMask &use_mask = n->in_RegMask(idx); duke@435: bool can_use = ( RegMask::can_represent(def_reg) ? (use_mask.Member(def_reg) != 0) duke@435: : (use_mask.is_AllStack() != 0)); duke@435: // Check for a copy to or from a misaligned pair. duke@435: can_use = can_use && !use_mask.is_misaligned_Pair() && !def_lrg.mask().is_misaligned_Pair(); duke@435: duke@435: if (!can_use) duke@435: return 0; duke@435: duke@435: // Capture the old def in case it goes dead... duke@435: Node *old = n->in(idx); duke@435: duke@435: // Save-on-call copies can only be elided if the entire copy chain can go duke@435: // away, lest we get the same callee-save value alive in 2 locations at duke@435: // once. We check for the obvious trivial case here. Although it can duke@435: // sometimes be elided with cooperation outside our scope, here we will just duke@435: // miss the opportunity. :-( duke@435: if( may_be_copy_of_callee(def) ) { duke@435: if( old->outcnt() > 1 ) return 0; // We're the not last user duke@435: int idx = old->is_Copy(); duke@435: assert( idx, "chain of copies being removed" ); duke@435: Node *old2 = old->in(idx); // Chain of copies duke@435: if( old2->outcnt() > 1 ) return 0; // old is not the last user duke@435: int idx2 = old2->is_Copy(); duke@435: if( !idx2 ) return 0; // Not a chain of 2 copies duke@435: if( def != old2->in(idx2) ) return 0; // Chain of exactly 2 copies duke@435: } duke@435: duke@435: // Use the new def duke@435: n->set_req(idx,def); duke@435: _post_alloc++; duke@435: duke@435: // Is old def now dead? We successfully yanked a copy? duke@435: return yank_if_dead(old,current_block,&value,®nd); duke@435: } duke@435: duke@435: duke@435: //------------------------------skip_copies------------------------------------ duke@435: // Skip through any number of copies (that don't mod oop-i-ness) duke@435: Node *PhaseChaitin::skip_copies( Node *c ) { duke@435: int idx = c->is_Copy(); duke@435: uint is_oop = lrgs(n2lidx(c))._is_oop; duke@435: while (idx != 0) { duke@435: guarantee(c->in(idx) != NULL, "must not resurrect dead copy"); duke@435: if (lrgs(n2lidx(c->in(idx)))._is_oop != is_oop) duke@435: break; // casting copy, not the same value duke@435: c = c->in(idx); duke@435: idx = c->is_Copy(); duke@435: } duke@435: return c; duke@435: } duke@435: duke@435: //------------------------------elide_copy------------------------------------- duke@435: // Remove (bypass) copies along Node n, edge k. duke@435: int PhaseChaitin::elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List ®nd, bool can_change_regs ) { duke@435: int blk_adjust = 0; duke@435: duke@435: uint nk_idx = n2lidx(n->in(k)); duke@435: OptoReg::Name nk_reg = lrgs(nk_idx ).reg(); duke@435: duke@435: // Remove obvious same-register copies duke@435: Node *x = n->in(k); duke@435: int idx; duke@435: while( (idx=x->is_Copy()) != 0 ) { duke@435: Node *copy = x->in(idx); duke@435: guarantee(copy != NULL, "must not resurrect dead copy"); duke@435: if( lrgs(n2lidx(copy)).reg() != nk_reg ) break; duke@435: blk_adjust += use_prior_register(n,k,copy,current_block,value,regnd); duke@435: if( n->in(k) != copy ) break; // Failed for some cutout? duke@435: x = copy; // Progress, try again duke@435: } duke@435: duke@435: // Phis and 2-address instructions cannot change registers so easily - their duke@435: // outputs must match their input. duke@435: if( !can_change_regs ) duke@435: return blk_adjust; // Only check stupid copies! duke@435: duke@435: // Loop backedges won't have a value-mapping yet duke@435: if( &value == NULL ) return blk_adjust; duke@435: duke@435: // Skip through all copies to the _value_ being used. Do not change from duke@435: // int to pointer. This attempts to jump through a chain of copies, where duke@435: // intermediate copies might be illegal, i.e., value is stored down to stack duke@435: // then reloaded BUT survives in a register the whole way. duke@435: Node *val = skip_copies(n->in(k)); duke@435: twisti@2350: if (val == x && nk_idx != 0 && twisti@2350: regnd[nk_reg] != NULL && regnd[nk_reg] != x && twisti@2350: n2lidx(x) == n2lidx(regnd[nk_reg])) { twisti@2350: // When rematerialzing nodes and stretching lifetimes, the twisti@2350: // allocator will reuse the original def for multidef LRG instead twisti@2350: // of the current reaching def because it can't know it's safe to twisti@2350: // do so. After allocation completes if they are in the same LRG twisti@2350: // then it should use the current reaching def instead. twisti@2350: n->set_req(k, regnd[nk_reg]); twisti@2350: blk_adjust += yank_if_dead(val, current_block, &value, ®nd); twisti@2350: val = skip_copies(n->in(k)); twisti@2350: } twisti@2350: duke@435: if( val == x ) return blk_adjust; // No progress? duke@435: duke@435: bool single = is_single_register(val->ideal_reg()); duke@435: uint val_idx = n2lidx(val); duke@435: OptoReg::Name val_reg = lrgs(val_idx).reg(); duke@435: duke@435: // See if it happens to already be in the correct register! duke@435: // (either Phi's direct register, or the common case of the name duke@435: // never-clobbered original-def register) duke@435: if( value[val_reg] == val && duke@435: // Doubles check both halves duke@435: ( single || value[val_reg-1] == val ) ) { duke@435: blk_adjust += use_prior_register(n,k,regnd[val_reg],current_block,value,regnd); duke@435: if( n->in(k) == regnd[val_reg] ) // Success! Quit trying duke@435: return blk_adjust; duke@435: } duke@435: duke@435: // See if we can skip the copy by changing registers. Don't change from duke@435: // using a register to using the stack unless we know we can remove a duke@435: // copy-load. Otherwise we might end up making a pile of Intel cisc-spill duke@435: // ops reading from memory instead of just loading once and using the duke@435: // register. duke@435: duke@435: // Also handle duplicate copies here. duke@435: const Type *t = val->is_Con() ? val->bottom_type() : NULL; duke@435: duke@435: // Scan all registers to see if this value is around already duke@435: for( uint reg = 0; reg < (uint)_max_reg; reg++ ) { kvn@835: if (reg == (uint)nk_reg) { kvn@835: // Found ourselves so check if there is only one user of this kvn@835: // copy and keep on searching for a better copy if so. kvn@835: bool ignore_self = true; kvn@835: x = n->in(k); kvn@835: DUIterator_Fast imax, i = x->fast_outs(imax); kvn@835: Node* first = x->fast_out(i); i++; kvn@835: while (i < imax && ignore_self) { kvn@835: Node* use = x->fast_out(i); i++; kvn@835: if (use != first) ignore_self = false; kvn@835: } kvn@835: if (ignore_self) continue; kvn@835: } kvn@835: duke@435: Node *vv = value[reg]; duke@435: if( !single ) { // Doubles check for aligned-adjacent pair duke@435: if( (reg&1)==0 ) continue; // Wrong half of a pair duke@435: if( vv != value[reg-1] ) continue; // Not a complete pair duke@435: } duke@435: if( vv == val || // Got a direct hit? duke@435: (t && vv && vv->bottom_type() == t && vv->is_Mach() && duke@435: vv->as_Mach()->rule() == val->as_Mach()->rule()) ) { // Or same constant? duke@435: assert( !n->is_Phi(), "cannot change registers at a Phi so easily" ); duke@435: if( OptoReg::is_stack(nk_reg) || // CISC-loading from stack OR duke@435: OptoReg::is_reg(reg) || // turning into a register use OR duke@435: regnd[reg]->outcnt()==1 ) { // last use of a spill-load turns into a CISC use duke@435: blk_adjust += use_prior_register(n,k,regnd[reg],current_block,value,regnd); duke@435: if( n->in(k) == regnd[reg] ) // Success! Quit trying duke@435: return blk_adjust; duke@435: } // End of if not degrading to a stack duke@435: } // End of if found value in another register duke@435: } // End of scan all machine registers duke@435: return blk_adjust; duke@435: } duke@435: duke@435: duke@435: // duke@435: // Check if nreg already contains the constant value val. Normal copy duke@435: // elimination doesn't doesn't work on constants because multiple duke@435: // nodes can represent the same constant so the type and rule of the duke@435: // MachNode must be checked to ensure equivalence. duke@435: // never@505: bool PhaseChaitin::eliminate_copy_of_constant(Node* val, Node* n, never@505: Block *current_block, duke@435: Node_List& value, Node_List& regnd, duke@435: OptoReg::Name nreg, OptoReg::Name nreg2) { duke@435: if (value[nreg] != val && val->is_Con() && duke@435: value[nreg] != NULL && value[nreg]->is_Con() && duke@435: (nreg2 == OptoReg::Bad || value[nreg] == value[nreg2]) && duke@435: value[nreg]->bottom_type() == val->bottom_type() && duke@435: value[nreg]->as_Mach()->rule() == val->as_Mach()->rule()) { duke@435: // This code assumes that two MachNodes representing constants duke@435: // which have the same rule and the same bottom type will produce duke@435: // identical effects into a register. This seems like it must be duke@435: // objectively true unless there are hidden inputs to the nodes duke@435: // but if that were to change this code would need to updated. duke@435: // Since they are equivalent the second one if redundant and can duke@435: // be removed. duke@435: // never@505: // n will be replaced with the old value but n might have duke@435: // kills projections associated with it so remove them now so that twisti@1040: // yank_if_dead will be able to eliminate the copy once the uses duke@435: // have been transferred to the old[value]. never@505: for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) { never@505: Node* use = n->fast_out(i); duke@435: if (use->is_Proj() && use->outcnt() == 0) { duke@435: // Kill projections have no users and one input duke@435: use->set_req(0, C->top()); duke@435: yank_if_dead(use, current_block, &value, ®nd); duke@435: --i; --imax; duke@435: } duke@435: } duke@435: _post_alloc++; duke@435: return true; duke@435: } duke@435: return false; duke@435: } duke@435: duke@435: duke@435: //------------------------------post_allocate_copy_removal--------------------- duke@435: // Post-Allocation peephole copy removal. We do this in 1 pass over the duke@435: // basic blocks. We maintain a mapping of registers to Nodes (an array of duke@435: // Nodes indexed by machine register or stack slot number). NULL means that a duke@435: // register is not mapped to any Node. We can (want to have!) have several duke@435: // registers map to the same Node. We walk forward over the instructions duke@435: // updating the mapping as we go. At merge points we force a NULL if we have duke@435: // to merge 2 different Nodes into the same register. Phi functions will give duke@435: // us a new Node if there is a proper value merging. Since the blocks are duke@435: // arranged in some RPO, we will visit all parent blocks before visiting any duke@435: // successor blocks (except at loops). duke@435: // duke@435: // If we find a Copy we look to see if the Copy's source register is a stack duke@435: // slot and that value has already been loaded into some machine register; if duke@435: // so we use machine register directly. This turns a Load into a reg-reg duke@435: // Move. We also look for reloads of identical constants. duke@435: // duke@435: // When we see a use from a reg-reg Copy, we will attempt to use the copy's duke@435: // source directly and make the copy go dead. duke@435: void PhaseChaitin::post_allocate_copy_removal() { duke@435: NOT_PRODUCT( Compile::TracePhase t3("postAllocCopyRemoval", &_t_postAllocCopyRemoval, TimeCompiler); ) duke@435: ResourceMark rm; duke@435: duke@435: // Need a mapping from basic block Node_Lists. We need a Node_List to duke@435: // map from register number to value-producing Node. duke@435: Node_List **blk2value = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1); duke@435: memset( blk2value, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) ); duke@435: // Need a mapping from basic block Node_Lists. We need a Node_List to duke@435: // map from register number to register-defining Node. duke@435: Node_List **blk2regnd = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1); duke@435: memset( blk2regnd, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) ); duke@435: duke@435: // We keep unused Node_Lists on a free_list to avoid wasting duke@435: // memory. duke@435: GrowableArray free_list = GrowableArray(16); duke@435: duke@435: // For all blocks duke@435: for( uint i = 0; i < _cfg._num_blocks; i++ ) { duke@435: uint j; duke@435: Block *b = _cfg._blocks[i]; duke@435: duke@435: // Count of Phis in block duke@435: uint phi_dex; duke@435: for( phi_dex = 1; phi_dex < b->_nodes.size(); phi_dex++ ) { duke@435: Node *phi = b->_nodes[phi_dex]; duke@435: if( !phi->is_Phi() ) duke@435: break; duke@435: } duke@435: duke@435: // If any predecessor has not been visited, we do not know the state duke@435: // of registers at the start. Check for this, while updating copies duke@435: // along Phi input edges duke@435: bool missing_some_inputs = false; duke@435: Block *freed = NULL; duke@435: for( j = 1; j < b->num_preds(); j++ ) { duke@435: Block *pb = _cfg._bbs[b->pred(j)->_idx]; duke@435: // Remove copies along phi edges duke@435: for( uint k=1; k_nodes[k], j, b, *blk2value[pb->_pre_order], *blk2regnd[pb->_pre_order], false ); duke@435: if( blk2value[pb->_pre_order] ) { // Have a mapping on this edge? duke@435: // See if this predecessor's mappings have been used by everybody duke@435: // who wants them. If so, free 'em. duke@435: uint k; duke@435: for( k=0; k_num_succs; k++ ) { duke@435: Block *pbsucc = pb->_succs[k]; duke@435: if( !blk2value[pbsucc->_pre_order] && pbsucc != b ) duke@435: break; // Found a future user duke@435: } duke@435: if( k >= pb->_num_succs ) { // No more uses, free! duke@435: freed = pb; // Record last block freed duke@435: free_list.push(blk2value[pb->_pre_order]); duke@435: free_list.push(blk2regnd[pb->_pre_order]); duke@435: } duke@435: } else { // This block has unvisited (loopback) inputs duke@435: missing_some_inputs = true; duke@435: } duke@435: } duke@435: duke@435: duke@435: // Extract Node_List mappings. If 'freed' is non-zero, we just popped duke@435: // 'freed's blocks off the list duke@435: Node_List ®nd = *(free_list.is_empty() ? new Node_List() : free_list.pop()); duke@435: Node_List &value = *(free_list.is_empty() ? new Node_List() : free_list.pop()); duke@435: assert( !freed || blk2value[freed->_pre_order] == &value, "" ); duke@435: value.map(_max_reg,NULL); duke@435: regnd.map(_max_reg,NULL); duke@435: // Set mappings as OUR mappings duke@435: blk2value[b->_pre_order] = &value; duke@435: blk2regnd[b->_pre_order] = ®nd; duke@435: duke@435: // Initialize value & regnd for this block duke@435: if( missing_some_inputs ) { duke@435: // Some predecessor has not yet been visited; zap map to empty duke@435: for( uint k = 0; k < (uint)_max_reg; k++ ) { duke@435: value.map(k,NULL); duke@435: regnd.map(k,NULL); duke@435: } duke@435: } else { duke@435: if( !freed ) { // Didn't get a freebie prior block duke@435: // Must clone some data duke@435: freed = _cfg._bbs[b->pred(1)->_idx]; duke@435: Node_List &f_value = *blk2value[freed->_pre_order]; duke@435: Node_List &f_regnd = *blk2regnd[freed->_pre_order]; duke@435: for( uint k = 0; k < (uint)_max_reg; k++ ) { duke@435: value.map(k,f_value[k]); duke@435: regnd.map(k,f_regnd[k]); duke@435: } duke@435: } duke@435: // Merge all inputs together, setting to NULL any conflicts. duke@435: for( j = 1; j < b->num_preds(); j++ ) { duke@435: Block *pb = _cfg._bbs[b->pred(j)->_idx]; duke@435: if( pb == freed ) continue; // Did self already via freelist duke@435: Node_List &p_regnd = *blk2regnd[pb->_pre_order]; duke@435: for( uint k = 0; k < (uint)_max_reg; k++ ) { duke@435: if( regnd[k] != p_regnd[k] ) { // Conflict on reaching defs? duke@435: value.map(k,NULL); // Then no value handy duke@435: regnd.map(k,NULL); duke@435: } duke@435: } duke@435: } duke@435: } duke@435: duke@435: // For all Phi's duke@435: for( j = 1; j < phi_dex; j++ ) { duke@435: uint k; duke@435: Node *phi = b->_nodes[j]; duke@435: uint pidx = n2lidx(phi); duke@435: OptoReg::Name preg = lrgs(n2lidx(phi)).reg(); duke@435: duke@435: // Remove copies remaining on edges. Check for junk phi. duke@435: Node *u = NULL; duke@435: for( k=1; kreq(); k++ ) { duke@435: Node *x = phi->in(k); duke@435: if( phi != x && u != x ) // Found a different input duke@435: u = u ? NodeSentinel : x; // Capture unique input, or NodeSentinel for 2nd input duke@435: } duke@435: if( u != NodeSentinel ) { // Junk Phi. Remove duke@435: b->_nodes.remove(j--); phi_dex--; duke@435: _cfg._bbs.map(phi->_idx,NULL); duke@435: phi->replace_by(u); duke@435: phi->disconnect_inputs(NULL); duke@435: continue; duke@435: } duke@435: // Note that if value[pidx] exists, then we merged no new values here duke@435: // and the phi is useless. This can happen even with the above phi duke@435: // removal for complex flows. I cannot keep the better known value here duke@435: // because locally the phi appears to define a new merged value. If I duke@435: // keep the better value then a copy of the phi, being unable to use the duke@435: // global flow analysis, can't "peek through" the phi to the original duke@435: // reaching value and so will act like it's defining a new value. This duke@435: // can lead to situations where some uses are from the old and some from duke@435: // the new values. Not illegal by itself but throws the over-strong duke@435: // assert in scheduling. duke@435: if( pidx ) { duke@435: value.map(preg,phi); duke@435: regnd.map(preg,phi); duke@435: OptoReg::Name preg_lo = OptoReg::add(preg,-1); duke@435: if( !is_single_register(phi->ideal_reg()) ) { duke@435: value.map(preg_lo,phi); duke@435: regnd.map(preg_lo,phi); duke@435: } duke@435: } duke@435: } duke@435: duke@435: // For all remaining instructions duke@435: for( j = phi_dex; j < b->_nodes.size(); j++ ) { duke@435: Node *n = b->_nodes[j]; duke@435: duke@435: if( n->outcnt() == 0 && // Dead? duke@435: n != C->top() && // (ignore TOP, it has no du info) duke@435: !n->is_Proj() ) { // fat-proj kills duke@435: j -= yank_if_dead(n,b,&value,®nd); duke@435: continue; duke@435: } duke@435: duke@435: // Improve reaching-def info. Occasionally post-alloc's liveness gives duke@435: // up (at loop backedges, because we aren't doing a full flow pass). duke@435: // The presence of a live use essentially asserts that the use's def is duke@435: // alive and well at the use (or else the allocator fubar'd). Take duke@435: // advantage of this info to set a reaching def for the use-reg. duke@435: uint k; duke@435: for( k = 1; k < n->req(); k++ ) { duke@435: Node *def = n->in(k); // n->in(k) is a USE; def is the DEF for this USE duke@435: guarantee(def != NULL, "no disconnected nodes at this point"); duke@435: uint useidx = n2lidx(def); // useidx is the live range index for this USE duke@435: duke@435: if( useidx ) { duke@435: OptoReg::Name ureg = lrgs(useidx).reg(); duke@435: if( !value[ureg] ) { duke@435: int idx; // Skip occasional useless copy duke@435: while( (idx=def->is_Copy()) != 0 && duke@435: def->in(idx) != NULL && // NULL should not happen duke@435: ureg == lrgs(n2lidx(def->in(idx))).reg() ) duke@435: def = def->in(idx); duke@435: Node *valdef = skip_copies(def); // tighten up val through non-useless copies duke@435: value.map(ureg,valdef); // record improved reaching-def info duke@435: regnd.map(ureg, def); duke@435: // Record other half of doubles duke@435: OptoReg::Name ureg_lo = OptoReg::add(ureg,-1); duke@435: if( !is_single_register(def->ideal_reg()) && duke@435: ( !RegMask::can_represent(ureg_lo) || duke@435: lrgs(useidx).mask().Member(ureg_lo) ) && // Nearly always adjacent duke@435: !value[ureg_lo] ) { duke@435: value.map(ureg_lo,valdef); // record improved reaching-def info duke@435: regnd.map(ureg_lo, def); duke@435: } duke@435: } duke@435: } duke@435: } duke@435: duke@435: const uint two_adr = n->is_Mach() ? n->as_Mach()->two_adr() : 0; duke@435: duke@435: // Remove copies along input edges duke@435: for( k = 1; k < n->req(); k++ ) duke@435: j -= elide_copy( n, k, b, value, regnd, two_adr!=k ); duke@435: duke@435: // Unallocated Nodes define no registers duke@435: uint lidx = n2lidx(n); duke@435: if( !lidx ) continue; duke@435: duke@435: // Update the register defined by this instruction duke@435: OptoReg::Name nreg = lrgs(lidx).reg(); duke@435: // Skip through all copies to the _value_ being defined. duke@435: // Do not change from int to pointer duke@435: Node *val = skip_copies(n); duke@435: never@1358: // Clear out a dead definition before starting so that the never@1358: // elimination code doesn't have to guard against it. The never@1358: // definition could in fact be a kill projection with a count of never@1358: // 0 which is safe but since those are uninteresting for copy never@1358: // elimination just delete them as well. never@1358: if (regnd[nreg] != NULL && regnd[nreg]->outcnt() == 0) { never@1358: regnd.map(nreg, NULL); never@1358: value.map(nreg, NULL); never@1358: } never@1358: duke@435: uint n_ideal_reg = n->ideal_reg(); duke@435: if( is_single_register(n_ideal_reg) ) { duke@435: // If Node 'n' does not change the value mapped by the register, duke@435: // then 'n' is a useless copy. Do not update the register->node duke@435: // mapping so 'n' will go dead. duke@435: if( value[nreg] != val ) { never@505: if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, OptoReg::Bad)) { never@1358: j -= replace_and_yank_if_dead(n, nreg, b, value, regnd); duke@435: } else { duke@435: // Update the mapping: record new Node defined by the register duke@435: regnd.map(nreg,n); duke@435: // Update mapping for defined *value*, which is the defined duke@435: // Node after skipping all copies. duke@435: value.map(nreg,val); duke@435: } never@1358: } else if( !may_be_copy_of_callee(n) ) { duke@435: assert( n->is_Copy(), "" ); never@1358: j -= replace_and_yank_if_dead(n, nreg, b, value, regnd); duke@435: } duke@435: } else { duke@435: // If the value occupies a register pair, record same info duke@435: // in both registers. duke@435: OptoReg::Name nreg_lo = OptoReg::add(nreg,-1); duke@435: if( RegMask::can_represent(nreg_lo) && // Either a spill slot, or duke@435: !lrgs(lidx).mask().Member(nreg_lo) ) { // Nearly always adjacent duke@435: // Sparc occasionally has non-adjacent pairs. duke@435: // Find the actual other value duke@435: RegMask tmp = lrgs(lidx).mask(); duke@435: tmp.Remove(nreg); duke@435: nreg_lo = tmp.find_first_elem(); duke@435: } duke@435: if( value[nreg] != val || value[nreg_lo] != val ) { never@505: if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, nreg_lo)) { never@1358: j -= replace_and_yank_if_dead(n, nreg, b, value, regnd); duke@435: } else { duke@435: regnd.map(nreg , n ); duke@435: regnd.map(nreg_lo, n ); duke@435: value.map(nreg ,val); duke@435: value.map(nreg_lo,val); duke@435: } never@1358: } else if( !may_be_copy_of_callee(n) ) { duke@435: assert( n->is_Copy(), "" ); never@1358: j -= replace_and_yank_if_dead(n, nreg, b, value, regnd); duke@435: } duke@435: } duke@435: duke@435: // Fat projections kill many registers duke@435: if( n_ideal_reg == MachProjNode::fat_proj ) { duke@435: RegMask rm = n->out_RegMask(); duke@435: // wow, what an expensive iterator... duke@435: nreg = rm.find_first_elem(); duke@435: while( OptoReg::is_valid(nreg)) { duke@435: rm.Remove(nreg); duke@435: value.map(nreg,n); duke@435: regnd.map(nreg,n); duke@435: nreg = rm.find_first_elem(); duke@435: } duke@435: } duke@435: duke@435: } // End of for all instructions in the block duke@435: duke@435: } // End for all blocks duke@435: }