duke@435: /* duke@435: * Copyright 2000-2007 Sun Microsystems, Inc. All Rights Reserved. duke@435: * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. duke@435: * duke@435: * This code is free software; you can redistribute it and/or modify it duke@435: * under the terms of the GNU General Public License version 2 only, as duke@435: * published by the Free Software Foundation. duke@435: * duke@435: * This code is distributed in the hope that it will be useful, but WITHOUT duke@435: * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or duke@435: * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License duke@435: * version 2 for more details (a copy is included in the LICENSE file that duke@435: * accompanied this code). duke@435: * duke@435: * You should have received a copy of the GNU General Public License version duke@435: * 2 along with this work; if not, write to the Free Software Foundation, duke@435: * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. duke@435: * duke@435: * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, duke@435: * CA 95054 USA or visit www.sun.com if you need additional information or duke@435: * have any questions. duke@435: * duke@435: */ duke@435: duke@435: class VMRegImpl; duke@435: typedef VMRegImpl* VMReg; duke@435: duke@435: // Use Register as shortcut duke@435: class RegisterImpl; duke@435: typedef RegisterImpl* Register; duke@435: duke@435: duke@435: // The implementation of integer registers for the ia32 architecture duke@435: inline Register as_Register(int encoding) { duke@435: return (Register)(intptr_t) encoding; duke@435: } duke@435: duke@435: class RegisterImpl: public AbstractRegisterImpl { duke@435: public: duke@435: enum { duke@435: #ifndef AMD64 duke@435: number_of_registers = 8, duke@435: number_of_byte_registers = 4 duke@435: #else duke@435: number_of_registers = 16, duke@435: number_of_byte_registers = 16 duke@435: #endif // AMD64 duke@435: }; duke@435: duke@435: // derived registers, offsets, and addresses duke@435: Register successor() const { return as_Register(encoding() + 1); } duke@435: duke@435: // construction duke@435: inline friend Register as_Register(int encoding); duke@435: duke@435: VMReg as_VMReg(); duke@435: duke@435: // accessors duke@435: int encoding() const { assert(is_valid(), "invalid register"); return (intptr_t)this; } duke@435: bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; } duke@435: bool has_byte_register() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_byte_registers; } duke@435: const char* name() const; duke@435: }; duke@435: duke@435: // The integer registers of the ia32/amd64 architecture duke@435: duke@435: CONSTANT_REGISTER_DECLARATION(Register, noreg, (-1)); duke@435: duke@435: duke@435: CONSTANT_REGISTER_DECLARATION(Register, rax, (0)); duke@435: CONSTANT_REGISTER_DECLARATION(Register, rcx, (1)); duke@435: CONSTANT_REGISTER_DECLARATION(Register, rdx, (2)); duke@435: CONSTANT_REGISTER_DECLARATION(Register, rbx, (3)); duke@435: CONSTANT_REGISTER_DECLARATION(Register, rsp, (4)); duke@435: CONSTANT_REGISTER_DECLARATION(Register, rbp, (5)); duke@435: CONSTANT_REGISTER_DECLARATION(Register, rsi, (6)); duke@435: CONSTANT_REGISTER_DECLARATION(Register, rdi, (7)); duke@435: #ifdef AMD64 duke@435: CONSTANT_REGISTER_DECLARATION(Register, r8, (8)); duke@435: CONSTANT_REGISTER_DECLARATION(Register, r9, (9)); duke@435: CONSTANT_REGISTER_DECLARATION(Register, r10, (10)); duke@435: CONSTANT_REGISTER_DECLARATION(Register, r11, (11)); duke@435: CONSTANT_REGISTER_DECLARATION(Register, r12, (12)); duke@435: CONSTANT_REGISTER_DECLARATION(Register, r13, (13)); duke@435: CONSTANT_REGISTER_DECLARATION(Register, r14, (14)); duke@435: CONSTANT_REGISTER_DECLARATION(Register, r15, (15)); duke@435: #endif // AMD64 duke@435: duke@435: // Use FloatRegister as shortcut duke@435: class FloatRegisterImpl; duke@435: typedef FloatRegisterImpl* FloatRegister; duke@435: duke@435: inline FloatRegister as_FloatRegister(int encoding) { duke@435: return (FloatRegister)(intptr_t) encoding; duke@435: } duke@435: duke@435: // The implementation of floating point registers for the ia32 architecture duke@435: class FloatRegisterImpl: public AbstractRegisterImpl { duke@435: public: duke@435: enum { duke@435: number_of_registers = 8 duke@435: }; duke@435: duke@435: // construction duke@435: inline friend FloatRegister as_FloatRegister(int encoding); duke@435: duke@435: VMReg as_VMReg(); duke@435: duke@435: // derived registers, offsets, and addresses duke@435: FloatRegister successor() const { return as_FloatRegister(encoding() + 1); } duke@435: duke@435: // accessors duke@435: int encoding() const { assert(is_valid(), "invalid register"); return (intptr_t)this; } duke@435: bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; } duke@435: const char* name() const; duke@435: duke@435: }; duke@435: duke@435: // Use XMMRegister as shortcut duke@435: class XMMRegisterImpl; duke@435: typedef XMMRegisterImpl* XMMRegister; duke@435: duke@435: // Use MMXRegister as shortcut duke@435: class MMXRegisterImpl; duke@435: typedef MMXRegisterImpl* MMXRegister; duke@435: duke@435: inline XMMRegister as_XMMRegister(int encoding) { duke@435: return (XMMRegister)(intptr_t)encoding; duke@435: } duke@435: duke@435: inline MMXRegister as_MMXRegister(int encoding) { duke@435: return (MMXRegister)(intptr_t)encoding; duke@435: } duke@435: duke@435: // The implementation of XMM registers for the IA32 architecture duke@435: class XMMRegisterImpl: public AbstractRegisterImpl { duke@435: public: duke@435: enum { duke@435: #ifndef AMD64 duke@435: number_of_registers = 8 duke@435: #else duke@435: number_of_registers = 16 duke@435: #endif // AMD64 duke@435: }; duke@435: duke@435: // construction duke@435: friend XMMRegister as_XMMRegister(int encoding); duke@435: duke@435: VMReg as_VMReg(); duke@435: duke@435: // derived registers, offsets, and addresses duke@435: XMMRegister successor() const { return as_XMMRegister(encoding() + 1); } duke@435: duke@435: // accessors duke@435: int encoding() const { assert(is_valid(), "invalid register"); return (intptr_t)this; } duke@435: bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; } duke@435: const char* name() const; duke@435: }; duke@435: duke@435: duke@435: // The XMM registers, for P3 and up chips duke@435: CONSTANT_REGISTER_DECLARATION(XMMRegister, xnoreg , (-1)); duke@435: CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm0 , ( 0)); duke@435: CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm1 , ( 1)); duke@435: CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm2 , ( 2)); duke@435: CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm3 , ( 3)); duke@435: CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm4 , ( 4)); duke@435: CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm5 , ( 5)); duke@435: CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm6 , ( 6)); duke@435: CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm7 , ( 7)); duke@435: #ifdef AMD64 duke@435: CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm8, (8)); duke@435: CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm9, (9)); duke@435: CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm10, (10)); duke@435: CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm11, (11)); duke@435: CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm12, (12)); duke@435: CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm13, (13)); duke@435: CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm14, (14)); duke@435: CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm15, (15)); duke@435: #endif // AMD64 duke@435: duke@435: // Only used by the 32bit stubGenerator. These can't be described by vmreg and hence duke@435: // can't be described in oopMaps and therefore can't be used by the compilers (at least duke@435: // were deopt might wan't to see them). duke@435: duke@435: // The MMX registers, for P3 and up chips duke@435: CONSTANT_REGISTER_DECLARATION(MMXRegister, mnoreg , (-1)); duke@435: CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx0 , ( 0)); duke@435: CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx1 , ( 1)); duke@435: CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx2 , ( 2)); duke@435: CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx3 , ( 3)); duke@435: CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx4 , ( 4)); duke@435: CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx5 , ( 5)); duke@435: CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx6 , ( 6)); duke@435: CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx7 , ( 7)); duke@435: duke@435: duke@435: // Need to know the total number of registers of all sorts for SharedInfo. duke@435: // Define a class that exports it. duke@435: class ConcreteRegisterImpl : public AbstractRegisterImpl { duke@435: public: duke@435: enum { duke@435: // A big enough number for C2: all the registers plus flags duke@435: // This number must be large enough to cover REG_COUNT (defined by c2) registers. duke@435: // There is no requirement that any ordering here matches any ordering c2 gives duke@435: // it's optoregs. duke@435: duke@435: number_of_registers = RegisterImpl::number_of_registers + duke@435: #ifdef AMD64 duke@435: RegisterImpl::number_of_registers + // "H" half of a 64bit register duke@435: #endif // AMD64 duke@435: 2 * FloatRegisterImpl::number_of_registers + duke@435: 2 * XMMRegisterImpl::number_of_registers + duke@435: 1 // eflags duke@435: }; duke@435: duke@435: static const int max_gpr; duke@435: static const int max_fpr; duke@435: static const int max_xmm; duke@435: duke@435: };