duke@435: /*
mikael@6198:  * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
duke@435:  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435:  *
duke@435:  * This code is free software; you can redistribute it and/or modify it
duke@435:  * under the terms of the GNU General Public License version 2 only, as
duke@435:  * published by the Free Software Foundation.
duke@435:  *
duke@435:  * This code is distributed in the hope that it will be useful, but WITHOUT
duke@435:  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435:  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
duke@435:  * version 2 for more details (a copy is included in the LICENSE file that
duke@435:  * accompanied this code).
duke@435:  *
duke@435:  * You should have received a copy of the GNU General Public License version
duke@435:  * 2 along with this work; if not, write to the Free Software Foundation,
duke@435:  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435:  *
trims@1907:  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907:  * or visit www.oracle.com if you need additional information or have any
trims@1907:  * questions.
duke@435:  *
duke@435:  */
duke@435: 
stefank@2314: #include "precompiled.hpp"
stefank@2314: #include "c1/c1_Compilation.hpp"
stefank@2314: #include "c1/c1_Instruction.hpp"
stefank@2314: #include "c1/c1_InstructionPrinter.hpp"
stefank@2314: #include "c1/c1_LIRAssembler.hpp"
stefank@2314: #include "c1/c1_MacroAssembler.hpp"
stefank@2314: #include "c1/c1_ValueStack.hpp"
stefank@2314: #include "ci/ciInstance.hpp"
stefank@2314: #ifdef TARGET_ARCH_x86
stefank@2314: # include "nativeInst_x86.hpp"
stefank@2314: # include "vmreg_x86.inline.hpp"
stefank@2314: #endif
stefank@2314: #ifdef TARGET_ARCH_sparc
stefank@2314: # include "nativeInst_sparc.hpp"
stefank@2314: # include "vmreg_sparc.inline.hpp"
stefank@2314: #endif
stefank@2314: #ifdef TARGET_ARCH_zero
stefank@2314: # include "nativeInst_zero.hpp"
stefank@2314: # include "vmreg_zero.inline.hpp"
stefank@2314: #endif
bobv@2508: #ifdef TARGET_ARCH_arm
bobv@2508: # include "nativeInst_arm.hpp"
bobv@2508: # include "vmreg_arm.inline.hpp"
bobv@2508: #endif
bobv@2508: #ifdef TARGET_ARCH_ppc
bobv@2508: # include "nativeInst_ppc.hpp"
bobv@2508: # include "vmreg_ppc.inline.hpp"
bobv@2508: #endif
duke@435: 
duke@435: 
duke@435: void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) {
duke@435:   // we must have enough patching space so that call can be inserted
duke@435:   while ((intx) _masm->pc() - (intx) patch->pc_start() < NativeCall::instruction_size) {
duke@435:     _masm->nop();
duke@435:   }
duke@435:   patch->install(_masm, patch_code, obj, info);
neliasso@6688:   append_code_stub(patch);
duke@435: 
duke@435: #ifdef ASSERT
roland@2174:   Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->stack()->bci());
duke@435:   if (patch->id() == PatchingStub::access_field_id) {
duke@435:     switch (code) {
duke@435:       case Bytecodes::_putstatic:
duke@435:       case Bytecodes::_getstatic:
duke@435:       case Bytecodes::_putfield:
duke@435:       case Bytecodes::_getfield:
duke@435:         break;
duke@435:       default:
duke@435:         ShouldNotReachHere();
duke@435:     }
duke@435:   } else if (patch->id() == PatchingStub::load_klass_id) {
duke@435:     switch (code) {
duke@435:       case Bytecodes::_new:
duke@435:       case Bytecodes::_anewarray:
duke@435:       case Bytecodes::_multianewarray:
duke@435:       case Bytecodes::_instanceof:
duke@435:       case Bytecodes::_checkcast:
coleenp@4037:         break;
coleenp@4037:       default:
coleenp@4037:         ShouldNotReachHere();
coleenp@4037:     }
coleenp@4037:   } else if (patch->id() == PatchingStub::load_mirror_id) {
coleenp@4037:     switch (code) {
coleenp@4037:       case Bytecodes::_putstatic:
coleenp@4037:       case Bytecodes::_getstatic:
duke@435:       case Bytecodes::_ldc:
duke@435:       case Bytecodes::_ldc_w:
duke@435:         break;
duke@435:       default:
duke@435:         ShouldNotReachHere();
duke@435:     }
roland@5628:   } else if (patch->id() == PatchingStub::load_appendix_id) {
roland@5628:     Bytecodes::Code bc_raw = info->scope()->method()->raw_code_at_bci(info->stack()->bci());
roland@5628:     assert(Bytecodes::has_optional_appendix(bc_raw), "unexpected appendix resolution");
duke@435:   } else {
duke@435:     ShouldNotReachHere();
duke@435:   }
duke@435: #endif
duke@435: }
duke@435: 
roland@5628: PatchingStub::PatchID LIR_Assembler::patching_id(CodeEmitInfo* info) {
roland@5628:   IRScope* scope = info->scope();
roland@5628:   Bytecodes::Code bc_raw = scope->method()->raw_code_at_bci(info->stack()->bci());
roland@5628:   if (Bytecodes::has_optional_appendix(bc_raw)) {
roland@5628:     return PatchingStub::load_appendix_id;
roland@5628:   }
roland@5628:   return PatchingStub::load_mirror_id;
roland@5628: }
duke@435: 
duke@435: //---------------------------------------------------------------
duke@435: 
duke@435: 
duke@435: LIR_Assembler::LIR_Assembler(Compilation* c):
duke@435:    _compilation(c)
duke@435:  , _masm(c->masm())
ysr@777:  , _bs(Universe::heap()->barrier_set())
duke@435:  , _frame_map(c->frame_map())
duke@435:  , _current_block(NULL)
duke@435:  , _pending_non_safepoint(NULL)
duke@435:  , _pending_non_safepoint_offset(0)
duke@435: {
duke@435:   _slow_case_stubs = new CodeStubList();
duke@435: }
duke@435: 
duke@435: 
duke@435: LIR_Assembler::~LIR_Assembler() {
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIR_Assembler::check_codespace() {
duke@435:   CodeSection* cs = _masm->code_section();
iveresov@3096:   if (cs->remaining() < (int)(NOT_LP64(1*K)LP64_ONLY(2*K))) {
duke@435:     BAILOUT("CodeBuffer overflow");
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
neliasso@6688: void LIR_Assembler::append_code_stub(CodeStub* stub) {
duke@435:   _slow_case_stubs->append(stub);
duke@435: }
duke@435: 
duke@435: void LIR_Assembler::emit_stubs(CodeStubList* stub_list) {
duke@435:   for (int m = 0; m < stub_list->length(); m++) {
duke@435:     CodeStub* s = (*stub_list)[m];
duke@435: 
duke@435:     check_codespace();
duke@435:     CHECK_BAILOUT();
duke@435: 
duke@435: #ifndef PRODUCT
duke@435:     if (CommentedAssembly) {
duke@435:       stringStream st;
duke@435:       s->print_name(&st);
duke@435:       st.print(" slow case");
duke@435:       _masm->block_comment(st.as_string());
duke@435:     }
duke@435: #endif
duke@435:     s->emit_code(this);
duke@435: #ifdef ASSERT
duke@435:     s->assert_no_unbound_labels();
duke@435: #endif
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIR_Assembler::emit_slow_case_stubs() {
duke@435:   emit_stubs(_slow_case_stubs);
duke@435: }
duke@435: 
duke@435: 
duke@435: bool LIR_Assembler::needs_icache(ciMethod* method) const {
duke@435:   return !method->is_static();
duke@435: }
duke@435: 
duke@435: 
duke@435: int LIR_Assembler::code_offset() const {
duke@435:   return _masm->offset();
duke@435: }
duke@435: 
duke@435: 
duke@435: address LIR_Assembler::pc() const {
duke@435:   return _masm->pc();
duke@435: }
duke@435: 
roland@6723: // To bang the stack of this compiled method we use the stack size
roland@6723: // that the interpreter would need in case of a deoptimization. This
roland@6723: // removes the need to bang the stack in the deoptimization blob which
roland@6723: // in turn simplifies stack overflow handling.
roland@6723: int LIR_Assembler::bang_size_in_bytes() const {
roland@6723:   return MAX2(initial_frame_size_in_bytes(), _compilation->interpreter_frame_size());
roland@6723: }
duke@435: 
duke@435: void LIR_Assembler::emit_exception_entries(ExceptionInfoList* info_list) {
duke@435:   for (int i = 0; i < info_list->length(); i++) {
duke@435:     XHandlers* handlers = info_list->at(i)->exception_handlers();
duke@435: 
duke@435:     for (int j = 0; j < handlers->length(); j++) {
duke@435:       XHandler* handler = handlers->handler_at(j);
duke@435:       assert(handler->lir_op_id() != -1, "handler not processed by LinearScan");
duke@435:       assert(handler->entry_code() == NULL ||
duke@435:              handler->entry_code()->instructions_list()->last()->code() == lir_branch ||
duke@435:              handler->entry_code()->instructions_list()->last()->code() == lir_delay_slot, "last operation must be branch");
duke@435: 
duke@435:       if (handler->entry_pco() == -1) {
duke@435:         // entry code not emitted yet
duke@435:         if (handler->entry_code() != NULL && handler->entry_code()->instructions_list()->length() > 1) {
duke@435:           handler->set_entry_pco(code_offset());
duke@435:           if (CommentedAssembly) {
duke@435:             _masm->block_comment("Exception adapter block");
duke@435:           }
duke@435:           emit_lir_list(handler->entry_code());
duke@435:         } else {
duke@435:           handler->set_entry_pco(handler->entry_block()->exception_handler_pco());
duke@435:         }
duke@435: 
duke@435:         assert(handler->entry_pco() != -1, "must be set now");
duke@435:       }
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIR_Assembler::emit_code(BlockList* hir) {
duke@435:   if (PrintLIR) {
duke@435:     print_LIR(hir);
duke@435:   }
duke@435: 
duke@435:   int n = hir->length();
duke@435:   for (int i = 0; i < n; i++) {
duke@435:     emit_block(hir->at(i));
duke@435:     CHECK_BAILOUT();
duke@435:   }
duke@435: 
duke@435:   flush_debug_info(code_offset());
duke@435: 
duke@435:   DEBUG_ONLY(check_no_unbound_labels());
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIR_Assembler::emit_block(BlockBegin* block) {
duke@435:   if (block->is_set(BlockBegin::backward_branch_target_flag)) {
duke@435:     align_backward_branch_target();
duke@435:   }
duke@435: 
duke@435:   // if this block is the start of an exception handler, record the
duke@435:   // PC offset of the first instruction for later construction of
duke@435:   // the ExceptionHandlerTable
duke@435:   if (block->is_set(BlockBegin::exception_entry_flag)) {
duke@435:     block->set_exception_handler_pco(code_offset());
duke@435:   }
duke@435: 
duke@435: #ifndef PRODUCT
duke@435:   if (PrintLIRWithAssembly) {
duke@435:     // don't print Phi's
duke@435:     InstructionPrinter ip(false);
duke@435:     block->print(ip);
duke@435:   }
duke@435: #endif /* PRODUCT */
duke@435: 
duke@435:   assert(block->lir() != NULL, "must have LIR");
never@739:   X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
duke@435: 
duke@435: #ifndef PRODUCT
duke@435:   if (CommentedAssembly) {
duke@435:     stringStream st;
roland@2174:     st.print_cr(" block B%d [%d, %d]", block->block_id(), block->bci(), block->end()->printable_bci());
duke@435:     _masm->block_comment(st.as_string());
duke@435:   }
duke@435: #endif
duke@435: 
duke@435:   emit_lir_list(block->lir());
duke@435: 
never@739:   X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIR_Assembler::emit_lir_list(LIR_List* list) {
duke@435:   peephole(list);
duke@435: 
duke@435:   int n = list->length();
duke@435:   for (int i = 0; i < n; i++) {
duke@435:     LIR_Op* op = list->at(i);
duke@435: 
duke@435:     check_codespace();
duke@435:     CHECK_BAILOUT();
duke@435: 
duke@435: #ifndef PRODUCT
duke@435:     if (CommentedAssembly) {
duke@435:       // Don't record out every op since that's too verbose.  Print
duke@435:       // branches since they include block and stub names.  Also print
duke@435:       // patching moves since they generate funny looking code.
duke@435:       if (op->code() == lir_branch ||
duke@435:           (op->code() == lir_move && op->as_Op1()->patch_code() != lir_patch_none)) {
duke@435:         stringStream st;
duke@435:         op->print_on(&st);
duke@435:         _masm->block_comment(st.as_string());
duke@435:       }
duke@435:     }
duke@435:     if (PrintLIRWithAssembly) {
duke@435:       // print out the LIR operation followed by the resulting assembly
duke@435:       list->at(i)->print(); tty->cr();
duke@435:     }
duke@435: #endif /* PRODUCT */
duke@435: 
duke@435:     op->emit_code(this);
duke@435: 
duke@435:     if (compilation()->debug_info_recorder()->recording_non_safepoints()) {
duke@435:       process_debug_info(op);
duke@435:     }
duke@435: 
duke@435: #ifndef PRODUCT
duke@435:     if (PrintLIRWithAssembly) {
duke@435:       _masm->code()->decode();
duke@435:     }
duke@435: #endif /* PRODUCT */
duke@435:   }
duke@435: }
duke@435: 
duke@435: #ifdef ASSERT
duke@435: void LIR_Assembler::check_no_unbound_labels() {
duke@435:   CHECK_BAILOUT();
duke@435: 
duke@435:   for (int i = 0; i < _branch_target_blocks.length() - 1; i++) {
duke@435:     if (!_branch_target_blocks.at(i)->label()->is_bound()) {
duke@435:       tty->print_cr("label of block B%d is not bound", _branch_target_blocks.at(i)->block_id());
duke@435:       assert(false, "unbound label");
duke@435:     }
duke@435:   }
duke@435: }
duke@435: #endif
duke@435: 
duke@435: //----------------------------------debug info--------------------------------
duke@435: 
duke@435: 
duke@435: void LIR_Assembler::add_debug_info_for_branch(CodeEmitInfo* info) {
duke@435:   _masm->code_section()->relocate(pc(), relocInfo::poll_type);
duke@435:   int pc_offset = code_offset();
duke@435:   flush_debug_info(pc_offset);
duke@435:   info->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
duke@435:   if (info->exception_handlers() != NULL) {
duke@435:     compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers());
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
twisti@1919: void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo) {
duke@435:   flush_debug_info(pc_offset);
twisti@1919:   cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
duke@435:   if (cinfo->exception_handlers() != NULL) {
duke@435:     compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers());
duke@435:   }
duke@435: }
duke@435: 
duke@435: static ValueStack* debug_info(Instruction* ins) {
duke@435:   StateSplit* ss = ins->as_StateSplit();
duke@435:   if (ss != NULL) return ss->state();
roland@2174:   return ins->state_before();
duke@435: }
duke@435: 
duke@435: void LIR_Assembler::process_debug_info(LIR_Op* op) {
duke@435:   Instruction* src = op->source();
duke@435:   if (src == NULL)  return;
duke@435:   int pc_offset = code_offset();
duke@435:   if (_pending_non_safepoint == src) {
duke@435:     _pending_non_safepoint_offset = pc_offset;
duke@435:     return;
duke@435:   }
duke@435:   ValueStack* vstack = debug_info(src);
duke@435:   if (vstack == NULL)  return;
duke@435:   if (_pending_non_safepoint != NULL) {
duke@435:     // Got some old debug info.  Get rid of it.
roland@2174:     if (debug_info(_pending_non_safepoint) == vstack) {
duke@435:       _pending_non_safepoint_offset = pc_offset;
duke@435:       return;
duke@435:     }
duke@435:     if (_pending_non_safepoint_offset < pc_offset) {
duke@435:       record_non_safepoint_debug_info();
duke@435:     }
duke@435:     _pending_non_safepoint = NULL;
duke@435:   }
duke@435:   // Remember the debug info.
duke@435:   if (pc_offset > compilation()->debug_info_recorder()->last_pc_offset()) {
duke@435:     _pending_non_safepoint = src;
duke@435:     _pending_non_safepoint_offset = pc_offset;
duke@435:   }
duke@435: }
duke@435: 
duke@435: // Index caller states in s, where 0 is the oldest, 1 its callee, etc.
duke@435: // Return NULL if n is too large.
duke@435: // Returns the caller_bci for the next-younger state, also.
duke@435: static ValueStack* nth_oldest(ValueStack* s, int n, int& bci_result) {
duke@435:   ValueStack* t = s;
duke@435:   for (int i = 0; i < n; i++) {
duke@435:     if (t == NULL)  break;
duke@435:     t = t->caller_state();
duke@435:   }
duke@435:   if (t == NULL)  return NULL;
duke@435:   for (;;) {
duke@435:     ValueStack* tc = t->caller_state();
duke@435:     if (tc == NULL)  return s;
duke@435:     t = tc;
roland@2174:     bci_result = tc->bci();
duke@435:     s = s->caller_state();
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LIR_Assembler::record_non_safepoint_debug_info() {
duke@435:   int         pc_offset = _pending_non_safepoint_offset;
duke@435:   ValueStack* vstack    = debug_info(_pending_non_safepoint);
roland@2174:   int         bci       = vstack->bci();
duke@435: 
duke@435:   DebugInformationRecorder* debug_info = compilation()->debug_info_recorder();
duke@435:   assert(debug_info->recording_non_safepoints(), "sanity");
duke@435: 
duke@435:   debug_info->add_non_safepoint(pc_offset);
duke@435: 
duke@435:   // Visit scopes from oldest to youngest.
duke@435:   for (int n = 0; ; n++) {
duke@435:     int s_bci = bci;
duke@435:     ValueStack* s = nth_oldest(vstack, n, s_bci);
duke@435:     if (s == NULL)  break;
duke@435:     IRScope* scope = s->scope();
cfang@1335:     //Always pass false for reexecute since these ScopeDescs are never used for deopt
roland@2174:     debug_info->describe_scope(pc_offset, scope->method(), s->bci(), false/*reexecute*/);
duke@435:   }
duke@435: 
duke@435:   debug_info->end_non_safepoint(pc_offset);
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIR_Assembler::add_debug_info_for_null_check_here(CodeEmitInfo* cinfo) {
duke@435:   add_debug_info_for_null_check(code_offset(), cinfo);
duke@435: }
duke@435: 
duke@435: void LIR_Assembler::add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo) {
duke@435:   ImplicitNullCheckStub* stub = new ImplicitNullCheckStub(pc_offset, cinfo);
neliasso@6688:   append_code_stub(stub);
duke@435: }
duke@435: 
duke@435: void LIR_Assembler::add_debug_info_for_div0_here(CodeEmitInfo* info) {
duke@435:   add_debug_info_for_div0(code_offset(), info);
duke@435: }
duke@435: 
duke@435: void LIR_Assembler::add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo) {
duke@435:   DivByZeroStub* stub = new DivByZeroStub(pc_offset, cinfo);
neliasso@6688:   append_code_stub(stub);
duke@435: }
duke@435: 
duke@435: void LIR_Assembler::emit_rtcall(LIR_OpRTCall* op) {
duke@435:   rt_call(op->result_opr(), op->addr(), op->arguments(), op->tmp(), op->info());
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIR_Assembler::emit_call(LIR_OpJavaCall* op) {
duke@435:   verify_oop_map(op->info());
duke@435: 
duke@435:   if (os::is_MP()) {
duke@435:     // must align calls sites, otherwise they can't be updated atomically on MP hardware
duke@435:     align_call(op->code());
duke@435:   }
duke@435: 
duke@435:   // emit the static call stub stuff out of line
duke@435:   emit_static_call_stub();
vkempik@8427:   CHECK_BAILOUT();
duke@435: 
duke@435:   switch (op->code()) {
duke@435:   case lir_static_call:
twisti@4003:   case lir_dynamic_call:
twisti@1730:     call(op, relocInfo::static_call_type);
duke@435:     break;
duke@435:   case lir_optvirtual_call:
twisti@1730:     call(op, relocInfo::opt_virtual_call_type);
duke@435:     break;
duke@435:   case lir_icvirtual_call:
twisti@1730:     ic_call(op);
duke@435:     break;
duke@435:   case lir_virtual_call:
twisti@1730:     vtable_call(op);
duke@435:     break;
twisti@4003:   default:
twisti@4003:     fatal(err_msg_res("unexpected op code: %s", op->name()));
twisti@4003:     break;
duke@435:   }
twisti@1730: 
twisti@2046:   // JSR 292
twisti@2046:   // Record if this method has MethodHandle invokes.
twisti@2046:   if (op->is_method_handle_invoke()) {
twisti@2046:     compilation()->set_has_method_handle_invokes(true);
twisti@2046:   }
twisti@2046: 
never@739: #if defined(X86) && defined(TIERED)
duke@435:   // C2 leave fpu stack dirty clean it
duke@435:   if (UseSSE < 2) {
duke@435:     int i;
duke@435:     for ( i = 1; i <= 7 ; i++ ) {
duke@435:       ffree(i);
duke@435:     }
duke@435:     if (!op->result_opr()->is_float_kind()) {
duke@435:       ffree(0);
duke@435:     }
duke@435:   }
never@739: #endif // X86 && TIERED
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIR_Assembler::emit_opLabel(LIR_OpLabel* op) {
duke@435:   _masm->bind (*(op->label()));
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIR_Assembler::emit_op1(LIR_Op1* op) {
duke@435:   switch (op->code()) {
duke@435:     case lir_move:
duke@435:       if (op->move_kind() == lir_move_volatile) {
duke@435:         assert(op->patch_code() == lir_patch_none, "can't patch volatiles");
duke@435:         volatile_move_op(op->in_opr(), op->result_opr(), op->type(), op->info());
duke@435:       } else {
duke@435:         move_op(op->in_opr(), op->result_opr(), op->type(),
iveresov@2344:                 op->patch_code(), op->info(), op->pop_fpu_stack(),
iveresov@2344:                 op->move_kind() == lir_move_unaligned,
iveresov@2344:                 op->move_kind() == lir_move_wide);
duke@435:       }
duke@435:       break;
duke@435: 
duke@435:     case lir_prefetchr:
duke@435:       prefetchr(op->in_opr());
duke@435:       break;
duke@435: 
duke@435:     case lir_prefetchw:
duke@435:       prefetchw(op->in_opr());
duke@435:       break;
duke@435: 
duke@435:     case lir_roundfp: {
duke@435:       LIR_OpRoundFP* round_op = op->as_OpRoundFP();
duke@435:       roundfp_op(round_op->in_opr(), round_op->tmp(), round_op->result_opr(), round_op->pop_fpu_stack());
duke@435:       break;
duke@435:     }
duke@435: 
duke@435:     case lir_return:
duke@435:       return_op(op->in_opr());
duke@435:       break;
duke@435: 
duke@435:     case lir_safepoint:
duke@435:       if (compilation()->debug_info_recorder()->last_pc_offset() == code_offset()) {
duke@435:         _masm->nop();
duke@435:       }
duke@435:       safepoint_poll(op->in_opr(), op->info());
duke@435:       break;
duke@435: 
duke@435:     case lir_fxch:
duke@435:       fxch(op->in_opr()->as_jint());
duke@435:       break;
duke@435: 
duke@435:     case lir_fld:
duke@435:       fld(op->in_opr()->as_jint());
duke@435:       break;
duke@435: 
duke@435:     case lir_ffree:
duke@435:       ffree(op->in_opr()->as_jint());
duke@435:       break;
duke@435: 
duke@435:     case lir_branch:
duke@435:       break;
duke@435: 
duke@435:     case lir_push:
duke@435:       push(op->in_opr());
duke@435:       break;
duke@435: 
duke@435:     case lir_pop:
duke@435:       pop(op->in_opr());
duke@435:       break;
duke@435: 
duke@435:     case lir_neg:
duke@435:       negate(op->in_opr(), op->result_opr());
duke@435:       break;
duke@435: 
duke@435:     case lir_leal:
duke@435:       leal(op->in_opr(), op->result_opr());
duke@435:       break;
duke@435: 
duke@435:     case lir_null_check:
duke@435:       if (GenerateCompilerNullChecks) {
duke@435:         add_debug_info_for_null_check_here(op->info());
duke@435: 
duke@435:         if (op->in_opr()->is_single_cpu()) {
duke@435:           _masm->null_check(op->in_opr()->as_register());
duke@435:         } else {
duke@435:           Unimplemented();
duke@435:         }
duke@435:       }
duke@435:       break;
duke@435: 
duke@435:     case lir_monaddr:
duke@435:       monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr());
duke@435:       break;
duke@435: 
iveresov@2138: #ifdef SPARC
iveresov@2138:     case lir_pack64:
iveresov@2138:       pack64(op->in_opr(), op->result_opr());
iveresov@2138:       break;
iveresov@2138: 
iveresov@2138:     case lir_unpack64:
iveresov@2138:       unpack64(op->in_opr(), op->result_opr());
iveresov@2138:       break;
iveresov@2138: #endif
iveresov@2138: 
never@1813:     case lir_unwind:
never@1813:       unwind_op(op->in_opr());
never@1813:       break;
never@1813: 
duke@435:     default:
duke@435:       Unimplemented();
duke@435:       break;
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIR_Assembler::emit_op0(LIR_Op0* op) {
duke@435:   switch (op->code()) {
duke@435:     case lir_word_align: {
duke@435:       while (code_offset() % BytesPerWord != 0) {
duke@435:         _masm->nop();
duke@435:       }
duke@435:       break;
duke@435:     }
duke@435: 
duke@435:     case lir_nop:
duke@435:       assert(op->info() == NULL, "not supported");
duke@435:       _masm->nop();
duke@435:       break;
duke@435: 
duke@435:     case lir_label:
duke@435:       Unimplemented();
duke@435:       break;
duke@435: 
duke@435:     case lir_build_frame:
duke@435:       build_frame();
duke@435:       break;
duke@435: 
duke@435:     case lir_std_entry:
duke@435:       // init offsets
duke@435:       offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
duke@435:       _masm->align(CodeEntryAlignment);
duke@435:       if (needs_icache(compilation()->method())) {
duke@435:         check_icache();
duke@435:       }
duke@435:       offsets()->set_value(CodeOffsets::Verified_Entry, _masm->offset());
duke@435:       _masm->verified_entry();
duke@435:       build_frame();
duke@435:       offsets()->set_value(CodeOffsets::Frame_Complete, _masm->offset());
duke@435:       break;
duke@435: 
duke@435:     case lir_osr_entry:
duke@435:       offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
duke@435:       osr_entry();
duke@435:       break;
duke@435: 
duke@435:     case lir_24bit_FPU:
duke@435:       set_24bit_FPU();
duke@435:       break;
duke@435: 
duke@435:     case lir_reset_FPU:
duke@435:       reset_FPU();
duke@435:       break;
duke@435: 
duke@435:     case lir_breakpoint:
duke@435:       breakpoint();
duke@435:       break;
duke@435: 
duke@435:     case lir_fpop_raw:
duke@435:       fpop();
duke@435:       break;
duke@435: 
duke@435:     case lir_membar:
duke@435:       membar();
duke@435:       break;
duke@435: 
duke@435:     case lir_membar_acquire:
duke@435:       membar_acquire();
duke@435:       break;
duke@435: 
duke@435:     case lir_membar_release:
duke@435:       membar_release();
duke@435:       break;
duke@435: 
jiangli@3592:     case lir_membar_loadload:
jiangli@3592:       membar_loadload();
jiangli@3592:       break;
jiangli@3592: 
jiangli@3592:     case lir_membar_storestore:
jiangli@3592:       membar_storestore();
jiangli@3592:       break;
jiangli@3592: 
jiangli@3592:     case lir_membar_loadstore:
jiangli@3592:       membar_loadstore();
jiangli@3592:       break;
jiangli@3592: 
jiangli@3592:     case lir_membar_storeload:
jiangli@3592:       membar_storeload();
jiangli@3592:       break;
jiangli@3592: 
duke@435:     case lir_get_thread:
duke@435:       get_thread(op->result_opr());
duke@435:       break;
duke@435: 
duke@435:     default:
duke@435:       ShouldNotReachHere();
duke@435:       break;
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIR_Assembler::emit_op2(LIR_Op2* op) {
duke@435:   switch (op->code()) {
duke@435:     case lir_cmp:
duke@435:       if (op->info() != NULL) {
duke@435:         assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
duke@435:                "shouldn't be codeemitinfo for non-address operands");
duke@435:         add_debug_info_for_null_check_here(op->info()); // exception possible
duke@435:       }
duke@435:       comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
duke@435:       break;
duke@435: 
duke@435:     case lir_cmp_l2i:
duke@435:     case lir_cmp_fd2i:
duke@435:     case lir_ucmp_fd2i:
duke@435:       comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
duke@435:       break;
duke@435: 
duke@435:     case lir_cmove:
iveresov@2412:       cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->type());
duke@435:       break;
duke@435: 
duke@435:     case lir_shl:
duke@435:     case lir_shr:
duke@435:     case lir_ushr:
duke@435:       if (op->in_opr2()->is_constant()) {
duke@435:         shift_op(op->code(), op->in_opr1(), op->in_opr2()->as_constant_ptr()->as_jint(), op->result_opr());
duke@435:       } else {
roland@3787:         shift_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
duke@435:       }
duke@435:       break;
duke@435: 
duke@435:     case lir_add:
duke@435:     case lir_sub:
duke@435:     case lir_mul:
duke@435:     case lir_mul_strictfp:
duke@435:     case lir_div:
duke@435:     case lir_div_strictfp:
duke@435:     case lir_rem:
duke@435:       assert(op->fpu_pop_count() < 2, "");
duke@435:       arith_op(
duke@435:         op->code(),
duke@435:         op->in_opr1(),
duke@435:         op->in_opr2(),
duke@435:         op->result_opr(),
duke@435:         op->info(),
duke@435:         op->fpu_pop_count() == 1);
duke@435:       break;
duke@435: 
duke@435:     case lir_abs:
duke@435:     case lir_sqrt:
duke@435:     case lir_sin:
duke@435:     case lir_tan:
duke@435:     case lir_cos:
duke@435:     case lir_log:
duke@435:     case lir_log10:
roland@3787:     case lir_exp:
roland@3787:     case lir_pow:
duke@435:       intrinsic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
duke@435:       break;
duke@435: 
duke@435:     case lir_logic_and:
duke@435:     case lir_logic_or:
duke@435:     case lir_logic_xor:
duke@435:       logic_op(
duke@435:         op->code(),
duke@435:         op->in_opr1(),
duke@435:         op->in_opr2(),
duke@435:         op->result_opr());
duke@435:       break;
duke@435: 
duke@435:     case lir_throw:
never@1813:       throw_op(op->in_opr1(), op->in_opr2(), op->info());
duke@435:       break;
duke@435: 
roland@4106:     case lir_xadd:
roland@4106:     case lir_xchg:
roland@4106:       atomic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
roland@4106:       break;
roland@4106: 
duke@435:     default:
duke@435:       Unimplemented();
duke@435:       break;
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIR_Assembler::build_frame() {
roland@6723:   _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes());
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIR_Assembler::roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack) {
duke@435:   assert((src->is_single_fpu() && dest->is_single_stack()) ||
duke@435:          (src->is_double_fpu() && dest->is_double_stack()),
duke@435:          "round_fp: rounds register -> stack location");
duke@435: 
duke@435:   reg2stack (src, dest, src->type(), pop_fpu_stack);
duke@435: }
duke@435: 
duke@435: 
iveresov@2344: void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned, bool wide) {
duke@435:   if (src->is_register()) {
duke@435:     if (dest->is_register()) {
duke@435:       assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
duke@435:       reg2reg(src,  dest);
duke@435:     } else if (dest->is_stack()) {
duke@435:       assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
duke@435:       reg2stack(src, dest, type, pop_fpu_stack);
duke@435:     } else if (dest->is_address()) {
iveresov@2344:       reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, wide, unaligned);
duke@435:     } else {
duke@435:       ShouldNotReachHere();
duke@435:     }
duke@435: 
duke@435:   } else if (src->is_stack()) {
duke@435:     assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
duke@435:     if (dest->is_register()) {
duke@435:       stack2reg(src, dest, type);
duke@435:     } else if (dest->is_stack()) {
duke@435:       stack2stack(src, dest, type);
duke@435:     } else {
duke@435:       ShouldNotReachHere();
duke@435:     }
duke@435: 
duke@435:   } else if (src->is_constant()) {
duke@435:     if (dest->is_register()) {
duke@435:       const2reg(src, dest, patch_code, info); // patching is possible
duke@435:     } else if (dest->is_stack()) {
duke@435:       assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
duke@435:       const2stack(src, dest);
duke@435:     } else if (dest->is_address()) {
duke@435:       assert(patch_code == lir_patch_none, "no patching allowed here");
iveresov@2344:       const2mem(src, dest, type, info, wide);
duke@435:     } else {
duke@435:       ShouldNotReachHere();
duke@435:     }
duke@435: 
duke@435:   } else if (src->is_address()) {
iveresov@2344:     mem2reg(src, dest, type, patch_code, info, wide, unaligned);
duke@435: 
duke@435:   } else {
duke@435:     ShouldNotReachHere();
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIR_Assembler::verify_oop_map(CodeEmitInfo* info) {
duke@435: #ifndef PRODUCT
adlertz@6218:   if (VerifyOops) {
duke@435:     OopMapStream s(info->oop_map());
duke@435:     while (!s.is_done()) {
duke@435:       OopMapValue v = s.current();
duke@435:       if (v.is_oop()) {
duke@435:         VMReg r = v.reg();
duke@435:         if (!r->is_stack()) {
duke@435:           stringStream st;
duke@435:           st.print("bad oop %s at %d", r->as_Register()->name(), _masm->offset());
duke@435: #ifdef SPARC
duke@435:           _masm->_verify_oop(r->as_Register(), strdup(st.as_string()), __FILE__, __LINE__);
duke@435: #else
duke@435:           _masm->verify_oop(r->as_Register());
duke@435: #endif
duke@435:         } else {
duke@435:           _masm->verify_stack_oop(r->reg2stack() * VMRegImpl::stack_slot_size);
duke@435:         }
duke@435:       }
never@2733:       check_codespace();
never@2733:       CHECK_BAILOUT();
never@2733: 
duke@435:       s.next();
duke@435:     }
duke@435:   }
duke@435: #endif
duke@435: }