duke@435: /* eosterlund@9834: * Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved. duke@435: * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. duke@435: * duke@435: * This code is free software; you can redistribute it and/or modify it duke@435: * under the terms of the GNU General Public License version 2 only, as duke@435: * published by the Free Software Foundation. duke@435: * duke@435: * This code is distributed in the hope that it will be useful, but WITHOUT duke@435: * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or duke@435: * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License duke@435: * version 2 for more details (a copy is included in the LICENSE file that duke@435: * accompanied this code). duke@435: * duke@435: * You should have received a copy of the GNU General Public License version duke@435: * 2 along with this work; if not, write to the Free Software Foundation, duke@435: * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. duke@435: * trims@1907: * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA trims@1907: * or visit www.oracle.com if you need additional information or have any trims@1907: * questions. duke@435: * duke@435: */ duke@435: stefank@2314: #ifndef CPU_X86_VM_GLOBALS_X86_HPP stefank@2314: #define CPU_X86_VM_GLOBALS_X86_HPP stefank@2314: stefank@2314: #include "utilities/globalDefinitions.hpp" stefank@2314: #include "utilities/macros.hpp" stefank@2314: duke@435: // Sets the default values for platform dependent flags used by the runtime system. duke@435: // (see globals.hpp) duke@435: phh@1499: define_pd_global(bool, ConvertSleepToYield, true); phh@1499: define_pd_global(bool, CountInterpCalls, true); phh@1499: define_pd_global(bool, NeedsDeoptSuspend, false); // only register window machines need this duke@435: phh@1499: define_pd_global(bool, ImplicitNullChecks, true); // Generate code for implicit null checks goetz@6490: define_pd_global(bool, TrapBasedNullChecks, false); // Not needed on x86. goetz@6490: define_pd_global(bool, UncommonNullCast, true); // Uncommon-trap NULLs passed to check cast duke@435: duke@435: // See 4827828 for this change. There is no globals_core_i486.hpp. I can't duke@435: // assign a different value for C2 without touching a number of files. Use duke@435: // #ifdef to minimize the change as it's late in Mantis. -- FIXME. duke@435: // c1 doesn't have this problem because the fix to 4858033 assures us duke@435: // the the vep is aligned at CodeEntryAlignment whereas c2 only aligns duke@435: // the uep and the vep doesn't get real alignment but just slops on by duke@435: // only assured that the entry instruction meets the 5 byte size requirement. duke@435: #ifdef COMPILER2 phh@1499: define_pd_global(intx, CodeEntryAlignment, 32); duke@435: #else phh@1499: define_pd_global(intx, CodeEntryAlignment, 16); duke@435: #endif // COMPILER2 kvn@1800: define_pd_global(intx, OptoLoopAlignment, 16); phh@1499: define_pd_global(intx, InlineFrequencyCount, 100); phh@1499: define_pd_global(intx, InlineSmallCode, 1000); duke@435: minqi@5274: define_pd_global(intx, StackYellowPages, NOT_WINDOWS(2) WINDOWS_ONLY(3)); phh@1499: define_pd_global(intx, StackRedPages, 1); duke@435: #ifdef AMD64 duke@435: // Very large C++ stack frames using solaris-amd64 optimized builds duke@435: // due to lack of optimization caused by C++ compiler bugs coleenp@3548: define_pd_global(intx, StackShadowPages, NOT_WIN64(20) WIN64_ONLY(6) DEBUG_ONLY(+2)); duke@435: #else never@3569: define_pd_global(intx, StackShadowPages, 4 DEBUG_ONLY(+5)); duke@435: #endif // AMD64 duke@435: phh@1499: define_pd_global(intx, PreInflateSpin, 10); duke@435: duke@435: define_pd_global(bool, RewriteBytecodes, true); duke@435: define_pd_global(bool, RewriteFrequentPairs, true); bobv@2223: never@3156: #ifdef _ALLBSD_SOURCE never@3156: define_pd_global(bool, UseMembar, true); never@3156: #else bobv@2223: define_pd_global(bool, UseMembar, false); never@3156: #endif stefank@2314: ysr@2650: // GC Ergo Flags tschatzl@5119: define_pd_global(uintx, CMSYoungGenPerWorker, 64*M); // default max size of CMS young gen, per GC worker thread twisti@4020: roland@5987: define_pd_global(uintx, TypeProfileLevel, 111); roland@5914: zmajo@7854: define_pd_global(bool, PreserveFramePointer, false); zmajo@7854: twisti@4020: #define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct) \ twisti@4020: \ twisti@4020: develop(bool, IEEEPrecision, true, \ twisti@4020: "Enables IEEE precision (for INTEL only)") \ twisti@4020: \ twisti@4020: product(intx, FenceInstruction, 0, \ twisti@4020: "(Unsafe,Unstable) Experimental") \ twisti@4020: \ twisti@4020: product(intx, ReadPrefetchInstr, 0, \ twisti@4020: "Prefetch instruction to prefetch ahead") \ twisti@4020: \ twisti@4020: product(bool, UseStoreImmI16, true, \ twisti@4020: "Use store immediate 16-bits value instruction on x86") \ twisti@4020: \ twisti@4020: product(intx, UseAVX, 99, \ twisti@4020: "Highest supported AVX instructions set on x86/x64") \ twisti@4020: \ drchase@5353: product(bool, UseCLMUL, false, \ drchase@5353: "Control whether CLMUL instructions can be used on x86/x64") \ drchase@5353: \ twisti@4020: diagnostic(bool, UseIncDec, true, \ twisti@4020: "Use INC, DEC instructions on x86") \ twisti@4020: \ twisti@4020: product(bool, UseNewLongLShift, false, \ twisti@4020: "Use optimized bitwise shift left") \ twisti@4020: \ twisti@4020: product(bool, UseAddressNop, false, \ twisti@4020: "Use '0F 1F [addr]' NOP instructions on x86 cpus") \ twisti@4020: \ twisti@4020: product(bool, UseXmmLoadAndClearUpper, true, \ twisti@4020: "Load low part of XMM register and clear upper part") \ twisti@4020: \ twisti@4020: product(bool, UseXmmRegToRegMoveAll, false, \ twisti@4020: "Copy all XMM register bits when moving value between registers") \ twisti@4020: \ twisti@4020: product(bool, UseXmmI2D, false, \ twisti@4020: "Use SSE2 CVTDQ2PD instruction to convert Integer to Double") \ twisti@4020: \ twisti@4020: product(bool, UseXmmI2F, false, \ twisti@4020: "Use SSE2 CVTDQ2PS instruction to convert Integer to Float") \ twisti@4020: \ twisti@4020: product(bool, UseUnalignedLoadStores, false, \ twisti@4020: "Use SSE2 MOVDQU instruction for Arraycopy") \ twisti@4020: \ kvn@4410: product(bool, UseFastStosb, false, \ kvn@4410: "Use fast-string operation for zeroing: rep stosb") \ kvn@4410: \ kvn@6429: /* Use Restricted Transactional Memory for lock eliding */ \ kvn@6998: product(bool, UseRTMLocking, false, \ kvn@6429: "Enable RTM lock eliding for inflated locks in compiled code") \ kvn@6429: \ kvn@6429: experimental(bool, UseRTMForStackLocks, false, \ kvn@6429: "Enable RTM lock eliding for stack locks in compiled code") \ kvn@6429: \ kvn@6998: product(bool, UseRTMDeopt, false, \ kvn@6429: "Perform deopt and recompilation based on RTM abort ratio") \ kvn@6429: \ kvn@6998: product(uintx, RTMRetryCount, 5, \ kvn@6429: "Number of RTM retries on lock abort or busy") \ kvn@6429: \ kvn@6429: experimental(intx, RTMSpinLoopCount, 100, \ kvn@6429: "Spin count for lock to become free before RTM retry") \ kvn@6429: \ kvn@6429: experimental(intx, RTMAbortThreshold, 1000, \ kvn@6429: "Calculate abort ratio after this number of aborts") \ kvn@6429: \ kvn@6429: experimental(intx, RTMLockingThreshold, 10000, \ kvn@6429: "Lock count at which to do RTM lock eliding without " \ kvn@6429: "abort ratio calculation") \ kvn@6429: \ kvn@6429: experimental(intx, RTMAbortRatio, 50, \ kvn@6429: "Lock abort ratio at which to stop use RTM lock eliding") \ kvn@6429: \ kvn@6429: experimental(intx, RTMTotalCountIncrRate, 64, \ kvn@6429: "Increment total RTM attempted lock count once every n times") \ kvn@6429: \ kvn@6429: experimental(intx, RTMLockingCalculationDelay, 0, \ kvn@6429: "Number of milliseconds to wait before start calculating aborts " \ kvn@6429: "for RTM locking") \ kvn@6429: \ kvn@6557: experimental(bool, UseRTMXendForLockBusy, true, \ kvn@6429: "Use RTM Xend instead of Xabort when lock busy") \ kvn@6429: \ twisti@4020: /* assembler */ \ twisti@4020: product(bool, Use486InstrsOnly, false, \ twisti@4020: "Use 80486 Compliant instruction subset") \ twisti@4020: \ twisti@4020: product(bool, UseCountLeadingZerosInstruction, false, \ twisti@4020: "Use count leading zeros instruction") \ iveresov@6378: \ iveresov@6378: product(bool, UseCountTrailingZerosInstruction, false, \ iveresov@6378: "Use count trailing zeros instruction") \ iveresov@6378: \ iveresov@6378: product(bool, UseBMI1Instructions, false, \ kvn@7152: "Use BMI1 instructions") \ kvn@7152: \ kvn@7152: product(bool, UseBMI2Instructions, false, \ kvn@7152: "Use BMI2 instructions") stefank@2314: #endif // CPU_X86_VM_GLOBALS_X86_HPP