duke@435: /* trims@1907: * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. duke@435: * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. duke@435: * duke@435: * This code is free software; you can redistribute it and/or modify it duke@435: * under the terms of the GNU General Public License version 2 only, as duke@435: * published by the Free Software Foundation. duke@435: * duke@435: * This code is distributed in the hope that it will be useful, but WITHOUT duke@435: * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or duke@435: * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License duke@435: * version 2 for more details (a copy is included in the LICENSE file that duke@435: * accompanied this code). duke@435: * duke@435: * You should have received a copy of the GNU General Public License version duke@435: * 2 along with this work; if not, write to the Free Software Foundation, duke@435: * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. duke@435: * trims@1907: * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA trims@1907: * or visit www.oracle.com if you need additional information or have any trims@1907: * questions. duke@435: * duke@435: */ duke@435: stefank@2314: #ifndef SHARE_VM_C1_C1_LIRASSEMBLER_HPP stefank@2314: #define SHARE_VM_C1_C1_LIRASSEMBLER_HPP stefank@2314: stefank@2314: #include "c1/c1_CodeStubs.hpp" stefank@2314: #include "ci/ciMethodData.hpp" stefank@2314: #include "oops/methodDataOop.hpp" stefank@2314: #include "utilities/top.hpp" stefank@2314: duke@435: class Compilation; duke@435: class ScopeValue; ysr@777: class BarrierSet; duke@435: duke@435: class LIR_Assembler: public CompilationResourceObj { duke@435: private: duke@435: C1_MacroAssembler* _masm; duke@435: CodeStubList* _slow_case_stubs; ysr@777: BarrierSet* _bs; duke@435: duke@435: Compilation* _compilation; duke@435: FrameMap* _frame_map; duke@435: BlockBegin* _current_block; duke@435: duke@435: Instruction* _pending_non_safepoint; duke@435: int _pending_non_safepoint_offset; duke@435: never@1813: Label _unwind_handler_entry; never@1813: duke@435: #ifdef ASSERT duke@435: BlockList _branch_target_blocks; duke@435: void check_no_unbound_labels(); duke@435: #endif duke@435: duke@435: FrameMap* frame_map() const { return _frame_map; } duke@435: duke@435: void set_current_block(BlockBegin* b) { _current_block = b; } duke@435: BlockBegin* current_block() const { return _current_block; } duke@435: duke@435: // non-safepoint debug info management duke@435: void flush_debug_info(int before_pc_offset) { duke@435: if (_pending_non_safepoint != NULL) { duke@435: if (_pending_non_safepoint_offset < before_pc_offset) duke@435: record_non_safepoint_debug_info(); duke@435: _pending_non_safepoint = NULL; duke@435: } duke@435: } duke@435: void process_debug_info(LIR_Op* op); duke@435: void record_non_safepoint_debug_info(); duke@435: duke@435: // unified bailout support duke@435: void bailout(const char* msg) const { compilation()->bailout(msg); } duke@435: bool bailed_out() const { return compilation()->bailed_out(); } duke@435: duke@435: // code emission patterns and accessors duke@435: void check_codespace(); duke@435: bool needs_icache(ciMethod* method) const; duke@435: duke@435: // returns offset of icache check duke@435: int check_icache(); duke@435: duke@435: void jobject2reg(jobject o, Register reg); duke@435: void jobject2reg_with_patching(Register reg, CodeEmitInfo* info); duke@435: duke@435: void emit_stubs(CodeStubList* stub_list); duke@435: duke@435: // addresses never@739: Address as_Address(LIR_Address* addr); never@739: Address as_Address_lo(LIR_Address* addr); never@739: Address as_Address_hi(LIR_Address* addr); duke@435: duke@435: // debug information twisti@1919: void add_call_info(int pc_offset, CodeEmitInfo* cinfo); duke@435: void add_debug_info_for_branch(CodeEmitInfo* info); duke@435: void add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo); duke@435: void add_debug_info_for_div0_here(CodeEmitInfo* info); duke@435: void add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo); duke@435: void add_debug_info_for_null_check_here(CodeEmitInfo* info); duke@435: duke@435: void set_24bit_FPU(); duke@435: void reset_FPU(); duke@435: void fpop(); duke@435: void fxch(int i); duke@435: void fld(int i); duke@435: void ffree(int i); duke@435: duke@435: void breakpoint(); duke@435: void push(LIR_Opr opr); duke@435: void pop(LIR_Opr opr); duke@435: duke@435: // patching duke@435: void append_patching_stub(PatchingStub* stub); duke@435: void patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info); duke@435: duke@435: void comp_op(LIR_Condition condition, LIR_Opr src, LIR_Opr result, LIR_Op2* op); duke@435: duke@435: public: duke@435: LIR_Assembler(Compilation* c); duke@435: ~LIR_Assembler(); duke@435: C1_MacroAssembler* masm() const { return _masm; } duke@435: Compilation* compilation() const { return _compilation; } duke@435: ciMethod* method() const { return compilation()->method(); } duke@435: duke@435: CodeOffsets* offsets() const { return _compilation->offsets(); } duke@435: int code_offset() const; duke@435: address pc() const; duke@435: duke@435: int initial_frame_size_in_bytes(); duke@435: duke@435: // test for constants which can be encoded directly in instructions duke@435: static bool is_small_constant(LIR_Opr opr); duke@435: duke@435: static LIR_Opr receiverOpr(); duke@435: static LIR_Opr incomingReceiverOpr(); duke@435: static LIR_Opr osrBufferPointer(); duke@435: duke@435: // stubs duke@435: void emit_slow_case_stubs(); duke@435: void emit_static_call_stub(); duke@435: void emit_code_stub(CodeStub* op); duke@435: void add_call_info_here(CodeEmitInfo* info) { add_call_info(code_offset(), info); } duke@435: duke@435: // code patterns twisti@1639: int emit_exception_handler(); never@1813: int emit_unwind_handler(); duke@435: void emit_exception_entries(ExceptionInfoList* info_list); twisti@1639: int emit_deopt_handler(); duke@435: duke@435: void emit_code(BlockList* hir); duke@435: void emit_block(BlockBegin* block); duke@435: void emit_lir_list(LIR_List* list); duke@435: duke@435: // any last minute peephole optimizations are performed here. In duke@435: // particular sparc uses this for delay slot filling. duke@435: void peephole(LIR_List* list); duke@435: duke@435: void emit_string_compare(LIR_Opr left, LIR_Opr right, LIR_Opr dst, CodeEmitInfo* info); duke@435: duke@435: void return_op(LIR_Opr result); duke@435: duke@435: // returns offset of poll instruction duke@435: int safepoint_poll(LIR_Opr result, CodeEmitInfo* info); duke@435: duke@435: void const2reg (LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code, CodeEmitInfo* info); duke@435: void const2stack(LIR_Opr src, LIR_Opr dest); iveresov@2344: void const2mem (LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info, bool wide); duke@435: void reg2stack (LIR_Opr src, LIR_Opr dest, BasicType type, bool pop_fpu_stack); duke@435: void reg2reg (LIR_Opr src, LIR_Opr dest); iveresov@2344: void reg2mem (LIR_Opr src, LIR_Opr dest, BasicType type, iveresov@2344: LIR_PatchCode patch_code, CodeEmitInfo* info, iveresov@2344: bool pop_fpu_stack, bool wide, bool unaligned); duke@435: void stack2reg (LIR_Opr src, LIR_Opr dest, BasicType type); duke@435: void stack2stack(LIR_Opr src, LIR_Opr dest, BasicType type); duke@435: void mem2reg (LIR_Opr src, LIR_Opr dest, BasicType type, iveresov@2344: LIR_PatchCode patch_code, iveresov@2344: CodeEmitInfo* info, bool wide, bool unaligned); duke@435: duke@435: void prefetchr (LIR_Opr src); duke@435: void prefetchw (LIR_Opr src); duke@435: duke@435: void shift_op(LIR_Code code, LIR_Opr left, LIR_Opr count, LIR_Opr dest, LIR_Opr tmp); duke@435: void shift_op(LIR_Code code, LIR_Opr left, jint count, LIR_Opr dest); duke@435: duke@435: void move_regs(Register from_reg, Register to_reg); duke@435: void swap_reg(Register a, Register b); duke@435: duke@435: void emit_op0(LIR_Op0* op); duke@435: void emit_op1(LIR_Op1* op); duke@435: void emit_op2(LIR_Op2* op); duke@435: void emit_op3(LIR_Op3* op); duke@435: void emit_opBranch(LIR_OpBranch* op); duke@435: void emit_opLabel(LIR_OpLabel* op); duke@435: void emit_arraycopy(LIR_OpArrayCopy* op); duke@435: void emit_opConvert(LIR_OpConvert* op); duke@435: void emit_alloc_obj(LIR_OpAllocObj* op); duke@435: void emit_alloc_array(LIR_OpAllocArray* op); duke@435: void emit_opTypeCheck(LIR_OpTypeCheck* op); iveresov@2146: void emit_typecheck_helper(LIR_OpTypeCheck *op, Label* success, Label* failure, Label* obj_is_null); duke@435: void emit_compare_and_swap(LIR_OpCompareAndSwap* op); duke@435: void emit_lock(LIR_OpLock* op); duke@435: void emit_call(LIR_OpJavaCall* op); duke@435: void emit_rtcall(LIR_OpRTCall* op); duke@435: void emit_profile_call(LIR_OpProfileCall* op); duke@435: void emit_delay(LIR_OpDelay* op); duke@435: duke@435: void arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack); duke@435: void arithmetic_idiv(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info); duke@435: void intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr unused, LIR_Opr dest, LIR_Op* op); duke@435: duke@435: void logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest); duke@435: duke@435: void roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack); duke@435: void move_op(LIR_Opr src, LIR_Opr result, BasicType type, iveresov@2344: LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned, bool wide); duke@435: void volatile_move_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); duke@435: void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); // info set for null exceptions duke@435: void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op); iveresov@2412: void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result, BasicType type); duke@435: twisti@1730: void call( LIR_OpJavaCall* op, relocInfo::relocType rtype); twisti@1730: void ic_call( LIR_OpJavaCall* op); twisti@1730: void vtable_call( LIR_OpJavaCall* op); twisti@1730: duke@435: void osr_entry(); duke@435: duke@435: void build_frame(); duke@435: never@1813: void throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info); never@1813: void unwind_op(LIR_Opr exceptionOop); duke@435: void monitor_address(int monitor_ix, LIR_Opr dst); duke@435: duke@435: void align_backward_branch_target(); duke@435: void align_call(LIR_Code code); duke@435: duke@435: void negate(LIR_Opr left, LIR_Opr dest); duke@435: void leal(LIR_Opr left, LIR_Opr dest); duke@435: duke@435: void rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info); duke@435: duke@435: void membar(); duke@435: void membar_acquire(); duke@435: void membar_release(); duke@435: void get_thread(LIR_Opr result); duke@435: duke@435: void verify_oop_map(CodeEmitInfo* info); duke@435: stefank@2314: #ifdef TARGET_ARCH_x86 stefank@2314: # include "c1_LIRAssembler_x86.hpp" stefank@2314: #endif stefank@2314: #ifdef TARGET_ARCH_sparc stefank@2314: # include "c1_LIRAssembler_sparc.hpp" stefank@2314: #endif bobv@2508: #ifdef TARGET_ARCH_arm bobv@2508: # include "c1_LIRAssembler_arm.hpp" bobv@2508: #endif bobv@2508: #ifdef TARGET_ARCH_ppc bobv@2508: # include "c1_LIRAssembler_ppc.hpp" bobv@2508: #endif stefank@2314: duke@435: }; stefank@2314: stefank@2314: #endif // SHARE_VM_C1_C1_LIRASSEMBLER_HPP