aoqi@0: /*
aoqi@0:  * Copyright (c) 2000, 2011, Oracle and/or its affiliates. All rights reserved.
aoqi@0:  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aoqi@0:  *
aoqi@0:  * This code is free software; you can redistribute it and/or modify it
aoqi@0:  * under the terms of the GNU General Public License version 2 only, as
aoqi@0:  * published by the Free Software Foundation.
aoqi@0:  *
aoqi@0:  * This code is distributed in the hope that it will be useful, but WITHOUT
aoqi@0:  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aoqi@0:  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
aoqi@0:  * version 2 for more details (a copy is included in the LICENSE file that
aoqi@0:  * accompanied this code).
aoqi@0:  *
aoqi@0:  * You should have received a copy of the GNU General Public License version
aoqi@0:  * 2 along with this work; if not, write to the Free Software Foundation,
aoqi@0:  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aoqi@0:  *
aoqi@0:  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aoqi@0:  * or visit www.oracle.com if you need additional information or have any
aoqi@0:  * questions.
aoqi@0:  *
aoqi@0:  */
aoqi@0: 
aoqi@1: /*
aoqi@1:  * This file has been modified by Loongson Technology in 2015. These
aoqi@1:  * modifications are Copyright (c) 2015 Loongson Technology, and are made
aoqi@1:  * available on the same license terms set forth above.
aoqi@1:  */
aoqi@1: 
aoqi@0: #ifndef SHARE_VM_C1_C1_DEFS_HPP
aoqi@0: #define SHARE_VM_C1_C1_DEFS_HPP
aoqi@0: 
aoqi@0: #include "utilities/globalDefinitions.hpp"
aoqi@0: #ifdef TARGET_ARCH_x86
aoqi@0: # include "register_x86.hpp"
aoqi@0: #endif
aoqi@1: #ifdef TARGET_ARCH_mips
aoqi@1: # include "register_mips.hpp"
aoqi@1: #endif
aoqi@0: #ifdef TARGET_ARCH_sparc
aoqi@0: # include "register_sparc.hpp"
aoqi@0: #endif
aoqi@0: #ifdef TARGET_ARCH_zero
aoqi@0: # include "register_zero.hpp"
aoqi@0: #endif
aoqi@0: #ifdef TARGET_ARCH_arm
aoqi@0: # include "register_arm.hpp"
aoqi@0: #endif
aoqi@0: #ifdef TARGET_ARCH_ppc
aoqi@0: # include "register_ppc.hpp"
aoqi@0: #endif
aoqi@0: 
aoqi@0: // set frame size and return address offset to these values in blobs
aoqi@0: // (if the compiled frame uses ebp as link pointer on IA; otherwise,
aoqi@0: // the frame size must be fixed)
aoqi@0: enum {
aoqi@0:   no_frame_size            = -1
aoqi@0: };
aoqi@0: 
aoqi@0: 
aoqi@0: #ifdef TARGET_ARCH_x86
aoqi@0: # include "c1_Defs_x86.hpp"
aoqi@0: #endif
aoqi@1: #ifdef TARGET_ARCH_mips
aoqi@1: # include "c1_Defs_mips.hpp"
aoqi@1: #endif
aoqi@0: #ifdef TARGET_ARCH_sparc
aoqi@0: # include "c1_Defs_sparc.hpp"
aoqi@0: #endif
aoqi@0: #ifdef TARGET_ARCH_arm
aoqi@0: # include "c1_Defs_arm.hpp"
aoqi@0: #endif
aoqi@0: #ifdef TARGET_ARCH_ppc
aoqi@0: # include "c1_Defs_ppc.hpp"
aoqi@0: #endif
aoqi@0: 
aoqi@0: 
aoqi@0: // native word offsets from memory address
aoqi@0: enum {
aoqi@0:   lo_word_offset_in_bytes = pd_lo_word_offset_in_bytes,
aoqi@0:   hi_word_offset_in_bytes = pd_hi_word_offset_in_bytes
aoqi@0: };
aoqi@0: 
aoqi@0: 
aoqi@0: // the processor may require explicit rounding operations to implement the strictFP mode
aoqi@0: enum {
aoqi@0:   strict_fp_requires_explicit_rounding = pd_strict_fp_requires_explicit_rounding
aoqi@0: };
aoqi@0: 
aoqi@0: 
aoqi@0: // for debug info: a float value in a register may be saved in double precision by runtime stubs
aoqi@0: enum {
aoqi@0:   float_saved_as_double = pd_float_saved_as_double
aoqi@0: };
aoqi@0: 
aoqi@0: #endif // SHARE_VM_C1_C1_DEFS_HPP