duke@435: /* xdono@631: * Copyright 1997-2008 Sun Microsystems, Inc. All Rights Reserved. duke@435: * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. duke@435: * duke@435: * This code is free software; you can redistribute it and/or modify it duke@435: * under the terms of the GNU General Public License version 2 only, as duke@435: * published by the Free Software Foundation. duke@435: * duke@435: * This code is distributed in the hope that it will be useful, but WITHOUT duke@435: * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or duke@435: * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License duke@435: * version 2 for more details (a copy is included in the LICENSE file that duke@435: * accompanied this code). duke@435: * duke@435: * You should have received a copy of the GNU General Public License version duke@435: * 2 along with this work; if not, write to the Free Software Foundation, duke@435: * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. duke@435: * duke@435: * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, duke@435: * CA 95054 USA or visit www.sun.com if you need additional information or duke@435: * have any questions. duke@435: * duke@435: */ duke@435: duke@435: #include "incls/_precompiled.incl" duke@435: #include "incls/_machnode.cpp.incl" duke@435: duke@435: //============================================================================= duke@435: // Return the value requested duke@435: // result register lookup, corresponding to int_format duke@435: int MachOper::reg(PhaseRegAlloc *ra_, const Node *node) const { duke@435: return (int)ra_->get_encode(node); duke@435: } duke@435: // input register lookup, corresponding to ext_format duke@435: int MachOper::reg(PhaseRegAlloc *ra_, const Node *node, int idx) const { duke@435: return (int)(ra_->get_encode(node->in(idx))); duke@435: } duke@435: intptr_t MachOper::constant() const { return 0x00; } duke@435: bool MachOper::constant_is_oop() const { return false; } duke@435: jdouble MachOper::constantD() const { ShouldNotReachHere(); return 0.0; } duke@435: jfloat MachOper::constantF() const { ShouldNotReachHere(); return 0.0; } duke@435: jlong MachOper::constantL() const { ShouldNotReachHere(); return CONST64(0) ; } duke@435: TypeOopPtr *MachOper::oop() const { return NULL; } duke@435: int MachOper::ccode() const { return 0x00; } duke@435: // A zero, default, indicates this value is not needed. duke@435: // May need to lookup the base register, as done in int_ and ext_format duke@435: int MachOper::base (PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; } duke@435: int MachOper::index(PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; } duke@435: int MachOper::scale() const { return 0x00; } duke@435: int MachOper::disp (PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; } duke@435: int MachOper::constant_disp() const { return 0; } duke@435: int MachOper::base_position() const { return -1; } // no base input duke@435: int MachOper::index_position() const { return -1; } // no index input duke@435: // Check for PC-Relative displacement duke@435: bool MachOper::disp_is_oop() const { return false; } duke@435: // Return the label duke@435: Label* MachOper::label() const { ShouldNotReachHere(); return 0; } duke@435: intptr_t MachOper::method() const { ShouldNotReachHere(); return 0; } duke@435: duke@435: duke@435: //------------------------------negate----------------------------------------- duke@435: // Negate conditional branches. Error for non-branch operands duke@435: void MachOper::negate() { duke@435: ShouldNotCallThis(); duke@435: } duke@435: duke@435: //-----------------------------type-------------------------------------------- duke@435: const Type *MachOper::type() const { duke@435: return Type::BOTTOM; duke@435: } duke@435: duke@435: //------------------------------in_RegMask------------------------------------- duke@435: const RegMask *MachOper::in_RegMask(int index) const { duke@435: ShouldNotReachHere(); duke@435: return NULL; duke@435: } duke@435: duke@435: //------------------------------dump_spec-------------------------------------- duke@435: // Print any per-operand special info duke@435: #ifndef PRODUCT duke@435: void MachOper::dump_spec(outputStream *st) const { } duke@435: #endif duke@435: duke@435: //------------------------------hash------------------------------------------- duke@435: // Print any per-operand special info duke@435: uint MachOper::hash() const { duke@435: ShouldNotCallThis(); duke@435: return 5; duke@435: } duke@435: duke@435: //------------------------------cmp-------------------------------------------- duke@435: // Print any per-operand special info duke@435: uint MachOper::cmp( const MachOper &oper ) const { duke@435: ShouldNotCallThis(); duke@435: return opcode() == oper.opcode(); duke@435: } duke@435: duke@435: //------------------------------hash------------------------------------------- duke@435: // Print any per-operand special info duke@435: uint labelOper::hash() const { duke@435: return _block_num; duke@435: } duke@435: duke@435: //------------------------------cmp-------------------------------------------- duke@435: // Print any per-operand special info duke@435: uint labelOper::cmp( const MachOper &oper ) const { duke@435: return (opcode() == oper.opcode()) && (_label == oper.label()); duke@435: } duke@435: duke@435: //------------------------------hash------------------------------------------- duke@435: // Print any per-operand special info duke@435: uint methodOper::hash() const { duke@435: return (uint)_method; duke@435: } duke@435: duke@435: //------------------------------cmp-------------------------------------------- duke@435: // Print any per-operand special info duke@435: uint methodOper::cmp( const MachOper &oper ) const { duke@435: return (opcode() == oper.opcode()) && (_method == oper.method()); duke@435: } duke@435: duke@435: duke@435: //============================================================================= duke@435: //------------------------------MachNode--------------------------------------- duke@435: duke@435: //------------------------------emit------------------------------------------- duke@435: void MachNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { duke@435: #ifdef ASSERT duke@435: tty->print("missing MachNode emit function: "); duke@435: dump(); duke@435: #endif duke@435: ShouldNotCallThis(); duke@435: } duke@435: duke@435: //------------------------------size------------------------------------------- duke@435: // Size of instruction in bytes duke@435: uint MachNode::size(PhaseRegAlloc *ra_) const { duke@435: // If a virtual was not defined for this specific instruction, twisti@1040: // Call the helper which finds the size by emitting the bits. duke@435: return MachNode::emit_size(ra_); duke@435: } duke@435: duke@435: //------------------------------size------------------------------------------- duke@435: // Helper function that computes size by emitting code duke@435: uint MachNode::emit_size(PhaseRegAlloc *ra_) const { duke@435: // Emit into a trash buffer and count bytes emitted. duke@435: assert(ra_ == ra_->C->regalloc(), "sanity"); duke@435: return ra_->C->scratch_emit_size(this); duke@435: } duke@435: duke@435: duke@435: duke@435: //------------------------------hash------------------------------------------- duke@435: uint MachNode::hash() const { duke@435: uint no = num_opnds(); duke@435: uint sum = rule(); duke@435: for( uint i=0; ihash(); duke@435: return sum+Node::hash(); duke@435: } duke@435: duke@435: //-----------------------------cmp--------------------------------------------- duke@435: uint MachNode::cmp( const Node &node ) const { duke@435: MachNode& n = *((Node&)node).as_Mach(); duke@435: uint no = num_opnds(); duke@435: if( no != n.num_opnds() ) return 0; duke@435: if( rule() != n.rule() ) return 0; duke@435: for( uint i=0; icmp( *n._opnds[i] ) ) duke@435: return 0; // mis-matched operands duke@435: return 1; // match duke@435: } duke@435: duke@435: // Return an equivalent instruction using memory for cisc_operand position duke@435: MachNode *MachNode::cisc_version(int offset, Compile* C) { duke@435: ShouldNotCallThis(); duke@435: return NULL; duke@435: } duke@435: duke@435: void MachNode::use_cisc_RegMask() { duke@435: ShouldNotReachHere(); duke@435: } duke@435: duke@435: duke@435: //-----------------------------in_RegMask-------------------------------------- duke@435: const RegMask &MachNode::in_RegMask( uint idx ) const { duke@435: uint numopnds = num_opnds(); // Virtual call for number of operands duke@435: uint skipped = oper_input_base(); // Sum of leaves skipped so far duke@435: if( idx < skipped ) { duke@435: assert( ideal_Opcode() == Op_AddP, "expected base ptr here" ); duke@435: assert( idx == 1, "expected base ptr here" ); duke@435: // debug info can be anywhere duke@435: return *Compile::current()->matcher()->idealreg2spillmask[Op_RegP]; duke@435: } duke@435: uint opcnt = 1; // First operand duke@435: uint num_edges = _opnds[1]->num_edges(); // leaves for first operand duke@435: while( idx >= skipped+num_edges ) { duke@435: skipped += num_edges; duke@435: opcnt++; // Bump operand count duke@435: assert( opcnt < numopnds, "Accessing non-existent operand" ); duke@435: num_edges = _opnds[opcnt]->num_edges(); // leaves for next operand duke@435: } duke@435: duke@435: const RegMask *rm = cisc_RegMask(); duke@435: if( rm == NULL || (int)opcnt != cisc_operand() ) { duke@435: rm = _opnds[opcnt]->in_RegMask(idx-skipped); duke@435: } duke@435: return *rm; duke@435: } duke@435: duke@435: //-----------------------------memory_inputs-------------------------------- duke@435: const MachOper* MachNode::memory_inputs(Node* &base, Node* &index) const { duke@435: const MachOper* oper = memory_operand(); duke@435: duke@435: if (oper == (MachOper*)-1) { duke@435: base = NodeSentinel; duke@435: index = NodeSentinel; duke@435: } else { duke@435: base = NULL; duke@435: index = NULL; duke@435: if (oper != NULL) { duke@435: // It has a unique memory operand. Find its index. duke@435: int oper_idx = num_opnds(); duke@435: while (--oper_idx >= 0) { duke@435: if (_opnds[oper_idx] == oper) break; duke@435: } duke@435: int oper_pos = operand_index(oper_idx); duke@435: int base_pos = oper->base_position(); duke@435: if (base_pos >= 0) { duke@435: base = _in[oper_pos+base_pos]; duke@435: } duke@435: int index_pos = oper->index_position(); duke@435: if (index_pos >= 0) { duke@435: index = _in[oper_pos+index_pos]; duke@435: } duke@435: } duke@435: } duke@435: duke@435: return oper; duke@435: } duke@435: duke@435: //-----------------------------get_base_and_disp---------------------------- duke@435: const Node* MachNode::get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const { duke@435: duke@435: // Find the memory inputs using our helper function duke@435: Node* base; duke@435: Node* index; duke@435: const MachOper* oper = memory_inputs(base, index); duke@435: duke@435: if (oper == NULL) { duke@435: // Base has been set to NULL duke@435: offset = 0; duke@435: } else if (oper == (MachOper*)-1) { duke@435: // Base has been set to NodeSentinel duke@435: // There is not a unique memory use here. We will fall to AliasIdxBot. duke@435: offset = Type::OffsetBot; duke@435: } else { duke@435: // Base may be NULL, even if offset turns out to be != 0 duke@435: duke@435: intptr_t disp = oper->constant_disp(); duke@435: int scale = oper->scale(); duke@435: // Now we have collected every part of the ADLC MEMORY_INTER. duke@435: // See if it adds up to a base + offset. duke@435: if (index != NULL) { kvn@656: const Type* t_index = index->bottom_type(); kvn@656: if (t_index->isa_narrowoop()) { // EncodeN, LoadN, LoadConN, LoadNKlass. kvn@651: // Memory references through narrow oops have a kvn@651: // funny base so grab the type from the index: kvn@651: // [R12 + narrow_oop_reg<<3 + offset] kvn@651: assert(base == NULL, "Memory references through narrow oops have no base"); kvn@651: offset = disp; kvn@656: adr_type = t_index->make_ptr()->add_offset(offset); kvn@651: return NULL; kvn@651: } else if (!index->is_Con()) { duke@435: disp = Type::OffsetBot; duke@435: } else if (disp != Type::OffsetBot) { kvn@656: const TypeX* ti = t_index->isa_intptr_t(); duke@435: if (ti == NULL) { duke@435: disp = Type::OffsetBot; // a random constant?? duke@435: } else { duke@435: disp += ti->get_con() << scale; duke@435: } duke@435: } duke@435: } duke@435: offset = disp; duke@435: duke@435: // In i486.ad, indOffset32X uses base==RegI and disp==RegP, duke@435: // this will prevent alias analysis without the following support: duke@435: // Lookup the TypePtr used by indOffset32X, a compile-time constant oop, duke@435: // Add the offset determined by the "base", or use Type::OffsetBot. duke@435: if( adr_type == TYPE_PTR_SENTINAL ) { duke@435: const TypePtr *t_disp = oper->disp_as_type(); // only !NULL for indOffset32X duke@435: if (t_disp != NULL) { duke@435: offset = Type::OffsetBot; duke@435: const Type* t_base = base->bottom_type(); duke@435: if (t_base->isa_intptr_t()) { duke@435: const TypeX *t_offset = t_base->is_intptr_t(); duke@435: if( t_offset->is_con() ) { duke@435: offset = t_offset->get_con(); duke@435: } duke@435: } duke@435: adr_type = t_disp->add_offset(offset); duke@435: } duke@435: } duke@435: duke@435: } duke@435: return base; duke@435: } duke@435: duke@435: duke@435: //---------------------------------adr_type--------------------------------- duke@435: const class TypePtr *MachNode::adr_type() const { duke@435: intptr_t offset = 0; duke@435: const TypePtr *adr_type = TYPE_PTR_SENTINAL; // attempt computing adr_type duke@435: const Node *base = get_base_and_disp(offset, adr_type); duke@435: if( adr_type != TYPE_PTR_SENTINAL ) { duke@435: return adr_type; // get_base_and_disp has the answer duke@435: } duke@435: duke@435: // Direct addressing modes have no base node, simply an indirect duke@435: // offset, which is always to raw memory. duke@435: // %%%%% Someday we'd like to allow constant oop offsets which duke@435: // would let Intel load from static globals in 1 instruction. duke@435: // Currently Intel requires 2 instructions and a register temp. duke@435: if (base == NULL) { duke@435: // NULL base, zero offset means no memory at all (a null pointer!) duke@435: if (offset == 0) { duke@435: return NULL; duke@435: } duke@435: // NULL base, any offset means any pointer whatever duke@435: if (offset == Type::OffsetBot) { duke@435: return TypePtr::BOTTOM; duke@435: } duke@435: // %%% make offset be intptr_t duke@435: assert(!Universe::heap()->is_in_reserved((oop)offset), "must be a raw ptr"); duke@435: return TypeRawPtr::BOTTOM; duke@435: } duke@435: duke@435: // base of -1 with no particular offset means all of memory duke@435: if (base == NodeSentinel) return TypePtr::BOTTOM; duke@435: duke@435: const Type* t = base->bottom_type(); duke@435: if (t->isa_intptr_t() && offset != 0 && offset != Type::OffsetBot) { duke@435: // We cannot assert that the offset does not look oop-ish here. duke@435: // Depending on the heap layout the cardmark base could land duke@435: // inside some oopish region. It definitely does for Win2K. duke@435: // The sum of cardmark-base plus shift-by-9-oop lands outside duke@435: // the oop-ish area but we can't assert for that statically. duke@435: return TypeRawPtr::BOTTOM; duke@435: } duke@435: duke@435: const TypePtr *tp = t->isa_ptr(); duke@435: duke@435: // be conservative if we do not recognize the type duke@435: if (tp == NULL) { duke@435: return TypePtr::BOTTOM; duke@435: } duke@435: assert(tp->base() != Type::AnyPtr, "not a bare pointer"); duke@435: duke@435: return tp->add_offset(offset); duke@435: } duke@435: duke@435: duke@435: //-----------------------------operand_index--------------------------------- duke@435: int MachNode::operand_index( uint operand ) const { duke@435: if( operand < 1 ) return -1; duke@435: assert(operand < num_opnds(), "oob"); duke@435: if( _opnds[operand]->num_edges() == 0 ) return -1; duke@435: duke@435: uint skipped = oper_input_base(); // Sum of leaves skipped so far duke@435: for (uint opcnt = 1; opcnt < operand; opcnt++) { duke@435: uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand duke@435: skipped += num_edges; duke@435: } duke@435: return skipped; duke@435: } duke@435: duke@435: duke@435: //------------------------------negate----------------------------------------- duke@435: // Negate conditional branches. Error for non-branch Nodes duke@435: void MachNode::negate() { duke@435: ShouldNotCallThis(); duke@435: } duke@435: duke@435: //------------------------------peephole--------------------------------------- duke@435: // Apply peephole rule(s) to this instruction duke@435: MachNode *MachNode::peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ) { duke@435: return NULL; duke@435: } duke@435: duke@435: //------------------------------add_case_label--------------------------------- duke@435: // Adds the label for the case duke@435: void MachNode::add_case_label( int index_num, Label* blockLabel) { duke@435: ShouldNotCallThis(); duke@435: } duke@435: duke@435: //------------------------------label_set-------------------------------------- duke@435: // Set the Label for a LabelOper, if an operand for this instruction duke@435: void MachNode::label_set( Label& label, uint block_num ) { duke@435: ShouldNotCallThis(); duke@435: } duke@435: duke@435: //------------------------------method_set------------------------------------- duke@435: // Set the absolute address of a method duke@435: void MachNode::method_set( intptr_t addr ) { duke@435: ShouldNotCallThis(); duke@435: } duke@435: duke@435: //------------------------------rematerialize---------------------------------- duke@435: bool MachNode::rematerialize() const { duke@435: // Temps are always rematerializable duke@435: if (is_MachTemp()) return true; duke@435: duke@435: uint r = rule(); // Match rule duke@435: if( r < Matcher::_begin_rematerialize || duke@435: r >= Matcher::_end_rematerialize ) duke@435: return false; duke@435: duke@435: // For 2-address instructions, the input live range is also the output duke@435: // live range. Remateralizing does not make progress on the that live range. duke@435: if( two_adr() ) return false; duke@435: duke@435: // Check for rematerializing float constants, or not duke@435: if( !Matcher::rematerialize_float_constants ) { duke@435: int op = ideal_Opcode(); duke@435: if( op == Op_ConF || op == Op_ConD ) duke@435: return false; duke@435: } duke@435: duke@435: // Defining flags - can't spill these! Must remateralize. duke@435: if( ideal_reg() == Op_RegFlags ) duke@435: return true; duke@435: duke@435: // Stretching lots of inputs - don't do it. duke@435: if( req() > 2 ) duke@435: return false; duke@435: duke@435: // Don't remateralize somebody with bound inputs - it stretches a duke@435: // fixed register lifetime. duke@435: uint idx = oper_input_base(); duke@435: if( req() > idx ) { duke@435: const RegMask &rm = in_RegMask(idx); duke@435: if( rm.is_bound1() || rm.is_bound2() ) duke@435: return false; duke@435: } duke@435: duke@435: return true; duke@435: } duke@435: duke@435: #ifndef PRODUCT duke@435: //------------------------------dump_spec-------------------------------------- duke@435: // Print any per-operand special info duke@435: void MachNode::dump_spec(outputStream *st) const { duke@435: uint cnt = num_opnds(); duke@435: for( uint i=0; idump_spec(st); duke@435: const TypePtr *t = adr_type(); duke@435: if( t ) { duke@435: Compile* C = Compile::current(); duke@435: if( C->alias_type(t)->is_volatile() ) duke@435: st->print(" Volatile!"); duke@435: } duke@435: } duke@435: duke@435: //------------------------------dump_format------------------------------------ duke@435: // access to virtual duke@435: void MachNode::dump_format(PhaseRegAlloc *ra, outputStream *st) const { duke@435: format(ra, st); // access to virtual duke@435: } duke@435: #endif duke@435: duke@435: //============================================================================= duke@435: #ifndef PRODUCT duke@435: void MachTypeNode::dump_spec(outputStream *st) const { duke@435: _bottom_type->dump_on(st); duke@435: } duke@435: #endif duke@435: duke@435: //============================================================================= duke@435: #ifndef PRODUCT duke@435: void MachNullCheckNode::format( PhaseRegAlloc *ra_, outputStream *st ) const { duke@435: int reg = ra_->get_reg_first(in(1)->in(_vidx)); duke@435: tty->print("%s %s", Name(), Matcher::regName[reg]); duke@435: } duke@435: #endif duke@435: duke@435: void MachNullCheckNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { duke@435: // only emits entries in the null-pointer exception handler table duke@435: } duke@435: duke@435: const RegMask &MachNullCheckNode::in_RegMask( uint idx ) const { duke@435: if( idx == 0 ) return RegMask::Empty; duke@435: else return in(1)->as_Mach()->out_RegMask(); duke@435: } duke@435: duke@435: //============================================================================= duke@435: const Type *MachProjNode::bottom_type() const { duke@435: if( _ideal_reg == fat_proj ) return Type::BOTTOM; duke@435: // Try the normal mechanism first duke@435: const Type *t = in(0)->bottom_type(); duke@435: if( t->base() == Type::Tuple ) { duke@435: const TypeTuple *tt = t->is_tuple(); duke@435: if (_con < tt->cnt()) duke@435: return tt->field_at(_con); duke@435: } duke@435: // Else use generic type from ideal register set duke@435: assert((uint)_ideal_reg < (uint)_last_machine_leaf && Type::mreg2type[_ideal_reg], "in bounds"); duke@435: return Type::mreg2type[_ideal_reg]; duke@435: } duke@435: duke@435: const TypePtr *MachProjNode::adr_type() const { duke@435: if (bottom_type() == Type::MEMORY) { duke@435: // in(0) might be a narrow MemBar; otherwise we will report TypePtr::BOTTOM duke@435: const TypePtr* adr_type = in(0)->adr_type(); duke@435: #ifdef ASSERT duke@435: if (!is_error_reported() && !Node::in_dump()) duke@435: assert(adr_type != NULL, "source must have adr_type"); duke@435: #endif duke@435: return adr_type; duke@435: } duke@435: assert(bottom_type()->base() != Type::Memory, "no other memories?"); duke@435: return NULL; duke@435: } duke@435: duke@435: #ifndef PRODUCT duke@435: void MachProjNode::dump_spec(outputStream *st) const { duke@435: ProjNode::dump_spec(st); duke@435: switch (_ideal_reg) { duke@435: case unmatched_proj: st->print("/unmatched"); break; duke@435: case fat_proj: st->print("/fat"); if (WizardMode) _rout.dump(); break; duke@435: } duke@435: } duke@435: #endif duke@435: duke@435: //============================================================================= duke@435: #ifndef PRODUCT duke@435: void MachIfNode::dump_spec(outputStream *st) const { duke@435: st->print("P=%f, C=%f",_prob, _fcnt); duke@435: } duke@435: #endif duke@435: duke@435: //============================================================================= duke@435: uint MachReturnNode::size_of() const { return sizeof(*this); } duke@435: duke@435: //------------------------------Registers-------------------------------------- duke@435: const RegMask &MachReturnNode::in_RegMask( uint idx ) const { duke@435: return _in_rms[idx]; duke@435: } duke@435: duke@435: const TypePtr *MachReturnNode::adr_type() const { duke@435: // most returns and calls are assumed to consume & modify all of memory duke@435: // the matcher will copy non-wide adr_types from ideal originals duke@435: return _adr_type; duke@435: } duke@435: duke@435: //============================================================================= duke@435: const Type *MachSafePointNode::bottom_type() const { return TypeTuple::MEMBAR; } duke@435: duke@435: //------------------------------Registers-------------------------------------- duke@435: const RegMask &MachSafePointNode::in_RegMask( uint idx ) const { duke@435: // Values in the domain use the users calling convention, embodied in the duke@435: // _in_rms array of RegMasks. duke@435: if( idx < TypeFunc::Parms ) return _in_rms[idx]; duke@435: duke@435: if (SafePointNode::needs_polling_address_input() && duke@435: idx == TypeFunc::Parms && duke@435: ideal_Opcode() == Op_SafePoint) { duke@435: return MachNode::in_RegMask(idx); duke@435: } duke@435: duke@435: // Values outside the domain represent debug info duke@435: return *Compile::current()->matcher()->idealreg2spillmask[in(idx)->ideal_reg()]; duke@435: } duke@435: duke@435: duke@435: //============================================================================= duke@435: duke@435: uint MachCallNode::cmp( const Node &n ) const duke@435: { return _tf == ((MachCallNode&)n)._tf; } duke@435: const Type *MachCallNode::bottom_type() const { return tf()->range(); } duke@435: const Type *MachCallNode::Value(PhaseTransform *phase) const { return tf()->range(); } duke@435: duke@435: #ifndef PRODUCT duke@435: void MachCallNode::dump_spec(outputStream *st) const { duke@435: st->print("# "); duke@435: tf()->dump_on(st); duke@435: if (_cnt != COUNT_UNKNOWN) st->print(" C=%f",_cnt); duke@435: if (jvms() != NULL) jvms()->dump_spec(st); duke@435: } duke@435: #endif duke@435: duke@435: duke@435: bool MachCallNode::return_value_is_used() const { duke@435: if (tf()->range()->cnt() == TypeFunc::Parms) { duke@435: // void return duke@435: return false; duke@435: } duke@435: duke@435: // find the projection corresponding to the return value duke@435: for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) { duke@435: Node *use = fast_out(i); duke@435: if (!use->is_Proj()) continue; duke@435: if (use->as_Proj()->_con == TypeFunc::Parms) { duke@435: return true; duke@435: } duke@435: } duke@435: return false; duke@435: } duke@435: duke@435: duke@435: //------------------------------Registers-------------------------------------- duke@435: const RegMask &MachCallNode::in_RegMask( uint idx ) const { duke@435: // Values in the domain use the users calling convention, embodied in the duke@435: // _in_rms array of RegMasks. duke@435: if (idx < tf()->domain()->cnt()) return _in_rms[idx]; duke@435: // Values outside the domain represent debug info duke@435: return *Compile::current()->matcher()->idealreg2debugmask[in(idx)->ideal_reg()]; duke@435: } duke@435: duke@435: //============================================================================= duke@435: uint MachCallJavaNode::size_of() const { return sizeof(*this); } duke@435: uint MachCallJavaNode::cmp( const Node &n ) const { duke@435: MachCallJavaNode &call = (MachCallJavaNode&)n; duke@435: return MachCallNode::cmp(call) && _method->equals(call._method); duke@435: } duke@435: #ifndef PRODUCT duke@435: void MachCallJavaNode::dump_spec(outputStream *st) const { duke@435: if( _method ) { duke@435: _method->print_short_name(st); duke@435: st->print(" "); duke@435: } duke@435: MachCallNode::dump_spec(st); duke@435: } duke@435: #endif duke@435: duke@435: //============================================================================= duke@435: uint MachCallStaticJavaNode::size_of() const { return sizeof(*this); } duke@435: uint MachCallStaticJavaNode::cmp( const Node &n ) const { duke@435: MachCallStaticJavaNode &call = (MachCallStaticJavaNode&)n; duke@435: return MachCallJavaNode::cmp(call) && _name == call._name; duke@435: } duke@435: duke@435: //----------------------------uncommon_trap_request---------------------------- duke@435: // If this is an uncommon trap, return the request code, else zero. duke@435: int MachCallStaticJavaNode::uncommon_trap_request() const { duke@435: if (_name != NULL && !strcmp(_name, "uncommon_trap")) { duke@435: return CallStaticJavaNode::extract_uncommon_trap_request(this); duke@435: } duke@435: return 0; duke@435: } duke@435: duke@435: #ifndef PRODUCT duke@435: // Helper for summarizing uncommon_trap arguments. duke@435: void MachCallStaticJavaNode::dump_trap_args(outputStream *st) const { duke@435: int trap_req = uncommon_trap_request(); duke@435: if (trap_req != 0) { duke@435: char buf[100]; duke@435: st->print("(%s)", duke@435: Deoptimization::format_trap_request(buf, sizeof(buf), duke@435: trap_req)); duke@435: } duke@435: } duke@435: duke@435: void MachCallStaticJavaNode::dump_spec(outputStream *st) const { duke@435: st->print("Static "); duke@435: if (_name != NULL) { duke@435: st->print("wrapper for: %s", _name ); duke@435: dump_trap_args(st); duke@435: st->print(" "); duke@435: } duke@435: MachCallJavaNode::dump_spec(st); duke@435: } duke@435: #endif duke@435: duke@435: //============================================================================= duke@435: #ifndef PRODUCT duke@435: void MachCallDynamicJavaNode::dump_spec(outputStream *st) const { duke@435: st->print("Dynamic "); duke@435: MachCallJavaNode::dump_spec(st); duke@435: } duke@435: #endif duke@435: //============================================================================= duke@435: uint MachCallRuntimeNode::size_of() const { return sizeof(*this); } duke@435: uint MachCallRuntimeNode::cmp( const Node &n ) const { duke@435: MachCallRuntimeNode &call = (MachCallRuntimeNode&)n; duke@435: return MachCallNode::cmp(call) && !strcmp(_name,call._name); duke@435: } duke@435: #ifndef PRODUCT duke@435: void MachCallRuntimeNode::dump_spec(outputStream *st) const { duke@435: st->print("%s ",_name); duke@435: MachCallNode::dump_spec(st); duke@435: } duke@435: #endif duke@435: //============================================================================= duke@435: // A shared JVMState for all HaltNodes. Indicates the start of debug info duke@435: // is at TypeFunc::Parms. Only required for SOE register spill handling - duke@435: // to indicate where the stack-slot-only debug info inputs begin. duke@435: // There is no other JVM state needed here. duke@435: JVMState jvms_for_throw(0); duke@435: JVMState *MachHaltNode::jvms() const { duke@435: return &jvms_for_throw; duke@435: } duke@435: duke@435: //============================================================================= duke@435: #ifndef PRODUCT duke@435: void labelOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const { duke@435: st->print("B%d", _block_num); duke@435: } duke@435: #endif // PRODUCT duke@435: duke@435: //============================================================================= duke@435: #ifndef PRODUCT duke@435: void methodOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const { duke@435: st->print(INTPTR_FORMAT, _method); duke@435: } duke@435: #endif // PRODUCT