duke@435: /* never@3500: * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. duke@435: * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. duke@435: * duke@435: * This code is free software; you can redistribute it and/or modify it duke@435: * under the terms of the GNU General Public License version 2 only, as duke@435: * published by the Free Software Foundation. duke@435: * duke@435: * This code is distributed in the hope that it will be useful, but WITHOUT duke@435: * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or duke@435: * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License duke@435: * version 2 for more details (a copy is included in the LICENSE file that duke@435: * accompanied this code). duke@435: * duke@435: * You should have received a copy of the GNU General Public License version duke@435: * 2 along with this work; if not, write to the Free Software Foundation, duke@435: * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. duke@435: * trims@1907: * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA trims@1907: * or visit www.oracle.com if you need additional information or have any trims@1907: * questions. duke@435: * duke@435: */ duke@435: stefank@2314: #include "precompiled.hpp" stefank@2314: #include "asm/assembler.hpp" stefank@2314: #include "assembler_x86.inline.hpp" stefank@2314: #include "code/debugInfoRec.hpp" stefank@2314: #include "code/icBuffer.hpp" stefank@2314: #include "code/vtableStubs.hpp" stefank@2314: #include "interpreter/interpreter.hpp" coleenp@4037: #include "oops/compiledICHolder.hpp" stefank@2314: #include "prims/jvmtiRedefineClassesTrace.hpp" stefank@2314: #include "runtime/sharedRuntime.hpp" stefank@2314: #include "runtime/vframeArray.hpp" stefank@2314: #include "vmreg_x86.inline.hpp" stefank@2314: #ifdef COMPILER1 stefank@2314: #include "c1/c1_Runtime1.hpp" stefank@2314: #endif stefank@2314: #ifdef COMPILER2 stefank@2314: #include "opto/runtime.hpp" stefank@2314: #endif duke@435: duke@435: #define __ masm-> duke@435: xlu@959: const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; xlu@959: duke@435: class RegisterSaver { duke@435: enum { FPU_regs_live = 8 /*for the FPU stack*/+8/*eight more for XMM registers*/ }; duke@435: // Capture info about frame layout duke@435: enum layout { duke@435: fpu_state_off = 0, duke@435: fpu_state_end = fpu_state_off+FPUStateSizeInWords-1, duke@435: st0_off, st0H_off, duke@435: st1_off, st1H_off, duke@435: st2_off, st2H_off, duke@435: st3_off, st3H_off, duke@435: st4_off, st4H_off, duke@435: st5_off, st5H_off, duke@435: st6_off, st6H_off, duke@435: st7_off, st7H_off, duke@435: duke@435: xmm0_off, xmm0H_off, duke@435: xmm1_off, xmm1H_off, duke@435: xmm2_off, xmm2H_off, duke@435: xmm3_off, xmm3H_off, duke@435: xmm4_off, xmm4H_off, duke@435: xmm5_off, xmm5H_off, duke@435: xmm6_off, xmm6H_off, duke@435: xmm7_off, xmm7H_off, duke@435: flags_off, duke@435: rdi_off, duke@435: rsi_off, duke@435: ignore_off, // extra copy of rbp, duke@435: rsp_off, duke@435: rbx_off, duke@435: rdx_off, duke@435: rcx_off, duke@435: rax_off, duke@435: // The frame sender code expects that rbp will be in the "natural" place and duke@435: // will override any oopMap setting for it. We must therefore force the layout duke@435: // so that it agrees with the frame sender code. duke@435: rbp_off, duke@435: return_off, // slot for return address duke@435: reg_save_size }; duke@435: duke@435: duke@435: public: duke@435: duke@435: static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, duke@435: int* total_frame_words, bool verify_fpu = true); duke@435: static void restore_live_registers(MacroAssembler* masm); duke@435: duke@435: static int rax_offset() { return rax_off; } duke@435: static int rbx_offset() { return rbx_off; } duke@435: duke@435: // Offsets into the register save area duke@435: // Used by deoptimization when it is managing result register duke@435: // values on its own duke@435: duke@435: static int raxOffset(void) { return rax_off; } duke@435: static int rdxOffset(void) { return rdx_off; } duke@435: static int rbxOffset(void) { return rbx_off; } duke@435: static int xmm0Offset(void) { return xmm0_off; } duke@435: // This really returns a slot in the fp save area, which one is not important duke@435: static int fpResultOffset(void) { return st0_off; } duke@435: duke@435: // During deoptimization only the result register need to be restored duke@435: // all the other values have already been extracted. duke@435: duke@435: static void restore_result_registers(MacroAssembler* masm); duke@435: duke@435: }; duke@435: duke@435: OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, duke@435: int* total_frame_words, bool verify_fpu) { duke@435: duke@435: int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize; duke@435: int frame_words = frame_size_in_bytes / wordSize; duke@435: *total_frame_words = frame_words; duke@435: duke@435: assert(FPUStateSizeInWords == 27, "update stack layout"); duke@435: duke@435: // save registers, fpu state, and flags duke@435: // We assume caller has already has return address slot on the stack duke@435: // We push epb twice in this sequence because we want the real rbp, never@739: // to be under the return like a normal enter and we want to use pusha duke@435: // We push by hand instead of pusing push duke@435: __ enter(); never@739: __ pusha(); never@739: __ pushf(); never@739: __ subptr(rsp,FPU_regs_live*sizeof(jdouble)); // Push FPU registers space duke@435: __ push_FPU_state(); // Save FPU state & init duke@435: duke@435: if (verify_fpu) { duke@435: // Some stubs may have non standard FPU control word settings so duke@435: // only check and reset the value when it required to be the duke@435: // standard value. The safepoint blob in particular can be used duke@435: // in methods which are using the 24 bit control word for duke@435: // optimized float math. duke@435: duke@435: #ifdef ASSERT duke@435: // Make sure the control word has the expected value duke@435: Label ok; duke@435: __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std()); duke@435: __ jccb(Assembler::equal, ok); duke@435: __ stop("corrupted control word detected"); duke@435: __ bind(ok); duke@435: #endif duke@435: duke@435: // Reset the control word to guard against exceptions being unmasked duke@435: // since fstp_d can cause FPU stack underflow exceptions. Write it duke@435: // into the on stack copy and then reload that to make sure that the duke@435: // current and future values are correct. duke@435: __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std()); duke@435: } duke@435: duke@435: __ frstor(Address(rsp, 0)); duke@435: if (!verify_fpu) { duke@435: // Set the control word so that exceptions are masked for the duke@435: // following code. duke@435: __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); duke@435: } duke@435: duke@435: // Save the FPU registers in de-opt-able form duke@435: duke@435: __ fstp_d(Address(rsp, st0_off*wordSize)); // st(0) duke@435: __ fstp_d(Address(rsp, st1_off*wordSize)); // st(1) duke@435: __ fstp_d(Address(rsp, st2_off*wordSize)); // st(2) duke@435: __ fstp_d(Address(rsp, st3_off*wordSize)); // st(3) duke@435: __ fstp_d(Address(rsp, st4_off*wordSize)); // st(4) duke@435: __ fstp_d(Address(rsp, st5_off*wordSize)); // st(5) duke@435: __ fstp_d(Address(rsp, st6_off*wordSize)); // st(6) duke@435: __ fstp_d(Address(rsp, st7_off*wordSize)); // st(7) duke@435: duke@435: if( UseSSE == 1 ) { // Save the XMM state duke@435: __ movflt(Address(rsp,xmm0_off*wordSize),xmm0); duke@435: __ movflt(Address(rsp,xmm1_off*wordSize),xmm1); duke@435: __ movflt(Address(rsp,xmm2_off*wordSize),xmm2); duke@435: __ movflt(Address(rsp,xmm3_off*wordSize),xmm3); duke@435: __ movflt(Address(rsp,xmm4_off*wordSize),xmm4); duke@435: __ movflt(Address(rsp,xmm5_off*wordSize),xmm5); duke@435: __ movflt(Address(rsp,xmm6_off*wordSize),xmm6); duke@435: __ movflt(Address(rsp,xmm7_off*wordSize),xmm7); duke@435: } else if( UseSSE >= 2 ) { duke@435: __ movdbl(Address(rsp,xmm0_off*wordSize),xmm0); duke@435: __ movdbl(Address(rsp,xmm1_off*wordSize),xmm1); duke@435: __ movdbl(Address(rsp,xmm2_off*wordSize),xmm2); duke@435: __ movdbl(Address(rsp,xmm3_off*wordSize),xmm3); duke@435: __ movdbl(Address(rsp,xmm4_off*wordSize),xmm4); duke@435: __ movdbl(Address(rsp,xmm5_off*wordSize),xmm5); duke@435: __ movdbl(Address(rsp,xmm6_off*wordSize),xmm6); duke@435: __ movdbl(Address(rsp,xmm7_off*wordSize),xmm7); duke@435: } duke@435: duke@435: // Set an oopmap for the call site. This oopmap will map all duke@435: // oop-registers and debug-info registers as callee-saved. This duke@435: // will allow deoptimization at this safepoint to find all possible duke@435: // debug-info recordings, as well as let GC find all oops. duke@435: duke@435: OopMapSet *oop_maps = new OopMapSet(); duke@435: OopMap* map = new OopMap( frame_words, 0 ); duke@435: duke@435: #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words) duke@435: duke@435: map->set_callee_saved(STACK_OFFSET( rax_off), rax->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET( rcx_off), rcx->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET( rdx_off), rdx->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET( rbx_off), rbx->as_VMReg()); duke@435: // rbp, location is known implicitly, no oopMap duke@435: map->set_callee_saved(STACK_OFFSET( rsi_off), rsi->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET( rdi_off), rdi->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET(st0_off), as_FloatRegister(0)->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET(st1_off), as_FloatRegister(1)->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET(st2_off), as_FloatRegister(2)->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET(st3_off), as_FloatRegister(3)->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET(st4_off), as_FloatRegister(4)->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET(st5_off), as_FloatRegister(5)->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET(st6_off), as_FloatRegister(6)->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET(st7_off), as_FloatRegister(7)->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET(xmm0_off), xmm0->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET(xmm1_off), xmm1->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET(xmm2_off), xmm2->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET(xmm3_off), xmm3->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET(xmm4_off), xmm4->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET(xmm5_off), xmm5->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET(xmm6_off), xmm6->as_VMReg()); duke@435: map->set_callee_saved(STACK_OFFSET(xmm7_off), xmm7->as_VMReg()); duke@435: // %%% This is really a waste but we'll keep things as they were for now duke@435: if (true) { duke@435: #define NEXTREG(x) (x)->as_VMReg()->next() duke@435: map->set_callee_saved(STACK_OFFSET(st0H_off), NEXTREG(as_FloatRegister(0))); duke@435: map->set_callee_saved(STACK_OFFSET(st1H_off), NEXTREG(as_FloatRegister(1))); duke@435: map->set_callee_saved(STACK_OFFSET(st2H_off), NEXTREG(as_FloatRegister(2))); duke@435: map->set_callee_saved(STACK_OFFSET(st3H_off), NEXTREG(as_FloatRegister(3))); duke@435: map->set_callee_saved(STACK_OFFSET(st4H_off), NEXTREG(as_FloatRegister(4))); duke@435: map->set_callee_saved(STACK_OFFSET(st5H_off), NEXTREG(as_FloatRegister(5))); duke@435: map->set_callee_saved(STACK_OFFSET(st6H_off), NEXTREG(as_FloatRegister(6))); duke@435: map->set_callee_saved(STACK_OFFSET(st7H_off), NEXTREG(as_FloatRegister(7))); duke@435: map->set_callee_saved(STACK_OFFSET(xmm0H_off), NEXTREG(xmm0)); duke@435: map->set_callee_saved(STACK_OFFSET(xmm1H_off), NEXTREG(xmm1)); duke@435: map->set_callee_saved(STACK_OFFSET(xmm2H_off), NEXTREG(xmm2)); duke@435: map->set_callee_saved(STACK_OFFSET(xmm3H_off), NEXTREG(xmm3)); duke@435: map->set_callee_saved(STACK_OFFSET(xmm4H_off), NEXTREG(xmm4)); duke@435: map->set_callee_saved(STACK_OFFSET(xmm5H_off), NEXTREG(xmm5)); duke@435: map->set_callee_saved(STACK_OFFSET(xmm6H_off), NEXTREG(xmm6)); duke@435: map->set_callee_saved(STACK_OFFSET(xmm7H_off), NEXTREG(xmm7)); duke@435: #undef NEXTREG duke@435: #undef STACK_OFFSET duke@435: } duke@435: duke@435: return map; duke@435: duke@435: } duke@435: duke@435: void RegisterSaver::restore_live_registers(MacroAssembler* masm) { duke@435: duke@435: // Recover XMM & FPU state duke@435: if( UseSSE == 1 ) { duke@435: __ movflt(xmm0,Address(rsp,xmm0_off*wordSize)); duke@435: __ movflt(xmm1,Address(rsp,xmm1_off*wordSize)); duke@435: __ movflt(xmm2,Address(rsp,xmm2_off*wordSize)); duke@435: __ movflt(xmm3,Address(rsp,xmm3_off*wordSize)); duke@435: __ movflt(xmm4,Address(rsp,xmm4_off*wordSize)); duke@435: __ movflt(xmm5,Address(rsp,xmm5_off*wordSize)); duke@435: __ movflt(xmm6,Address(rsp,xmm6_off*wordSize)); duke@435: __ movflt(xmm7,Address(rsp,xmm7_off*wordSize)); duke@435: } else if( UseSSE >= 2 ) { duke@435: __ movdbl(xmm0,Address(rsp,xmm0_off*wordSize)); duke@435: __ movdbl(xmm1,Address(rsp,xmm1_off*wordSize)); duke@435: __ movdbl(xmm2,Address(rsp,xmm2_off*wordSize)); duke@435: __ movdbl(xmm3,Address(rsp,xmm3_off*wordSize)); duke@435: __ movdbl(xmm4,Address(rsp,xmm4_off*wordSize)); duke@435: __ movdbl(xmm5,Address(rsp,xmm5_off*wordSize)); duke@435: __ movdbl(xmm6,Address(rsp,xmm6_off*wordSize)); duke@435: __ movdbl(xmm7,Address(rsp,xmm7_off*wordSize)); duke@435: } duke@435: __ pop_FPU_state(); never@739: __ addptr(rsp, FPU_regs_live*sizeof(jdouble)); // Pop FPU registers never@739: never@739: __ popf(); never@739: __ popa(); duke@435: // Get the rbp, described implicitly by the frame sender code (no oopMap) never@739: __ pop(rbp); duke@435: duke@435: } duke@435: duke@435: void RegisterSaver::restore_result_registers(MacroAssembler* masm) { duke@435: duke@435: // Just restore result register. Only used by deoptimization. By duke@435: // now any callee save register that needs to be restore to a c2 duke@435: // caller of the deoptee has been extracted into the vframeArray duke@435: // and will be stuffed into the c2i adapter we create for later duke@435: // restoration so only result registers need to be restored here. duke@435: // duke@435: duke@435: __ frstor(Address(rsp, 0)); // Restore fpu state duke@435: duke@435: // Recover XMM & FPU state duke@435: if( UseSSE == 1 ) { duke@435: __ movflt(xmm0, Address(rsp, xmm0_off*wordSize)); duke@435: } else if( UseSSE >= 2 ) { duke@435: __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize)); duke@435: } never@739: __ movptr(rax, Address(rsp, rax_off*wordSize)); never@739: __ movptr(rdx, Address(rsp, rdx_off*wordSize)); duke@435: // Pop all of the register save are off the stack except the return address never@739: __ addptr(rsp, return_off * wordSize); duke@435: } duke@435: duke@435: // The java_calling_convention describes stack locations as ideal slots on duke@435: // a frame with no abi restrictions. Since we must observe abi restrictions duke@435: // (like the placement of the register window) the slots must be biased by duke@435: // the following value. duke@435: static int reg2offset_in(VMReg r) { duke@435: // Account for saved rbp, and return address duke@435: // This should really be in_preserve_stack_slots duke@435: return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size; duke@435: } duke@435: duke@435: static int reg2offset_out(VMReg r) { duke@435: return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; duke@435: } duke@435: duke@435: // --------------------------------------------------------------------------- duke@435: // Read the array of BasicTypes from a signature, and compute where the duke@435: // arguments should go. Values in the VMRegPair regs array refer to 4-byte duke@435: // quantities. Values less than SharedInfo::stack0 are registers, those above duke@435: // refer to 4-byte stack slots. All stack slots are based off of the stack pointer duke@435: // as framesizes are fixed. duke@435: // VMRegImpl::stack0 refers to the first slot 0(sp). duke@435: // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register duke@435: // up to RegisterImpl::number_of_registers) are the 32-bit duke@435: // integer registers. duke@435: duke@435: // Pass first two oop/int args in registers ECX and EDX. duke@435: // Pass first two float/double args in registers XMM0 and XMM1. duke@435: // Doubles have precedence, so if you pass a mix of floats and doubles duke@435: // the doubles will grab the registers before the floats will. duke@435: duke@435: // Note: the INPUTS in sig_bt are in units of Java argument words, which are duke@435: // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit duke@435: // units regardless of build. Of course for i486 there is no 64 bit build duke@435: duke@435: duke@435: // --------------------------------------------------------------------------- duke@435: // The compiled Java calling convention. duke@435: // Pass first two oop/int args in registers ECX and EDX. duke@435: // Pass first two float/double args in registers XMM0 and XMM1. duke@435: // Doubles have precedence, so if you pass a mix of floats and doubles duke@435: // the doubles will grab the registers before the floats will. duke@435: int SharedRuntime::java_calling_convention(const BasicType *sig_bt, duke@435: VMRegPair *regs, duke@435: int total_args_passed, duke@435: int is_outgoing) { duke@435: uint stack = 0; // Starting stack position for args on stack duke@435: duke@435: duke@435: // Pass first two oop/int args in registers ECX and EDX. duke@435: uint reg_arg0 = 9999; duke@435: uint reg_arg1 = 9999; duke@435: duke@435: // Pass first two float/double args in registers XMM0 and XMM1. duke@435: // Doubles have precedence, so if you pass a mix of floats and doubles duke@435: // the doubles will grab the registers before the floats will. duke@435: // CNC - TURNED OFF FOR non-SSE. duke@435: // On Intel we have to round all doubles (and most floats) at duke@435: // call sites by storing to the stack in any case. duke@435: // UseSSE=0 ==> Don't Use ==> 9999+0 duke@435: // UseSSE=1 ==> Floats only ==> 9999+1 duke@435: // UseSSE>=2 ==> Floats or doubles ==> 9999+2 duke@435: enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 }; duke@435: uint fargs = (UseSSE>=2) ? 2 : UseSSE; duke@435: uint freg_arg0 = 9999+fargs; duke@435: uint freg_arg1 = 9999+fargs; duke@435: duke@435: // Pass doubles & longs aligned on the stack. First count stack slots for doubles duke@435: int i; duke@435: for( i = 0; i < total_args_passed; i++) { duke@435: if( sig_bt[i] == T_DOUBLE ) { duke@435: // first 2 doubles go in registers duke@435: if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i; duke@435: else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i; duke@435: else // Else double is passed low on the stack to be aligned. duke@435: stack += 2; duke@435: } else if( sig_bt[i] == T_LONG ) { duke@435: stack += 2; duke@435: } duke@435: } duke@435: int dstack = 0; // Separate counter for placing doubles duke@435: duke@435: // Now pick where all else goes. duke@435: for( i = 0; i < total_args_passed; i++) { duke@435: // From the type and the argument number (count) compute the location duke@435: switch( sig_bt[i] ) { duke@435: case T_SHORT: duke@435: case T_CHAR: duke@435: case T_BYTE: duke@435: case T_BOOLEAN: duke@435: case T_INT: duke@435: case T_ARRAY: duke@435: case T_OBJECT: duke@435: case T_ADDRESS: duke@435: if( reg_arg0 == 9999 ) { duke@435: reg_arg0 = i; duke@435: regs[i].set1(rcx->as_VMReg()); duke@435: } else if( reg_arg1 == 9999 ) { duke@435: reg_arg1 = i; duke@435: regs[i].set1(rdx->as_VMReg()); duke@435: } else { duke@435: regs[i].set1(VMRegImpl::stack2reg(stack++)); duke@435: } duke@435: break; duke@435: case T_FLOAT: duke@435: if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) { duke@435: freg_arg0 = i; duke@435: regs[i].set1(xmm0->as_VMReg()); duke@435: } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) { duke@435: freg_arg1 = i; duke@435: regs[i].set1(xmm1->as_VMReg()); duke@435: } else { duke@435: regs[i].set1(VMRegImpl::stack2reg(stack++)); duke@435: } duke@435: break; duke@435: case T_LONG: duke@435: assert(sig_bt[i+1] == T_VOID, "missing Half" ); duke@435: regs[i].set2(VMRegImpl::stack2reg(dstack)); duke@435: dstack += 2; duke@435: break; duke@435: case T_DOUBLE: duke@435: assert(sig_bt[i+1] == T_VOID, "missing Half" ); duke@435: if( freg_arg0 == (uint)i ) { duke@435: regs[i].set2(xmm0->as_VMReg()); duke@435: } else if( freg_arg1 == (uint)i ) { duke@435: regs[i].set2(xmm1->as_VMReg()); duke@435: } else { duke@435: regs[i].set2(VMRegImpl::stack2reg(dstack)); duke@435: dstack += 2; duke@435: } duke@435: break; duke@435: case T_VOID: regs[i].set_bad(); break; duke@435: break; duke@435: default: duke@435: ShouldNotReachHere(); duke@435: break; duke@435: } duke@435: } duke@435: duke@435: // return value can be odd number of VMRegImpl stack slots make multiple of 2 duke@435: return round_to(stack, 2); duke@435: } duke@435: duke@435: // Patch the callers callsite with entry to compiled code if it exists. duke@435: static void patch_callers_callsite(MacroAssembler *masm) { duke@435: Label L; coleenp@4037: __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); duke@435: __ jcc(Assembler::equal, L); duke@435: // Schedule the branch target address early. duke@435: // Call into the VM to patch the caller, then jump to compiled callee duke@435: // rax, isn't live so capture return address while we easily can never@739: __ movptr(rax, Address(rsp, 0)); never@739: __ pusha(); never@739: __ pushf(); duke@435: duke@435: if (UseSSE == 1) { never@739: __ subptr(rsp, 2*wordSize); duke@435: __ movflt(Address(rsp, 0), xmm0); duke@435: __ movflt(Address(rsp, wordSize), xmm1); duke@435: } duke@435: if (UseSSE >= 2) { never@739: __ subptr(rsp, 4*wordSize); duke@435: __ movdbl(Address(rsp, 0), xmm0); duke@435: __ movdbl(Address(rsp, 2*wordSize), xmm1); duke@435: } duke@435: #ifdef COMPILER2 duke@435: // C2 may leave the stack dirty if not in SSE2+ mode duke@435: if (UseSSE >= 2) { duke@435: __ verify_FPU(0, "c2i transition should have clean FPU stack"); duke@435: } else { duke@435: __ empty_FPU_stack(); duke@435: } duke@435: #endif /* COMPILER2 */ duke@435: duke@435: // VM needs caller's callsite never@739: __ push(rax); duke@435: // VM needs target method never@739: __ push(rbx); duke@435: __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); never@739: __ addptr(rsp, 2*wordSize); duke@435: duke@435: if (UseSSE == 1) { duke@435: __ movflt(xmm0, Address(rsp, 0)); duke@435: __ movflt(xmm1, Address(rsp, wordSize)); never@739: __ addptr(rsp, 2*wordSize); duke@435: } duke@435: if (UseSSE >= 2) { duke@435: __ movdbl(xmm0, Address(rsp, 0)); duke@435: __ movdbl(xmm1, Address(rsp, 2*wordSize)); never@739: __ addptr(rsp, 4*wordSize); duke@435: } duke@435: never@739: __ popf(); never@739: __ popa(); duke@435: __ bind(L); duke@435: } duke@435: duke@435: duke@435: static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) { twisti@1861: int next_off = st_off - Interpreter::stackElementSize; twisti@1861: __ movdbl(Address(rsp, next_off), r); duke@435: } duke@435: duke@435: static void gen_c2i_adapter(MacroAssembler *masm, duke@435: int total_args_passed, duke@435: int comp_args_on_stack, duke@435: const BasicType *sig_bt, duke@435: const VMRegPair *regs, duke@435: Label& skip_fixup) { duke@435: // Before we get into the guts of the C2I adapter, see if we should be here duke@435: // at all. We've come from compiled code and are attempting to jump to the duke@435: // interpreter, which means the caller made a static call to get here duke@435: // (vcalls always get a compiled target if there is one). Check for a duke@435: // compiled target. If there is one, we need to patch the caller's call. duke@435: patch_callers_callsite(masm); duke@435: duke@435: __ bind(skip_fixup); duke@435: duke@435: #ifdef COMPILER2 duke@435: // C2 may leave the stack dirty if not in SSE2+ mode duke@435: if (UseSSE >= 2) { duke@435: __ verify_FPU(0, "c2i transition should have clean FPU stack"); duke@435: } else { duke@435: __ empty_FPU_stack(); duke@435: } duke@435: #endif /* COMPILER2 */ duke@435: duke@435: // Since all args are passed on the stack, total_args_passed * interpreter_ duke@435: // stack_element_size is the duke@435: // space we need. twisti@1861: int extraspace = total_args_passed * Interpreter::stackElementSize; duke@435: duke@435: // Get return address never@739: __ pop(rax); duke@435: duke@435: // set senderSP value never@739: __ movptr(rsi, rsp); never@739: never@739: __ subptr(rsp, extraspace); duke@435: duke@435: // Now write the args into the outgoing interpreter space duke@435: for (int i = 0; i < total_args_passed; i++) { duke@435: if (sig_bt[i] == T_VOID) { duke@435: assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); duke@435: continue; duke@435: } duke@435: duke@435: // st_off points to lowest address on stack. twisti@1861: int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize; twisti@1861: int next_off = st_off - Interpreter::stackElementSize; never@739: duke@435: // Say 4 args: duke@435: // i st_off duke@435: // 0 12 T_LONG duke@435: // 1 8 T_VOID duke@435: // 2 4 T_OBJECT duke@435: // 3 0 T_BOOL duke@435: VMReg r_1 = regs[i].first(); duke@435: VMReg r_2 = regs[i].second(); duke@435: if (!r_1->is_valid()) { duke@435: assert(!r_2->is_valid(), ""); duke@435: continue; duke@435: } duke@435: duke@435: if (r_1->is_stack()) { duke@435: // memory to memory use fpu stack top duke@435: int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; duke@435: duke@435: if (!r_2->is_valid()) { duke@435: __ movl(rdi, Address(rsp, ld_off)); never@739: __ movptr(Address(rsp, st_off), rdi); duke@435: } else { duke@435: duke@435: // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW duke@435: // st_off == MSW, st_off-wordSize == LSW duke@435: never@739: __ movptr(rdi, Address(rsp, ld_off)); never@739: __ movptr(Address(rsp, next_off), rdi); never@739: #ifndef _LP64 never@739: __ movptr(rdi, Address(rsp, ld_off + wordSize)); never@739: __ movptr(Address(rsp, st_off), rdi); never@739: #else never@739: #ifdef ASSERT never@739: // Overwrite the unused slot with known junk never@739: __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); never@739: __ movptr(Address(rsp, st_off), rax); never@739: #endif /* ASSERT */ never@739: #endif // _LP64 duke@435: } duke@435: } else if (r_1->is_Register()) { duke@435: Register r = r_1->as_Register(); duke@435: if (!r_2->is_valid()) { duke@435: __ movl(Address(rsp, st_off), r); duke@435: } else { duke@435: // long/double in gpr never@739: NOT_LP64(ShouldNotReachHere()); never@739: // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG never@739: // T_DOUBLE and T_LONG use two slots in the interpreter never@739: if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { never@739: // long/double in gpr never@739: #ifdef ASSERT never@739: // Overwrite the unused slot with known junk never@739: LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab))); never@739: __ movptr(Address(rsp, st_off), rax); never@739: #endif /* ASSERT */ never@739: __ movptr(Address(rsp, next_off), r); never@739: } else { never@739: __ movptr(Address(rsp, st_off), r); never@739: } duke@435: } duke@435: } else { duke@435: assert(r_1->is_XMMRegister(), ""); duke@435: if (!r_2->is_valid()) { duke@435: __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); duke@435: } else { duke@435: assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type"); duke@435: move_c2i_double(masm, r_1->as_XMMRegister(), st_off); duke@435: } duke@435: } duke@435: } duke@435: duke@435: // Schedule the branch target address early. coleenp@4037: __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset()))); duke@435: // And repush original return address never@739: __ push(rax); duke@435: __ jmp(rcx); duke@435: } duke@435: duke@435: duke@435: static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) { twisti@1861: int next_val_off = ld_off - Interpreter::stackElementSize; twisti@1861: __ movdbl(r, Address(saved_sp, next_val_off)); duke@435: } duke@435: twisti@3969: static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, twisti@3969: address code_start, address code_end, twisti@3969: Label& L_ok) { twisti@3969: Label L_fail; twisti@3969: __ lea(temp_reg, ExternalAddress(code_start)); twisti@3969: __ cmpptr(pc_reg, temp_reg); twisti@3969: __ jcc(Assembler::belowEqual, L_fail); twisti@3969: __ lea(temp_reg, ExternalAddress(code_end)); twisti@3969: __ cmpptr(pc_reg, temp_reg); twisti@3969: __ jcc(Assembler::below, L_ok); twisti@3969: __ bind(L_fail); twisti@3969: } twisti@3969: duke@435: static void gen_i2c_adapter(MacroAssembler *masm, duke@435: int total_args_passed, duke@435: int comp_args_on_stack, duke@435: const BasicType *sig_bt, duke@435: const VMRegPair *regs) { duke@435: duke@435: // Note: rsi contains the senderSP on entry. We must preserve it since duke@435: // we may do a i2c -> c2i transition if we lose a race where compiled duke@435: // code goes non-entrant while we get args ready. duke@435: twisti@3969: // Adapters can be frameless because they do not require the caller twisti@3969: // to perform additional cleanup work, such as correcting the stack pointer. twisti@3969: // An i2c adapter is frameless because the *caller* frame, which is interpreted, twisti@3969: // routinely repairs its own stack pointer (from interpreter_frame_last_sp), twisti@3969: // even if a callee has modified the stack pointer. twisti@3969: // A c2i adapter is frameless because the *callee* frame, which is interpreted, twisti@3969: // routinely repairs its caller's stack pointer (from sender_sp, which is set twisti@3969: // up via the senderSP register). twisti@3969: // In other words, if *either* the caller or callee is interpreted, we can twisti@3969: // get the stack pointer repaired after a call. twisti@3969: // This is why c2i and i2c adapters cannot be indefinitely composed. twisti@3969: // In particular, if a c2i adapter were to somehow call an i2c adapter, twisti@3969: // both caller and callee would be compiled methods, and neither would twisti@3969: // clean up the stack pointer changes performed by the two adapters. twisti@3969: // If this happens, control eventually transfers back to the compiled twisti@3969: // caller, but with an uncorrected stack, causing delayed havoc. twisti@3969: duke@435: // Pick up the return address never@739: __ movptr(rax, Address(rsp, 0)); duke@435: twisti@3969: if (VerifyAdapterCalls && twisti@3969: (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { twisti@3969: // So, let's test for cascading c2i/i2c adapters right now. twisti@3969: // assert(Interpreter::contains($return_addr) || twisti@3969: // StubRoutines::contains($return_addr), twisti@3969: // "i2c adapter must return to an interpreter frame"); twisti@3969: __ block_comment("verify_i2c { "); twisti@3969: Label L_ok; twisti@3969: if (Interpreter::code() != NULL) twisti@3969: range_check(masm, rax, rdi, twisti@3969: Interpreter::code()->code_start(), Interpreter::code()->code_end(), twisti@3969: L_ok); twisti@3969: if (StubRoutines::code1() != NULL) twisti@3969: range_check(masm, rax, rdi, twisti@3969: StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), twisti@3969: L_ok); twisti@3969: if (StubRoutines::code2() != NULL) twisti@3969: range_check(masm, rax, rdi, twisti@3969: StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), twisti@3969: L_ok); twisti@3969: const char* msg = "i2c adapter must return to an interpreter frame"; twisti@3969: __ block_comment(msg); twisti@3969: __ stop(msg); twisti@3969: __ bind(L_ok); twisti@3969: __ block_comment("} verify_i2ce "); twisti@3969: } twisti@3969: duke@435: // Must preserve original SP for loading incoming arguments because duke@435: // we need to align the outgoing SP for compiled code. never@739: __ movptr(rdi, rsp); duke@435: duke@435: // Cut-out for having no stack args. Since up to 2 int/oop args are passed duke@435: // in registers, we will occasionally have no stack args. duke@435: int comp_words_on_stack = 0; duke@435: if (comp_args_on_stack) { duke@435: // Sig words on the stack are greater-than VMRegImpl::stack0. Those in duke@435: // registers are below. By subtracting stack0, we either get a negative duke@435: // number (all values in registers) or the maximum stack slot accessed. duke@435: // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg); duke@435: // Convert 4-byte stack slots to words. duke@435: comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord; duke@435: // Round up to miminum stack alignment, in wordSize duke@435: comp_words_on_stack = round_to(comp_words_on_stack, 2); never@739: __ subptr(rsp, comp_words_on_stack * wordSize); duke@435: } duke@435: duke@435: // Align the outgoing SP never@739: __ andptr(rsp, -(StackAlignmentInBytes)); duke@435: duke@435: // push the return address on the stack (note that pushing, rather duke@435: // than storing it, yields the correct frame alignment for the callee) never@739: __ push(rax); duke@435: duke@435: // Put saved SP in another register duke@435: const Register saved_sp = rax; never@739: __ movptr(saved_sp, rdi); duke@435: duke@435: duke@435: // Will jump to the compiled code just as if compiled code was doing it. duke@435: // Pre-load the register-jump target early, to schedule it better. coleenp@4037: __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset()))); duke@435: duke@435: // Now generate the shuffle code. Pick up all register args and move the duke@435: // rest through the floating point stack top. duke@435: for (int i = 0; i < total_args_passed; i++) { duke@435: if (sig_bt[i] == T_VOID) { duke@435: // Longs and doubles are passed in native word order, but misaligned duke@435: // in the 32-bit build. duke@435: assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); duke@435: continue; duke@435: } duke@435: duke@435: // Pick up 0, 1 or 2 words from SP+offset. duke@435: duke@435: assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), duke@435: "scrambled load targets?"); duke@435: // Load in argument order going down. twisti@1861: int ld_off = (total_args_passed - i) * Interpreter::stackElementSize; duke@435: // Point to interpreter value (vs. tag) twisti@1861: int next_off = ld_off - Interpreter::stackElementSize; duke@435: // duke@435: // duke@435: // duke@435: VMReg r_1 = regs[i].first(); duke@435: VMReg r_2 = regs[i].second(); duke@435: if (!r_1->is_valid()) { duke@435: assert(!r_2->is_valid(), ""); duke@435: continue; duke@435: } duke@435: if (r_1->is_stack()) { duke@435: // Convert stack slot to an SP offset (+ wordSize to account for return address ) duke@435: int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; duke@435: duke@435: // We can use rsi as a temp here because compiled code doesn't need rsi as an input duke@435: // and if we end up going thru a c2i because of a miss a reasonable value of rsi duke@435: // we be generated. duke@435: if (!r_2->is_valid()) { duke@435: // __ fld_s(Address(saved_sp, ld_off)); duke@435: // __ fstp_s(Address(rsp, st_off)); duke@435: __ movl(rsi, Address(saved_sp, ld_off)); never@739: __ movptr(Address(rsp, st_off), rsi); duke@435: } else { duke@435: // Interpreter local[n] == MSW, local[n+1] == LSW however locals duke@435: // are accessed as negative so LSW is at LOW address duke@435: duke@435: // ld_off is MSW so get LSW duke@435: // st_off is LSW (i.e. reg.first()) duke@435: // __ fld_d(Address(saved_sp, next_off)); duke@435: // __ fstp_d(Address(rsp, st_off)); never@739: // never@739: // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE never@739: // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case never@739: // So we must adjust where to pick up the data to match the interpreter. never@739: // never@739: // Interpreter local[n] == MSW, local[n+1] == LSW however locals never@739: // are accessed as negative so LSW is at LOW address never@739: never@739: // ld_off is MSW so get LSW never@739: const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? never@739: next_off : ld_off; never@739: __ movptr(rsi, Address(saved_sp, offset)); never@739: __ movptr(Address(rsp, st_off), rsi); never@739: #ifndef _LP64 never@739: __ movptr(rsi, Address(saved_sp, ld_off)); never@739: __ movptr(Address(rsp, st_off + wordSize), rsi); never@739: #endif // _LP64 duke@435: } duke@435: } else if (r_1->is_Register()) { // Register argument duke@435: Register r = r_1->as_Register(); duke@435: assert(r != rax, "must be different"); duke@435: if (r_2->is_valid()) { never@739: // never@739: // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE never@739: // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case never@739: // So we must adjust where to pick up the data to match the interpreter. never@739: never@739: const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? never@739: next_off : ld_off; never@739: never@739: // this can be a misaligned move never@739: __ movptr(r, Address(saved_sp, offset)); never@739: #ifndef _LP64 duke@435: assert(r_2->as_Register() != rax, "need another temporary register"); duke@435: // Remember r_1 is low address (and LSB on x86) duke@435: // So r_2 gets loaded from high address regardless of the platform never@739: __ movptr(r_2->as_Register(), Address(saved_sp, ld_off)); never@739: #endif // _LP64 duke@435: } else { duke@435: __ movl(r, Address(saved_sp, ld_off)); duke@435: } duke@435: } else { duke@435: assert(r_1->is_XMMRegister(), ""); duke@435: if (!r_2->is_valid()) { duke@435: __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); duke@435: } else { duke@435: move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off); duke@435: } duke@435: } duke@435: } duke@435: duke@435: // 6243940 We might end up in handle_wrong_method if duke@435: // the callee is deoptimized as we race thru here. If that duke@435: // happens we don't want to take a safepoint because the duke@435: // caller frame will look interpreted and arguments are now duke@435: // "compiled" so it is much better to make this transition duke@435: // invisible to the stack walking code. Unfortunately if duke@435: // we try and find the callee by normal means a safepoint duke@435: // is possible. So we stash the desired callee in the thread duke@435: // and the vm will find there should this case occur. duke@435: duke@435: __ get_thread(rax); never@739: __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx); duke@435: coleenp@4037: // move Method* to rax, in case we end up in an c2i adapter. coleenp@4037: // the c2i adapters expect Method* in rax, (c2) because c2's duke@435: // resolve stubs return the result (the method) in rax,. duke@435: // I'd love to fix this. never@739: __ mov(rax, rbx); duke@435: duke@435: __ jmp(rdi); duke@435: } duke@435: duke@435: // --------------------------------------------------------------- duke@435: AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, duke@435: int total_args_passed, duke@435: int comp_args_on_stack, duke@435: const BasicType *sig_bt, never@1622: const VMRegPair *regs, never@1622: AdapterFingerPrint* fingerprint) { duke@435: address i2c_entry = __ pc(); duke@435: duke@435: gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); duke@435: duke@435: // ------------------------------------------------------------------------- coleenp@4037: // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls duke@435: // to the interpreter. The args start out packed in the compiled layout. They duke@435: // need to be unpacked into the interpreter layout. This will almost always duke@435: // require some stack space. We grow the current (compiled) stack, then repack duke@435: // the args. We finally end in a jump to the generic interpreter entry point. duke@435: // On exit from the interpreter, the interpreter will restore our SP (lest the duke@435: // compiled code, which relys solely on SP and not EBP, get sick). duke@435: duke@435: address c2i_unverified_entry = __ pc(); duke@435: Label skip_fixup; duke@435: duke@435: Register holder = rax; duke@435: Register receiver = rcx; duke@435: Register temp = rbx; duke@435: duke@435: { duke@435: duke@435: Label missed; never@739: __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes())); coleenp@4037: __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset())); coleenp@4037: __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset())); duke@435: __ jcc(Assembler::notEqual, missed); duke@435: // Method might have been compiled since the call site was patched to duke@435: // interpreted if that is the case treat it as a miss so we can get duke@435: // the call site corrected. coleenp@4037: __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); duke@435: __ jcc(Assembler::equal, skip_fixup); duke@435: duke@435: __ bind(missed); duke@435: __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); duke@435: } duke@435: duke@435: address c2i_entry = __ pc(); duke@435: duke@435: gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); duke@435: duke@435: __ flush(); never@1622: return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); duke@435: } duke@435: duke@435: int SharedRuntime::c_calling_convention(const BasicType *sig_bt, duke@435: VMRegPair *regs, duke@435: int total_args_passed) { duke@435: // We return the amount of VMRegImpl stack slots we need to reserve for all duke@435: // the arguments NOT counting out_preserve_stack_slots. duke@435: duke@435: uint stack = 0; // All arguments on stack duke@435: duke@435: for( int i = 0; i < total_args_passed; i++) { duke@435: // From the type and the argument number (count) compute the location duke@435: switch( sig_bt[i] ) { duke@435: case T_BOOLEAN: duke@435: case T_CHAR: duke@435: case T_FLOAT: duke@435: case T_BYTE: duke@435: case T_SHORT: duke@435: case T_INT: duke@435: case T_OBJECT: duke@435: case T_ARRAY: duke@435: case T_ADDRESS: roland@4051: case T_METADATA: duke@435: regs[i].set1(VMRegImpl::stack2reg(stack++)); duke@435: break; duke@435: case T_LONG: duke@435: case T_DOUBLE: // The stack numbering is reversed from Java duke@435: // Since C arguments do not get reversed, the ordering for duke@435: // doubles on the stack must be opposite the Java convention duke@435: assert(sig_bt[i+1] == T_VOID, "missing Half" ); duke@435: regs[i].set2(VMRegImpl::stack2reg(stack)); duke@435: stack += 2; duke@435: break; duke@435: case T_VOID: regs[i].set_bad(); break; duke@435: default: duke@435: ShouldNotReachHere(); duke@435: break; duke@435: } duke@435: } duke@435: return stack; duke@435: } duke@435: duke@435: // A simple move of integer like type duke@435: static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { duke@435: if (src.first()->is_stack()) { duke@435: if (dst.first()->is_stack()) { duke@435: // stack to stack duke@435: // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); duke@435: // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); never@739: __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first()))); never@739: __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); duke@435: } else { duke@435: // stack to reg never@739: __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); duke@435: } duke@435: } else if (dst.first()->is_stack()) { duke@435: // reg to stack never@739: // no need to sign extend on 64bit never@739: __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); duke@435: } else { never@739: if (dst.first() != src.first()) { never@739: __ mov(dst.first()->as_Register(), src.first()->as_Register()); never@739: } duke@435: } duke@435: } duke@435: duke@435: // An oop arg. Must pass a handle not the oop itself duke@435: static void object_move(MacroAssembler* masm, duke@435: OopMap* map, duke@435: int oop_handle_offset, duke@435: int framesize_in_slots, duke@435: VMRegPair src, duke@435: VMRegPair dst, duke@435: bool is_receiver, duke@435: int* receiver_offset) { duke@435: duke@435: // Because of the calling conventions we know that src can be a duke@435: // register or a stack location. dst can only be a stack location. duke@435: duke@435: assert(dst.first()->is_stack(), "must be stack"); duke@435: // must pass a handle. First figure out the location we use as a handle duke@435: duke@435: if (src.first()->is_stack()) { duke@435: // Oop is already on the stack as an argument duke@435: Register rHandle = rax; duke@435: Label nil; never@739: __ xorptr(rHandle, rHandle); never@739: __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); duke@435: __ jcc(Assembler::equal, nil); never@739: __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); duke@435: __ bind(nil); never@739: __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); duke@435: duke@435: int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); duke@435: map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); duke@435: if (is_receiver) { duke@435: *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; duke@435: } duke@435: } else { duke@435: // Oop is in an a register we must store it to the space we reserve duke@435: // on the stack for oop_handles duke@435: const Register rOop = src.first()->as_Register(); duke@435: const Register rHandle = rax; duke@435: int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset; duke@435: int offset = oop_slot*VMRegImpl::stack_slot_size; duke@435: Label skip; never@739: __ movptr(Address(rsp, offset), rOop); duke@435: map->set_oop(VMRegImpl::stack2reg(oop_slot)); never@739: __ xorptr(rHandle, rHandle); never@739: __ cmpptr(rOop, (int32_t)NULL_WORD); duke@435: __ jcc(Assembler::equal, skip); never@739: __ lea(rHandle, Address(rsp, offset)); duke@435: __ bind(skip); duke@435: // Store the handle parameter never@739: __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); duke@435: if (is_receiver) { duke@435: *receiver_offset = offset; duke@435: } duke@435: } duke@435: } duke@435: duke@435: // A float arg may have to do float reg int reg conversion duke@435: static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { duke@435: assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); duke@435: duke@435: // Because of the calling convention we know that src is either a stack location duke@435: // or an xmm register. dst can only be a stack location. duke@435: duke@435: assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters"); duke@435: duke@435: if (src.first()->is_stack()) { duke@435: __ movl(rax, Address(rbp, reg2offset_in(src.first()))); never@739: __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); duke@435: } else { duke@435: // reg to stack duke@435: __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); duke@435: } duke@435: } duke@435: duke@435: // A long move duke@435: static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { duke@435: duke@435: // The only legal possibility for a long_move VMRegPair is: duke@435: // 1: two stack slots (possibly unaligned) duke@435: // as neither the java or C calling convention will use registers duke@435: // for longs. duke@435: duke@435: if (src.first()->is_stack() && dst.first()->is_stack()) { duke@435: assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack"); never@739: __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); never@739: NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second())))); never@739: __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); never@739: NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx)); duke@435: } else { duke@435: ShouldNotReachHere(); duke@435: } duke@435: } duke@435: duke@435: // A double move duke@435: static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { duke@435: duke@435: // The only legal possibilities for a double_move VMRegPair are: duke@435: // The painful thing here is that like long_move a VMRegPair might be duke@435: duke@435: // Because of the calling convention we know that src is either duke@435: // 1: a single physical register (xmm registers only) duke@435: // 2: two stack slots (possibly unaligned) duke@435: // dst can only be a pair of stack slots. duke@435: duke@435: assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args"); duke@435: duke@435: if (src.first()->is_stack()) { duke@435: // source is all stack never@739: __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); never@739: NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second())))); never@739: __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); never@739: NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx)); duke@435: } else { duke@435: // reg to stack duke@435: // No worries about stack alignment duke@435: __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); duke@435: } duke@435: } duke@435: duke@435: duke@435: void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { duke@435: // We always ignore the frame_slots arg and just use the space just below frame pointer duke@435: // which by this time is free to use duke@435: switch (ret_type) { duke@435: case T_FLOAT: duke@435: __ fstp_s(Address(rbp, -wordSize)); duke@435: break; duke@435: case T_DOUBLE: duke@435: __ fstp_d(Address(rbp, -2*wordSize)); duke@435: break; duke@435: case T_VOID: break; duke@435: case T_LONG: never@739: __ movptr(Address(rbp, -wordSize), rax); never@739: NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx)); duke@435: break; duke@435: default: { never@739: __ movptr(Address(rbp, -wordSize), rax); duke@435: } duke@435: } duke@435: } duke@435: duke@435: void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { duke@435: // We always ignore the frame_slots arg and just use the space just below frame pointer duke@435: // which by this time is free to use duke@435: switch (ret_type) { duke@435: case T_FLOAT: duke@435: __ fld_s(Address(rbp, -wordSize)); duke@435: break; duke@435: case T_DOUBLE: duke@435: __ fld_d(Address(rbp, -2*wordSize)); duke@435: break; duke@435: case T_LONG: never@739: __ movptr(rax, Address(rbp, -wordSize)); never@739: NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize))); duke@435: break; duke@435: case T_VOID: break; duke@435: default: { never@739: __ movptr(rax, Address(rbp, -wordSize)); duke@435: } duke@435: } duke@435: } duke@435: never@3500: never@3500: static void save_or_restore_arguments(MacroAssembler* masm, never@3500: const int stack_slots, never@3500: const int total_in_args, never@3500: const int arg_save_area, never@3500: OopMap* map, never@3500: VMRegPair* in_regs, never@3500: BasicType* in_sig_bt) { never@3500: // if map is non-NULL then the code should store the values, never@3500: // otherwise it should load them. never@3500: int handle_index = 0; never@3500: // Save down double word first never@3500: for ( int i = 0; i < total_in_args; i++) { never@3500: if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { never@3500: int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area; never@3500: int offset = slot * VMRegImpl::stack_slot_size; never@3500: handle_index += 2; never@3500: assert(handle_index <= stack_slots, "overflow"); never@3500: if (map != NULL) { never@3500: __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); never@3500: } else { never@3500: __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); never@3500: } never@3500: } never@3500: if (in_regs[i].first()->is_Register() && in_sig_bt[i] == T_LONG) { never@3500: int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area; never@3500: int offset = slot * VMRegImpl::stack_slot_size; never@3500: handle_index += 2; never@3500: assert(handle_index <= stack_slots, "overflow"); never@3500: if (map != NULL) { never@3500: __ movl(Address(rsp, offset), in_regs[i].first()->as_Register()); never@3500: if (in_regs[i].second()->is_Register()) { never@3500: __ movl(Address(rsp, offset + 4), in_regs[i].second()->as_Register()); never@3500: } never@3500: } else { never@3500: __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset)); never@3500: if (in_regs[i].second()->is_Register()) { never@3500: __ movl(in_regs[i].second()->as_Register(), Address(rsp, offset + 4)); never@3500: } never@3500: } never@3500: } never@3500: } never@3500: // Save or restore single word registers never@3500: for ( int i = 0; i < total_in_args; i++) { never@3500: if (in_regs[i].first()->is_Register()) { never@3500: int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area; never@3500: int offset = slot * VMRegImpl::stack_slot_size; never@3500: assert(handle_index <= stack_slots, "overflow"); never@3500: if (in_sig_bt[i] == T_ARRAY && map != NULL) { never@3500: map->set_oop(VMRegImpl::stack2reg(slot));; never@3500: } never@3500: never@3500: // Value is in an input register pass we must flush it to the stack never@3500: const Register reg = in_regs[i].first()->as_Register(); never@3500: switch (in_sig_bt[i]) { never@3500: case T_ARRAY: never@3500: if (map != NULL) { never@3500: __ movptr(Address(rsp, offset), reg); never@3500: } else { never@3500: __ movptr(reg, Address(rsp, offset)); never@3500: } never@3500: break; never@3500: case T_BOOLEAN: never@3500: case T_CHAR: never@3500: case T_BYTE: never@3500: case T_SHORT: never@3500: case T_INT: never@3500: if (map != NULL) { never@3500: __ movl(Address(rsp, offset), reg); never@3500: } else { never@3500: __ movl(reg, Address(rsp, offset)); never@3500: } never@3500: break; never@3500: case T_OBJECT: never@3500: default: ShouldNotReachHere(); never@3500: } never@3500: } else if (in_regs[i].first()->is_XMMRegister()) { never@3500: if (in_sig_bt[i] == T_FLOAT) { never@3500: int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area; never@3500: int offset = slot * VMRegImpl::stack_slot_size; never@3500: assert(handle_index <= stack_slots, "overflow"); never@3500: if (map != NULL) { never@3500: __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); never@3500: } else { never@3500: __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); never@3500: } never@3500: } never@3500: } else if (in_regs[i].first()->is_stack()) { never@3500: if (in_sig_bt[i] == T_ARRAY && map != NULL) { never@3500: int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); never@3500: map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); never@3500: } never@3500: } never@3500: } never@3500: } never@3500: never@3500: // Check GC_locker::needs_gc and enter the runtime if it's true. This never@3500: // keeps a new JNI critical region from starting until a GC has been never@3500: // forced. Save down any oops in registers and describe them in an never@3500: // OopMap. never@3500: static void check_needs_gc_for_critical_native(MacroAssembler* masm, never@3500: Register thread, never@3500: int stack_slots, never@3500: int total_c_args, never@3500: int total_in_args, never@3500: int arg_save_area, never@3500: OopMapSet* oop_maps, never@3500: VMRegPair* in_regs, never@3500: BasicType* in_sig_bt) { never@3500: __ block_comment("check GC_locker::needs_gc"); never@3500: Label cont; never@3500: __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false); never@3500: __ jcc(Assembler::equal, cont); never@3500: never@3500: // Save down any incoming oops and call into the runtime to halt for a GC never@3500: never@3500: OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); never@3500: never@3500: save_or_restore_arguments(masm, stack_slots, total_in_args, never@3500: arg_save_area, map, in_regs, in_sig_bt); never@3500: never@3500: address the_pc = __ pc(); never@3500: oop_maps->add_gc_map( __ offset(), map); never@3500: __ set_last_Java_frame(thread, rsp, noreg, the_pc); never@3500: never@3500: __ block_comment("block_for_jni_critical"); never@3500: __ push(thread); never@3500: __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); never@3500: __ increment(rsp, wordSize); never@3500: never@3500: __ get_thread(thread); never@3500: __ reset_last_Java_frame(thread, false, true); never@3500: never@3500: save_or_restore_arguments(masm, stack_slots, total_in_args, never@3500: arg_save_area, NULL, in_regs, in_sig_bt); never@3500: never@3500: __ bind(cont); never@3500: #ifdef ASSERT never@3500: if (StressCriticalJNINatives) { never@3500: // Stress register saving never@3500: OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); never@3500: save_or_restore_arguments(masm, stack_slots, total_in_args, never@3500: arg_save_area, map, in_regs, in_sig_bt); never@3500: // Destroy argument registers never@3500: for (int i = 0; i < total_in_args - 1; i++) { never@3500: if (in_regs[i].first()->is_Register()) { never@3500: const Register reg = in_regs[i].first()->as_Register(); never@3500: __ xorptr(reg, reg); never@3500: } else if (in_regs[i].first()->is_XMMRegister()) { never@3500: __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); never@3500: } else if (in_regs[i].first()->is_FloatRegister()) { never@3500: ShouldNotReachHere(); never@3500: } else if (in_regs[i].first()->is_stack()) { never@3500: // Nothing to do never@3500: } else { never@3500: ShouldNotReachHere(); never@3500: } never@3500: if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { never@3500: i++; never@3500: } never@3500: } never@3500: never@3500: save_or_restore_arguments(masm, stack_slots, total_in_args, never@3500: arg_save_area, NULL, in_regs, in_sig_bt); never@3500: } never@3500: #endif never@3500: } never@3500: never@3500: // Unpack an array argument into a pointer to the body and the length never@3500: // if the array is non-null, otherwise pass 0 for both. never@3500: static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { never@3500: Register tmp_reg = rax; never@3500: assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, never@3500: "possible collision"); never@3500: assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, never@3500: "possible collision"); never@3500: never@3500: // Pass the length, ptr pair never@3500: Label is_null, done; never@3500: VMRegPair tmp(tmp_reg->as_VMReg()); never@3500: if (reg.first()->is_stack()) { never@3500: // Load the arg up from the stack never@3500: simple_move32(masm, reg, tmp); never@3500: reg = tmp; never@3500: } never@3500: __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); never@3500: __ jccb(Assembler::equal, is_null); never@3500: __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); never@3500: simple_move32(masm, tmp, body_arg); never@3500: // load the length relative to the body. never@3500: __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - never@3500: arrayOopDesc::base_offset_in_bytes(in_elem_type))); never@3500: simple_move32(masm, tmp, length_arg); never@3500: __ jmpb(done); never@3500: __ bind(is_null); never@3500: // Pass zeros never@3500: __ xorptr(tmp_reg, tmp_reg); never@3500: simple_move32(masm, tmp, body_arg); never@3500: simple_move32(masm, tmp, length_arg); never@3500: __ bind(done); never@3500: } never@3500: twisti@3969: static void verify_oop_args(MacroAssembler* masm, twisti@3969: int total_args_passed, twisti@3969: const BasicType* sig_bt, twisti@3969: const VMRegPair* regs) { twisti@3969: Register temp_reg = rbx; // not part of any compiled calling seq twisti@3969: if (VerifyOops) { twisti@3969: for (int i = 0; i < total_args_passed; i++) { twisti@3969: if (sig_bt[i] == T_OBJECT || twisti@3969: sig_bt[i] == T_ARRAY) { twisti@3969: VMReg r = regs[i].first(); twisti@3969: assert(r->is_valid(), "bad oop arg"); twisti@3969: if (r->is_stack()) { twisti@3969: __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); twisti@3969: __ verify_oop(temp_reg); twisti@3969: } else { twisti@3969: __ verify_oop(r->as_Register()); twisti@3969: } twisti@3969: } twisti@3969: } twisti@3969: } twisti@3969: } twisti@3969: twisti@3969: static void gen_special_dispatch(MacroAssembler* masm, twisti@3969: int total_args_passed, twisti@3969: int comp_args_on_stack, twisti@3969: vmIntrinsics::ID special_dispatch, twisti@3969: const BasicType* sig_bt, twisti@3969: const VMRegPair* regs) { twisti@3969: verify_oop_args(masm, total_args_passed, sig_bt, regs); twisti@3969: twisti@3969: // Now write the args into the outgoing interpreter space twisti@3969: bool has_receiver = false; twisti@3969: Register receiver_reg = noreg; twisti@3969: int member_arg_pos = -1; twisti@3969: Register member_reg = noreg; twisti@3969: int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(special_dispatch); twisti@3969: if (ref_kind != 0) { twisti@3969: member_arg_pos = total_args_passed - 1; // trailing MemberName argument twisti@3969: member_reg = rbx; // known to be free at this point twisti@3969: has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); twisti@3969: } else if (special_dispatch == vmIntrinsics::_invokeBasic) { twisti@3969: has_receiver = true; twisti@3969: } else { twisti@3969: guarantee(false, err_msg("special_dispatch=%d", special_dispatch)); twisti@3969: } twisti@3969: twisti@3969: if (member_reg != noreg) { twisti@3969: // Load the member_arg into register, if necessary. twisti@3969: assert(member_arg_pos >= 0 && member_arg_pos < total_args_passed, "oob"); twisti@3969: assert(sig_bt[member_arg_pos] == T_OBJECT, "dispatch argument must be an object"); twisti@3969: VMReg r = regs[member_arg_pos].first(); twisti@3969: assert(r->is_valid(), "bad member arg"); twisti@3969: if (r->is_stack()) { twisti@3969: __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); twisti@3969: } else { twisti@3969: // no data motion is needed twisti@3969: member_reg = r->as_Register(); twisti@3969: } twisti@3969: } twisti@3969: twisti@3969: if (has_receiver) { twisti@3969: // Make sure the receiver is loaded into a register. twisti@3969: assert(total_args_passed > 0, "oob"); twisti@3969: assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); twisti@3969: VMReg r = regs[0].first(); twisti@3969: assert(r->is_valid(), "bad receiver arg"); twisti@3969: if (r->is_stack()) { twisti@3969: // Porting note: This assumes that compiled calling conventions always twisti@3969: // pass the receiver oop in a register. If this is not true on some twisti@3969: // platform, pick a temp and load the receiver from stack. twisti@3969: assert(false, "receiver always in a register"); twisti@3969: receiver_reg = rcx; // known to be free at this point twisti@3969: __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); twisti@3969: } else { twisti@3969: // no data motion is needed twisti@3969: receiver_reg = r->as_Register(); twisti@3969: } twisti@3969: } twisti@3969: twisti@3969: // Figure out which address we are really jumping to: twisti@3969: MethodHandles::generate_method_handle_dispatch(masm, special_dispatch, twisti@3969: receiver_reg, member_reg, /*for_compiler_entry:*/ true); twisti@3969: } never@3500: duke@435: // --------------------------------------------------------------------------- duke@435: // Generate a native wrapper for a given method. The method takes arguments duke@435: // in the Java compiled code convention, marshals them to the native duke@435: // convention (handlizes oops, etc), transitions to native, makes the call, duke@435: // returns to java state (possibly blocking), unhandlizes any result and duke@435: // returns. never@3500: // never@3500: // Critical native functions are a shorthand for the use of never@3500: // GetPrimtiveArrayCritical and disallow the use of any other JNI never@3500: // functions. The wrapper is expected to unpack the arguments before never@3500: // passing them to the callee and perform checks before and after the never@3500: // native call to ensure that they GC_locker never@3500: // lock_critical/unlock_critical semantics are followed. Some other never@3500: // parts of JNI setup are skipped like the tear down of the JNI handle never@3500: // block and the check for pending exceptions it's impossible for them never@3500: // to be thrown. never@3500: // never@3500: // They are roughly structured like this: never@3500: // if (GC_locker::needs_gc()) never@3500: // SharedRuntime::block_for_jni_critical(); never@3500: // tranistion to thread_in_native never@3500: // unpack arrray arguments and call native entry point never@3500: // check for safepoint in progress never@3500: // check if any thread suspend flags are set never@3500: // call into JVM and possible unlock the JNI critical never@3500: // if a GC was suppressed while in the critical native. never@3500: // transition back to thread_in_Java never@3500: // return to caller never@3500: // twisti@3969: nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, duke@435: methodHandle method, twisti@2687: int compile_id, duke@435: int total_in_args, duke@435: int comp_args_on_stack, twisti@3969: BasicType* in_sig_bt, twisti@3969: VMRegPair* in_regs, duke@435: BasicType ret_type) { twisti@3969: if (method->is_method_handle_intrinsic()) { twisti@3969: vmIntrinsics::ID iid = method->intrinsic_id(); twisti@3969: intptr_t start = (intptr_t)__ pc(); twisti@3969: int vep_offset = ((intptr_t)__ pc()) - start; twisti@3969: gen_special_dispatch(masm, twisti@3969: total_in_args, twisti@3969: comp_args_on_stack, twisti@3969: method->intrinsic_id(), twisti@3969: in_sig_bt, twisti@3969: in_regs); twisti@3969: int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period twisti@3969: __ flush(); twisti@3969: int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually twisti@3969: return nmethod::new_native_nmethod(method, twisti@3969: compile_id, twisti@3969: masm->code(), twisti@3969: vep_offset, twisti@3969: frame_complete, twisti@3969: stack_slots / VMRegImpl::slots_per_word, twisti@3969: in_ByteSize(-1), twisti@3969: in_ByteSize(-1), twisti@3969: (OopMapSet*)NULL); twisti@3969: } never@3500: bool is_critical_native = true; never@3500: address native_func = method->critical_native_function(); never@3500: if (native_func == NULL) { never@3500: native_func = method->native_function(); never@3500: is_critical_native = false; never@3500: } never@3500: assert(native_func != NULL, "must have function"); duke@435: duke@435: // An OopMap for lock (and class if static) duke@435: OopMapSet *oop_maps = new OopMapSet(); duke@435: duke@435: // We have received a description of where all the java arg are located duke@435: // on entry to the wrapper. We need to convert these args to where duke@435: // the jni function will expect them. To figure out where they go duke@435: // we convert the java signature to a C signature by inserting duke@435: // the hidden arguments as arg[0] and possibly arg[1] (static method) duke@435: never@3500: int total_c_args = total_in_args; never@3500: if (!is_critical_native) { never@3500: total_c_args += 1; never@3500: if (method->is_static()) { never@3500: total_c_args++; never@3500: } never@3500: } else { never@3500: for (int i = 0; i < total_in_args; i++) { never@3500: if (in_sig_bt[i] == T_ARRAY) { never@3500: total_c_args++; never@3500: } never@3500: } duke@435: } duke@435: duke@435: BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); never@3500: VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); never@3500: BasicType* in_elem_bt = NULL; duke@435: duke@435: int argc = 0; never@3500: if (!is_critical_native) { never@3500: out_sig_bt[argc++] = T_ADDRESS; never@3500: if (method->is_static()) { never@3500: out_sig_bt[argc++] = T_OBJECT; never@3500: } never@3500: never@3500: for (int i = 0; i < total_in_args ; i++ ) { never@3500: out_sig_bt[argc++] = in_sig_bt[i]; never@3500: } never@3500: } else { never@3500: Thread* THREAD = Thread::current(); never@3500: in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); never@3500: SignatureStream ss(method->signature()); never@3500: for (int i = 0; i < total_in_args ; i++ ) { never@3500: if (in_sig_bt[i] == T_ARRAY) { never@3500: // Arrays are passed as int, elem* pair never@3500: out_sig_bt[argc++] = T_INT; never@3500: out_sig_bt[argc++] = T_ADDRESS; never@3500: Symbol* atype = ss.as_symbol(CHECK_NULL); never@3500: const char* at = atype->as_C_string(); never@3500: if (strlen(at) == 2) { never@3500: assert(at[0] == '[', "must be"); never@3500: switch (at[1]) { never@3500: case 'B': in_elem_bt[i] = T_BYTE; break; never@3500: case 'C': in_elem_bt[i] = T_CHAR; break; never@3500: case 'D': in_elem_bt[i] = T_DOUBLE; break; never@3500: case 'F': in_elem_bt[i] = T_FLOAT; break; never@3500: case 'I': in_elem_bt[i] = T_INT; break; never@3500: case 'J': in_elem_bt[i] = T_LONG; break; never@3500: case 'S': in_elem_bt[i] = T_SHORT; break; never@3500: case 'Z': in_elem_bt[i] = T_BOOLEAN; break; never@3500: default: ShouldNotReachHere(); never@3500: } never@3500: } never@3500: } else { never@3500: out_sig_bt[argc++] = in_sig_bt[i]; never@3500: in_elem_bt[i] = T_VOID; never@3500: } never@3500: if (in_sig_bt[i] != T_VOID) { never@3500: assert(in_sig_bt[i] == ss.type(), "must match"); never@3500: ss.next(); never@3500: } never@3500: } duke@435: } duke@435: duke@435: // Now figure out where the args must be stored and how much stack space never@3500: // they require. duke@435: int out_arg_slots; duke@435: out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); duke@435: duke@435: // Compute framesize for the wrapper. We need to handlize all oops in duke@435: // registers a max of 2 on x86. duke@435: duke@435: // Calculate the total number of stack slots we will need. duke@435: duke@435: // First count the abi requirement plus all of the outgoing args duke@435: int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; duke@435: duke@435: // Now the space for the inbound oop handle area never@3500: int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers never@3500: if (is_critical_native) { never@3500: // Critical natives may have to call out so they need a save area never@3500: // for register arguments. never@3500: int double_slots = 0; never@3500: int single_slots = 0; never@3500: for ( int i = 0; i < total_in_args; i++) { never@3500: if (in_regs[i].first()->is_Register()) { never@3500: const Register reg = in_regs[i].first()->as_Register(); never@3500: switch (in_sig_bt[i]) { twisti@3969: case T_ARRAY: // critical array (uses 2 slots on LP64) never@3500: case T_BOOLEAN: never@3500: case T_BYTE: never@3500: case T_SHORT: never@3500: case T_CHAR: never@3500: case T_INT: single_slots++; break; never@3500: case T_LONG: double_slots++; break; never@3500: default: ShouldNotReachHere(); never@3500: } never@3500: } else if (in_regs[i].first()->is_XMMRegister()) { never@3500: switch (in_sig_bt[i]) { never@3500: case T_FLOAT: single_slots++; break; never@3500: case T_DOUBLE: double_slots++; break; never@3500: default: ShouldNotReachHere(); never@3500: } never@3500: } else if (in_regs[i].first()->is_FloatRegister()) { never@3500: ShouldNotReachHere(); never@3500: } never@3500: } never@3500: total_save_slots = double_slots * 2 + single_slots; never@3500: // align the save area never@3500: if (double_slots != 0) { never@3500: stack_slots = round_to(stack_slots, 2); never@3500: } never@3500: } duke@435: duke@435: int oop_handle_offset = stack_slots; never@3500: stack_slots += total_save_slots; duke@435: duke@435: // Now any space we need for handlizing a klass if static method duke@435: duke@435: int klass_slot_offset = 0; duke@435: int klass_offset = -1; duke@435: int lock_slot_offset = 0; duke@435: bool is_static = false; duke@435: duke@435: if (method->is_static()) { duke@435: klass_slot_offset = stack_slots; duke@435: stack_slots += VMRegImpl::slots_per_word; duke@435: klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; duke@435: is_static = true; duke@435: } duke@435: duke@435: // Plus a lock if needed duke@435: duke@435: if (method->is_synchronized()) { duke@435: lock_slot_offset = stack_slots; duke@435: stack_slots += VMRegImpl::slots_per_word; duke@435: } duke@435: duke@435: // Now a place (+2) to save return values or temp during shuffling duke@435: // + 2 for return address (which we own) and saved rbp, duke@435: stack_slots += 4; duke@435: duke@435: // Ok The space we have allocated will look like: duke@435: // duke@435: // duke@435: // FP-> | | duke@435: // |---------------------| duke@435: // | 2 slots for moves | duke@435: // |---------------------| duke@435: // | lock box (if sync) | duke@435: // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset) duke@435: // | klass (if static) | duke@435: // |---------------------| <- klass_slot_offset duke@435: // | oopHandle area | duke@435: // |---------------------| <- oop_handle_offset (a max of 2 registers) duke@435: // | outbound memory | duke@435: // | based arguments | duke@435: // | | duke@435: // |---------------------| duke@435: // | | duke@435: // SP-> | out_preserved_slots | duke@435: // duke@435: // duke@435: // **************************************************************************** duke@435: // WARNING - on Windows Java Natives use pascal calling convention and pop the duke@435: // arguments off of the stack after the jni call. Before the call we can use duke@435: // instructions that are SP relative. After the jni call we switch to FP duke@435: // relative instructions instead of re-adjusting the stack on windows. duke@435: // **************************************************************************** duke@435: duke@435: duke@435: // Now compute actual number of stack words we need rounding to make duke@435: // stack properly aligned. xlu@959: stack_slots = round_to(stack_slots, StackAlignmentInSlots); duke@435: duke@435: int stack_size = stack_slots * VMRegImpl::stack_slot_size; duke@435: duke@435: intptr_t start = (intptr_t)__ pc(); duke@435: duke@435: // First thing make an ic check to see if we should even be here duke@435: duke@435: // We are free to use all registers as temps without saving them and never@3500: // restoring them except rbp. rbp is the only callee save register duke@435: // as far as the interpreter and the compiler(s) are concerned. duke@435: duke@435: duke@435: const Register ic_reg = rax; duke@435: const Register receiver = rcx; duke@435: Label hit; duke@435: Label exception_pending; duke@435: duke@435: __ verify_oop(receiver); never@739: __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); duke@435: __ jcc(Assembler::equal, hit); duke@435: duke@435: __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); duke@435: duke@435: // verified entry must be aligned for code patching. duke@435: // and the first 5 bytes must be in the same cache line duke@435: // if we align at 8 then we will be sure 5 bytes are in the same line duke@435: __ align(8); duke@435: duke@435: __ bind(hit); duke@435: duke@435: int vep_offset = ((intptr_t)__ pc()) - start; duke@435: duke@435: #ifdef COMPILER1 duke@435: if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) { duke@435: // Object.hashCode can pull the hashCode from the header word duke@435: // instead of doing a full VM transition once it's been computed. duke@435: // Since hashCode is usually polymorphic at call sites we can't do duke@435: // this optimization at the call site without a lot of work. duke@435: Label slowCase; duke@435: Register receiver = rcx; duke@435: Register result = rax; never@739: __ movptr(result, Address(receiver, oopDesc::mark_offset_in_bytes())); duke@435: duke@435: // check if locked never@739: __ testptr(result, markOopDesc::unlocked_value); duke@435: __ jcc (Assembler::zero, slowCase); duke@435: duke@435: if (UseBiasedLocking) { duke@435: // Check if biased and fall through to runtime if so never@739: __ testptr(result, markOopDesc::biased_lock_bit_in_place); duke@435: __ jcc (Assembler::notZero, slowCase); duke@435: } duke@435: duke@435: // get hash never@739: __ andptr(result, markOopDesc::hash_mask_in_place); duke@435: // test if hashCode exists duke@435: __ jcc (Assembler::zero, slowCase); never@739: __ shrptr(result, markOopDesc::hash_shift); duke@435: __ ret(0); duke@435: __ bind (slowCase); duke@435: } duke@435: #endif // COMPILER1 duke@435: duke@435: // The instruction at the verified entry point must be 5 bytes or longer duke@435: // because it can be patched on the fly by make_non_entrant. The stack bang duke@435: // instruction fits that requirement. duke@435: duke@435: // Generate stack overflow check duke@435: duke@435: if (UseStackBanging) { duke@435: __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); duke@435: } else { duke@435: // need a 5 byte instruction to allow MT safe patching to non-entrant duke@435: __ fat_nop(); duke@435: } duke@435: duke@435: // Generate a new frame for the wrapper. duke@435: __ enter(); never@3500: // -2 because return address is already present and so is saved rbp never@739: __ subptr(rsp, stack_size - 2*wordSize); duke@435: never@3500: // Frame is now completed as far as size and linkage. duke@435: int frame_complete = ((intptr_t)__ pc()) - start; duke@435: duke@435: // Calculate the difference between rsp and rbp,. We need to know it duke@435: // after the native call because on windows Java Natives will pop duke@435: // the arguments and it is painful to do rsp relative addressing duke@435: // in a platform independent way. So after the call we switch to duke@435: // rbp, relative addressing. duke@435: duke@435: int fp_adjustment = stack_size - 2*wordSize; duke@435: duke@435: #ifdef COMPILER2 duke@435: // C2 may leave the stack dirty if not in SSE2+ mode duke@435: if (UseSSE >= 2) { duke@435: __ verify_FPU(0, "c2i transition should have clean FPU stack"); duke@435: } else { duke@435: __ empty_FPU_stack(); duke@435: } duke@435: #endif /* COMPILER2 */ duke@435: duke@435: // Compute the rbp, offset for any slots used after the jni call duke@435: duke@435: int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment; duke@435: duke@435: // We use rdi as a thread pointer because it is callee save and duke@435: // if we load it once it is usable thru the entire wrapper duke@435: const Register thread = rdi; duke@435: duke@435: // We use rsi as the oop handle for the receiver/klass duke@435: // It is callee save so it survives the call to native duke@435: duke@435: const Register oop_handle_reg = rsi; duke@435: duke@435: __ get_thread(thread); duke@435: never@3500: if (is_critical_native) { never@3500: check_needs_gc_for_critical_native(masm, thread, stack_slots, total_c_args, total_in_args, never@3500: oop_handle_offset, oop_maps, in_regs, in_sig_bt); never@3500: } duke@435: duke@435: // duke@435: // We immediately shuffle the arguments so that any vm call we have to duke@435: // make from here on out (sync slow path, jvmti, etc.) we will have duke@435: // captured the oops from our caller and have a valid oopMap for duke@435: // them. duke@435: duke@435: // ----------------- duke@435: // The Grand Shuffle duke@435: // duke@435: // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv* duke@435: // and, if static, the class mirror instead of a receiver. This pretty much duke@435: // guarantees that register layout will not match (and x86 doesn't use reg duke@435: // parms though amd does). Since the native abi doesn't use register args duke@435: // and the java conventions does we don't have to worry about collisions. duke@435: // All of our moved are reg->stack or stack->stack. duke@435: // We ignore the extra arguments during the shuffle and handle them at the duke@435: // last moment. The shuffle is described by the two calling convention duke@435: // vectors we have in our possession. We simply walk the java vector to duke@435: // get the source locations and the c vector to get the destinations. duke@435: never@3500: int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 ); duke@435: duke@435: // Record rsp-based slot for receiver on stack for non-static methods duke@435: int receiver_offset = -1; duke@435: duke@435: // This is a trick. We double the stack slots so we can claim duke@435: // the oops in the caller's frame. Since we are sure to have duke@435: // more args than the caller doubling is enough to make duke@435: // sure we can capture all the incoming oop args from the duke@435: // caller. duke@435: // duke@435: OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); duke@435: duke@435: // Mark location of rbp, duke@435: // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg()); duke@435: duke@435: // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx duke@435: // Are free to temporaries if we have to do stack to steck moves. duke@435: // All inbound args are referenced based on rbp, and all outbound args via rsp. duke@435: never@3500: for (int i = 0; i < total_in_args ; i++, c_arg++ ) { duke@435: switch (in_sig_bt[i]) { duke@435: case T_ARRAY: never@3500: if (is_critical_native) { never@3500: unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); never@3500: c_arg++; never@3500: break; never@3500: } duke@435: case T_OBJECT: never@3500: assert(!is_critical_native, "no oop arguments"); duke@435: object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], duke@435: ((i == 0) && (!is_static)), duke@435: &receiver_offset); duke@435: break; duke@435: case T_VOID: duke@435: break; duke@435: duke@435: case T_FLOAT: duke@435: float_move(masm, in_regs[i], out_regs[c_arg]); duke@435: break; duke@435: duke@435: case T_DOUBLE: duke@435: assert( i + 1 < total_in_args && duke@435: in_sig_bt[i + 1] == T_VOID && duke@435: out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); duke@435: double_move(masm, in_regs[i], out_regs[c_arg]); duke@435: break; duke@435: duke@435: case T_LONG : duke@435: long_move(masm, in_regs[i], out_regs[c_arg]); duke@435: break; duke@435: duke@435: case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); duke@435: duke@435: default: duke@435: simple_move32(masm, in_regs[i], out_regs[c_arg]); duke@435: } duke@435: } duke@435: duke@435: // Pre-load a static method's oop into rsi. Used both by locking code and duke@435: // the normal JNI call code. never@3500: if (method->is_static() && !is_critical_native) { duke@435: duke@435: // load opp into a register duke@435: __ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror())); duke@435: duke@435: // Now handlize the static class mirror it's known not-null. never@739: __ movptr(Address(rsp, klass_offset), oop_handle_reg); duke@435: map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); duke@435: duke@435: // Now get the handle never@739: __ lea(oop_handle_reg, Address(rsp, klass_offset)); duke@435: // store the klass handle as second argument never@739: __ movptr(Address(rsp, wordSize), oop_handle_reg); duke@435: } duke@435: duke@435: // Change state to native (we save the return address in the thread, since it might not duke@435: // be pushed on the stack when we do a a stack traversal). It is enough that the pc() duke@435: // points into the right code segment. It does not have to be the correct return pc. duke@435: // We use the same pc/oopMap repeatedly when we call out duke@435: duke@435: intptr_t the_pc = (intptr_t) __ pc(); duke@435: oop_maps->add_gc_map(the_pc - start, map); duke@435: duke@435: __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc); duke@435: duke@435: duke@435: // We have all of the arguments setup at this point. We must not touch any register duke@435: // argument registers at this point (what if we save/restore them there are no oop? duke@435: duke@435: { duke@435: SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0); coleenp@4037: __ mov_metadata(rax, method()); duke@435: __ call_VM_leaf( duke@435: CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), duke@435: thread, rax); duke@435: } duke@435: dcubed@1045: // RedefineClasses() tracing support for obsolete method entry dcubed@1045: if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { coleenp@4037: __ mov_metadata(rax, method()); dcubed@1045: __ call_VM_leaf( dcubed@1045: CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), dcubed@1045: thread, rax); dcubed@1045: } dcubed@1045: duke@435: // These are register definitions we need for locking/unlocking duke@435: const Register swap_reg = rax; // Must use rax, for cmpxchg instruction duke@435: const Register obj_reg = rcx; // Will contain the oop duke@435: const Register lock_reg = rdx; // Address of compiler lock object (BasicLock) duke@435: duke@435: Label slow_path_lock; duke@435: Label lock_done; duke@435: duke@435: // Lock a synchronized method duke@435: if (method->is_synchronized()) { never@3500: assert(!is_critical_native, "unhandled"); duke@435: duke@435: duke@435: const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); duke@435: duke@435: // Get the handle (the 2nd argument) never@739: __ movptr(oop_handle_reg, Address(rsp, wordSize)); duke@435: duke@435: // Get address of the box duke@435: never@739: __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset)); duke@435: duke@435: // Load the oop from the handle never@739: __ movptr(obj_reg, Address(oop_handle_reg, 0)); duke@435: duke@435: if (UseBiasedLocking) { duke@435: // Note that oop_handle_reg is trashed during this call duke@435: __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock); duke@435: } duke@435: duke@435: // Load immediate 1 into swap_reg %rax, never@739: __ movptr(swap_reg, 1); duke@435: duke@435: // Load (object->mark() | 1) into swap_reg %rax, never@739: __ orptr(swap_reg, Address(obj_reg, 0)); duke@435: duke@435: // Save (object->mark() | 1) into BasicLock's displaced header never@739: __ movptr(Address(lock_reg, mark_word_offset), swap_reg); duke@435: duke@435: if (os::is_MP()) { duke@435: __ lock(); duke@435: } duke@435: duke@435: // src -> dest iff dest == rax, else rax, <- dest duke@435: // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg) never@739: __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); duke@435: __ jcc(Assembler::equal, lock_done); duke@435: duke@435: // Test if the oopMark is an obvious stack pointer, i.e., duke@435: // 1) (mark & 3) == 0, and duke@435: // 2) rsp <= mark < mark + os::pagesize() duke@435: // These 3 tests can be done by evaluating the following duke@435: // expression: ((mark - rsp) & (3 - os::vm_page_size())), duke@435: // assuming both stack pointer and pagesize have their duke@435: // least significant 2 bits clear. duke@435: // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg duke@435: never@739: __ subptr(swap_reg, rsp); never@739: __ andptr(swap_reg, 3 - os::vm_page_size()); duke@435: duke@435: // Save the test result, for recursive case, the result is zero never@739: __ movptr(Address(lock_reg, mark_word_offset), swap_reg); duke@435: __ jcc(Assembler::notEqual, slow_path_lock); duke@435: // Slow path will re-enter here duke@435: __ bind(lock_done); duke@435: duke@435: if (UseBiasedLocking) { duke@435: // Re-fetch oop_handle_reg as we trashed it above never@739: __ movptr(oop_handle_reg, Address(rsp, wordSize)); duke@435: } duke@435: } duke@435: duke@435: duke@435: // Finally just about ready to make the JNI call duke@435: duke@435: duke@435: // get JNIEnv* which is first argument to native never@3500: if (!is_critical_native) { never@3500: __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset()))); never@3500: __ movptr(Address(rsp, 0), rdx); never@3500: } duke@435: duke@435: // Now set thread in native duke@435: __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native); duke@435: never@3500: __ call(RuntimeAddress(native_func)); duke@435: duke@435: // WARNING - on Windows Java Natives use pascal calling convention and pop the duke@435: // arguments off of the stack. We could just re-adjust the stack pointer here duke@435: // and continue to do SP relative addressing but we instead switch to FP duke@435: // relative addressing. duke@435: duke@435: // Unpack native results. duke@435: switch (ret_type) { duke@435: case T_BOOLEAN: __ c2bool(rax); break; never@739: case T_CHAR : __ andptr(rax, 0xFFFF); break; duke@435: case T_BYTE : __ sign_extend_byte (rax); break; duke@435: case T_SHORT : __ sign_extend_short(rax); break; duke@435: case T_INT : /* nothing to do */ break; duke@435: case T_DOUBLE : duke@435: case T_FLOAT : duke@435: // Result is in st0 we'll save as needed duke@435: break; duke@435: case T_ARRAY: // Really a handle duke@435: case T_OBJECT: // Really a handle duke@435: break; // can't de-handlize until after safepoint check duke@435: case T_VOID: break; duke@435: case T_LONG: break; duke@435: default : ShouldNotReachHere(); duke@435: } duke@435: duke@435: // Switch thread to "native transition" state before reading the synchronization state. duke@435: // This additional state is necessary because reading and testing the synchronization duke@435: // state is not atomic w.r.t. GC, as this scenario demonstrates: duke@435: // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. duke@435: // VM thread changes sync state to synchronizing and suspends threads for GC. duke@435: // Thread A is resumed to finish this native method, but doesn't block here since it duke@435: // didn't see any synchronization is progress, and escapes. duke@435: __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans); duke@435: duke@435: if(os::is_MP()) { duke@435: if (UseMembar) { never@739: // Force this write out before the read below never@739: __ membar(Assembler::Membar_mask_bits( never@739: Assembler::LoadLoad | Assembler::LoadStore | never@739: Assembler::StoreLoad | Assembler::StoreStore)); duke@435: } else { duke@435: // Write serialization page so VM thread can do a pseudo remote membar. duke@435: // We use the current thread pointer to calculate a thread specific duke@435: // offset to write to within the page. This minimizes bus traffic duke@435: // due to cache line collision. duke@435: __ serialize_memory(thread, rcx); duke@435: } duke@435: } duke@435: duke@435: if (AlwaysRestoreFPU) { duke@435: // Make sure the control word is correct. duke@435: __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); duke@435: } duke@435: never@3500: Label after_transition; never@3500: duke@435: // check for safepoint operation in progress and/or pending suspend requests duke@435: { Label Continue; duke@435: duke@435: __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), duke@435: SafepointSynchronize::_not_synchronized); duke@435: duke@435: Label L; duke@435: __ jcc(Assembler::notEqual, L); duke@435: __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0); duke@435: __ jcc(Assembler::equal, Continue); duke@435: __ bind(L); duke@435: duke@435: // Don't use call_VM as it will see a possible pending exception and forward it duke@435: // and never return here preventing us from clearing _last_native_pc down below. duke@435: // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are duke@435: // preserved and correspond to the bcp/locals pointers. So we do a runtime call duke@435: // by hand. duke@435: // duke@435: save_native_result(masm, ret_type, stack_slots); never@739: __ push(thread); never@3500: if (!is_critical_native) { never@3500: __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, never@3500: JavaThread::check_special_condition_for_native_trans))); never@3500: } else { never@3500: __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, never@3500: JavaThread::check_special_condition_for_native_trans_and_transition))); never@3500: } duke@435: __ increment(rsp, wordSize); duke@435: // Restore any method result value duke@435: restore_native_result(masm, ret_type, stack_slots); duke@435: never@3500: if (is_critical_native) { never@3500: // The call above performed the transition to thread_in_Java so never@3500: // skip the transition logic below. never@3500: __ jmpb(after_transition); never@3500: } never@3500: duke@435: __ bind(Continue); duke@435: } duke@435: duke@435: // change thread state duke@435: __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java); never@3500: __ bind(after_transition); duke@435: duke@435: Label reguard; duke@435: Label reguard_done; duke@435: __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); duke@435: __ jcc(Assembler::equal, reguard); duke@435: duke@435: // slow path reguard re-enters here duke@435: __ bind(reguard_done); duke@435: duke@435: // Handle possible exception (will unlock if necessary) duke@435: duke@435: // native result if any is live duke@435: duke@435: // Unlock duke@435: Label slow_path_unlock; duke@435: Label unlock_done; duke@435: if (method->is_synchronized()) { duke@435: duke@435: Label done; duke@435: duke@435: // Get locked oop from the handle we passed to jni never@739: __ movptr(obj_reg, Address(oop_handle_reg, 0)); duke@435: duke@435: if (UseBiasedLocking) { duke@435: __ biased_locking_exit(obj_reg, rbx, done); duke@435: } duke@435: duke@435: // Simple recursive lock? duke@435: never@739: __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD); duke@435: __ jcc(Assembler::equal, done); duke@435: duke@435: // Must save rax, if if it is live now because cmpxchg must use it duke@435: if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { duke@435: save_native_result(masm, ret_type, stack_slots); duke@435: } duke@435: duke@435: // get old displaced header never@739: __ movptr(rbx, Address(rbp, lock_slot_rbp_offset)); duke@435: duke@435: // get address of the stack lock never@739: __ lea(rax, Address(rbp, lock_slot_rbp_offset)); duke@435: duke@435: // Atomic swap old header if oop still contains the stack lock duke@435: if (os::is_MP()) { duke@435: __ lock(); duke@435: } duke@435: duke@435: // src -> dest iff dest == rax, else rax, <- dest duke@435: // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg) never@739: __ cmpxchgptr(rbx, Address(obj_reg, 0)); duke@435: __ jcc(Assembler::notEqual, slow_path_unlock); duke@435: duke@435: // slow path re-enters here duke@435: __ bind(unlock_done); duke@435: if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { duke@435: restore_native_result(masm, ret_type, stack_slots); duke@435: } duke@435: duke@435: __ bind(done); duke@435: duke@435: } duke@435: duke@435: { duke@435: SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0); duke@435: // Tell dtrace about this method exit duke@435: save_native_result(masm, ret_type, stack_slots); coleenp@4037: __ mov_metadata(rax, method()); duke@435: __ call_VM_leaf( duke@435: CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), duke@435: thread, rax); duke@435: restore_native_result(masm, ret_type, stack_slots); duke@435: } duke@435: duke@435: // We can finally stop using that last_Java_frame we setup ages ago duke@435: duke@435: __ reset_last_Java_frame(thread, false, true); duke@435: duke@435: // Unpack oop result duke@435: if (ret_type == T_OBJECT || ret_type == T_ARRAY) { duke@435: Label L; never@739: __ cmpptr(rax, (int32_t)NULL_WORD); duke@435: __ jcc(Assembler::equal, L); never@739: __ movptr(rax, Address(rax, 0)); duke@435: __ bind(L); duke@435: __ verify_oop(rax); duke@435: } duke@435: never@3500: if (!is_critical_native) { never@3500: // reset handle block never@3500: __ movptr(rcx, Address(thread, JavaThread::active_handles_offset())); never@3500: __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD); never@3500: never@3500: // Any exception pending? never@3500: __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); never@3500: __ jcc(Assembler::notEqual, exception_pending); never@3500: } duke@435: duke@435: // no exception, we're almost done duke@435: duke@435: // check that only result value is on FPU stack duke@435: __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit"); duke@435: duke@435: // Fixup floating pointer results so that result looks like a return from a compiled method duke@435: if (ret_type == T_FLOAT) { duke@435: if (UseSSE >= 1) { duke@435: // Pop st0 and store as float and reload into xmm register duke@435: __ fstp_s(Address(rbp, -4)); duke@435: __ movflt(xmm0, Address(rbp, -4)); duke@435: } duke@435: } else if (ret_type == T_DOUBLE) { duke@435: if (UseSSE >= 2) { duke@435: // Pop st0 and store as double and reload into xmm register duke@435: __ fstp_d(Address(rbp, -8)); duke@435: __ movdbl(xmm0, Address(rbp, -8)); duke@435: } duke@435: } duke@435: duke@435: // Return duke@435: duke@435: __ leave(); duke@435: __ ret(0); duke@435: duke@435: // Unexpected paths are out of line and go here duke@435: duke@435: // Slow path locking & unlocking duke@435: if (method->is_synchronized()) { duke@435: duke@435: // BEGIN Slow path lock duke@435: duke@435: __ bind(slow_path_lock); duke@435: duke@435: // has last_Java_frame setup. No exceptions so do vanilla call not call_VM duke@435: // args are (oop obj, BasicLock* lock, JavaThread* thread) never@739: __ push(thread); never@739: __ push(lock_reg); never@739: __ push(obj_reg); duke@435: __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C))); never@739: __ addptr(rsp, 3*wordSize); duke@435: duke@435: #ifdef ASSERT duke@435: { Label L; never@739: __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); duke@435: __ jcc(Assembler::equal, L); duke@435: __ stop("no pending exception allowed on exit from monitorenter"); duke@435: __ bind(L); duke@435: } duke@435: #endif duke@435: __ jmp(lock_done); duke@435: duke@435: // END Slow path lock duke@435: duke@435: // BEGIN Slow path unlock duke@435: __ bind(slow_path_unlock); duke@435: duke@435: // Slow path unlock duke@435: duke@435: if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { duke@435: save_native_result(masm, ret_type, stack_slots); duke@435: } duke@435: // Save pending exception around call to VM (which contains an EXCEPTION_MARK) duke@435: never@739: __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); xlu@947: __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD); duke@435: duke@435: duke@435: // should be a peal duke@435: // +wordSize because of the push above never@739: __ lea(rax, Address(rbp, lock_slot_rbp_offset)); never@739: __ push(rax); never@739: never@739: __ push(obj_reg); duke@435: __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); never@739: __ addptr(rsp, 2*wordSize); duke@435: #ifdef ASSERT duke@435: { duke@435: Label L; never@739: __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); duke@435: __ jcc(Assembler::equal, L); duke@435: __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); duke@435: __ bind(L); duke@435: } duke@435: #endif /* ASSERT */ duke@435: never@739: __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); duke@435: duke@435: if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { duke@435: restore_native_result(masm, ret_type, stack_slots); duke@435: } duke@435: __ jmp(unlock_done); duke@435: // END Slow path unlock duke@435: duke@435: } duke@435: duke@435: // SLOW PATH Reguard the stack if needed duke@435: duke@435: __ bind(reguard); duke@435: save_native_result(masm, ret_type, stack_slots); duke@435: { duke@435: __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); duke@435: } duke@435: restore_native_result(masm, ret_type, stack_slots); duke@435: __ jmp(reguard_done); duke@435: duke@435: duke@435: // BEGIN EXCEPTION PROCESSING duke@435: never@3500: if (!is_critical_native) { never@3500: // Forward the exception never@3500: __ bind(exception_pending); never@3500: never@3500: // remove possible return value from FPU register stack never@3500: __ empty_FPU_stack(); never@3500: never@3500: // pop our frame never@3500: __ leave(); never@3500: // and forward the exception never@3500: __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); never@3500: } duke@435: duke@435: __ flush(); duke@435: duke@435: nmethod *nm = nmethod::new_native_nmethod(method, twisti@2687: compile_id, duke@435: masm->code(), duke@435: vep_offset, duke@435: frame_complete, duke@435: stack_slots / VMRegImpl::slots_per_word, duke@435: (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), duke@435: in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), duke@435: oop_maps); never@3500: never@3500: if (is_critical_native) { never@3500: nm->set_lazy_critical_native(true); never@3500: } never@3500: duke@435: return nm; duke@435: duke@435: } duke@435: kamg@551: #ifdef HAVE_DTRACE_H kamg@551: // --------------------------------------------------------------------------- kamg@551: // Generate a dtrace nmethod for a given signature. The method takes arguments kamg@551: // in the Java compiled code convention, marshals them to the native kamg@551: // abi and then leaves nops at the position you would expect to call a native kamg@551: // function. When the probe is enabled the nops are replaced with a trap kamg@551: // instruction that dtrace inserts and the trace will cause a notification kamg@551: // to dtrace. kamg@551: // kamg@551: // The probes are only able to take primitive types and java/lang/String as kamg@551: // arguments. No other java types are allowed. Strings are converted to utf8 kamg@551: // strings so that from dtrace point of view java strings are converted to C kamg@551: // strings. There is an arbitrary fixed limit on the total space that a method kamg@551: // can use for converting the strings. (256 chars per string in the signature). kamg@551: // So any java string larger then this is truncated. kamg@551: kamg@551: nmethod *SharedRuntime::generate_dtrace_nmethod( kamg@551: MacroAssembler *masm, methodHandle method) { kamg@551: kamg@551: // generate_dtrace_nmethod is guarded by a mutex so we are sure to kamg@551: // be single threaded in this method. kamg@551: assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); kamg@551: kamg@551: // Fill in the signature array, for the calling-convention call. kamg@551: int total_args_passed = method->size_of_parameters(); kamg@551: kamg@551: BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); kamg@551: VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); kamg@551: kamg@551: // The signature we are going to use for the trap that dtrace will see kamg@551: // java/lang/String is converted. We drop "this" and any other object kamg@551: // is converted to NULL. (A one-slot java/lang/Long object reference kamg@551: // is converted to a two-slot long, which is why we double the allocation). kamg@551: BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); kamg@551: VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); kamg@551: kamg@551: int i=0; kamg@551: int total_strings = 0; kamg@551: int first_arg_to_pass = 0; kamg@551: int total_c_args = 0; kamg@551: kamg@551: if( !method->is_static() ) { // Pass in receiver first kamg@551: in_sig_bt[i++] = T_OBJECT; kamg@551: first_arg_to_pass = 1; kamg@551: } kamg@551: kamg@551: // We need to convert the java args to where a native (non-jni) function kamg@551: // would expect them. To figure out where they go we convert the java kamg@551: // signature to a C signature. kamg@551: kamg@551: SignatureStream ss(method->signature()); kamg@551: for ( ; !ss.at_return_type(); ss.next()) { kamg@551: BasicType bt = ss.type(); kamg@551: in_sig_bt[i++] = bt; // Collect remaining bits of signature kamg@551: out_sig_bt[total_c_args++] = bt; kamg@551: if( bt == T_OBJECT) { coleenp@2497: Symbol* s = ss.as_symbol_or_null(); // symbol is created kamg@551: if (s == vmSymbols::java_lang_String()) { kamg@551: total_strings++; kamg@551: out_sig_bt[total_c_args-1] = T_ADDRESS; kamg@551: } else if (s == vmSymbols::java_lang_Boolean() || kamg@551: s == vmSymbols::java_lang_Character() || kamg@551: s == vmSymbols::java_lang_Byte() || kamg@551: s == vmSymbols::java_lang_Short() || kamg@551: s == vmSymbols::java_lang_Integer() || kamg@551: s == vmSymbols::java_lang_Float()) { kamg@551: out_sig_bt[total_c_args-1] = T_INT; kamg@551: } else if (s == vmSymbols::java_lang_Long() || kamg@551: s == vmSymbols::java_lang_Double()) { kamg@551: out_sig_bt[total_c_args-1] = T_LONG; kamg@551: out_sig_bt[total_c_args++] = T_VOID; kamg@551: } kamg@551: } else if ( bt == T_LONG || bt == T_DOUBLE ) { kamg@551: in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots kamg@551: out_sig_bt[total_c_args++] = T_VOID; kamg@551: } kamg@551: } kamg@551: kamg@551: assert(i==total_args_passed, "validly parsed signature"); kamg@551: kamg@551: // Now get the compiled-Java layout as input arguments kamg@551: int comp_args_on_stack; kamg@551: comp_args_on_stack = SharedRuntime::java_calling_convention( kamg@551: in_sig_bt, in_regs, total_args_passed, false); kamg@551: kamg@551: // Now figure out where the args must be stored and how much stack space kamg@551: // they require (neglecting out_preserve_stack_slots). kamg@551: kamg@551: int out_arg_slots; kamg@551: out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); kamg@551: kamg@551: // Calculate the total number of stack slots we will need. kamg@551: kamg@551: // First count the abi requirement plus all of the outgoing args kamg@551: int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; kamg@551: kamg@551: // Now space for the string(s) we must convert kamg@551: kamg@551: int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); kamg@551: for (i = 0; i < total_strings ; i++) { kamg@551: string_locs[i] = stack_slots; kamg@551: stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; kamg@551: } kamg@551: kamg@551: // + 2 for return address (which we own) and saved rbp, kamg@551: kamg@551: stack_slots += 2; kamg@551: kamg@551: // Ok The space we have allocated will look like: kamg@551: // kamg@551: // kamg@551: // FP-> | | kamg@551: // |---------------------| kamg@551: // | string[n] | kamg@551: // |---------------------| <- string_locs[n] kamg@551: // | string[n-1] | kamg@551: // |---------------------| <- string_locs[n-1] kamg@551: // | ... | kamg@551: // | ... | kamg@551: // |---------------------| <- string_locs[1] kamg@551: // | string[0] | kamg@551: // |---------------------| <- string_locs[0] kamg@551: // | outbound memory | kamg@551: // | based arguments | kamg@551: // | | kamg@551: // |---------------------| kamg@551: // | | kamg@551: // SP-> | out_preserved_slots | kamg@551: // kamg@551: // kamg@551: kamg@551: // Now compute actual number of stack words we need rounding to make kamg@551: // stack properly aligned. kamg@551: stack_slots = round_to(stack_slots, 2 * VMRegImpl::slots_per_word); kamg@551: kamg@551: int stack_size = stack_slots * VMRegImpl::stack_slot_size; kamg@551: kamg@551: intptr_t start = (intptr_t)__ pc(); kamg@551: kamg@551: // First thing make an ic check to see if we should even be here kamg@551: kamg@551: // We are free to use all registers as temps without saving them and kamg@551: // restoring them except rbp. rbp, is the only callee save register kamg@551: // as far as the interpreter and the compiler(s) are concerned. kamg@551: kamg@551: const Register ic_reg = rax; kamg@551: const Register receiver = rcx; kamg@551: Label hit; kamg@551: Label exception_pending; kamg@551: kamg@551: kamg@551: __ verify_oop(receiver); kamg@551: __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); kamg@551: __ jcc(Assembler::equal, hit); kamg@551: kamg@551: __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); kamg@551: kamg@551: // verified entry must be aligned for code patching. kamg@551: // and the first 5 bytes must be in the same cache line kamg@551: // if we align at 8 then we will be sure 5 bytes are in the same line kamg@551: __ align(8); kamg@551: kamg@551: __ bind(hit); kamg@551: kamg@551: int vep_offset = ((intptr_t)__ pc()) - start; kamg@551: kamg@551: kamg@551: // The instruction at the verified entry point must be 5 bytes or longer kamg@551: // because it can be patched on the fly by make_non_entrant. The stack bang kamg@551: // instruction fits that requirement. kamg@551: kamg@551: // Generate stack overflow check kamg@551: kamg@551: kamg@551: if (UseStackBanging) { kamg@551: if (stack_size <= StackShadowPages*os::vm_page_size()) { kamg@551: __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); kamg@551: } else { kamg@551: __ movl(rax, stack_size); kamg@551: __ bang_stack_size(rax, rbx); kamg@551: } kamg@551: } else { kamg@551: // need a 5 byte instruction to allow MT safe patching to non-entrant kamg@551: __ fat_nop(); kamg@551: } kamg@551: kamg@551: assert(((int)__ pc() - start - vep_offset) >= 5, kamg@551: "valid size for make_non_entrant"); kamg@551: kamg@551: // Generate a new frame for the wrapper. kamg@551: __ enter(); kamg@551: kamg@551: // -2 because return address is already present and so is saved rbp, kamg@551: if (stack_size - 2*wordSize != 0) { kamg@551: __ subl(rsp, stack_size - 2*wordSize); kamg@551: } kamg@551: kamg@551: // Frame is now completed as far a size and linkage. kamg@551: kamg@551: int frame_complete = ((intptr_t)__ pc()) - start; kamg@551: kamg@551: // First thing we do store all the args as if we are doing the call. kamg@551: // Since the C calling convention is stack based that ensures that kamg@551: // all the Java register args are stored before we need to convert any kamg@551: // string we might have. kamg@551: kamg@551: int sid = 0; kamg@551: int c_arg, j_arg; kamg@551: int string_reg = 0; kamg@551: kamg@551: for (j_arg = first_arg_to_pass, c_arg = 0 ; kamg@551: j_arg < total_args_passed ; j_arg++, c_arg++ ) { kamg@551: kamg@551: VMRegPair src = in_regs[j_arg]; kamg@551: VMRegPair dst = out_regs[c_arg]; kamg@551: assert(dst.first()->is_stack() || in_sig_bt[j_arg] == T_VOID, kamg@551: "stack based abi assumed"); kamg@551: kamg@551: switch (in_sig_bt[j_arg]) { kamg@551: kamg@551: case T_ARRAY: kamg@551: case T_OBJECT: kamg@551: if (out_sig_bt[c_arg] == T_ADDRESS) { kamg@551: // Any register based arg for a java string after the first kamg@551: // will be destroyed by the call to get_utf so we store kamg@551: // the original value in the location the utf string address kamg@551: // will eventually be stored. kamg@551: if (src.first()->is_reg()) { kamg@551: if (string_reg++ != 0) { kamg@551: simple_move32(masm, src, dst); kamg@551: } kamg@551: } kamg@551: } else if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { kamg@551: // need to unbox a one-word value kamg@551: Register in_reg = rax; kamg@551: if ( src.first()->is_reg() ) { kamg@551: in_reg = src.first()->as_Register(); kamg@551: } else { kamg@551: simple_move32(masm, src, in_reg->as_VMReg()); kamg@551: } kamg@551: Label skipUnbox; kamg@551: __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD); kamg@551: if ( out_sig_bt[c_arg] == T_LONG ) { kamg@551: __ movl(Address(rsp, reg2offset_out(dst.second())), NULL_WORD); kamg@551: } kamg@551: __ testl(in_reg, in_reg); kamg@551: __ jcc(Assembler::zero, skipUnbox); kamg@551: assert(dst.first()->is_stack() && kamg@551: (!dst.second()->is_valid() || dst.second()->is_stack()), kamg@551: "value(s) must go into stack slots"); kvn@600: kvn@600: BasicType bt = out_sig_bt[c_arg]; kvn@600: int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); kvn@600: if ( bt == T_LONG ) { kamg@551: __ movl(rbx, Address(in_reg, kamg@551: box_offset + VMRegImpl::stack_slot_size)); kamg@551: __ movl(Address(rsp, reg2offset_out(dst.second())), rbx); kamg@551: } kamg@551: __ movl(in_reg, Address(in_reg, box_offset)); kamg@551: __ movl(Address(rsp, reg2offset_out(dst.first())), in_reg); kamg@551: __ bind(skipUnbox); kamg@551: } else { kamg@551: // Convert the arg to NULL kamg@551: __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD); kamg@551: } kamg@551: if (out_sig_bt[c_arg] == T_LONG) { kamg@551: assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); kamg@551: ++c_arg; // Move over the T_VOID To keep the loop indices in sync kamg@551: } kamg@551: break; kamg@551: kamg@551: case T_VOID: kamg@551: break; kamg@551: kamg@551: case T_FLOAT: kamg@551: float_move(masm, src, dst); kamg@551: break; kamg@551: kamg@551: case T_DOUBLE: kamg@551: assert( j_arg + 1 < total_args_passed && kamg@551: in_sig_bt[j_arg + 1] == T_VOID, "bad arg list"); kamg@551: double_move(masm, src, dst); kamg@551: break; kamg@551: kamg@551: case T_LONG : kamg@551: long_move(masm, src, dst); kamg@551: break; kamg@551: kamg@551: case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); kamg@551: kamg@551: default: kamg@551: simple_move32(masm, src, dst); kamg@551: } kamg@551: } kamg@551: kamg@551: // Now we must convert any string we have to utf8 kamg@551: // kamg@551: kamg@551: for (sid = 0, j_arg = first_arg_to_pass, c_arg = 0 ; kamg@551: sid < total_strings ; j_arg++, c_arg++ ) { kamg@551: kamg@551: if (out_sig_bt[c_arg] == T_ADDRESS) { kamg@551: kamg@551: Address utf8_addr = Address( kamg@551: rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); kamg@551: __ leal(rax, utf8_addr); kamg@551: kamg@551: // The first string we find might still be in the original java arg kamg@551: // register kamg@551: VMReg orig_loc = in_regs[j_arg].first(); kamg@551: Register string_oop; kamg@551: kamg@551: // This is where the argument will eventually reside kamg@551: Address dest = Address(rsp, reg2offset_out(out_regs[c_arg].first())); kamg@551: kamg@551: if (sid == 1 && orig_loc->is_reg()) { kamg@551: string_oop = orig_loc->as_Register(); kamg@551: assert(string_oop != rax, "smashed arg"); kamg@551: } else { kamg@551: kamg@551: if (orig_loc->is_reg()) { kamg@551: // Get the copy of the jls object kamg@551: __ movl(rcx, dest); kamg@551: } else { kamg@551: // arg is still in the original location kamg@551: __ movl(rcx, Address(rbp, reg2offset_in(orig_loc))); kamg@551: } kamg@551: string_oop = rcx; kamg@551: kamg@551: } kamg@551: Label nullString; kamg@551: __ movl(dest, NULL_WORD); kamg@551: __ testl(string_oop, string_oop); kamg@551: __ jcc(Assembler::zero, nullString); kamg@551: kamg@551: // Now we can store the address of the utf string as the argument kamg@551: __ movl(dest, rax); kamg@551: kamg@551: // And do the conversion kamg@551: __ call_VM_leaf(CAST_FROM_FN_PTR( kamg@551: address, SharedRuntime::get_utf), string_oop, rax); kamg@551: __ bind(nullString); kamg@551: } kamg@551: kamg@551: if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { kamg@551: assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); kamg@551: ++c_arg; // Move over the T_VOID To keep the loop indices in sync kamg@551: } kamg@551: } kamg@551: kamg@551: kamg@551: // Ok now we are done. Need to place the nop that dtrace wants in order to kamg@551: // patch in the trap kamg@551: kamg@551: int patch_offset = ((intptr_t)__ pc()) - start; kamg@551: kamg@551: __ nop(); kamg@551: kamg@551: kamg@551: // Return kamg@551: kamg@551: __ leave(); kamg@551: __ ret(0); kamg@551: kamg@551: __ flush(); kamg@551: kamg@551: nmethod *nm = nmethod::new_dtrace_nmethod( kamg@551: method, masm->code(), vep_offset, patch_offset, frame_complete, kamg@551: stack_slots / VMRegImpl::slots_per_word); kamg@551: return nm; kamg@551: kamg@551: } kamg@551: kamg@551: #endif // HAVE_DTRACE_H kamg@551: duke@435: // this function returns the adjust size (in number of words) to a c2i adapter duke@435: // activation for use during deoptimization duke@435: int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { twisti@1861: return (callee_locals - callee_parameters) * Interpreter::stackElementWords; duke@435: } duke@435: duke@435: duke@435: uint SharedRuntime::out_preserve_stack_slots() { duke@435: return 0; duke@435: } duke@435: duke@435: duke@435: //------------------------------generate_deopt_blob---------------------------- duke@435: void SharedRuntime::generate_deopt_blob() { duke@435: // allocate space for the code duke@435: ResourceMark rm; duke@435: // setup code generation tools duke@435: CodeBuffer buffer("deopt_blob", 1024, 1024); duke@435: MacroAssembler* masm = new MacroAssembler(&buffer); duke@435: int frame_size_in_words; duke@435: OopMap* map = NULL; duke@435: // Account for the extra args we place on the stack duke@435: // by the time we call fetch_unroll_info duke@435: const int additional_words = 2; // deopt kind, thread duke@435: duke@435: OopMapSet *oop_maps = new OopMapSet(); duke@435: duke@435: // ------------- duke@435: // This code enters when returning to a de-optimized nmethod. A return duke@435: // address has been pushed on the the stack, and return values are in duke@435: // registers. duke@435: // If we are doing a normal deopt then we were called from the patched duke@435: // nmethod from the point we returned to the nmethod. So the return duke@435: // address on the stack is wrong by NativeCall::instruction_size duke@435: // We will adjust the value to it looks like we have the original return duke@435: // address on the stack (like when we eagerly deoptimized). duke@435: // In the case of an exception pending with deoptimized then we enter duke@435: // with a return address on the stack that points after the call we patched duke@435: // into the exception handler. We have the following register state: duke@435: // rax,: exception duke@435: // rbx,: exception handler duke@435: // rdx: throwing pc duke@435: // So in this case we simply jam rdx into the useless return address and duke@435: // the stack looks just like we want. duke@435: // duke@435: // At this point we need to de-opt. We save the argument return duke@435: // registers. We call the first C routine, fetch_unroll_info(). This duke@435: // routine captures the return values and returns a structure which duke@435: // describes the current frame size and the sizes of all replacement frames. duke@435: // The current frame is compiled code and may contain many inlined duke@435: // functions, each with their own JVM state. We pop the current frame, then duke@435: // push all the new frames. Then we call the C routine unpack_frames() to duke@435: // populate these frames. Finally unpack_frames() returns us the new target duke@435: // address. Notice that callee-save registers are BLOWN here; they have duke@435: // already been captured in the vframeArray at the time the return PC was duke@435: // patched. duke@435: address start = __ pc(); duke@435: Label cont; duke@435: duke@435: // Prolog for non exception case! duke@435: duke@435: // Save everything in sight. duke@435: cfang@1361: map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); duke@435: // Normal deoptimization never@739: __ push(Deoptimization::Unpack_deopt); duke@435: __ jmp(cont); duke@435: duke@435: int reexecute_offset = __ pc() - start; duke@435: duke@435: // Reexecute case duke@435: // return address is the pc describes what bci to do re-execute at duke@435: duke@435: // No need to update map as each call to save_live_registers will produce identical oopmap cfang@1361: (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); duke@435: never@739: __ push(Deoptimization::Unpack_reexecute); duke@435: __ jmp(cont); duke@435: duke@435: int exception_offset = __ pc() - start; duke@435: duke@435: // Prolog for exception case duke@435: duke@435: // all registers are dead at this entry point, except for rax, and duke@435: // rdx which contain the exception oop and exception pc duke@435: // respectively. Set them in TLS and fall thru to the duke@435: // unpack_with_exception_in_tls entry point. duke@435: duke@435: __ get_thread(rdi); never@739: __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx); never@739: __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax); duke@435: duke@435: int exception_in_tls_offset = __ pc() - start; duke@435: duke@435: // new implementation because exception oop is now passed in JavaThread duke@435: duke@435: // Prolog for exception case duke@435: // All registers must be preserved because they might be used by LinearScan duke@435: // Exceptiop oop and throwing PC are passed in JavaThread duke@435: // tos: stack at point of call to method that threw the exception (i.e. only duke@435: // args are on the stack, no return address) duke@435: duke@435: // make room on stack for the return address duke@435: // It will be patched later with the throwing pc. The correct value is not duke@435: // available now because loading it from memory would destroy registers. never@739: __ push(0); duke@435: duke@435: // Save everything in sight. duke@435: duke@435: // No need to update map as each call to save_live_registers will produce identical oopmap cfang@1361: (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); duke@435: duke@435: // Now it is safe to overwrite any register duke@435: duke@435: // store the correct deoptimization type never@739: __ push(Deoptimization::Unpack_exception); duke@435: duke@435: // load throwing pc from JavaThread and patch it as the return address duke@435: // of the current frame. Then clear the field in JavaThread duke@435: __ get_thread(rdi); never@739: __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset())); never@739: __ movptr(Address(rbp, wordSize), rdx); xlu@947: __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD); duke@435: duke@435: #ifdef ASSERT duke@435: // verify that there is really an exception oop in JavaThread never@739: __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset())); duke@435: __ verify_oop(rax); duke@435: duke@435: // verify that there is no pending exception duke@435: Label no_pending_exception; never@739: __ movptr(rax, Address(rdi, Thread::pending_exception_offset())); never@739: __ testptr(rax, rax); duke@435: __ jcc(Assembler::zero, no_pending_exception); duke@435: __ stop("must not have pending exception here"); duke@435: __ bind(no_pending_exception); duke@435: #endif duke@435: duke@435: __ bind(cont); duke@435: duke@435: // Compiled code leaves the floating point stack dirty, empty it. duke@435: __ empty_FPU_stack(); duke@435: duke@435: duke@435: // Call C code. Need thread and this frame, but NOT official VM entry duke@435: // crud. We cannot block on this call, no GC can happen. duke@435: __ get_thread(rcx); never@739: __ push(rcx); duke@435: // fetch_unroll_info needs to call last_java_frame() duke@435: __ set_last_Java_frame(rcx, noreg, noreg, NULL); duke@435: duke@435: __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); duke@435: duke@435: // Need to have an oopmap that tells fetch_unroll_info where to duke@435: // find any register it might need. duke@435: duke@435: oop_maps->add_gc_map( __ pc()-start, map); duke@435: duke@435: // Discard arg to fetch_unroll_info never@739: __ pop(rcx); duke@435: duke@435: __ get_thread(rcx); duke@435: __ reset_last_Java_frame(rcx, false, false); duke@435: duke@435: // Load UnrollBlock into EDI never@739: __ mov(rdi, rax); duke@435: duke@435: // Move the unpack kind to a safe place in the UnrollBlock because duke@435: // we are very short of registers duke@435: duke@435: Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()); duke@435: // retrieve the deopt kind from where we left it. never@739: __ pop(rax); duke@435: __ movl(unpack_kind, rax); // save the unpack_kind value duke@435: duke@435: Label noException; duke@435: __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending? duke@435: __ jcc(Assembler::notEqual, noException); never@739: __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset())); never@739: __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset())); xlu@947: __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD); xlu@947: __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD); duke@435: duke@435: __ verify_oop(rax); duke@435: duke@435: // Overwrite the result registers with the exception results. never@739: __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); never@739: __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); duke@435: duke@435: __ bind(noException); duke@435: duke@435: // Stack is back to only having register save data on the stack. duke@435: // Now restore the result registers. Everything else is either dead or captured duke@435: // in the vframeArray. duke@435: duke@435: RegisterSaver::restore_result_registers(masm); duke@435: cfang@1361: // Non standard control word may be leaked out through a safepoint blob, and we can cfang@1361: // deopt at a poll point with the non standard control word. However, we should make cfang@1361: // sure the control word is correct after restore_result_registers. cfang@1361: __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); cfang@1361: duke@435: // All of the register save area has been popped of the stack. Only the duke@435: // return address remains. duke@435: duke@435: // Pop all the frames we must move/replace. duke@435: // duke@435: // Frame picture (youngest to oldest) duke@435: // 1: self-frame (no frame link) duke@435: // 2: deopting frame (no frame link) duke@435: // 3: caller of deopting frame (could be compiled/interpreted). duke@435: // duke@435: // Note: by leaving the return address of self-frame on the stack duke@435: // and using the size of frame 2 to adjust the stack duke@435: // when we are done the return to frame 3 will still be on the stack. duke@435: duke@435: // Pop deoptimized frame never@739: __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); duke@435: duke@435: // sp should be pointing at the return address to the caller (3) duke@435: duke@435: // Stack bang to make sure there's enough room for these interpreter frames. duke@435: if (UseStackBanging) { duke@435: __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); duke@435: __ bang_stack_size(rbx, rcx); duke@435: } duke@435: duke@435: // Load array of frame pcs into ECX never@739: __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); never@739: never@739: __ pop(rsi); // trash the old pc duke@435: duke@435: // Load array of frame sizes into ESI never@739: __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); duke@435: duke@435: Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes()); duke@435: duke@435: __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); duke@435: __ movl(counter, rbx); duke@435: duke@435: // Pick up the initial fp we should save bdelsart@3130: __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); duke@435: duke@435: // Now adjust the caller's stack to make up for the extra locals duke@435: // but record the original sp so that we can save it in the skeletal interpreter duke@435: // frame and the stack walking of interpreter_sender will get the unextended sp duke@435: // value and not the "real" sp value. duke@435: duke@435: Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes()); never@739: __ movptr(sp_temp, rsp); never@739: __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes())); never@739: __ subptr(rsp, rbx); duke@435: duke@435: // Push interpreter frames in a loop duke@435: Label loop; duke@435: __ bind(loop); never@739: __ movptr(rbx, Address(rsi, 0)); // Load frame size duke@435: #ifdef CC_INTERP never@739: __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and duke@435: #ifdef ASSERT never@739: __ push(0xDEADDEAD); // Make a recognizable pattern never@739: __ push(0xDEADDEAD); duke@435: #else /* ASSERT */ never@739: __ subptr(rsp, 2*wordSize); // skip the "static long no_param" duke@435: #endif /* ASSERT */ duke@435: #else /* CC_INTERP */ never@739: __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand duke@435: #endif /* CC_INTERP */ never@739: __ pushptr(Address(rcx, 0)); // save return address duke@435: __ enter(); // save old & set new rbp, never@739: __ subptr(rsp, rbx); // Prolog! never@739: __ movptr(rbx, sp_temp); // sender's sp duke@435: #ifdef CC_INTERP never@739: __ movptr(Address(rbp, duke@435: -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), duke@435: rbx); // Make it walkable duke@435: #else /* CC_INTERP */ duke@435: // This value is corrected by layout_activation_impl xlu@947: __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD); never@739: __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable duke@435: #endif /* CC_INTERP */ never@739: __ movptr(sp_temp, rsp); // pass to next frame never@739: __ addptr(rsi, wordSize); // Bump array pointer (sizes) never@739: __ addptr(rcx, wordSize); // Bump array pointer (pcs) never@739: __ decrementl(counter); // decrement counter duke@435: __ jcc(Assembler::notZero, loop); never@739: __ pushptr(Address(rcx, 0)); // save final return address duke@435: duke@435: // Re-push self-frame duke@435: __ enter(); // save old & set new rbp, duke@435: duke@435: // Return address and rbp, are in place duke@435: // We'll push additional args later. Just allocate a full sized duke@435: // register save area never@739: __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize); duke@435: duke@435: // Restore frame locals after moving the frame never@739: __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); never@739: __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); duke@435: __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local duke@435: if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); duke@435: if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); duke@435: duke@435: // Set up the args to unpack_frame duke@435: duke@435: __ pushl(unpack_kind); // get the unpack_kind value duke@435: __ get_thread(rcx); never@739: __ push(rcx); duke@435: duke@435: // set last_Java_sp, last_Java_fp duke@435: __ set_last_Java_frame(rcx, noreg, rbp, NULL); duke@435: duke@435: // Call C code. Need thread but NOT official VM entry duke@435: // crud. We cannot block on this call, no GC can happen. Call should duke@435: // restore return values to their stack-slots with the new SP. duke@435: __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); duke@435: // Set an oopmap for the call site duke@435: oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 )); duke@435: duke@435: // rax, contains the return result type never@739: __ push(rax); duke@435: duke@435: __ get_thread(rcx); duke@435: __ reset_last_Java_frame(rcx, false, false); duke@435: duke@435: // Collect return values never@739: __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize)); never@739: __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize)); duke@435: duke@435: // Clear floating point stack before returning to interpreter duke@435: __ empty_FPU_stack(); duke@435: duke@435: // Check if we should push the float or double return value. duke@435: Label results_done, yes_double_value; duke@435: __ cmpl(Address(rsp, 0), T_DOUBLE); duke@435: __ jcc (Assembler::zero, yes_double_value); duke@435: __ cmpl(Address(rsp, 0), T_FLOAT); duke@435: __ jcc (Assembler::notZero, results_done); duke@435: duke@435: // return float value as expected by interpreter duke@435: if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); duke@435: else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); duke@435: __ jmp(results_done); duke@435: duke@435: // return double value as expected by interpreter duke@435: __ bind(yes_double_value); duke@435: if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); duke@435: else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); duke@435: duke@435: __ bind(results_done); duke@435: duke@435: // Pop self-frame. duke@435: __ leave(); // Epilog! duke@435: duke@435: // Jump to interpreter duke@435: __ ret(0); duke@435: duke@435: // ------------- duke@435: // make sure all code is generated duke@435: masm->flush(); duke@435: duke@435: _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); duke@435: _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); duke@435: } duke@435: duke@435: duke@435: #ifdef COMPILER2 duke@435: //------------------------------generate_uncommon_trap_blob-------------------- duke@435: void SharedRuntime::generate_uncommon_trap_blob() { duke@435: // allocate space for the code duke@435: ResourceMark rm; duke@435: // setup code generation tools duke@435: CodeBuffer buffer("uncommon_trap_blob", 512, 512); duke@435: MacroAssembler* masm = new MacroAssembler(&buffer); duke@435: duke@435: enum frame_layout { duke@435: arg0_off, // thread sp + 0 // Arg location for duke@435: arg1_off, // unloaded_class_index sp + 1 // calling C duke@435: // The frame sender code expects that rbp will be in the "natural" place and duke@435: // will override any oopMap setting for it. We must therefore force the layout duke@435: // so that it agrees with the frame sender code. duke@435: rbp_off, // callee saved register sp + 2 duke@435: return_off, // slot for return address sp + 3 duke@435: framesize duke@435: }; duke@435: duke@435: address start = __ pc(); duke@435: // Push self-frame. never@739: __ subptr(rsp, return_off*wordSize); // Epilog! duke@435: duke@435: // rbp, is an implicitly saved callee saved register (i.e. the calling duke@435: // convention will save restore it in prolog/epilog) Other than that duke@435: // there are no callee save registers no that adapter frames are gone. never@739: __ movptr(Address(rsp, rbp_off*wordSize), rbp); duke@435: duke@435: // Clear the floating point exception stack duke@435: __ empty_FPU_stack(); duke@435: duke@435: // set last_Java_sp duke@435: __ get_thread(rdx); duke@435: __ set_last_Java_frame(rdx, noreg, noreg, NULL); duke@435: duke@435: // Call C code. Need thread but NOT official VM entry duke@435: // crud. We cannot block on this call, no GC can happen. Call should duke@435: // capture callee-saved registers as well as return values. never@739: __ movptr(Address(rsp, arg0_off*wordSize), rdx); duke@435: // argument already in ECX duke@435: __ movl(Address(rsp, arg1_off*wordSize),rcx); duke@435: __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); duke@435: duke@435: // Set an oopmap for the call site duke@435: OopMapSet *oop_maps = new OopMapSet(); duke@435: OopMap* map = new OopMap( framesize, 0 ); duke@435: // No oopMap for rbp, it is known implicitly duke@435: duke@435: oop_maps->add_gc_map( __ pc()-start, map); duke@435: duke@435: __ get_thread(rcx); duke@435: duke@435: __ reset_last_Java_frame(rcx, false, false); duke@435: duke@435: // Load UnrollBlock into EDI never@739: __ movptr(rdi, rax); duke@435: duke@435: // Pop all the frames we must move/replace. duke@435: // duke@435: // Frame picture (youngest to oldest) duke@435: // 1: self-frame (no frame link) duke@435: // 2: deopting frame (no frame link) duke@435: // 3: caller of deopting frame (could be compiled/interpreted). duke@435: duke@435: // Pop self-frame. We have no frame, and must rely only on EAX and ESP. never@739: __ addptr(rsp,(framesize-1)*wordSize); // Epilog! duke@435: duke@435: // Pop deoptimized frame never@739: __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); never@739: __ addptr(rsp, rcx); duke@435: duke@435: // sp should be pointing at the return address to the caller (3) duke@435: duke@435: // Stack bang to make sure there's enough room for these interpreter frames. duke@435: if (UseStackBanging) { duke@435: __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); duke@435: __ bang_stack_size(rbx, rcx); duke@435: } duke@435: duke@435: duke@435: // Load array of frame pcs into ECX duke@435: __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); duke@435: never@739: __ pop(rsi); // trash the pc duke@435: duke@435: // Load array of frame sizes into ESI never@739: __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); duke@435: duke@435: Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes()); duke@435: duke@435: __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); duke@435: __ movl(counter, rbx); duke@435: duke@435: // Pick up the initial fp we should save bdelsart@3130: __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); duke@435: duke@435: // Now adjust the caller's stack to make up for the extra locals duke@435: // but record the original sp so that we can save it in the skeletal interpreter duke@435: // frame and the stack walking of interpreter_sender will get the unextended sp duke@435: // value and not the "real" sp value. duke@435: duke@435: Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes()); never@739: __ movptr(sp_temp, rsp); never@739: __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes())); never@739: __ subptr(rsp, rbx); duke@435: duke@435: // Push interpreter frames in a loop duke@435: Label loop; duke@435: __ bind(loop); never@739: __ movptr(rbx, Address(rsi, 0)); // Load frame size duke@435: #ifdef CC_INTERP never@739: __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and duke@435: #ifdef ASSERT never@739: __ push(0xDEADDEAD); // Make a recognizable pattern never@739: __ push(0xDEADDEAD); // (parm to RecursiveInterpreter...) duke@435: #else /* ASSERT */ never@739: __ subptr(rsp, 2*wordSize); // skip the "static long no_param" duke@435: #endif /* ASSERT */ duke@435: #else /* CC_INTERP */ never@739: __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand duke@435: #endif /* CC_INTERP */ never@739: __ pushptr(Address(rcx, 0)); // save return address duke@435: __ enter(); // save old & set new rbp, never@739: __ subptr(rsp, rbx); // Prolog! never@739: __ movptr(rbx, sp_temp); // sender's sp duke@435: #ifdef CC_INTERP never@739: __ movptr(Address(rbp, duke@435: -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), duke@435: rbx); // Make it walkable duke@435: #else /* CC_INTERP */ duke@435: // This value is corrected by layout_activation_impl xlu@947: __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD ); never@739: __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable duke@435: #endif /* CC_INTERP */ never@739: __ movptr(sp_temp, rsp); // pass to next frame never@739: __ addptr(rsi, wordSize); // Bump array pointer (sizes) never@739: __ addptr(rcx, wordSize); // Bump array pointer (pcs) never@739: __ decrementl(counter); // decrement counter duke@435: __ jcc(Assembler::notZero, loop); never@739: __ pushptr(Address(rcx, 0)); // save final return address duke@435: duke@435: // Re-push self-frame duke@435: __ enter(); // save old & set new rbp, never@739: __ subptr(rsp, (framesize-2) * wordSize); // Prolog! duke@435: duke@435: duke@435: // set last_Java_sp, last_Java_fp duke@435: __ get_thread(rdi); duke@435: __ set_last_Java_frame(rdi, noreg, rbp, NULL); duke@435: duke@435: // Call C code. Need thread but NOT official VM entry duke@435: // crud. We cannot block on this call, no GC can happen. Call should duke@435: // restore return values to their stack-slots with the new SP. never@739: __ movptr(Address(rsp,arg0_off*wordSize),rdi); duke@435: __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap); duke@435: __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); duke@435: // Set an oopmap for the call site duke@435: oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) ); duke@435: duke@435: __ get_thread(rdi); duke@435: __ reset_last_Java_frame(rdi, true, false); duke@435: duke@435: // Pop self-frame. duke@435: __ leave(); // Epilog! duke@435: duke@435: // Jump to interpreter duke@435: __ ret(0); duke@435: duke@435: // ------------- duke@435: // make sure all code is generated duke@435: masm->flush(); duke@435: duke@435: _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize); duke@435: } duke@435: #endif // COMPILER2 duke@435: duke@435: //------------------------------generate_handler_blob------ duke@435: // duke@435: // Generate a special Compile2Runtime blob that saves all registers, duke@435: // setup oopmap, and calls safepoint code to stop the compiled code for duke@435: // a safepoint. duke@435: // never@2950: SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, bool cause_return) { duke@435: duke@435: // Account for thread arg in our frame duke@435: const int additional_words = 1; duke@435: int frame_size_in_words; duke@435: duke@435: assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); duke@435: duke@435: ResourceMark rm; duke@435: OopMapSet *oop_maps = new OopMapSet(); duke@435: OopMap* map; duke@435: duke@435: // allocate space for the code duke@435: // setup code generation tools duke@435: CodeBuffer buffer("handler_blob", 1024, 512); duke@435: MacroAssembler* masm = new MacroAssembler(&buffer); duke@435: duke@435: const Register java_thread = rdi; // callee-saved for VC++ duke@435: address start = __ pc(); duke@435: address call_pc = NULL; duke@435: duke@435: // If cause_return is true we are at a poll_return and there is duke@435: // the return address on the stack to the caller on the nmethod duke@435: // that is safepoint. We can leave this return on the stack and duke@435: // effectively complete the return and safepoint in the caller. duke@435: // Otherwise we push space for a return address that the safepoint duke@435: // handler will install later to make the stack walking sensible. duke@435: if( !cause_return ) never@739: __ push(rbx); // Make room for return address (or push it again) duke@435: duke@435: map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); duke@435: duke@435: // The following is basically a call_VM. However, we need the precise duke@435: // address of the call in order to generate an oopmap. Hence, we do all the duke@435: // work ourselves. duke@435: duke@435: // Push thread argument and setup last_Java_sp duke@435: __ get_thread(java_thread); never@739: __ push(java_thread); duke@435: __ set_last_Java_frame(java_thread, noreg, noreg, NULL); duke@435: duke@435: // if this was not a poll_return then we need to correct the return address now. duke@435: if( !cause_return ) { never@739: __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset())); never@739: __ movptr(Address(rbp, wordSize), rax); duke@435: } duke@435: duke@435: // do the call duke@435: __ call(RuntimeAddress(call_ptr)); duke@435: duke@435: // Set an oopmap for the call site. This oopmap will map all duke@435: // oop-registers and debug-info registers as callee-saved. This duke@435: // will allow deoptimization at this safepoint to find all possible duke@435: // debug-info recordings, as well as let GC find all oops. duke@435: duke@435: oop_maps->add_gc_map( __ pc() - start, map); duke@435: duke@435: // Discard arg never@739: __ pop(rcx); duke@435: duke@435: Label noException; duke@435: duke@435: // Clear last_Java_sp again duke@435: __ get_thread(java_thread); duke@435: __ reset_last_Java_frame(java_thread, false, false); duke@435: never@739: __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); duke@435: __ jcc(Assembler::equal, noException); duke@435: duke@435: // Exception pending duke@435: duke@435: RegisterSaver::restore_live_registers(masm); duke@435: duke@435: __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); duke@435: duke@435: __ bind(noException); duke@435: duke@435: // Normal exit, register restoring and exit duke@435: RegisterSaver::restore_live_registers(masm); duke@435: duke@435: __ ret(0); duke@435: duke@435: // make sure all code is generated duke@435: masm->flush(); duke@435: duke@435: // Fill-out other meta info duke@435: return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); duke@435: } duke@435: duke@435: // duke@435: // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss duke@435: // duke@435: // Generate a stub that calls into vm to find out the proper destination duke@435: // of a java call. All the argument registers are live at this point duke@435: // but since this is generic code we don't know what they are and the caller duke@435: // must do any gc of the args. duke@435: // never@2950: RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { duke@435: assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); duke@435: duke@435: // allocate space for the code duke@435: ResourceMark rm; duke@435: duke@435: CodeBuffer buffer(name, 1000, 512); duke@435: MacroAssembler* masm = new MacroAssembler(&buffer); duke@435: duke@435: int frame_size_words; duke@435: enum frame_layout { duke@435: thread_off, duke@435: extra_words }; duke@435: duke@435: OopMapSet *oop_maps = new OopMapSet(); duke@435: OopMap* map = NULL; duke@435: duke@435: int start = __ offset(); duke@435: duke@435: map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words); duke@435: duke@435: int frame_complete = __ offset(); duke@435: duke@435: const Register thread = rdi; duke@435: __ get_thread(rdi); duke@435: never@739: __ push(thread); duke@435: __ set_last_Java_frame(thread, noreg, rbp, NULL); duke@435: duke@435: __ call(RuntimeAddress(destination)); duke@435: duke@435: duke@435: // Set an oopmap for the call site. duke@435: // We need this not only for callee-saved registers, but also for volatile duke@435: // registers that the compiler might be keeping live across a safepoint. duke@435: duke@435: oop_maps->add_gc_map( __ offset() - start, map); duke@435: duke@435: // rax, contains the address we are going to jump to assuming no exception got installed duke@435: never@739: __ addptr(rsp, wordSize); duke@435: duke@435: // clear last_Java_sp duke@435: __ reset_last_Java_frame(thread, true, false); duke@435: // check for pending exceptions duke@435: Label pending; never@739: __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); duke@435: __ jcc(Assembler::notEqual, pending); duke@435: coleenp@4037: // get the returned Method* coleenp@4037: __ get_vm_result_2(rbx, thread); never@739: __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx); never@739: never@739: __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax); duke@435: duke@435: RegisterSaver::restore_live_registers(masm); duke@435: duke@435: // We are back the the original state on entry and ready to go. duke@435: duke@435: __ jmp(rax); duke@435: duke@435: // Pending exception after the safepoint duke@435: duke@435: __ bind(pending); duke@435: duke@435: RegisterSaver::restore_live_registers(masm); duke@435: duke@435: // exception pending => remove activation and forward to exception handler duke@435: duke@435: __ get_thread(thread); xlu@947: __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); never@739: __ movptr(rax, Address(thread, Thread::pending_exception_offset())); duke@435: __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); duke@435: duke@435: // ------------- duke@435: // make sure all code is generated duke@435: masm->flush(); duke@435: duke@435: // return the blob duke@435: // frame_size_words or bytes?? duke@435: return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true); duke@435: }