duke@435: /* duke@435: * Copyright 1997-2006 Sun Microsystems, Inc. All Rights Reserved. duke@435: * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. duke@435: * duke@435: * This code is free software; you can redistribute it and/or modify it duke@435: * under the terms of the GNU General Public License version 2 only, as duke@435: * published by the Free Software Foundation. duke@435: * duke@435: * This code is distributed in the hope that it will be useful, but WITHOUT duke@435: * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or duke@435: * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License duke@435: * version 2 for more details (a copy is included in the LICENSE file that duke@435: * accompanied this code). duke@435: * duke@435: * You should have received a copy of the GNU General Public License version duke@435: * 2 along with this work; if not, write to the Free Software Foundation, duke@435: * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. duke@435: * duke@435: * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, duke@435: * CA 95054 USA or visit www.sun.com if you need additional information or duke@435: * have any questions. duke@435: * duke@435: */ duke@435: duke@435: class LoopTree; duke@435: class MachCallNode; duke@435: class MachSafePointNode; duke@435: class Matcher; duke@435: class PhaseCFG; duke@435: class PhaseLive; duke@435: class PhaseRegAlloc; duke@435: class PhaseChaitin; duke@435: duke@435: #define OPTO_DEBUG_SPLIT_FREQ BLOCK_FREQUENCY(0.001) duke@435: #define OPTO_LRG_HIGH_FREQ BLOCK_FREQUENCY(0.25) duke@435: duke@435: //------------------------------LRG-------------------------------------------- duke@435: // Live-RanGe structure. duke@435: class LRG : public ResourceObj { duke@435: public: duke@435: enum { SPILL_REG=29999 }; // Register number of a spilled LRG duke@435: duke@435: double _cost; // 2 for loads/1 for stores times block freq duke@435: double _area; // Sum of all simultaneously live values duke@435: double score() const; // Compute score from cost and area duke@435: double _maxfreq; // Maximum frequency of any def or use duke@435: duke@435: Node *_def; // Check for multi-def live ranges duke@435: #ifndef PRODUCT duke@435: GrowableArray* _defs; duke@435: #endif duke@435: duke@435: uint _risk_bias; // Index of LRG which we want to avoid color duke@435: uint _copy_bias; // Index of LRG which we want to share color duke@435: duke@435: uint _next; // Index of next LRG in linked list duke@435: uint _prev; // Index of prev LRG in linked list duke@435: private: duke@435: uint _reg; // Chosen register; undefined if mask is plural duke@435: public: duke@435: // Return chosen register for this LRG. Error if the LRG is not bound to duke@435: // a single register. duke@435: OptoReg::Name reg() const { return OptoReg::Name(_reg); } duke@435: void set_reg( OptoReg::Name r ) { _reg = r; } duke@435: duke@435: private: duke@435: uint _eff_degree; // Effective degree: Sum of neighbors _num_regs duke@435: public: duke@435: int degree() const { assert( _degree_valid, "" ); return _eff_degree; } duke@435: // Degree starts not valid and any change to the IFG neighbor duke@435: // set makes it not valid. duke@435: void set_degree( uint degree ) { _eff_degree = degree; debug_only(_degree_valid = 1;) } duke@435: // Made a change that hammered degree duke@435: void invalid_degree() { debug_only(_degree_valid=0;) } duke@435: // Incrementally modify degree. If it was correct, it should remain correct duke@435: void inc_degree( uint mod ) { _eff_degree += mod; } duke@435: // Compute the degree between 2 live ranges duke@435: int compute_degree( LRG &l ) const; duke@435: duke@435: private: duke@435: RegMask _mask; // Allowed registers for this LRG duke@435: uint _mask_size; // cache of _mask.Size(); duke@435: public: duke@435: int compute_mask_size() const { return _mask.is_AllStack() ? 65535 : _mask.Size(); } duke@435: void set_mask_size( int size ) { duke@435: assert((size == 65535) || (size == (int)_mask.Size()), ""); duke@435: _mask_size = size; duke@435: debug_only(_msize_valid=1;) duke@435: debug_only( if( _num_regs == 2 && !_fat_proj ) _mask.VerifyPairs(); ) duke@435: } duke@435: void compute_set_mask_size() { set_mask_size(compute_mask_size()); } duke@435: int mask_size() const { assert( _msize_valid, "mask size not valid" ); duke@435: return _mask_size; } duke@435: // Get the last mask size computed, even if it does not match the duke@435: // count of bits in the current mask. duke@435: int get_invalid_mask_size() const { return _mask_size; } duke@435: const RegMask &mask() const { return _mask; } duke@435: void set_mask( const RegMask &rm ) { _mask = rm; debug_only(_msize_valid=0;)} duke@435: void AND( const RegMask &rm ) { _mask.AND(rm); debug_only(_msize_valid=0;)} duke@435: void SUBTRACT( const RegMask &rm ) { _mask.SUBTRACT(rm); debug_only(_msize_valid=0;)} duke@435: void Clear() { _mask.Clear() ; debug_only(_msize_valid=1); _mask_size = 0; } duke@435: void Set_All() { _mask.Set_All(); debug_only(_msize_valid=1); _mask_size = RegMask::CHUNK_SIZE; } duke@435: void Insert( OptoReg::Name reg ) { _mask.Insert(reg); debug_only(_msize_valid=0;) } duke@435: void Remove( OptoReg::Name reg ) { _mask.Remove(reg); debug_only(_msize_valid=0;) } duke@435: void ClearToPairs() { _mask.ClearToPairs(); debug_only(_msize_valid=0;) } duke@435: duke@435: // Number of registers this live range uses when it colors duke@435: private: duke@435: uint8 _num_regs; // 2 for Longs and Doubles, 1 for all else duke@435: // except _num_regs is kill count for fat_proj duke@435: public: duke@435: int num_regs() const { return _num_regs; } duke@435: void set_num_regs( int reg ) { assert( _num_regs == reg || !_num_regs, "" ); _num_regs = reg; } duke@435: duke@435: private: duke@435: // Number of physical registers this live range uses when it colors duke@435: // Architecture and register-set dependent duke@435: uint8 _reg_pressure; duke@435: public: duke@435: void set_reg_pressure(int i) { _reg_pressure = i; } duke@435: int reg_pressure() const { return _reg_pressure; } duke@435: duke@435: // How much 'wiggle room' does this live range have? duke@435: // How many color choices can it make (scaled by _num_regs)? duke@435: int degrees_of_freedom() const { return mask_size() - _num_regs; } duke@435: // Bound LRGs have ZERO degrees of freedom. We also count duke@435: // must_spill as bound. duke@435: bool is_bound () const { return _is_bound; } duke@435: // Negative degrees-of-freedom; even with no neighbors this duke@435: // live range must spill. duke@435: bool not_free() const { return degrees_of_freedom() < 0; } duke@435: // Is this live range of "low-degree"? Trivially colorable? duke@435: bool lo_degree () const { return degree() <= degrees_of_freedom(); } duke@435: // Is this live range just barely "low-degree"? Trivially colorable? duke@435: bool just_lo_degree () const { return degree() == degrees_of_freedom(); } duke@435: duke@435: uint _is_oop:1, // Live-range holds an oop duke@435: _is_float:1, // True if in float registers duke@435: _was_spilled1:1, // True if prior spilling on def duke@435: _was_spilled2:1, // True if twice prior spilling on def duke@435: _is_bound:1, // live range starts life with no duke@435: // degrees of freedom. duke@435: _direct_conflict:1, // True if def and use registers in conflict duke@435: _must_spill:1, // live range has lost all degrees of freedom duke@435: // If _fat_proj is set, live range does NOT require aligned, adjacent duke@435: // registers and has NO interferences. duke@435: // If _fat_proj is clear, live range requires num_regs() to be a power of duke@435: // 2, and it requires registers to form an aligned, adjacent set. duke@435: _fat_proj:1, // duke@435: _was_lo:1, // Was lo-degree prior to coalesce duke@435: _msize_valid:1, // _mask_size cache valid duke@435: _degree_valid:1, // _degree cache valid duke@435: _has_copy:1, // Adjacent to some copy instruction duke@435: _at_risk:1; // Simplify says this guy is at risk to spill duke@435: duke@435: duke@435: // Alive if non-zero, dead if zero duke@435: bool alive() const { return _def != NULL; } duke@435: duke@435: #ifndef PRODUCT duke@435: void dump( ) const; duke@435: #endif duke@435: }; duke@435: duke@435: //------------------------------LRG_List--------------------------------------- duke@435: // Map Node indices to Live RanGe indices. duke@435: // Array lookup in the optimized case. duke@435: class LRG_List : public ResourceObj { duke@435: uint _cnt, _max; duke@435: uint* _lidxs; duke@435: ReallocMark _nesting; // assertion check for reallocations duke@435: public: duke@435: LRG_List( uint max ); duke@435: duke@435: uint lookup( uint nidx ) const { duke@435: return _lidxs[nidx]; duke@435: } duke@435: uint operator[] (uint nidx) const { return lookup(nidx); } duke@435: duke@435: void map( uint nidx, uint lidx ) { duke@435: assert( nidx < _cnt, "oob" ); duke@435: _lidxs[nidx] = lidx; duke@435: } duke@435: void extend( uint nidx, uint lidx ); duke@435: duke@435: uint Size() const { return _cnt; } duke@435: }; duke@435: duke@435: //------------------------------IFG-------------------------------------------- duke@435: // InterFerence Graph duke@435: // An undirected graph implementation. Created with a fixed number of duke@435: // vertices. Edges can be added & tested. Vertices can be removed, then duke@435: // added back later with all edges intact. Can add edges between one vertex duke@435: // and a list of other vertices. Can union vertices (and their edges) duke@435: // together. The IFG needs to be really really fast, and also fairly duke@435: // abstract! It needs abstraction so I can fiddle with the implementation to duke@435: // get even more speed. duke@435: class PhaseIFG : public Phase { duke@435: // Current implementation: a triangular adjacency list. duke@435: duke@435: // Array of adjacency-lists, indexed by live-range number duke@435: IndexSet *_adjs; duke@435: duke@435: // Assertion bit for proper use of Squaring duke@435: bool _is_square; duke@435: duke@435: // Live range structure goes here duke@435: LRG *_lrgs; // Array of LRG structures duke@435: duke@435: public: duke@435: // Largest live-range number duke@435: uint _maxlrg; duke@435: duke@435: Arena *_arena; duke@435: duke@435: // Keep track of inserted and deleted Nodes duke@435: VectorSet *_yanked; duke@435: duke@435: PhaseIFG( Arena *arena ); duke@435: void init( uint maxlrg ); duke@435: duke@435: // Add edge between a and b. Returns true if actually addded. duke@435: int add_edge( uint a, uint b ); duke@435: duke@435: // Add edge between a and everything in the vector duke@435: void add_vector( uint a, IndexSet *vec ); duke@435: duke@435: // Test for edge existance duke@435: int test_edge( uint a, uint b ) const; duke@435: duke@435: // Square-up matrix for faster Union duke@435: void SquareUp(); duke@435: duke@435: // Return number of LRG neighbors duke@435: uint neighbor_cnt( uint a ) const { return _adjs[a].count(); } duke@435: // Union edges of b into a on Squared-up matrix duke@435: void Union( uint a, uint b ); duke@435: // Test for edge in Squared-up matrix duke@435: int test_edge_sq( uint a, uint b ) const; duke@435: // Yank a Node and all connected edges from the IFG. Be prepared to duke@435: // re-insert the yanked Node in reverse order of yanking. Return a duke@435: // list of neighbors (edges) yanked. duke@435: IndexSet *remove_node( uint a ); duke@435: // Reinsert a yanked Node duke@435: void re_insert( uint a ); duke@435: // Return set of neighbors duke@435: IndexSet *neighbors( uint a ) const { return &_adjs[a]; } duke@435: duke@435: #ifndef PRODUCT duke@435: // Dump the IFG duke@435: void dump() const; duke@435: void stats() const; duke@435: void verify( const PhaseChaitin * ) const; duke@435: #endif duke@435: duke@435: //--------------- Live Range Accessors duke@435: LRG &lrgs(uint idx) const { assert(idx < _maxlrg, "oob"); return _lrgs[idx]; } duke@435: duke@435: // Compute and set effective degree. Might be folded into SquareUp(). duke@435: void Compute_Effective_Degree(); duke@435: duke@435: // Compute effective degree as the sum of neighbors' _sizes. duke@435: int effective_degree( uint lidx ) const; duke@435: }; duke@435: duke@435: // TEMPORARILY REPLACED WITH COMMAND LINE FLAG duke@435: duke@435: //// !!!!! Magic Constants need to move into ad file duke@435: #ifdef SPARC duke@435: //#define FLOAT_PRESSURE 30 /* SFLT_REG_mask.Size() - 1 */ duke@435: //#define INT_PRESSURE 23 /* NOTEMP_I_REG_mask.Size() - 1 */ duke@435: #define FLOAT_INCREMENT(regs) regs duke@435: #else duke@435: //#define FLOAT_PRESSURE 6 duke@435: //#define INT_PRESSURE 6 duke@435: #define FLOAT_INCREMENT(regs) 1 duke@435: #endif duke@435: duke@435: //------------------------------Chaitin---------------------------------------- duke@435: // Briggs-Chaitin style allocation, mostly. duke@435: class PhaseChaitin : public PhaseRegAlloc { duke@435: duke@435: int _trip_cnt; duke@435: int _alternate; duke@435: duke@435: uint _maxlrg; // Max live range number duke@435: LRG &lrgs(uint idx) const { return _ifg->lrgs(idx); } duke@435: PhaseLive *_live; // Liveness, used in the interference graph duke@435: PhaseIFG *_ifg; // Interference graph (for original chunk) duke@435: Node_List **_lrg_nodes; // Array of node; lists for lrgs which spill duke@435: VectorSet _spilled_once; // Nodes that have been spilled duke@435: VectorSet _spilled_twice; // Nodes that have been spilled twice duke@435: duke@435: LRG_List _names; // Map from Nodes to Live RanGes duke@435: duke@435: // Union-find map. Declared as a short for speed. duke@435: // Indexed by live-range number, it returns the compacted live-range number duke@435: LRG_List _uf_map; duke@435: // Reset the Union-Find map to identity duke@435: void reset_uf_map( uint maxlrg ); duke@435: // Remove the need for the Union-Find mapping duke@435: void compress_uf_map_for_nodes( ); duke@435: duke@435: // Combine the Live Range Indices for these 2 Nodes into a single live duke@435: // range. Future requests for any Node in either live range will duke@435: // return the live range index for the combined live range. duke@435: void Union( const Node *src, const Node *dst ); duke@435: duke@435: void new_lrg( const Node *x, uint lrg ); duke@435: duke@435: // Compact live ranges, removing unused ones. Return new maxlrg. duke@435: void compact(); duke@435: duke@435: uint _lo_degree; // Head of lo-degree LRGs list duke@435: uint _lo_stk_degree; // Head of lo-stk-degree LRGs list duke@435: uint _hi_degree; // Head of hi-degree LRGs list duke@435: uint _simplified; // Linked list head of simplified LRGs duke@435: duke@435: // Helper functions for Split() duke@435: uint split_DEF( Node *def, Block *b, int loc, uint max, Node **Reachblock, Node **debug_defs, GrowableArray splits, int slidx ); duke@435: uint split_USE( Node *def, Block *b, Node *use, uint useidx, uint max, bool def_down, bool cisc_sp, GrowableArray splits, int slidx ); duke@435: int clone_projs( Block *b, uint idx, Node *con, Node *copy, uint &maxlrg ); duke@435: Node *split_Rematerialize( Node *def, Block *b, uint insidx, uint &maxlrg, GrowableArray splits, int slidx, uint *lrg2reach, Node **Reachblock, bool walkThru ); duke@435: // True if lidx is used before any real register is def'd in the block duke@435: bool prompt_use( Block *b, uint lidx ); duke@435: Node *get_spillcopy_wide( Node *def, Node *use, uint uidx ); duke@435: // Insert the spill at chosen location. Skip over any interveneing Proj's or duke@435: // Phis. Skip over a CatchNode and projs, inserting in the fall-through block duke@435: // instead. Update high-pressure indices. Create a new live range. duke@435: void insert_proj( Block *b, uint i, Node *spill, uint maxlrg ); duke@435: duke@435: bool is_high_pressure( Block *b, LRG *lrg, uint insidx ); duke@435: duke@435: uint _oldphi; // Node index which separates pre-allocation nodes duke@435: duke@435: Block **_blks; // Array of blocks sorted by frequency for coalescing duke@435: duke@435: #ifndef PRODUCT duke@435: bool _trace_spilling; duke@435: #endif duke@435: duke@435: public: duke@435: PhaseChaitin( uint unique, PhaseCFG &cfg, Matcher &matcher ); duke@435: ~PhaseChaitin() {} duke@435: duke@435: // Convert a Node into a Live Range Index - a lidx duke@435: uint Find( const Node *n ) { duke@435: uint lidx = n2lidx(n); duke@435: uint uf_lidx = _uf_map[lidx]; duke@435: return (uf_lidx == lidx) ? uf_lidx : Find_compress(n); duke@435: } duke@435: uint Find_const( uint lrg ) const; duke@435: uint Find_const( const Node *n ) const; duke@435: duke@435: // Do all the real work of allocate duke@435: void Register_Allocate(); duke@435: duke@435: uint n2lidx( const Node *n ) const { return _names[n->_idx]; } duke@435: duke@435: #ifndef PRODUCT duke@435: bool trace_spilling() const { return _trace_spilling; } duke@435: #endif duke@435: duke@435: private: duke@435: // De-SSA the world. Assign registers to Nodes. Use the same register for duke@435: // all inputs to a PhiNode, effectively coalescing live ranges. Insert duke@435: // copies as needed. duke@435: void de_ssa(); duke@435: uint Find_compress( const Node *n ); duke@435: uint Find( uint lidx ) { duke@435: uint uf_lidx = _uf_map[lidx]; duke@435: return (uf_lidx == lidx) ? uf_lidx : Find_compress(lidx); duke@435: } duke@435: uint Find_compress( uint lidx ); duke@435: duke@435: uint Find_id( const Node *n ) { duke@435: uint retval = n2lidx(n); duke@435: assert(retval == Find(n),"Invalid node to lidx mapping"); duke@435: return retval; duke@435: } duke@435: duke@435: // Add edge between reg and everything in the vector. duke@435: // Same as _ifg->add_vector(reg,live) EXCEPT use the RegMask duke@435: // information to trim the set of interferences. Return the duke@435: // count of edges added. duke@435: void interfere_with_live( uint reg, IndexSet *live ); duke@435: // Count register pressure for asserts duke@435: uint count_int_pressure( IndexSet *liveout ); duke@435: uint count_float_pressure( IndexSet *liveout ); duke@435: duke@435: // Build the interference graph using virtual registers only. duke@435: // Used for aggressive coalescing. duke@435: void build_ifg_virtual( ); duke@435: duke@435: // Build the interference graph using physical registers when available. duke@435: // That is, if 2 live ranges are simultaneously alive but in their duke@435: // acceptable register sets do not overlap, then they do not interfere. duke@435: uint build_ifg_physical( ResourceArea *a ); duke@435: duke@435: // Gather LiveRanGe information, including register masks and base pointer/ duke@435: // derived pointer relationships. duke@435: void gather_lrg_masks( bool mod_cisc_masks ); duke@435: duke@435: // Force the bases of derived pointers to be alive at GC points. duke@435: bool stretch_base_pointer_live_ranges( ResourceArea *a ); duke@435: // Helper to stretch above; recursively discover the base Node for duke@435: // a given derived Node. Easy for AddP-related machine nodes, but duke@435: // needs to be recursive for derived Phis. duke@435: Node *find_base_for_derived( Node **derived_base_map, Node *derived, uint &maxlrg ); duke@435: duke@435: // Set the was-lo-degree bit. Conservative coalescing should not change the duke@435: // colorability of the graph. If any live range was of low-degree before duke@435: // coalescing, it should Simplify. This call sets the was-lo-degree bit. duke@435: void set_was_low(); duke@435: duke@435: // Split live-ranges that must spill due to register conflicts (as opposed duke@435: // to capacity spills). Typically these are things def'd in a register duke@435: // and used on the stack or vice-versa. duke@435: void pre_spill(); duke@435: duke@435: // Init LRG caching of degree, numregs. Init lo_degree list. duke@435: void cache_lrg_info( ); duke@435: duke@435: // Simplify the IFG by removing LRGs of low degree with no copies duke@435: void Pre_Simplify(); duke@435: duke@435: // Simplify the IFG by removing LRGs of low degree duke@435: void Simplify(); duke@435: duke@435: // Select colors by re-inserting edges into the IFG. duke@435: // Return TRUE if any spills occured. duke@435: uint Select( ); duke@435: // Helper function for select which allows biased coloring duke@435: OptoReg::Name choose_color( LRG &lrg, int chunk ); duke@435: // Helper function which implements biasing heuristic duke@435: OptoReg::Name bias_color( LRG &lrg, int chunk ); duke@435: duke@435: // Split uncolorable live ranges duke@435: // Return new number of live ranges duke@435: uint Split( uint maxlrg ); duke@435: duke@435: // Copy 'was_spilled'-edness from one Node to another. duke@435: void copy_was_spilled( Node *src, Node *dst ); duke@435: // Set the 'spilled_once' or 'spilled_twice' flag on a node. duke@435: void set_was_spilled( Node *n ); duke@435: duke@435: // Convert ideal spill-nodes into machine loads & stores duke@435: // Set C->failing when fixup spills could not complete, node limit exceeded. duke@435: void fixup_spills(); duke@435: duke@435: // Post-Allocation peephole copy removal duke@435: void post_allocate_copy_removal(); duke@435: Node *skip_copies( Node *c ); duke@435: int yank_if_dead( Node *old, Block *current_block, Node_List *value, Node_List *regnd ); duke@435: int elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List ®nd, bool can_change_regs ); duke@435: int use_prior_register( Node *copy, uint idx, Node *def, Block *current_block, Node_List &value, Node_List ®nd ); duke@435: bool may_be_copy_of_callee( Node *def ) const; duke@435: duke@435: // If nreg already contains the same constant as val then eliminate it duke@435: bool eliminate_copy_of_constant(Node* val, Block *current_block, Node_List& value, Node_List ®nd, duke@435: OptoReg::Name nreg, OptoReg::Name nreg2); duke@435: // Extend the node to LRG mapping duke@435: void add_reference( const Node *node, const Node *old_node); duke@435: duke@435: private: duke@435: duke@435: static int _final_loads, _final_stores, _final_copies, _final_memoves; duke@435: static double _final_load_cost, _final_store_cost, _final_copy_cost, _final_memove_cost; duke@435: static int _conserv_coalesce, _conserv_coalesce_pair; duke@435: static int _conserv_coalesce_trie, _conserv_coalesce_quad; duke@435: static int _post_alloc; duke@435: static int _lost_opp_pp_coalesce, _lost_opp_cflow_coalesce; duke@435: static int _used_cisc_instructions, _unused_cisc_instructions; duke@435: static int _allocator_attempts, _allocator_successes; duke@435: duke@435: #ifndef PRODUCT duke@435: static uint _high_pressure, _low_pressure; duke@435: duke@435: void dump() const; duke@435: void dump( const Node *n ) const; duke@435: void dump( const Block * b ) const; duke@435: void dump_degree_lists() const; duke@435: void dump_simplified() const; duke@435: void dump_lrg( uint lidx ) const; duke@435: void dump_bb( uint pre_order ) const; duke@435: duke@435: // Verify that base pointers and derived pointers are still sane duke@435: void verify_base_ptrs( ResourceArea *a ) const; duke@435: duke@435: void dump_for_spill_split_recycle() const; duke@435: duke@435: public: duke@435: void dump_frame() const; duke@435: char *dump_register( const Node *n, char *buf ) const; duke@435: private: duke@435: static void print_chaitin_statistics(); duke@435: #endif duke@435: friend class PhaseCoalesce; duke@435: friend class PhaseAggressiveCoalesce; duke@435: friend class PhaseConservativeCoalesce; duke@435: };