duke@435: /*
coleenp@4037:  * Copyright (c) 1999, 2012, Oracle and/or its affiliates. All rights reserved.
duke@435:  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435:  *
duke@435:  * This code is free software; you can redistribute it and/or modify it
duke@435:  * under the terms of the GNU General Public License version 2 only, as
duke@435:  * published by the Free Software Foundation.
duke@435:  *
duke@435:  * This code is distributed in the hope that it will be useful, but WITHOUT
duke@435:  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435:  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
duke@435:  * version 2 for more details (a copy is included in the LICENSE file that
duke@435:  * accompanied this code).
duke@435:  *
duke@435:  * You should have received a copy of the GNU General Public License version
duke@435:  * 2 along with this work; if not, write to the Free Software Foundation,
duke@435:  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435:  *
trims@1907:  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907:  * or visit www.oracle.com if you need additional information or have any
trims@1907:  * questions.
duke@435:  *
duke@435:  */
duke@435: 
stefank@2314: #include "precompiled.hpp"
stefank@2314: #include "c1/c1_MacroAssembler.hpp"
stefank@2314: #include "c1/c1_Runtime1.hpp"
stefank@2314: #include "classfile/systemDictionary.hpp"
stefank@2314: #include "gc_interface/collectedHeap.hpp"
stefank@2314: #include "interpreter/interpreter.hpp"
stefank@2314: #include "oops/arrayOop.hpp"
stefank@2314: #include "oops/markOop.hpp"
stefank@2314: #include "runtime/basicLock.hpp"
stefank@2314: #include "runtime/biasedLocking.hpp"
stefank@2314: #include "runtime/os.hpp"
stefank@2314: #include "runtime/stubRoutines.hpp"
duke@435: 
duke@435: int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr, Register scratch, Label& slow_case) {
never@739:   const int aligned_mask = BytesPerWord -1;
duke@435:   const int hdr_offset = oopDesc::mark_offset_in_bytes();
duke@435:   assert(hdr == rax, "hdr must be rax, for the cmpxchg instruction");
duke@435:   assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
duke@435:   Label done;
duke@435:   int null_check_offset = -1;
duke@435: 
duke@435:   verify_oop(obj);
duke@435: 
duke@435:   // save object being locked into the BasicObjectLock
never@739:   movptr(Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()), obj);
duke@435: 
duke@435:   if (UseBiasedLocking) {
duke@435:     assert(scratch != noreg, "should have scratch register at this point");
duke@435:     null_check_offset = biased_locking_enter(disp_hdr, obj, hdr, scratch, false, done, &slow_case);
duke@435:   } else {
duke@435:     null_check_offset = offset();
duke@435:   }
duke@435: 
duke@435:   // Load object header
never@739:   movptr(hdr, Address(obj, hdr_offset));
duke@435:   // and mark it as unlocked
never@739:   orptr(hdr, markOopDesc::unlocked_value);
duke@435:   // save unlocked object header into the displaced header location on the stack
never@739:   movptr(Address(disp_hdr, 0), hdr);
duke@435:   // test if object header is still the same (i.e. unlocked), and if so, store the
duke@435:   // displaced header address in the object header - if it is not the same, get the
duke@435:   // object header instead
duke@435:   if (os::is_MP()) MacroAssembler::lock(); // must be immediately before cmpxchg!
never@739:   cmpxchgptr(disp_hdr, Address(obj, hdr_offset));
duke@435:   // if the object header was the same, we're done
duke@435:   if (PrintBiasedLockingStatistics) {
duke@435:     cond_inc32(Assembler::equal,
duke@435:                ExternalAddress((address)BiasedLocking::fast_path_entry_count_addr()));
duke@435:   }
duke@435:   jcc(Assembler::equal, done);
duke@435:   // if the object header was not the same, it is now in the hdr register
duke@435:   // => test if it is a stack pointer into the same stack (recursive locking), i.e.:
duke@435:   //
duke@435:   // 1) (hdr & aligned_mask) == 0
duke@435:   // 2) rsp <= hdr
duke@435:   // 3) hdr <= rsp + page_size
duke@435:   //
duke@435:   // these 3 tests can be done by evaluating the following expression:
duke@435:   //
duke@435:   // (hdr - rsp) & (aligned_mask - page_size)
duke@435:   //
duke@435:   // assuming both the stack pointer and page_size have their least
duke@435:   // significant 2 bits cleared and page_size is a power of 2
never@739:   subptr(hdr, rsp);
never@739:   andptr(hdr, aligned_mask - os::vm_page_size());
duke@435:   // for recursive locking, the result is zero => save it in the displaced header
duke@435:   // location (NULL in the displaced hdr location indicates recursive locking)
never@739:   movptr(Address(disp_hdr, 0), hdr);
duke@435:   // otherwise we don't care about the result and handle locking via runtime call
duke@435:   jcc(Assembler::notZero, slow_case);
duke@435:   // done
duke@435:   bind(done);
duke@435:   return null_check_offset;
duke@435: }
duke@435: 
duke@435: 
duke@435: void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
never@739:   const int aligned_mask = BytesPerWord -1;
duke@435:   const int hdr_offset = oopDesc::mark_offset_in_bytes();
duke@435:   assert(disp_hdr == rax, "disp_hdr must be rax, for the cmpxchg instruction");
duke@435:   assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
duke@435:   Label done;
duke@435: 
duke@435:   if (UseBiasedLocking) {
duke@435:     // load object
never@739:     movptr(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
duke@435:     biased_locking_exit(obj, hdr, done);
duke@435:   }
duke@435: 
duke@435:   // load displaced header
never@739:   movptr(hdr, Address(disp_hdr, 0));
duke@435:   // if the loaded hdr is NULL we had recursive locking
never@739:   testptr(hdr, hdr);
duke@435:   // if we had recursive locking, we are done
duke@435:   jcc(Assembler::zero, done);
duke@435:   if (!UseBiasedLocking) {
duke@435:     // load object
never@739:     movptr(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
duke@435:   }
duke@435:   verify_oop(obj);
duke@435:   // test if object header is pointing to the displaced header, and if so, restore
duke@435:   // the displaced header in the object - if the object header is not pointing to
duke@435:   // the displaced header, get the object header instead
duke@435:   if (os::is_MP()) MacroAssembler::lock(); // must be immediately before cmpxchg!
never@739:   cmpxchgptr(hdr, Address(obj, hdr_offset));
duke@435:   // if the object header was not pointing to the displaced header,
duke@435:   // we do unlocking via runtime call
duke@435:   jcc(Assembler::notEqual, slow_case);
duke@435:   // done
duke@435:   bind(done);
duke@435: }
duke@435: 
duke@435: 
duke@435: // Defines obj, preserves var_size_in_bytes
duke@435: void C1_MacroAssembler::try_allocate(Register obj, Register var_size_in_bytes, int con_size_in_bytes, Register t1, Register t2, Label& slow_case) {
duke@435:   if (UseTLAB) {
duke@435:     tlab_allocate(obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
duke@435:   } else {
duke@435:     eden_allocate(obj, var_size_in_bytes, con_size_in_bytes, t1, slow_case);
phh@2423:     incr_allocated_bytes(noreg, var_size_in_bytes, con_size_in_bytes, t1);
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register t1, Register t2) {
duke@435:   assert_different_registers(obj, klass, len);
duke@435:   if (UseBiasedLocking && !len->is_valid()) {
duke@435:     assert_different_registers(obj, klass, len, t1, t2);
stefank@3391:     movptr(t1, Address(klass, Klass::prototype_header_offset()));
never@739:     movptr(Address(obj, oopDesc::mark_offset_in_bytes()), t1);
duke@435:   } else {
never@739:     // This assumes that all prototype bits fit in an int32_t
never@739:     movptr(Address(obj, oopDesc::mark_offset_in_bytes ()), (int32_t)(intptr_t)markOopDesc::prototype());
duke@435:   }
iveresov@2344: #ifdef _LP64
ehelin@5694:   if (UseCompressedClassPointers) { // Take care not to kill klass
iveresov@2344:     movptr(t1, klass);
roland@4159:     encode_klass_not_null(t1);
iveresov@2344:     movl(Address(obj, oopDesc::klass_offset_in_bytes()), t1);
iveresov@2344:   } else
iveresov@2344: #endif
iveresov@2344:   {
iveresov@2344:     movptr(Address(obj, oopDesc::klass_offset_in_bytes()), klass);
iveresov@2344:   }
duke@435: 
duke@435:   if (len->is_valid()) {
duke@435:     movl(Address(obj, arrayOopDesc::length_offset_in_bytes()), len);
duke@435:   }
iveresov@2344: #ifdef _LP64
ehelin@5694:   else if (UseCompressedClassPointers) {
iveresov@2344:     xorptr(t1, t1);
iveresov@2344:     store_klass_gap(obj, t1);
iveresov@2344:   }
iveresov@2344: #endif
duke@435: }
duke@435: 
duke@435: 
duke@435: // preserves obj, destroys len_in_bytes
duke@435: void C1_MacroAssembler::initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register t1) {
duke@435:   Label done;
duke@435:   assert(obj != len_in_bytes && obj != t1 && t1 != len_in_bytes, "registers must be different");
duke@435:   assert((hdr_size_in_bytes & (BytesPerWord - 1)) == 0, "header size is not a multiple of BytesPerWord");
duke@435:   Register index = len_in_bytes;
never@739:   // index is positive and ptr sized
never@739:   subptr(index, hdr_size_in_bytes);
duke@435:   jcc(Assembler::zero, done);
duke@435:   // initialize topmost word, divide index by 2, check if odd and test if zero
duke@435:   // note: for the remaining code to work, index must be a multiple of BytesPerWord
duke@435: #ifdef ASSERT
duke@435:   { Label L;
never@739:     testptr(index, BytesPerWord - 1);
duke@435:     jcc(Assembler::zero, L);
duke@435:     stop("index is not a multiple of BytesPerWord");
duke@435:     bind(L);
duke@435:   }
duke@435: #endif
never@739:   xorptr(t1, t1);    // use _zero reg to clear memory (shorter code)
duke@435:   if (UseIncDec) {
never@739:     shrptr(index, 3);  // divide by 8/16 and set carry flag if bit 2 was set
duke@435:   } else {
never@739:     shrptr(index, 2);  // use 2 instructions to avoid partial flag stall
never@739:     shrptr(index, 1);
duke@435:   }
never@739: #ifndef _LP64
duke@435:   // index could have been not a multiple of 8 (i.e., bit 2 was set)
duke@435:   { Label even;
duke@435:     // note: if index was a multiple of 8, than it cannot
duke@435:     //       be 0 now otherwise it must have been 0 before
duke@435:     //       => if it is even, we don't need to check for 0 again
duke@435:     jcc(Assembler::carryClear, even);
duke@435:     // clear topmost word (no jump needed if conditional assignment would work here)
never@739:     movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - 0*BytesPerWord), t1);
duke@435:     // index could be 0 now, need to check again
duke@435:     jcc(Assembler::zero, done);
duke@435:     bind(even);
duke@435:   }
never@739: #endif // !_LP64
duke@435:   // initialize remaining object fields: rdx is a multiple of 2 now
duke@435:   { Label loop;
duke@435:     bind(loop);
never@739:     movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - 1*BytesPerWord), t1);
never@739:     NOT_LP64(movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - 2*BytesPerWord), t1);)
duke@435:     decrement(index);
duke@435:     jcc(Assembler::notZero, loop);
duke@435:   }
duke@435: 
duke@435:   // done
duke@435:   bind(done);
duke@435: }
duke@435: 
duke@435: 
duke@435: void C1_MacroAssembler::allocate_object(Register obj, Register t1, Register t2, int header_size, int object_size, Register klass, Label& slow_case) {
duke@435:   assert(obj == rax, "obj must be in rax, for cmpxchg");
phh@2423:   assert_different_registers(obj, t1, t2); // XXX really?
duke@435:   assert(header_size >= 0 && object_size >= header_size, "illegal sizes");
duke@435: 
duke@435:   try_allocate(obj, noreg, object_size * BytesPerWord, t1, t2, slow_case);
duke@435: 
duke@435:   initialize_object(obj, klass, noreg, object_size * HeapWordSize, t1, t2);
duke@435: }
duke@435: 
duke@435: void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register var_size_in_bytes, int con_size_in_bytes, Register t1, Register t2) {
duke@435:   assert((con_size_in_bytes & MinObjAlignmentInBytesMask) == 0,
duke@435:          "con_size_in_bytes is not multiple of alignment");
iveresov@2344:   const int hdr_size_in_bytes = instanceOopDesc::header_size() * HeapWordSize;
duke@435: 
duke@435:   initialize_header(obj, klass, noreg, t1, t2);
duke@435: 
duke@435:   // clear rest of allocated space
duke@435:   const Register t1_zero = t1;
duke@435:   const Register index = t2;
duke@435:   const int threshold = 6 * BytesPerWord;   // approximate break even point for code size (see comments below)
duke@435:   if (var_size_in_bytes != noreg) {
never@739:     mov(index, var_size_in_bytes);
duke@435:     initialize_body(obj, index, hdr_size_in_bytes, t1_zero);
duke@435:   } else if (con_size_in_bytes <= threshold) {
duke@435:     // use explicit null stores
duke@435:     // code size = 2 + 3*n bytes (n = number of fields to clear)
never@739:     xorptr(t1_zero, t1_zero); // use t1_zero reg to clear memory (shorter code)
duke@435:     for (int i = hdr_size_in_bytes; i < con_size_in_bytes; i += BytesPerWord)
never@739:       movptr(Address(obj, i), t1_zero);
duke@435:   } else if (con_size_in_bytes > hdr_size_in_bytes) {
duke@435:     // use loop to null out the fields
duke@435:     // code size = 16 bytes for even n (n = number of fields to clear)
duke@435:     // initialize last object field first if odd number of fields
never@739:     xorptr(t1_zero, t1_zero); // use t1_zero reg to clear memory (shorter code)
never@739:     movptr(index, (con_size_in_bytes - hdr_size_in_bytes) >> 3);
duke@435:     // initialize last object field if constant size is odd
duke@435:     if (((con_size_in_bytes - hdr_size_in_bytes) & 4) != 0)
never@739:       movptr(Address(obj, con_size_in_bytes - (1*BytesPerWord)), t1_zero);
duke@435:     // initialize remaining object fields: rdx is a multiple of 2
duke@435:     { Label loop;
duke@435:       bind(loop);
never@739:       movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - (1*BytesPerWord)),
never@739:              t1_zero);
never@739:       NOT_LP64(movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - (2*BytesPerWord)),
never@739:              t1_zero);)
duke@435:       decrement(index);
duke@435:       jcc(Assembler::notZero, loop);
duke@435:     }
duke@435:   }
duke@435: 
kvn@1215:   if (CURRENT_ENV->dtrace_alloc_probes()) {
duke@435:     assert(obj == rax, "must be");
duke@435:     call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
duke@435:   }
duke@435: 
duke@435:   verify_oop(obj);
duke@435: }
duke@435: 
duke@435: void C1_MacroAssembler::allocate_array(Register obj, Register len, Register t1, Register t2, int header_size, Address::ScaleFactor f, Register klass, Label& slow_case) {
duke@435:   assert(obj == rax, "obj must be in rax, for cmpxchg");
duke@435:   assert_different_registers(obj, len, t1, t2, klass);
duke@435: 
duke@435:   // determine alignment mask
never@739:   assert(!(BytesPerWord & 1), "must be a multiple of 2 for masking code to work");
duke@435: 
duke@435:   // check for negative or excessive length
never@739:   cmpptr(len, (int32_t)max_array_allocation_length);
duke@435:   jcc(Assembler::above, slow_case);
duke@435: 
duke@435:   const Register arr_size = t2; // okay to be the same
duke@435:   // align object end
never@739:   movptr(arr_size, (int32_t)header_size * BytesPerWord + MinObjAlignmentInBytesMask);
never@739:   lea(arr_size, Address(arr_size, len, f));
never@739:   andptr(arr_size, ~MinObjAlignmentInBytesMask);
duke@435: 
duke@435:   try_allocate(obj, arr_size, 0, t1, t2, slow_case);
duke@435: 
duke@435:   initialize_header(obj, klass, len, t1, t2);
duke@435: 
duke@435:   // clear rest of allocated space
duke@435:   const Register len_zero = len;
duke@435:   initialize_body(obj, arr_size, header_size * BytesPerWord, len_zero);
duke@435: 
kvn@1215:   if (CURRENT_ENV->dtrace_alloc_probes()) {
duke@435:     assert(obj == rax, "must be");
duke@435:     call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
duke@435:   }
duke@435: 
duke@435:   verify_oop(obj);
duke@435: }
duke@435: 
duke@435: 
duke@435: 
duke@435: void C1_MacroAssembler::inline_cache_check(Register receiver, Register iCache) {
duke@435:   verify_oop(receiver);
duke@435:   // explicit NULL check not needed since load from [klass_offset] causes a trap
duke@435:   // check against inline cache
duke@435:   assert(!MacroAssembler::needs_explicit_null_check(oopDesc::klass_offset_in_bytes()), "must add explicit null check");
duke@435:   int start_offset = offset();
iveresov@2344: 
ehelin@5694:   if (UseCompressedClassPointers) {
iveresov@2344:     load_klass(rscratch1, receiver);
iveresov@2344:     cmpptr(rscratch1, iCache);
iveresov@2344:   } else {
iveresov@2344:     cmpptr(iCache, Address(receiver, oopDesc::klass_offset_in_bytes()));
iveresov@2344:   }
duke@435:   // if icache check fails, then jump to runtime routine
duke@435:   // Note: RECEIVER must still contain the receiver!
duke@435:   jump_cc(Assembler::notEqual,
duke@435:           RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
never@739:   const int ic_cmp_size = LP64_ONLY(10) NOT_LP64(9);
ehelin@5694:   assert(UseCompressedClassPointers || offset() - start_offset == ic_cmp_size, "check alignment in emit_method_entry");
duke@435: }
duke@435: 
duke@435: 
duke@435: void C1_MacroAssembler::build_frame(int frame_size_in_bytes) {
duke@435:   // Make sure there is enough stack space for this method's activation.
duke@435:   // Note that we do this before doing an enter(). This matches the
duke@435:   // ordering of C2's stack overflow check / rsp decrement and allows
duke@435:   // the SharedRuntime stack overflow handling to be consistent
duke@435:   // between the two compilers.
duke@435:   generate_stack_overflow_check(frame_size_in_bytes);
duke@435: 
twisti@1730:   push(rbp);
duke@435: #ifdef TIERED
duke@435:   // c2 leaves fpu stack dirty. Clean it on entry
duke@435:   if (UseSSE < 2 ) {
duke@435:     empty_FPU_stack();
duke@435:   }
duke@435: #endif // TIERED
duke@435:   decrement(rsp, frame_size_in_bytes); // does not emit code for frame_size == 0
duke@435: }
duke@435: 
duke@435: 
twisti@1730: void C1_MacroAssembler::remove_frame(int frame_size_in_bytes) {
twisti@1730:   increment(rsp, frame_size_in_bytes);  // Does not emit code for frame_size == 0
twisti@1730:   pop(rbp);
twisti@1730: }
twisti@1730: 
twisti@1730: 
duke@435: void C1_MacroAssembler::unverified_entry(Register receiver, Register ic_klass) {
duke@435:   if (C1Breakpoint) int3();
duke@435:   inline_cache_check(receiver, ic_klass);
duke@435: }
duke@435: 
duke@435: 
duke@435: void C1_MacroAssembler::verified_entry() {
kvn@3574:   if (C1Breakpoint || VerifyFPU || !UseStackBanging) {
kvn@3574:     // Verified Entry first instruction should be 5 bytes long for correct
kvn@3574:     // patching by patch_verified_entry().
kvn@3574:     //
kvn@3574:     // C1Breakpoint and VerifyFPU have one byte first instruction.
kvn@3574:     // Also first instruction will be one byte "push(rbp)" if stack banging
kvn@3574:     // code is not generated (see build_frame() above).
kvn@3574:     // For all these cases generate long instruction first.
kvn@3574:     fat_nop();
kvn@3574:   }
duke@435:   if (C1Breakpoint)int3();
duke@435:   // build frame
duke@435:   verify_FPU(0, "method_entry");
duke@435: }
duke@435: 
duke@435: 
duke@435: #ifndef PRODUCT
duke@435: 
duke@435: void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
duke@435:   if (!VerifyOops) return;
duke@435:   verify_oop_addr(Address(rsp, stack_offset));
duke@435: }
duke@435: 
duke@435: void C1_MacroAssembler::verify_not_null_oop(Register r) {
duke@435:   if (!VerifyOops) return;
duke@435:   Label not_null;
never@739:   testptr(r, r);
duke@435:   jcc(Assembler::notZero, not_null);
duke@435:   stop("non-null oop required");
duke@435:   bind(not_null);
duke@435:   verify_oop(r);
duke@435: }
duke@435: 
duke@435: void C1_MacroAssembler::invalidate_registers(bool inv_rax, bool inv_rbx, bool inv_rcx, bool inv_rdx, bool inv_rsi, bool inv_rdi) {
duke@435: #ifdef ASSERT
never@739:   if (inv_rax) movptr(rax, 0xDEAD);
never@739:   if (inv_rbx) movptr(rbx, 0xDEAD);
never@739:   if (inv_rcx) movptr(rcx, 0xDEAD);
never@739:   if (inv_rdx) movptr(rdx, 0xDEAD);
never@739:   if (inv_rsi) movptr(rsi, 0xDEAD);
never@739:   if (inv_rdi) movptr(rdi, 0xDEAD);
duke@435: #endif
duke@435: }
duke@435: 
duke@435: #endif // ifndef PRODUCT