kvn@3390: //
kvn@3390: // Copyright (c) 2011, Oracle and/or its affiliates. All rights reserved.
kvn@3390: // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
kvn@3390: //
kvn@3390: // This code is free software; you can redistribute it and/or modify it
kvn@3390: // under the terms of the GNU General Public License version 2 only, as
kvn@3390: // published by the Free Software Foundation.
kvn@3390: //
kvn@3390: // This code is distributed in the hope that it will be useful, but WITHOUT
kvn@3390: // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
kvn@3390: // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
kvn@3390: // version 2 for more details (a copy is included in the LICENSE file that
kvn@3390: // accompanied this code).
kvn@3390: //
kvn@3390: // You should have received a copy of the GNU General Public License version
kvn@3390: // 2 along with this work; if not, write to the Free Software Foundation,
kvn@3390: // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
kvn@3390: //
kvn@3390: // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
kvn@3390: // or visit www.oracle.com if you need additional information or have any
kvn@3390: // questions.
kvn@3390: //
kvn@3390: //
kvn@3390: 
kvn@3390: // X86 Common Architecture Description File
kvn@3390: 
kvn@3390: source %{
kvn@3390:   // Float masks come from different places depending on platform.
kvn@3390: #ifdef _LP64
kvn@3390:   static address float_signmask()  { return StubRoutines::x86::float_sign_mask(); }
kvn@3390:   static address float_signflip()  { return StubRoutines::x86::float_sign_flip(); }
kvn@3390:   static address double_signmask() { return StubRoutines::x86::double_sign_mask(); }
kvn@3390:   static address double_signflip() { return StubRoutines::x86::double_sign_flip(); }
kvn@3390: #else
kvn@3390:   static address float_signmask()  { return (address)float_signmask_pool; }
kvn@3390:   static address float_signflip()  { return (address)float_signflip_pool; }
kvn@3390:   static address double_signmask() { return (address)double_signmask_pool; }
kvn@3390:   static address double_signflip() { return (address)double_signflip_pool; }
kvn@3390: #endif
kvn@3390: %}
kvn@3390: 
kvn@3390: // INSTRUCTIONS -- Platform independent definitions (same for 32- and 64-bit)
kvn@3390: 
kvn@3390: instruct addF_reg(regF dst, regF src) %{
kvn@3390:   predicate((UseSSE>=1) && (UseAVX == 0));
kvn@3390:   match(Set dst (AddF dst src));
kvn@3390: 
kvn@3390:   format %{ "addss   $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ addss($dst$$XMMRegister, $src$$XMMRegister);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct addF_mem(regF dst, memory src) %{
kvn@3390:   predicate((UseSSE>=1) && (UseAVX == 0));
kvn@3390:   match(Set dst (AddF dst (LoadF src)));
kvn@3390: 
kvn@3390:   format %{ "addss   $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ addss($dst$$XMMRegister, $src$$Address);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct addF_imm(regF dst, immF con) %{
kvn@3390:   predicate((UseSSE>=1) && (UseAVX == 0));
kvn@3390:   match(Set dst (AddF dst con));
kvn@3390:   format %{ "addss   $dst, [$constantaddress]\t# load from constant table: float=$con" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ addss($dst$$XMMRegister, $constantaddress($con));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vaddF_reg(regF dst, regF src1, regF src2) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (AddF src1 src2));
kvn@3390: 
kvn@3390:   format %{ "vaddss  $dst, $src1, $src2" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vaddss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vaddF_mem(regF dst, regF src1, memory src2) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (AddF src1 (LoadF src2)));
kvn@3390: 
kvn@3390:   format %{ "vaddss  $dst, $src1, $src2" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vaddss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vaddF_imm(regF dst, regF src, immF con) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (AddF src con));
kvn@3390: 
kvn@3390:   format %{ "vaddss  $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vaddss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct addD_reg(regD dst, regD src) %{
kvn@3390:   predicate((UseSSE>=2) && (UseAVX == 0));
kvn@3390:   match(Set dst (AddD dst src));
kvn@3390: 
kvn@3390:   format %{ "addsd   $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ addsd($dst$$XMMRegister, $src$$XMMRegister);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct addD_mem(regD dst, memory src) %{
kvn@3390:   predicate((UseSSE>=2) && (UseAVX == 0));
kvn@3390:   match(Set dst (AddD dst (LoadD src)));
kvn@3390: 
kvn@3390:   format %{ "addsd   $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ addsd($dst$$XMMRegister, $src$$Address);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct addD_imm(regD dst, immD con) %{
kvn@3390:   predicate((UseSSE>=2) && (UseAVX == 0));
kvn@3390:   match(Set dst (AddD dst con));
kvn@3390:   format %{ "addsd   $dst, [$constantaddress]\t# load from constant table: double=$con" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ addsd($dst$$XMMRegister, $constantaddress($con));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vaddD_reg(regD dst, regD src1, regD src2) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (AddD src1 src2));
kvn@3390: 
kvn@3390:   format %{ "vaddsd  $dst, $src1, $src2" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vaddsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vaddD_mem(regD dst, regD src1, memory src2) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (AddD src1 (LoadD src2)));
kvn@3390: 
kvn@3390:   format %{ "vaddsd  $dst, $src1, $src2" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vaddsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vaddD_imm(regD dst, regD src, immD con) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (AddD src con));
kvn@3390: 
kvn@3390:   format %{ "vaddsd  $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vaddsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct subF_reg(regF dst, regF src) %{
kvn@3390:   predicate((UseSSE>=1) && (UseAVX == 0));
kvn@3390:   match(Set dst (SubF dst src));
kvn@3390: 
kvn@3390:   format %{ "subss   $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ subss($dst$$XMMRegister, $src$$XMMRegister);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct subF_mem(regF dst, memory src) %{
kvn@3390:   predicate((UseSSE>=1) && (UseAVX == 0));
kvn@3390:   match(Set dst (SubF dst (LoadF src)));
kvn@3390: 
kvn@3390:   format %{ "subss   $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ subss($dst$$XMMRegister, $src$$Address);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct subF_imm(regF dst, immF con) %{
kvn@3390:   predicate((UseSSE>=1) && (UseAVX == 0));
kvn@3390:   match(Set dst (SubF dst con));
kvn@3390:   format %{ "subss   $dst, [$constantaddress]\t# load from constant table: float=$con" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ subss($dst$$XMMRegister, $constantaddress($con));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vsubF_reg(regF dst, regF src1, regF src2) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (SubF src1 src2));
kvn@3390: 
kvn@3390:   format %{ "vsubss  $dst, $src1, $src2" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vsubss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vsubF_mem(regF dst, regF src1, memory src2) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (SubF src1 (LoadF src2)));
kvn@3390: 
kvn@3390:   format %{ "vsubss  $dst, $src1, $src2" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vsubss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vsubF_imm(regF dst, regF src, immF con) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (SubF src con));
kvn@3390: 
kvn@3390:   format %{ "vsubss  $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vsubss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct subD_reg(regD dst, regD src) %{
kvn@3390:   predicate((UseSSE>=2) && (UseAVX == 0));
kvn@3390:   match(Set dst (SubD dst src));
kvn@3390: 
kvn@3390:   format %{ "subsd   $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ subsd($dst$$XMMRegister, $src$$XMMRegister);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct subD_mem(regD dst, memory src) %{
kvn@3390:   predicate((UseSSE>=2) && (UseAVX == 0));
kvn@3390:   match(Set dst (SubD dst (LoadD src)));
kvn@3390: 
kvn@3390:   format %{ "subsd   $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ subsd($dst$$XMMRegister, $src$$Address);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct subD_imm(regD dst, immD con) %{
kvn@3390:   predicate((UseSSE>=2) && (UseAVX == 0));
kvn@3390:   match(Set dst (SubD dst con));
kvn@3390:   format %{ "subsd   $dst, [$constantaddress]\t# load from constant table: double=$con" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ subsd($dst$$XMMRegister, $constantaddress($con));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vsubD_reg(regD dst, regD src1, regD src2) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (SubD src1 src2));
kvn@3390: 
kvn@3390:   format %{ "vsubsd  $dst, $src1, $src2" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vsubsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vsubD_mem(regD dst, regD src1, memory src2) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (SubD src1 (LoadD src2)));
kvn@3390: 
kvn@3390:   format %{ "vsubsd  $dst, $src1, $src2" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vsubsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vsubD_imm(regD dst, regD src, immD con) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (SubD src con));
kvn@3390: 
kvn@3390:   format %{ "vsubsd  $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vsubsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct mulF_reg(regF dst, regF src) %{
kvn@3390:   predicate((UseSSE>=1) && (UseAVX == 0));
kvn@3390:   match(Set dst (MulF dst src));
kvn@3390: 
kvn@3390:   format %{ "mulss   $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ mulss($dst$$XMMRegister, $src$$XMMRegister);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct mulF_mem(regF dst, memory src) %{
kvn@3390:   predicate((UseSSE>=1) && (UseAVX == 0));
kvn@3390:   match(Set dst (MulF dst (LoadF src)));
kvn@3390: 
kvn@3390:   format %{ "mulss   $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ mulss($dst$$XMMRegister, $src$$Address);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct mulF_imm(regF dst, immF con) %{
kvn@3390:   predicate((UseSSE>=1) && (UseAVX == 0));
kvn@3390:   match(Set dst (MulF dst con));
kvn@3390:   format %{ "mulss   $dst, [$constantaddress]\t# load from constant table: float=$con" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ mulss($dst$$XMMRegister, $constantaddress($con));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vmulF_reg(regF dst, regF src1, regF src2) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (MulF src1 src2));
kvn@3390: 
kvn@3390:   format %{ "vmulss  $dst, $src1, $src2" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vmulss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vmulF_mem(regF dst, regF src1, memory src2) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (MulF src1 (LoadF src2)));
kvn@3390: 
kvn@3390:   format %{ "vmulss  $dst, $src1, $src2" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vmulss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vmulF_imm(regF dst, regF src, immF con) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (MulF src con));
kvn@3390: 
kvn@3390:   format %{ "vmulss  $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vmulss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct mulD_reg(regD dst, regD src) %{
kvn@3390:   predicate((UseSSE>=2) && (UseAVX == 0));
kvn@3390:   match(Set dst (MulD dst src));
kvn@3390: 
kvn@3390:   format %{ "mulsd   $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ mulsd($dst$$XMMRegister, $src$$XMMRegister);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct mulD_mem(regD dst, memory src) %{
kvn@3390:   predicate((UseSSE>=2) && (UseAVX == 0));
kvn@3390:   match(Set dst (MulD dst (LoadD src)));
kvn@3390: 
kvn@3390:   format %{ "mulsd   $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ mulsd($dst$$XMMRegister, $src$$Address);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct mulD_imm(regD dst, immD con) %{
kvn@3390:   predicate((UseSSE>=2) && (UseAVX == 0));
kvn@3390:   match(Set dst (MulD dst con));
kvn@3390:   format %{ "mulsd   $dst, [$constantaddress]\t# load from constant table: double=$con" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ mulsd($dst$$XMMRegister, $constantaddress($con));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vmulD_reg(regD dst, regD src1, regD src2) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (MulD src1 src2));
kvn@3390: 
kvn@3390:   format %{ "vmulsd  $dst, $src1, $src2" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vmulsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vmulD_mem(regD dst, regD src1, memory src2) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (MulD src1 (LoadD src2)));
kvn@3390: 
kvn@3390:   format %{ "vmulsd  $dst, $src1, $src2" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vmulsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vmulD_imm(regD dst, regD src, immD con) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (MulD src con));
kvn@3390: 
kvn@3390:   format %{ "vmulsd  $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vmulsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct divF_reg(regF dst, regF src) %{
kvn@3390:   predicate((UseSSE>=1) && (UseAVX == 0));
kvn@3390:   match(Set dst (DivF dst src));
kvn@3390: 
kvn@3390:   format %{ "divss   $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ divss($dst$$XMMRegister, $src$$XMMRegister);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct divF_mem(regF dst, memory src) %{
kvn@3390:   predicate((UseSSE>=1) && (UseAVX == 0));
kvn@3390:   match(Set dst (DivF dst (LoadF src)));
kvn@3390: 
kvn@3390:   format %{ "divss   $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ divss($dst$$XMMRegister, $src$$Address);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct divF_imm(regF dst, immF con) %{
kvn@3390:   predicate((UseSSE>=1) && (UseAVX == 0));
kvn@3390:   match(Set dst (DivF dst con));
kvn@3390:   format %{ "divss   $dst, [$constantaddress]\t# load from constant table: float=$con" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ divss($dst$$XMMRegister, $constantaddress($con));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vdivF_reg(regF dst, regF src1, regF src2) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (DivF src1 src2));
kvn@3390: 
kvn@3390:   format %{ "vdivss  $dst, $src1, $src2" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vdivss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vdivF_mem(regF dst, regF src1, memory src2) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (DivF src1 (LoadF src2)));
kvn@3390: 
kvn@3390:   format %{ "vdivss  $dst, $src1, $src2" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vdivss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vdivF_imm(regF dst, regF src, immF con) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (DivF src con));
kvn@3390: 
kvn@3390:   format %{ "vdivss  $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vdivss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct divD_reg(regD dst, regD src) %{
kvn@3390:   predicate((UseSSE>=2) && (UseAVX == 0));
kvn@3390:   match(Set dst (DivD dst src));
kvn@3390: 
kvn@3390:   format %{ "divsd   $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ divsd($dst$$XMMRegister, $src$$XMMRegister);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct divD_mem(regD dst, memory src) %{
kvn@3390:   predicate((UseSSE>=2) && (UseAVX == 0));
kvn@3390:   match(Set dst (DivD dst (LoadD src)));
kvn@3390: 
kvn@3390:   format %{ "divsd   $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ divsd($dst$$XMMRegister, $src$$Address);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct divD_imm(regD dst, immD con) %{
kvn@3390:   predicate((UseSSE>=2) && (UseAVX == 0));
kvn@3390:   match(Set dst (DivD dst con));
kvn@3390:   format %{ "divsd   $dst, [$constantaddress]\t# load from constant table: double=$con" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ divsd($dst$$XMMRegister, $constantaddress($con));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vdivD_reg(regD dst, regD src1, regD src2) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (DivD src1 src2));
kvn@3390: 
kvn@3390:   format %{ "vdivsd  $dst, $src1, $src2" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vdivsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vdivD_mem(regD dst, regD src1, memory src2) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (DivD src1 (LoadD src2)));
kvn@3390: 
kvn@3390:   format %{ "vdivsd  $dst, $src1, $src2" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vdivsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vdivD_imm(regD dst, regD src, immD con) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (DivD src con));
kvn@3390: 
kvn@3390:   format %{ "vdivsd  $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ vdivsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct absF_reg(regF dst) %{
kvn@3390:   predicate((UseSSE>=1) && (UseAVX == 0));
kvn@3390:   match(Set dst (AbsF dst));
kvn@3390:   ins_cost(150);
kvn@3390:   format %{ "andps   $dst, [0x7fffffff]\t# abs float by sign masking" %}
kvn@3390:   ins_encode %{
kvn@3390:     __ andps($dst$$XMMRegister, ExternalAddress(float_signmask()));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vabsF_reg(regF dst, regF src) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (AbsF src));
kvn@3390:   ins_cost(150);
kvn@3390:   format %{ "vandps  $dst, $src, [0x7fffffff]\t# abs float by sign masking" %}
kvn@3390:   ins_encode %{
kvn@3390:     __ vandps($dst$$XMMRegister, $src$$XMMRegister,
kvn@3390:               ExternalAddress(float_signmask()));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct absD_reg(regD dst) %{
kvn@3390:   predicate((UseSSE>=2) && (UseAVX == 0));
kvn@3390:   match(Set dst (AbsD dst));
kvn@3390:   ins_cost(150);
kvn@3390:   format %{ "andpd   $dst, [0x7fffffffffffffff]\t"
kvn@3390:             "# abs double by sign masking" %}
kvn@3390:   ins_encode %{
kvn@3390:     __ andpd($dst$$XMMRegister, ExternalAddress(double_signmask()));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vabsD_reg(regD dst, regD src) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (AbsD src));
kvn@3390:   ins_cost(150);
kvn@3390:   format %{ "vandpd  $dst, $src, [0x7fffffffffffffff]\t"
kvn@3390:             "# abs double by sign masking" %}
kvn@3390:   ins_encode %{
kvn@3390:     __ vandpd($dst$$XMMRegister, $src$$XMMRegister,
kvn@3390:               ExternalAddress(double_signmask()));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct negF_reg(regF dst) %{
kvn@3390:   predicate((UseSSE>=1) && (UseAVX == 0));
kvn@3390:   match(Set dst (NegF dst));
kvn@3390:   ins_cost(150);
kvn@3390:   format %{ "xorps   $dst, [0x80000000]\t# neg float by sign flipping" %}
kvn@3390:   ins_encode %{
kvn@3390:     __ xorps($dst$$XMMRegister, ExternalAddress(float_signflip()));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vnegF_reg(regF dst, regF src) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (NegF src));
kvn@3390:   ins_cost(150);
kvn@3390:   format %{ "vxorps  $dst, $src, [0x80000000]\t# neg float by sign flipping" %}
kvn@3390:   ins_encode %{
kvn@3390:     __ vxorps($dst$$XMMRegister, $src$$XMMRegister,
kvn@3390:               ExternalAddress(float_signflip()));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct negD_reg(regD dst) %{
kvn@3390:   predicate((UseSSE>=2) && (UseAVX == 0));
kvn@3390:   match(Set dst (NegD dst));
kvn@3390:   ins_cost(150);
kvn@3390:   format %{ "xorpd   $dst, [0x8000000000000000]\t"
kvn@3390:             "# neg double by sign flipping" %}
kvn@3390:   ins_encode %{
kvn@3390:     __ xorpd($dst$$XMMRegister, ExternalAddress(double_signflip()));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct vnegD_reg(regD dst, regD src) %{
kvn@3390:   predicate(UseAVX > 0);
kvn@3390:   match(Set dst (NegD src));
kvn@3390:   ins_cost(150);
kvn@3390:   format %{ "vxorpd  $dst, $src, [0x8000000000000000]\t"
kvn@3390:             "# neg double by sign flipping" %}
kvn@3390:   ins_encode %{
kvn@3390:     __ vxorpd($dst$$XMMRegister, $src$$XMMRegister,
kvn@3390:               ExternalAddress(double_signflip()));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct sqrtF_reg(regF dst, regF src) %{
kvn@3390:   predicate(UseSSE>=1);
kvn@3390:   match(Set dst (ConvD2F (SqrtD (ConvF2D src))));
kvn@3390: 
kvn@3390:   format %{ "sqrtss  $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ sqrtss($dst$$XMMRegister, $src$$XMMRegister);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct sqrtF_mem(regF dst, memory src) %{
kvn@3390:   predicate(UseSSE>=1);
kvn@3390:   match(Set dst (ConvD2F (SqrtD (ConvF2D (LoadF src)))));
kvn@3390: 
kvn@3390:   format %{ "sqrtss  $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ sqrtss($dst$$XMMRegister, $src$$Address);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct sqrtF_imm(regF dst, immF con) %{
kvn@3390:   predicate(UseSSE>=1);
kvn@3390:   match(Set dst (ConvD2F (SqrtD (ConvF2D con))));
kvn@3390:   format %{ "sqrtss  $dst, [$constantaddress]\t# load from constant table: float=$con" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ sqrtss($dst$$XMMRegister, $constantaddress($con));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct sqrtD_reg(regD dst, regD src) %{
kvn@3390:   predicate(UseSSE>=2);
kvn@3390:   match(Set dst (SqrtD src));
kvn@3390: 
kvn@3390:   format %{ "sqrtsd  $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ sqrtsd($dst$$XMMRegister, $src$$XMMRegister);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct sqrtD_mem(regD dst, memory src) %{
kvn@3390:   predicate(UseSSE>=2);
kvn@3390:   match(Set dst (SqrtD (LoadD src)));
kvn@3390: 
kvn@3390:   format %{ "sqrtsd  $dst, $src" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ sqrtsd($dst$$XMMRegister, $src$$Address);
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: 
kvn@3390: instruct sqrtD_imm(regD dst, immD con) %{
kvn@3390:   predicate(UseSSE>=2);
kvn@3390:   match(Set dst (SqrtD con));
kvn@3390:   format %{ "sqrtsd  $dst, [$constantaddress]\t# load from constant table: double=$con" %}
kvn@3390:   ins_cost(150);
kvn@3390:   ins_encode %{
kvn@3390:     __ sqrtsd($dst$$XMMRegister, $constantaddress($con));
kvn@3390:   %}
kvn@3390:   ins_pipe(pipe_slow);
kvn@3390: %}
kvn@3390: