aoqi@0: /* aoqi@0: * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. aoqi@0: * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. aoqi@0: * aoqi@0: * This code is free software; you can redistribute it and/or modify it aoqi@0: * under the terms of the GNU General Public License version 2 only, as aoqi@0: * published by the Free Software Foundation. aoqi@0: * aoqi@0: * This code is distributed in the hope that it will be useful, but WITHOUT aoqi@0: * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or aoqi@0: * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License aoqi@0: * version 2 for more details (a copy is included in the LICENSE file that aoqi@0: * accompanied this code). aoqi@0: * aoqi@0: * You should have received a copy of the GNU General Public License version aoqi@0: * 2 along with this work; if not, write to the Free Software Foundation, aoqi@0: * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. aoqi@0: * aoqi@0: * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA aoqi@0: * or visit www.oracle.com if you need additional information or have any aoqi@0: * questions. aoqi@0: * aoqi@0: */ aoqi@0: aoqi@1: /* aoqi@1: * This file has been modified by Loongson Technology in 2015. These aoqi@1: * modifications are Copyright (c) 2015 Loongson Technology, and are made aoqi@1: * available on the same license terms set forth above. aoqi@1: */ aoqi@1: aoqi@0: #ifndef SHARE_VM_C1_C1_LIR_HPP aoqi@0: #define SHARE_VM_C1_C1_LIR_HPP aoqi@0: aoqi@0: #include "c1/c1_ValueType.hpp" aoqi@0: #include "oops/method.hpp" aoqi@0: aoqi@0: class BlockBegin; aoqi@0: class BlockList; aoqi@0: class LIR_Assembler; aoqi@0: class CodeEmitInfo; aoqi@0: class CodeStub; aoqi@0: class CodeStubList; aoqi@0: class ArrayCopyStub; aoqi@0: class LIR_Op; aoqi@0: class ciType; aoqi@0: class ValueType; aoqi@0: class LIR_OpVisitState; aoqi@0: class FpuStackSim; aoqi@0: aoqi@0: //--------------------------------------------------------------------- aoqi@0: // LIR Operands aoqi@0: // LIR_OprDesc aoqi@0: // LIR_OprPtr aoqi@0: // LIR_Const aoqi@0: // LIR_Address aoqi@0: //--------------------------------------------------------------------- aoqi@0: class LIR_OprDesc; aoqi@0: class LIR_OprPtr; aoqi@0: class LIR_Const; aoqi@0: class LIR_Address; aoqi@0: class LIR_OprVisitor; aoqi@0: aoqi@0: aoqi@0: typedef LIR_OprDesc* LIR_Opr; aoqi@0: typedef int RegNr; aoqi@0: aoqi@0: define_array(LIR_OprArray, LIR_Opr) aoqi@0: define_stack(LIR_OprList, LIR_OprArray) aoqi@0: aoqi@0: define_array(LIR_OprRefArray, LIR_Opr*) aoqi@0: define_stack(LIR_OprRefList, LIR_OprRefArray) aoqi@0: aoqi@0: define_array(CodeEmitInfoArray, CodeEmitInfo*) aoqi@0: define_stack(CodeEmitInfoList, CodeEmitInfoArray) aoqi@0: aoqi@0: define_array(LIR_OpArray, LIR_Op*) aoqi@0: define_stack(LIR_OpList, LIR_OpArray) aoqi@0: aoqi@0: // define LIR_OprPtr early so LIR_OprDesc can refer to it aoqi@0: class LIR_OprPtr: public CompilationResourceObj { aoqi@0: public: aoqi@0: bool is_oop_pointer() const { return (type() == T_OBJECT); } aoqi@0: bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); } aoqi@0: aoqi@0: virtual LIR_Const* as_constant() { return NULL; } aoqi@0: virtual LIR_Address* as_address() { return NULL; } aoqi@0: virtual BasicType type() const = 0; aoqi@0: virtual void print_value_on(outputStream* out) const = 0; aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: aoqi@0: // LIR constants aoqi@0: class LIR_Const: public LIR_OprPtr { aoqi@0: private: aoqi@0: JavaValue _value; aoqi@0: aoqi@0: void type_check(BasicType t) const { assert(type() == t, "type check"); } aoqi@0: void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); } aoqi@0: void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); } aoqi@0: aoqi@0: public: aoqi@0: LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); } aoqi@0: LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); } aoqi@0: LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); } aoqi@0: LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); } aoqi@0: LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); } aoqi@0: LIR_Const(void* p) { aoqi@0: #ifdef _LP64 aoqi@0: assert(sizeof(jlong) >= sizeof(p), "too small");; aoqi@0: _value.set_type(T_LONG); _value.set_jlong((jlong)p); aoqi@0: #else aoqi@0: assert(sizeof(jint) >= sizeof(p), "too small");; aoqi@0: _value.set_type(T_INT); _value.set_jint((jint)p); aoqi@0: #endif aoqi@0: } aoqi@0: LIR_Const(Metadata* m) { aoqi@0: _value.set_type(T_METADATA); aoqi@0: #ifdef _LP64 aoqi@0: _value.set_jlong((jlong)m); aoqi@0: #else aoqi@0: _value.set_jint((jint)m); aoqi@0: #endif // _LP64 aoqi@0: } aoqi@0: aoqi@0: virtual BasicType type() const { return _value.get_type(); } aoqi@0: virtual LIR_Const* as_constant() { return this; } aoqi@0: aoqi@0: jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); } aoqi@0: jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); } aoqi@0: jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); } aoqi@0: jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); } aoqi@0: jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); } aoqi@0: jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); } aoqi@0: jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); } aoqi@0: aoqi@0: #ifdef _LP64 aoqi@0: address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); } aoqi@0: Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jlong(); } aoqi@0: #else aoqi@0: address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); } aoqi@0: Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jint(); } aoqi@0: #endif aoqi@0: aoqi@0: aoqi@0: jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); } aoqi@0: jint as_jint_lo_bits() const { aoqi@0: if (type() == T_DOUBLE) { aoqi@0: return low(jlong_cast(_value.get_jdouble())); aoqi@0: } else { aoqi@0: return as_jint_lo(); aoqi@0: } aoqi@0: } aoqi@0: jint as_jint_hi_bits() const { aoqi@0: if (type() == T_DOUBLE) { aoqi@0: return high(jlong_cast(_value.get_jdouble())); aoqi@0: } else { aoqi@0: return as_jint_hi(); aoqi@0: } aoqi@0: } aoqi@0: jlong as_jlong_bits() const { aoqi@0: if (type() == T_DOUBLE) { aoqi@0: return jlong_cast(_value.get_jdouble()); aoqi@0: } else { aoqi@0: return as_jlong(); aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; aoqi@0: aoqi@0: aoqi@0: bool is_zero_float() { aoqi@0: jfloat f = as_jfloat(); aoqi@0: jfloat ok = 0.0f; aoqi@0: return jint_cast(f) == jint_cast(ok); aoqi@0: } aoqi@0: aoqi@0: bool is_one_float() { aoqi@0: jfloat f = as_jfloat(); aoqi@0: return !g_isnan(f) && g_isfinite(f) && f == 1.0; aoqi@0: } aoqi@0: aoqi@0: bool is_zero_double() { aoqi@0: jdouble d = as_jdouble(); aoqi@0: jdouble ok = 0.0; aoqi@0: return jlong_cast(d) == jlong_cast(ok); aoqi@0: } aoqi@0: aoqi@0: bool is_one_double() { aoqi@0: jdouble d = as_jdouble(); aoqi@0: return !g_isnan(d) && g_isfinite(d) && d == 1.0; aoqi@0: } aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: //---------------------LIR Operand descriptor------------------------------------ aoqi@0: // aoqi@0: // The class LIR_OprDesc represents a LIR instruction operand; aoqi@0: // it can be a register (ALU/FPU), stack location or a constant; aoqi@0: // Constants and addresses are represented as resource area allocated aoqi@0: // structures (see above). aoqi@0: // Registers and stack locations are inlined into the this pointer aoqi@0: // (see value function). aoqi@0: aoqi@0: class LIR_OprDesc: public CompilationResourceObj { aoqi@0: public: aoqi@0: // value structure: aoqi@0: // data opr-type opr-kind aoqi@0: // +--------------+-------+-------+ aoqi@0: // [max...........|7 6 5 4|3 2 1 0] aoqi@0: // ^ aoqi@0: // is_pointer bit aoqi@0: // aoqi@0: // lowest bit cleared, means it is a structure pointer aoqi@0: // we need 4 bits to represent types aoqi@0: aoqi@0: private: aoqi@0: friend class LIR_OprFact; aoqi@0: aoqi@0: // Conversion aoqi@0: intptr_t value() const { return (intptr_t) this; } aoqi@0: aoqi@0: bool check_value_mask(intptr_t mask, intptr_t masked_value) const { aoqi@0: return (value() & mask) == masked_value; aoqi@0: } aoqi@0: aoqi@0: enum OprKind { aoqi@0: pointer_value = 0 aoqi@0: , stack_value = 1 aoqi@0: , cpu_register = 3 aoqi@0: , fpu_register = 5 aoqi@0: , illegal_value = 7 aoqi@0: }; aoqi@0: aoqi@0: enum OprBits { aoqi@0: pointer_bits = 1 aoqi@0: , kind_bits = 3 aoqi@0: , type_bits = 4 aoqi@0: , size_bits = 2 aoqi@0: , destroys_bits = 1 aoqi@0: , virtual_bits = 1 aoqi@0: , is_xmm_bits = 1 aoqi@0: , last_use_bits = 1 aoqi@0: , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation aoqi@0: , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits + aoqi@0: is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits aoqi@0: , data_bits = BitsPerInt - non_data_bits aoqi@0: , reg_bits = data_bits / 2 // for two registers in one value encoding aoqi@0: }; aoqi@0: aoqi@0: enum OprShift { aoqi@0: kind_shift = 0 aoqi@0: , type_shift = kind_shift + kind_bits aoqi@0: , size_shift = type_shift + type_bits aoqi@0: , destroys_shift = size_shift + size_bits aoqi@0: , last_use_shift = destroys_shift + destroys_bits aoqi@0: , is_fpu_stack_offset_shift = last_use_shift + last_use_bits aoqi@0: , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits aoqi@0: , is_xmm_shift = virtual_shift + virtual_bits aoqi@0: , data_shift = is_xmm_shift + is_xmm_bits aoqi@0: , reg1_shift = data_shift aoqi@0: , reg2_shift = data_shift + reg_bits aoqi@0: aoqi@0: }; aoqi@0: aoqi@0: enum OprSize { aoqi@0: single_size = 0 << size_shift aoqi@0: , double_size = 1 << size_shift aoqi@0: }; aoqi@0: aoqi@0: enum OprMask { aoqi@0: kind_mask = right_n_bits(kind_bits) aoqi@0: , type_mask = right_n_bits(type_bits) << type_shift aoqi@0: , size_mask = right_n_bits(size_bits) << size_shift aoqi@0: , last_use_mask = right_n_bits(last_use_bits) << last_use_shift aoqi@0: , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift aoqi@0: , virtual_mask = right_n_bits(virtual_bits) << virtual_shift aoqi@0: , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift aoqi@0: , pointer_mask = right_n_bits(pointer_bits) aoqi@0: , lower_reg_mask = right_n_bits(reg_bits) aoqi@0: , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask)) aoqi@0: }; aoqi@0: aoqi@0: uintptr_t data() const { return value() >> data_shift; } aoqi@0: int lo_reg_half() const { return data() & lower_reg_mask; } aoqi@0: int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; } aoqi@0: OprKind kind_field() const { return (OprKind)(value() & kind_mask); } aoqi@0: OprSize size_field() const { return (OprSize)(value() & size_mask); } aoqi@0: aoqi@0: static char type_char(BasicType t); aoqi@0: aoqi@0: public: aoqi@0: enum { aoqi@0: vreg_base = ConcreteRegisterImpl::number_of_registers, aoqi@0: vreg_max = (1 << data_bits) - 1 aoqi@0: }; aoqi@0: aoqi@0: static inline LIR_Opr illegalOpr(); aoqi@0: aoqi@0: enum OprType { aoqi@0: unknown_type = 0 << type_shift // means: not set (catch uninitialized types) aoqi@0: , int_type = 1 << type_shift aoqi@0: , long_type = 2 << type_shift aoqi@0: , object_type = 3 << type_shift aoqi@0: , address_type = 4 << type_shift aoqi@0: , float_type = 5 << type_shift aoqi@0: , double_type = 6 << type_shift aoqi@0: , metadata_type = 7 << type_shift aoqi@0: }; aoqi@0: friend OprType as_OprType(BasicType t); aoqi@0: friend BasicType as_BasicType(OprType t); aoqi@0: aoqi@0: OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); } aoqi@0: OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); } aoqi@0: aoqi@0: static OprSize size_for(BasicType t) { aoqi@0: switch (t) { aoqi@0: case T_LONG: aoqi@0: case T_DOUBLE: aoqi@0: return double_size; aoqi@0: break; aoqi@0: aoqi@0: case T_FLOAT: aoqi@0: case T_BOOLEAN: aoqi@0: case T_CHAR: aoqi@0: case T_BYTE: aoqi@0: case T_SHORT: aoqi@0: case T_INT: aoqi@0: case T_ADDRESS: aoqi@0: case T_OBJECT: aoqi@0: case T_ARRAY: aoqi@0: case T_METADATA: aoqi@0: return single_size; aoqi@0: break; aoqi@0: aoqi@0: default: aoqi@0: ShouldNotReachHere(); aoqi@0: return single_size; aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: aoqi@0: void validate_type() const PRODUCT_RETURN; aoqi@0: aoqi@0: BasicType type() const { aoqi@0: if (is_pointer()) { aoqi@0: return pointer()->type(); aoqi@0: } aoqi@0: return as_BasicType(type_field()); aoqi@0: } aoqi@0: aoqi@0: aoqi@0: ValueType* value_type() const { return as_ValueType(type()); } aoqi@0: aoqi@0: char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); } aoqi@0: aoqi@0: bool is_equal(LIR_Opr opr) const { return this == opr; } aoqi@0: // checks whether types are same aoqi@0: bool is_same_type(LIR_Opr opr) const { aoqi@0: assert(type_field() != unknown_type && aoqi@0: opr->type_field() != unknown_type, "shouldn't see unknown_type"); aoqi@0: return type_field() == opr->type_field(); aoqi@0: } aoqi@0: bool is_same_register(LIR_Opr opr) { aoqi@0: return (is_register() && opr->is_register() && aoqi@0: kind_field() == opr->kind_field() && aoqi@0: (value() & no_type_mask) == (opr->value() & no_type_mask)); aoqi@0: } aoqi@0: aoqi@0: bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); } aoqi@0: bool is_illegal() const { return kind_field() == illegal_value; } aoqi@0: bool is_valid() const { return kind_field() != illegal_value; } aoqi@0: aoqi@0: bool is_register() const { return is_cpu_register() || is_fpu_register(); } aoqi@0: bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); } aoqi@0: aoqi@0: bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; } aoqi@0: bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; } aoqi@0: aoqi@0: bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); } aoqi@0: bool is_oop() const; aoqi@0: aoqi@0: // semantic for fpu- and xmm-registers: aoqi@0: // * is_float and is_double return true for xmm_registers aoqi@0: // (so is_single_fpu and is_single_xmm are true) aoqi@0: // * So you must always check for is_???_xmm prior to is_???_fpu to aoqi@0: // distinguish between fpu- and xmm-registers aoqi@0: aoqi@0: bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); } aoqi@0: bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); } aoqi@0: bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); } aoqi@0: aoqi@0: bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); } aoqi@0: bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); } aoqi@0: bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); } aoqi@0: bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); } aoqi@0: bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); } aoqi@0: aoqi@0: bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); } aoqi@0: bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); } aoqi@0: bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); } aoqi@0: bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); } aoqi@0: bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); } aoqi@0: aoqi@0: bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); } aoqi@0: bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); } aoqi@0: bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); } aoqi@0: aoqi@0: // fast accessor functions for special bits that do not work for pointers aoqi@0: // (in this functions, the check for is_pointer() is omitted) aoqi@0: bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); } aoqi@0: bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); } aoqi@0: bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); } aoqi@0: bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; } aoqi@0: BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); } aoqi@0: aoqi@0: bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; } aoqi@0: bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; } aoqi@0: LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); } aoqi@0: LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); } aoqi@0: aoqi@0: aoqi@0: int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); } aoqi@0: int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); } aoqi@0: RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); } aoqi@0: RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } aoqi@0: RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } aoqi@0: RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); } aoqi@0: RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } aoqi@0: RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } aoqi@0: RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); } aoqi@0: RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } aoqi@0: RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } aoqi@0: int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); } aoqi@0: aoqi@0: LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; } aoqi@0: LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); } aoqi@0: LIR_Address* as_address_ptr() const { return pointer()->as_address(); } aoqi@0: aoqi@0: Register as_register() const; aoqi@0: Register as_register_lo() const; aoqi@0: Register as_register_hi() const; aoqi@0: aoqi@0: Register as_pointer_register() { aoqi@0: #ifdef _LP64 aoqi@0: if (is_double_cpu()) { aoqi@0: assert(as_register_lo() == as_register_hi(), "should be a single register"); aoqi@0: return as_register_lo(); aoqi@0: } aoqi@0: #endif aoqi@0: return as_register(); aoqi@0: } aoqi@0: aoqi@0: #ifdef X86 aoqi@0: XMMRegister as_xmm_float_reg() const; aoqi@0: XMMRegister as_xmm_double_reg() const; aoqi@0: // for compatibility with RInfo aoqi@0: int fpu () const { return lo_reg_half(); } aoqi@0: #endif // X86 aoqi@0: #if defined(SPARC) || defined(ARM) || defined(PPC) aoqi@0: FloatRegister as_float_reg () const; aoqi@0: FloatRegister as_double_reg () const; aoqi@0: #endif aoqi@1: #ifdef MIPS64 aoqi@1: FloatRegister as_float_reg () const; aoqi@1: FloatRegister as_double_reg () const; aoqi@1: aoqi@1: FloatRegister as_fpu_lo () const; aoqi@1: FloatRegister as_fpu_hi () const; aoqi@1: aoqi@1: #endif aoqi@0: aoqi@0: jint as_jint() const { return as_constant_ptr()->as_jint(); } aoqi@0: jlong as_jlong() const { return as_constant_ptr()->as_jlong(); } aoqi@0: jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); } aoqi@0: jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); } aoqi@0: jobject as_jobject() const { return as_constant_ptr()->as_jobject(); } aoqi@0: aoqi@0: void print() const PRODUCT_RETURN; aoqi@0: void print(outputStream* out) const PRODUCT_RETURN; aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: inline LIR_OprDesc::OprType as_OprType(BasicType type) { aoqi@0: switch (type) { aoqi@0: case T_INT: return LIR_OprDesc::int_type; aoqi@0: case T_LONG: return LIR_OprDesc::long_type; aoqi@0: case T_FLOAT: return LIR_OprDesc::float_type; aoqi@0: case T_DOUBLE: return LIR_OprDesc::double_type; aoqi@0: case T_OBJECT: aoqi@0: case T_ARRAY: return LIR_OprDesc::object_type; aoqi@0: case T_ADDRESS: return LIR_OprDesc::address_type; aoqi@0: case T_METADATA: return LIR_OprDesc::metadata_type; aoqi@0: case T_ILLEGAL: // fall through aoqi@0: default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type; aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: inline BasicType as_BasicType(LIR_OprDesc::OprType t) { aoqi@0: switch (t) { aoqi@0: case LIR_OprDesc::int_type: return T_INT; aoqi@0: case LIR_OprDesc::long_type: return T_LONG; aoqi@0: case LIR_OprDesc::float_type: return T_FLOAT; aoqi@0: case LIR_OprDesc::double_type: return T_DOUBLE; aoqi@0: case LIR_OprDesc::object_type: return T_OBJECT; aoqi@0: case LIR_OprDesc::address_type: return T_ADDRESS; aoqi@0: case LIR_OprDesc::metadata_type:return T_METADATA; aoqi@0: case LIR_OprDesc::unknown_type: // fall through aoqi@0: default: ShouldNotReachHere(); return T_ILLEGAL; aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: aoqi@0: // LIR_Address aoqi@0: class LIR_Address: public LIR_OprPtr { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: public: aoqi@0: // NOTE: currently these must be the log2 of the scale factor (and aoqi@0: // must also be equivalent to the ScaleFactor enum in aoqi@0: // assembler_i486.hpp) aoqi@0: enum Scale { aoqi@0: times_1 = 0, aoqi@0: times_2 = 1, aoqi@0: times_4 = 2, aoqi@0: times_8 = 3 aoqi@0: }; aoqi@0: aoqi@0: private: aoqi@0: LIR_Opr _base; aoqi@0: LIR_Opr _index; aoqi@0: Scale _scale; aoqi@0: intx _disp; aoqi@0: BasicType _type; aoqi@0: aoqi@0: public: aoqi@0: LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type): aoqi@0: _base(base) aoqi@0: , _index(index) aoqi@0: , _scale(times_1) aoqi@0: , _type(type) aoqi@0: , _disp(0) { verify(); } aoqi@0: aoqi@1: #ifndef MIPS64 aoqi@0: LIR_Address(LIR_Opr base, intx disp, BasicType type): aoqi@1: #else aoqi@1: LIR_Address(LIR_Opr base, int disp, BasicType type): aoqi@1: #endif aoqi@0: _base(base) aoqi@0: , _index(LIR_OprDesc::illegalOpr()) aoqi@0: , _scale(times_1) aoqi@0: , _type(type) aoqi@0: , _disp(disp) { verify(); } aoqi@0: aoqi@0: LIR_Address(LIR_Opr base, BasicType type): aoqi@0: _base(base) aoqi@0: , _index(LIR_OprDesc::illegalOpr()) aoqi@0: , _scale(times_1) aoqi@0: , _type(type) aoqi@0: , _disp(0) { verify(); } aoqi@0: aoqi@0: #if defined(X86) || defined(ARM) aoqi@0: LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type): aoqi@0: _base(base) aoqi@0: , _index(index) aoqi@0: , _scale(scale) aoqi@0: , _type(type) aoqi@0: , _disp(disp) { verify(); } aoqi@0: #endif // X86 || ARM aoqi@0: aoqi@0: LIR_Opr base() const { return _base; } aoqi@0: LIR_Opr index() const { return _index; } aoqi@0: Scale scale() const { return _scale; } aoqi@0: intx disp() const { return _disp; } aoqi@0: aoqi@0: bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); } aoqi@0: aoqi@0: virtual LIR_Address* as_address() { return this; } aoqi@0: virtual BasicType type() const { return _type; } aoqi@0: virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; aoqi@0: aoqi@0: void verify() const PRODUCT_RETURN; aoqi@0: aoqi@0: static Scale scale(BasicType type); aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: // operand factory aoqi@0: class LIR_OprFact: public AllStatic { aoqi@0: public: aoqi@0: aoqi@0: static LIR_Opr illegalOpr; aoqi@0: aoqi@0: static LIR_Opr single_cpu(int reg) { aoqi@0: return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | aoqi@0: LIR_OprDesc::int_type | aoqi@0: LIR_OprDesc::cpu_register | aoqi@0: LIR_OprDesc::single_size); aoqi@0: } aoqi@0: static LIR_Opr single_cpu_oop(int reg) { aoqi@0: return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | aoqi@0: LIR_OprDesc::object_type | aoqi@0: LIR_OprDesc::cpu_register | aoqi@0: LIR_OprDesc::single_size); aoqi@0: } aoqi@0: static LIR_Opr single_cpu_address(int reg) { aoqi@0: return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | aoqi@0: LIR_OprDesc::address_type | aoqi@0: LIR_OprDesc::cpu_register | aoqi@0: LIR_OprDesc::single_size); aoqi@0: } aoqi@0: static LIR_Opr single_cpu_metadata(int reg) { aoqi@0: return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | aoqi@0: LIR_OprDesc::metadata_type | aoqi@0: LIR_OprDesc::cpu_register | aoqi@0: LIR_OprDesc::single_size); aoqi@0: } aoqi@0: static LIR_Opr double_cpu(int reg1, int reg2) { aoqi@0: LP64_ONLY(assert(reg1 == reg2, "must be identical")); aoqi@0: return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | aoqi@0: (reg2 << LIR_OprDesc::reg2_shift) | aoqi@0: LIR_OprDesc::long_type | aoqi@0: LIR_OprDesc::cpu_register | aoqi@0: LIR_OprDesc::double_size); aoqi@0: } aoqi@0: aoqi@0: static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | aoqi@0: LIR_OprDesc::float_type | aoqi@0: LIR_OprDesc::fpu_register | aoqi@0: LIR_OprDesc::single_size); } aoqi@0: #if defined(ARM) aoqi@0: static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); } aoqi@0: static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::float_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); } aoqi@0: static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); } aoqi@0: #endif aoqi@0: #ifdef SPARC aoqi@0: static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | aoqi@0: (reg2 << LIR_OprDesc::reg2_shift) | aoqi@0: LIR_OprDesc::double_type | aoqi@0: LIR_OprDesc::fpu_register | aoqi@0: LIR_OprDesc::double_size); } aoqi@0: #endif aoqi@1: #ifdef MIPS64 aoqi@1: static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | aoqi@1: (reg << LIR_OprDesc::reg2_shift) | aoqi@1: LIR_OprDesc::double_type | aoqi@1: LIR_OprDesc::fpu_register | aoqi@1: LIR_OprDesc::double_size); } aoqi@1: #endif aoqi@0: #ifdef X86 aoqi@0: static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | aoqi@0: (reg << LIR_OprDesc::reg2_shift) | aoqi@0: LIR_OprDesc::double_type | aoqi@0: LIR_OprDesc::fpu_register | aoqi@0: LIR_OprDesc::double_size); } aoqi@0: aoqi@0: static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | aoqi@0: LIR_OprDesc::float_type | aoqi@0: LIR_OprDesc::fpu_register | aoqi@0: LIR_OprDesc::single_size | aoqi@0: LIR_OprDesc::is_xmm_mask); } aoqi@0: static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | aoqi@0: (reg << LIR_OprDesc::reg2_shift) | aoqi@0: LIR_OprDesc::double_type | aoqi@0: LIR_OprDesc::fpu_register | aoqi@0: LIR_OprDesc::double_size | aoqi@0: LIR_OprDesc::is_xmm_mask); } aoqi@0: #endif // X86 aoqi@0: #ifdef PPC aoqi@0: static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | aoqi@0: (reg << LIR_OprDesc::reg2_shift) | aoqi@0: LIR_OprDesc::double_type | aoqi@0: LIR_OprDesc::fpu_register | aoqi@0: LIR_OprDesc::double_size); } aoqi@0: static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | aoqi@0: LIR_OprDesc::float_type | aoqi@0: LIR_OprDesc::cpu_register | aoqi@0: LIR_OprDesc::single_size); } aoqi@0: static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift) | aoqi@0: (reg1 << LIR_OprDesc::reg2_shift) | aoqi@0: LIR_OprDesc::double_type | aoqi@0: LIR_OprDesc::cpu_register | aoqi@0: LIR_OprDesc::double_size); } aoqi@0: #endif // PPC aoqi@0: aoqi@0: static LIR_Opr virtual_register(int index, BasicType type) { aoqi@0: LIR_Opr res; aoqi@0: switch (type) { aoqi@0: case T_OBJECT: // fall through aoqi@0: case T_ARRAY: aoqi@0: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | aoqi@0: LIR_OprDesc::object_type | aoqi@0: LIR_OprDesc::cpu_register | aoqi@0: LIR_OprDesc::single_size | aoqi@0: LIR_OprDesc::virtual_mask); aoqi@0: break; aoqi@0: aoqi@0: case T_METADATA: aoqi@0: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | aoqi@0: LIR_OprDesc::metadata_type| aoqi@0: LIR_OprDesc::cpu_register | aoqi@0: LIR_OprDesc::single_size | aoqi@0: LIR_OprDesc::virtual_mask); aoqi@0: break; aoqi@0: aoqi@0: case T_INT: aoqi@0: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | aoqi@0: LIR_OprDesc::int_type | aoqi@0: LIR_OprDesc::cpu_register | aoqi@0: LIR_OprDesc::single_size | aoqi@0: LIR_OprDesc::virtual_mask); aoqi@0: break; aoqi@0: aoqi@0: case T_ADDRESS: aoqi@0: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | aoqi@0: LIR_OprDesc::address_type | aoqi@0: LIR_OprDesc::cpu_register | aoqi@0: LIR_OprDesc::single_size | aoqi@0: LIR_OprDesc::virtual_mask); aoqi@0: break; aoqi@0: aoqi@0: case T_LONG: aoqi@0: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | aoqi@0: LIR_OprDesc::long_type | aoqi@0: LIR_OprDesc::cpu_register | aoqi@0: LIR_OprDesc::double_size | aoqi@0: LIR_OprDesc::virtual_mask); aoqi@0: break; aoqi@0: aoqi@0: #ifdef __SOFTFP__ aoqi@0: case T_FLOAT: aoqi@0: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | aoqi@0: LIR_OprDesc::float_type | aoqi@0: LIR_OprDesc::cpu_register | aoqi@0: LIR_OprDesc::single_size | aoqi@0: LIR_OprDesc::virtual_mask); aoqi@0: break; aoqi@0: case T_DOUBLE: aoqi@0: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | aoqi@0: LIR_OprDesc::double_type | aoqi@0: LIR_OprDesc::cpu_register | aoqi@0: LIR_OprDesc::double_size | aoqi@0: LIR_OprDesc::virtual_mask); aoqi@0: break; aoqi@0: #else // __SOFTFP__ aoqi@0: case T_FLOAT: aoqi@0: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | aoqi@0: LIR_OprDesc::float_type | aoqi@0: LIR_OprDesc::fpu_register | aoqi@0: LIR_OprDesc::single_size | aoqi@0: LIR_OprDesc::virtual_mask); aoqi@0: break; aoqi@0: aoqi@0: case aoqi@0: T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | aoqi@0: LIR_OprDesc::double_type | aoqi@0: LIR_OprDesc::fpu_register | aoqi@0: LIR_OprDesc::double_size | aoqi@0: LIR_OprDesc::virtual_mask); aoqi@0: break; aoqi@0: #endif // __SOFTFP__ aoqi@0: default: ShouldNotReachHere(); res = illegalOpr; aoqi@0: } aoqi@0: aoqi@0: #ifdef ASSERT aoqi@0: res->validate_type(); aoqi@0: assert(res->vreg_number() == index, "conversion check"); aoqi@0: assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base"); aoqi@0: assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); aoqi@0: aoqi@0: // old-style calculation; check if old and new method are equal aoqi@0: LIR_OprDesc::OprType t = as_OprType(type); aoqi@0: #ifdef __SOFTFP__ aoqi@0: LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | aoqi@0: t | aoqi@0: LIR_OprDesc::cpu_register | aoqi@0: LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); aoqi@0: #else // __SOFTFP__ aoqi@0: LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t | aoqi@0: ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) | aoqi@0: LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); aoqi@0: assert(res == old_res, "old and new method not equal"); aoqi@0: #endif // __SOFTFP__ aoqi@0: #endif // ASSERT aoqi@0: aoqi@0: return res; aoqi@0: } aoqi@0: aoqi@0: // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as aoqi@0: // the index is platform independent; a double stack useing indeces 2 and 3 has always aoqi@0: // index 2. aoqi@0: static LIR_Opr stack(int index, BasicType type) { aoqi@0: LIR_Opr res; aoqi@0: switch (type) { aoqi@0: case T_OBJECT: // fall through aoqi@0: case T_ARRAY: aoqi@0: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | aoqi@0: LIR_OprDesc::object_type | aoqi@0: LIR_OprDesc::stack_value | aoqi@0: LIR_OprDesc::single_size); aoqi@0: break; aoqi@0: aoqi@0: case T_METADATA: aoqi@0: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | aoqi@0: LIR_OprDesc::metadata_type | aoqi@0: LIR_OprDesc::stack_value | aoqi@0: LIR_OprDesc::single_size); aoqi@0: break; aoqi@0: case T_INT: aoqi@0: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | aoqi@0: LIR_OprDesc::int_type | aoqi@0: LIR_OprDesc::stack_value | aoqi@0: LIR_OprDesc::single_size); aoqi@0: break; aoqi@0: aoqi@0: case T_ADDRESS: aoqi@0: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | aoqi@0: LIR_OprDesc::address_type | aoqi@0: LIR_OprDesc::stack_value | aoqi@0: LIR_OprDesc::single_size); aoqi@0: break; aoqi@0: aoqi@0: case T_LONG: aoqi@0: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | aoqi@0: LIR_OprDesc::long_type | aoqi@0: LIR_OprDesc::stack_value | aoqi@0: LIR_OprDesc::double_size); aoqi@0: break; aoqi@0: aoqi@0: case T_FLOAT: aoqi@0: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | aoqi@0: LIR_OprDesc::float_type | aoqi@0: LIR_OprDesc::stack_value | aoqi@0: LIR_OprDesc::single_size); aoqi@0: break; aoqi@0: case T_DOUBLE: aoqi@0: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | aoqi@0: LIR_OprDesc::double_type | aoqi@0: LIR_OprDesc::stack_value | aoqi@0: LIR_OprDesc::double_size); aoqi@0: break; aoqi@0: aoqi@0: default: ShouldNotReachHere(); res = illegalOpr; aoqi@0: } aoqi@0: aoqi@0: #ifdef ASSERT aoqi@0: assert(index >= 0, "index must be positive"); aoqi@0: assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); aoqi@0: aoqi@0: LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | aoqi@0: LIR_OprDesc::stack_value | aoqi@0: as_OprType(type) | aoqi@0: LIR_OprDesc::size_for(type)); aoqi@0: assert(res == old_res, "old and new method not equal"); aoqi@0: #endif aoqi@0: aoqi@0: return res; aoqi@0: } aoqi@0: aoqi@0: static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); } aoqi@0: static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); } aoqi@0: static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); } aoqi@0: static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); } aoqi@0: static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); } aoqi@0: static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; } aoqi@0: static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); } aoqi@0: static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); } aoqi@0: static LIR_Opr illegal() { return (LIR_Opr)-1; } aoqi@0: static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); } aoqi@0: static LIR_Opr metadataConst(Metadata* m) { return (LIR_Opr)(new LIR_Const(m)); } aoqi@0: aoqi@0: static LIR_Opr value_type(ValueType* type); aoqi@0: static LIR_Opr dummy_value_type(ValueType* type); aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: //------------------------------------------------------------------------------- aoqi@0: // LIR Instructions aoqi@0: //------------------------------------------------------------------------------- aoqi@0: // aoqi@0: // Note: aoqi@0: // - every instruction has a result operand aoqi@0: // - every instruction has an CodeEmitInfo operand (can be revisited later) aoqi@0: // - every instruction has a LIR_OpCode operand aoqi@0: // - LIR_OpN, means an instruction that has N input operands aoqi@0: // aoqi@0: // class hierarchy: aoqi@0: // aoqi@0: class LIR_Op; aoqi@0: class LIR_Op0; aoqi@0: class LIR_OpLabel; aoqi@0: class LIR_Op1; aoqi@0: class LIR_OpBranch; aoqi@0: class LIR_OpConvert; aoqi@0: class LIR_OpAllocObj; aoqi@0: class LIR_OpRoundFP; aoqi@0: class LIR_Op2; aoqi@0: class LIR_OpDelay; aoqi@0: class LIR_Op3; aoqi@0: class LIR_OpAllocArray; aoqi@0: class LIR_OpCall; aoqi@0: class LIR_OpJavaCall; aoqi@0: class LIR_OpRTCall; aoqi@0: class LIR_OpArrayCopy; aoqi@0: class LIR_OpUpdateCRC32; aoqi@0: class LIR_OpLock; aoqi@0: class LIR_OpTypeCheck; aoqi@0: class LIR_OpCompareAndSwap; aoqi@0: class LIR_OpProfileCall; aoqi@0: class LIR_OpProfileType; aoqi@0: #ifdef ASSERT aoqi@0: class LIR_OpAssert; aoqi@0: #endif aoqi@0: aoqi@0: // LIR operation codes aoqi@0: enum LIR_Code { aoqi@0: lir_none aoqi@0: , begin_op0 aoqi@0: , lir_word_align aoqi@0: , lir_label aoqi@0: , lir_nop aoqi@0: , lir_backwardbranch_target aoqi@0: , lir_std_entry aoqi@0: , lir_osr_entry aoqi@0: , lir_build_frame aoqi@0: , lir_fpop_raw aoqi@0: , lir_24bit_FPU aoqi@0: , lir_reset_FPU aoqi@0: , lir_breakpoint aoqi@0: , lir_rtcall aoqi@0: , lir_membar aoqi@0: , lir_membar_acquire aoqi@0: , lir_membar_release aoqi@0: , lir_membar_loadload aoqi@0: , lir_membar_storestore aoqi@0: , lir_membar_loadstore aoqi@0: , lir_membar_storeload aoqi@0: , lir_get_thread aoqi@0: , end_op0 aoqi@0: , begin_op1 aoqi@0: , lir_fxch aoqi@0: , lir_fld aoqi@0: , lir_ffree aoqi@0: , lir_push aoqi@0: , lir_pop aoqi@0: , lir_null_check aoqi@0: , lir_return aoqi@0: , lir_leal aoqi@0: , lir_neg aoqi@1: #ifndef MIPS64 aoqi@0: , lir_branch aoqi@0: , lir_cond_float_branch aoqi@1: #endif aoqi@0: , lir_move aoqi@0: , lir_prefetchr aoqi@0: , lir_prefetchw aoqi@0: , lir_convert aoqi@0: , lir_alloc_object aoqi@0: , lir_monaddr aoqi@0: , lir_roundfp aoqi@0: , lir_safepoint aoqi@0: , lir_pack64 aoqi@0: , lir_unpack64 aoqi@0: , lir_unwind aoqi@0: , end_op1 aoqi@0: , begin_op2 aoqi@1: #ifdef MIPS64 aoqi@1: , lir_branch aoqi@1: , lir_cond_float_branch aoqi@1: , lir_null_check_for_branch aoqi@1: #else aoqi@0: , lir_cmp aoqi@1: #endif aoqi@0: , lir_cmp_l2i aoqi@0: , lir_ucmp_fd2i aoqi@0: , lir_cmp_fd2i aoqi@0: , lir_cmove aoqi@0: , lir_add aoqi@0: , lir_sub aoqi@0: , lir_mul aoqi@0: , lir_mul_strictfp aoqi@0: , lir_div aoqi@0: , lir_div_strictfp aoqi@0: , lir_rem aoqi@0: , lir_sqrt aoqi@0: , lir_abs aoqi@0: , lir_sin aoqi@0: , lir_cos aoqi@0: , lir_tan aoqi@0: , lir_log aoqi@0: , lir_log10 aoqi@0: , lir_exp aoqi@0: , lir_pow aoqi@0: , lir_logic_and aoqi@0: , lir_logic_or aoqi@0: , lir_logic_xor aoqi@0: , lir_shl aoqi@0: , lir_shr aoqi@0: , lir_ushr aoqi@0: , lir_alloc_array aoqi@0: , lir_throw aoqi@0: , lir_compare_to aoqi@0: , lir_xadd aoqi@0: , lir_xchg aoqi@0: , end_op2 aoqi@0: , begin_op3 aoqi@1: #ifdef MIPS64 aoqi@1: , lir_frem aoqi@1: #endif aoqi@0: , lir_idiv aoqi@0: , lir_irem aoqi@0: , end_op3 aoqi@0: , begin_opJavaCall aoqi@0: , lir_static_call aoqi@0: , lir_optvirtual_call aoqi@0: , lir_icvirtual_call aoqi@0: , lir_virtual_call aoqi@0: , lir_dynamic_call aoqi@0: , end_opJavaCall aoqi@0: , begin_opArrayCopy aoqi@0: , lir_arraycopy aoqi@0: , end_opArrayCopy aoqi@0: , begin_opUpdateCRC32 aoqi@0: , lir_updatecrc32 aoqi@0: , end_opUpdateCRC32 aoqi@0: , begin_opLock aoqi@0: , lir_lock aoqi@0: , lir_unlock aoqi@0: , end_opLock aoqi@0: , begin_delay_slot aoqi@0: , lir_delay_slot aoqi@0: , end_delay_slot aoqi@0: , begin_opTypeCheck aoqi@0: , lir_instanceof aoqi@0: , lir_checkcast aoqi@0: , lir_store_check aoqi@0: , end_opTypeCheck aoqi@0: , begin_opCompareAndSwap aoqi@0: , lir_cas_long aoqi@0: , lir_cas_obj aoqi@0: , lir_cas_int aoqi@0: , end_opCompareAndSwap aoqi@0: , begin_opMDOProfile aoqi@0: , lir_profile_call aoqi@0: , lir_profile_type aoqi@0: , end_opMDOProfile aoqi@0: , begin_opAssert aoqi@0: , lir_assert aoqi@0: , end_opAssert aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: enum LIR_Condition { aoqi@0: lir_cond_equal aoqi@0: , lir_cond_notEqual aoqi@0: , lir_cond_less aoqi@0: , lir_cond_lessEqual aoqi@0: , lir_cond_greaterEqual aoqi@0: , lir_cond_greater aoqi@0: , lir_cond_belowEqual aoqi@0: , lir_cond_aboveEqual aoqi@0: , lir_cond_always aoqi@0: , lir_cond_unknown = -1 aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: enum LIR_PatchCode { aoqi@0: lir_patch_none, aoqi@0: lir_patch_low, aoqi@0: lir_patch_high, aoqi@0: lir_patch_normal aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: enum LIR_MoveKind { aoqi@0: lir_move_normal, aoqi@0: lir_move_volatile, aoqi@0: lir_move_unaligned, aoqi@0: lir_move_wide, aoqi@0: lir_move_max_flag aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: // -------------------------------------------------- aoqi@0: // LIR_Op aoqi@0: // -------------------------------------------------- aoqi@0: class LIR_Op: public CompilationResourceObj { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: #ifdef ASSERT aoqi@0: private: aoqi@0: const char * _file; aoqi@0: int _line; aoqi@0: #endif aoqi@0: aoqi@0: protected: aoqi@0: LIR_Opr _result; aoqi@0: unsigned short _code; aoqi@0: unsigned short _flags; aoqi@0: CodeEmitInfo* _info; aoqi@0: int _id; // value id for register allocation aoqi@0: int _fpu_pop_count; aoqi@0: Instruction* _source; // for debugging aoqi@0: aoqi@0: static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN; aoqi@0: aoqi@0: protected: aoqi@0: static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; } aoqi@0: aoqi@0: public: aoqi@0: LIR_Op() aoqi@0: : _result(LIR_OprFact::illegalOpr) aoqi@0: , _code(lir_none) aoqi@0: , _flags(0) aoqi@0: , _info(NULL) aoqi@0: #ifdef ASSERT aoqi@0: , _file(NULL) aoqi@0: , _line(0) aoqi@0: #endif aoqi@0: , _fpu_pop_count(0) aoqi@0: , _source(NULL) aoqi@0: , _id(-1) {} aoqi@0: aoqi@0: LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info) aoqi@0: : _result(result) aoqi@0: , _code(code) aoqi@0: , _flags(0) aoqi@0: , _info(info) aoqi@0: #ifdef ASSERT aoqi@0: , _file(NULL) aoqi@0: , _line(0) aoqi@0: #endif aoqi@0: , _fpu_pop_count(0) aoqi@0: , _source(NULL) aoqi@0: , _id(-1) {} aoqi@0: aoqi@0: CodeEmitInfo* info() const { return _info; } aoqi@0: LIR_Code code() const { return (LIR_Code)_code; } aoqi@0: LIR_Opr result_opr() const { return _result; } aoqi@0: void set_result_opr(LIR_Opr opr) { _result = opr; } aoqi@0: aoqi@0: #ifdef ASSERT aoqi@0: void set_file_and_line(const char * file, int line) { aoqi@0: _file = file; aoqi@0: _line = line; aoqi@0: } aoqi@0: #endif aoqi@0: aoqi@0: virtual const char * name() const PRODUCT_RETURN0; aoqi@0: aoqi@0: int id() const { return _id; } aoqi@0: void set_id(int id) { _id = id; } aoqi@0: aoqi@0: // FPU stack simulation helpers -- only used on Intel aoqi@0: void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; } aoqi@0: int fpu_pop_count() const { return _fpu_pop_count; } aoqi@0: bool pop_fpu_stack() { return _fpu_pop_count > 0; } aoqi@0: aoqi@0: Instruction* source() const { return _source; } aoqi@0: void set_source(Instruction* ins) { _source = ins; } aoqi@0: aoqi@0: virtual void emit_code(LIR_Assembler* masm) = 0; aoqi@0: virtual void print_instr(outputStream* out) const = 0; aoqi@0: virtual void print_on(outputStream* st) const PRODUCT_RETURN; aoqi@0: aoqi@0: virtual bool is_patching() { return false; } aoqi@0: virtual LIR_OpCall* as_OpCall() { return NULL; } aoqi@0: virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; } aoqi@0: virtual LIR_OpLabel* as_OpLabel() { return NULL; } aoqi@0: virtual LIR_OpDelay* as_OpDelay() { return NULL; } aoqi@0: virtual LIR_OpLock* as_OpLock() { return NULL; } aoqi@0: virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; } aoqi@0: virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; } aoqi@0: virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; } aoqi@0: virtual LIR_OpBranch* as_OpBranch() { return NULL; } aoqi@0: virtual LIR_OpRTCall* as_OpRTCall() { return NULL; } aoqi@0: virtual LIR_OpConvert* as_OpConvert() { return NULL; } aoqi@0: virtual LIR_Op0* as_Op0() { return NULL; } aoqi@0: virtual LIR_Op1* as_Op1() { return NULL; } aoqi@0: virtual LIR_Op2* as_Op2() { return NULL; } aoqi@0: virtual LIR_Op3* as_Op3() { return NULL; } aoqi@0: virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; } aoqi@0: virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; } aoqi@0: virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; } aoqi@0: virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; } aoqi@0: virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; } aoqi@0: virtual LIR_OpProfileType* as_OpProfileType() { return NULL; } aoqi@0: #ifdef ASSERT aoqi@0: virtual LIR_OpAssert* as_OpAssert() { return NULL; } aoqi@0: #endif aoqi@0: aoqi@0: virtual void verify() const {} aoqi@0: }; aoqi@0: aoqi@0: // for calls aoqi@0: class LIR_OpCall: public LIR_Op { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: protected: aoqi@0: address _addr; aoqi@0: LIR_OprList* _arguments; aoqi@0: protected: aoqi@0: LIR_OpCall(LIR_Code code, address addr, LIR_Opr result, aoqi@0: LIR_OprList* arguments, CodeEmitInfo* info = NULL) aoqi@0: : LIR_Op(code, result, info) aoqi@0: , _arguments(arguments) aoqi@0: , _addr(addr) {} aoqi@0: aoqi@0: public: aoqi@0: address addr() const { return _addr; } aoqi@0: const LIR_OprList* arguments() const { return _arguments; } aoqi@0: virtual LIR_OpCall* as_OpCall() { return this; } aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: // -------------------------------------------------- aoqi@0: // LIR_OpJavaCall aoqi@0: // -------------------------------------------------- aoqi@0: class LIR_OpJavaCall: public LIR_OpCall { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: private: aoqi@0: ciMethod* _method; aoqi@0: LIR_Opr _receiver; aoqi@0: LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr. aoqi@0: aoqi@0: public: aoqi@0: LIR_OpJavaCall(LIR_Code code, ciMethod* method, aoqi@0: LIR_Opr receiver, LIR_Opr result, aoqi@0: address addr, LIR_OprList* arguments, aoqi@0: CodeEmitInfo* info) aoqi@0: : LIR_OpCall(code, addr, result, arguments, info) aoqi@0: , _receiver(receiver) aoqi@0: , _method(method) aoqi@0: , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) aoqi@0: { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } aoqi@0: aoqi@0: LIR_OpJavaCall(LIR_Code code, ciMethod* method, aoqi@0: LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset, aoqi@0: LIR_OprList* arguments, CodeEmitInfo* info) aoqi@0: : LIR_OpCall(code, (address)vtable_offset, result, arguments, info) aoqi@0: , _receiver(receiver) aoqi@0: , _method(method) aoqi@0: , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) aoqi@0: { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } aoqi@0: aoqi@0: LIR_Opr receiver() const { return _receiver; } aoqi@0: ciMethod* method() const { return _method; } aoqi@0: aoqi@0: // JSR 292 support. aoqi@0: bool is_invokedynamic() const { return code() == lir_dynamic_call; } aoqi@0: bool is_method_handle_invoke() const { aoqi@0: return aoqi@0: method()->is_compiled_lambda_form() // Java-generated adapter aoqi@0: || aoqi@0: method()->is_method_handle_intrinsic(); // JVM-generated MH intrinsic aoqi@0: } aoqi@0: aoqi@0: intptr_t vtable_offset() const { aoqi@0: assert(_code == lir_virtual_call, "only have vtable for real vcall"); aoqi@0: return (intptr_t) addr(); aoqi@0: } aoqi@0: aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_OpJavaCall* as_OpJavaCall() { return this; } aoqi@0: virtual void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: }; aoqi@0: aoqi@0: // -------------------------------------------------- aoqi@0: // LIR_OpLabel aoqi@0: // -------------------------------------------------- aoqi@0: // Location where a branch can continue aoqi@0: class LIR_OpLabel: public LIR_Op { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: private: aoqi@0: Label* _label; aoqi@0: public: aoqi@0: LIR_OpLabel(Label* lbl) aoqi@0: : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL) aoqi@0: , _label(lbl) {} aoqi@0: Label* label() const { return _label; } aoqi@0: aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_OpLabel* as_OpLabel() { return this; } aoqi@0: virtual void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: }; aoqi@0: aoqi@0: // LIR_OpArrayCopy aoqi@0: class LIR_OpArrayCopy: public LIR_Op { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: private: aoqi@0: ArrayCopyStub* _stub; aoqi@0: LIR_Opr _src; aoqi@0: LIR_Opr _src_pos; aoqi@0: LIR_Opr _dst; aoqi@0: LIR_Opr _dst_pos; aoqi@0: LIR_Opr _length; aoqi@0: LIR_Opr _tmp; aoqi@0: ciArrayKlass* _expected_type; aoqi@0: int _flags; aoqi@0: aoqi@0: public: aoqi@0: enum Flags { aoqi@0: src_null_check = 1 << 0, aoqi@0: dst_null_check = 1 << 1, aoqi@0: src_pos_positive_check = 1 << 2, aoqi@0: dst_pos_positive_check = 1 << 3, aoqi@0: length_positive_check = 1 << 4, aoqi@0: src_range_check = 1 << 5, aoqi@0: dst_range_check = 1 << 6, aoqi@0: type_check = 1 << 7, aoqi@0: overlapping = 1 << 8, aoqi@0: unaligned = 1 << 9, aoqi@0: src_objarray = 1 << 10, aoqi@0: dst_objarray = 1 << 11, aoqi@0: all_flags = (1 << 12) - 1 aoqi@0: }; aoqi@0: aoqi@0: LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, aoqi@0: ciArrayKlass* expected_type, int flags, CodeEmitInfo* info); aoqi@0: aoqi@0: LIR_Opr src() const { return _src; } aoqi@0: LIR_Opr src_pos() const { return _src_pos; } aoqi@0: LIR_Opr dst() const { return _dst; } aoqi@0: LIR_Opr dst_pos() const { return _dst_pos; } aoqi@0: LIR_Opr length() const { return _length; } aoqi@0: LIR_Opr tmp() const { return _tmp; } aoqi@0: int flags() const { return _flags; } aoqi@0: ciArrayKlass* expected_type() const { return _expected_type; } aoqi@0: ArrayCopyStub* stub() const { return _stub; } aoqi@0: aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; } aoqi@0: void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: }; aoqi@0: aoqi@0: // LIR_OpUpdateCRC32 aoqi@0: class LIR_OpUpdateCRC32: public LIR_Op { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: private: aoqi@0: LIR_Opr _crc; aoqi@0: LIR_Opr _val; aoqi@0: aoqi@0: public: aoqi@0: aoqi@0: LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res); aoqi@0: aoqi@0: LIR_Opr crc() const { return _crc; } aoqi@0: LIR_Opr val() const { return _val; } aoqi@0: aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return this; } aoqi@0: void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: }; aoqi@0: aoqi@0: // -------------------------------------------------- aoqi@0: // LIR_Op0 aoqi@0: // -------------------------------------------------- aoqi@0: class LIR_Op0: public LIR_Op { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: public: aoqi@0: LIR_Op0(LIR_Code code) aoqi@0: : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } aoqi@0: LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL) aoqi@0: : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } aoqi@0: aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_Op0* as_Op0() { return this; } aoqi@0: virtual void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: // -------------------------------------------------- aoqi@0: // LIR_Op1 aoqi@0: // -------------------------------------------------- aoqi@0: aoqi@0: class LIR_Op1: public LIR_Op { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: protected: aoqi@0: LIR_Opr _opr; // input operand aoqi@0: BasicType _type; // Operand types aoqi@0: LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?) aoqi@0: aoqi@0: static void print_patch_code(outputStream* out, LIR_PatchCode code); aoqi@0: aoqi@0: void set_kind(LIR_MoveKind kind) { aoqi@0: assert(code() == lir_move, "must be"); aoqi@0: _flags = kind; aoqi@0: } aoqi@0: aoqi@0: public: aoqi@0: LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL) aoqi@0: : LIR_Op(code, result, info) aoqi@0: , _opr(opr) aoqi@0: , _patch(patch) aoqi@0: , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } aoqi@0: aoqi@0: LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind) aoqi@0: : LIR_Op(code, result, info) aoqi@0: , _opr(opr) aoqi@0: , _patch(patch) aoqi@0: , _type(type) { aoqi@0: assert(code == lir_move, "must be"); aoqi@0: set_kind(kind); aoqi@0: } aoqi@0: aoqi@0: LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info) aoqi@0: : LIR_Op(code, LIR_OprFact::illegalOpr, info) aoqi@0: , _opr(opr) aoqi@0: , _patch(lir_patch_none) aoqi@0: , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } aoqi@0: aoqi@0: LIR_Opr in_opr() const { return _opr; } aoqi@0: LIR_PatchCode patch_code() const { return _patch; } aoqi@0: BasicType type() const { return _type; } aoqi@0: aoqi@0: LIR_MoveKind move_kind() const { aoqi@0: assert(code() == lir_move, "must be"); aoqi@0: return (LIR_MoveKind)_flags; aoqi@0: } aoqi@0: aoqi@0: virtual bool is_patching() { return _patch != lir_patch_none; } aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_Op1* as_Op1() { return this; } aoqi@0: virtual const char * name() const PRODUCT_RETURN0; aoqi@0: aoqi@0: void set_in_opr(LIR_Opr opr) { _opr = opr; } aoqi@0: aoqi@0: virtual void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: virtual void verify() const; aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: // for runtime calls aoqi@0: class LIR_OpRTCall: public LIR_OpCall { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: private: aoqi@0: LIR_Opr _tmp; aoqi@0: public: aoqi@0: LIR_OpRTCall(address addr, LIR_Opr tmp, aoqi@0: LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL) aoqi@0: : LIR_OpCall(lir_rtcall, addr, result, arguments, info) aoqi@0: , _tmp(tmp) {} aoqi@0: aoqi@0: virtual void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_OpRTCall* as_OpRTCall() { return this; } aoqi@0: aoqi@0: LIR_Opr tmp() const { return _tmp; } aoqi@0: aoqi@0: virtual void verify() const; aoqi@0: }; aoqi@0: aoqi@1: #ifndef MIPS64 aoqi@0: class LIR_OpBranch: public LIR_Op { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: private: aoqi@0: LIR_Condition _cond; aoqi@0: BasicType _type; aoqi@0: Label* _label; aoqi@0: BlockBegin* _block; // if this is a branch to a block, this is the block aoqi@0: BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block aoqi@0: CodeStub* _stub; // if this is a branch to a stub, this is the stub aoqi@0: aoqi@0: public: aoqi@0: LIR_OpBranch(LIR_Condition cond, BasicType type, Label* lbl) aoqi@0: : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL) aoqi@0: , _cond(cond) aoqi@0: , _type(type) aoqi@0: , _label(lbl) aoqi@0: , _block(NULL) aoqi@0: , _ublock(NULL) aoqi@0: , _stub(NULL) { } aoqi@0: aoqi@0: LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block); aoqi@0: LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub); aoqi@0: aoqi@0: // for unordered comparisons aoqi@0: LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock); aoqi@0: aoqi@0: LIR_Condition cond() const { return _cond; } aoqi@0: BasicType type() const { return _type; } aoqi@0: Label* label() const { return _label; } aoqi@0: BlockBegin* block() const { return _block; } aoqi@0: BlockBegin* ublock() const { return _ublock; } aoqi@0: CodeStub* stub() const { return _stub; } aoqi@0: aoqi@0: void change_block(BlockBegin* b); aoqi@0: void change_ublock(BlockBegin* b); aoqi@0: void negate_cond(); aoqi@0: aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_OpBranch* as_OpBranch() { return this; } aoqi@0: virtual void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: }; aoqi@1: #endif aoqi@0: aoqi@0: class ConversionStub; aoqi@0: aoqi@0: class LIR_OpConvert: public LIR_Op1 { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: private: aoqi@0: Bytecodes::Code _bytecode; aoqi@0: ConversionStub* _stub; aoqi@0: #ifdef PPC aoqi@0: LIR_Opr _tmp1; aoqi@0: LIR_Opr _tmp2; aoqi@0: #endif aoqi@0: aoqi@0: public: aoqi@0: LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub) aoqi@0: : LIR_Op1(lir_convert, opr, result) aoqi@0: , _stub(stub) aoqi@0: #ifdef PPC aoqi@0: , _tmp1(LIR_OprDesc::illegalOpr()) aoqi@0: , _tmp2(LIR_OprDesc::illegalOpr()) aoqi@0: #endif aoqi@0: , _bytecode(code) {} aoqi@0: aoqi@0: #ifdef PPC aoqi@0: LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub aoqi@0: ,LIR_Opr tmp1, LIR_Opr tmp2) aoqi@0: : LIR_Op1(lir_convert, opr, result) aoqi@0: , _stub(stub) aoqi@0: , _tmp1(tmp1) aoqi@0: , _tmp2(tmp2) aoqi@0: , _bytecode(code) {} aoqi@0: #endif aoqi@0: aoqi@0: Bytecodes::Code bytecode() const { return _bytecode; } aoqi@0: ConversionStub* stub() const { return _stub; } aoqi@0: #ifdef PPC aoqi@0: LIR_Opr tmp1() const { return _tmp1; } aoqi@0: LIR_Opr tmp2() const { return _tmp2; } aoqi@0: #endif aoqi@0: aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_OpConvert* as_OpConvert() { return this; } aoqi@0: virtual void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: aoqi@0: static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN; aoqi@0: }; aoqi@0: aoqi@1: #ifndef MIPS64 aoqi@0: // LIR_OpAllocObj aoqi@0: class LIR_OpAllocObj : public LIR_Op1 { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: private: aoqi@0: LIR_Opr _tmp1; aoqi@0: LIR_Opr _tmp2; aoqi@0: LIR_Opr _tmp3; aoqi@0: LIR_Opr _tmp4; aoqi@0: int _hdr_size; aoqi@0: int _obj_size; aoqi@0: CodeStub* _stub; aoqi@0: bool _init_check; aoqi@0: aoqi@0: public: aoqi@0: LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result, aoqi@0: LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, aoqi@0: int hdr_size, int obj_size, bool init_check, CodeStub* stub) aoqi@0: : LIR_Op1(lir_alloc_object, klass, result) aoqi@0: , _tmp1(t1) aoqi@0: , _tmp2(t2) aoqi@0: , _tmp3(t3) aoqi@0: , _tmp4(t4) aoqi@0: , _hdr_size(hdr_size) aoqi@0: , _obj_size(obj_size) aoqi@0: , _init_check(init_check) aoqi@0: , _stub(stub) { } aoqi@0: aoqi@0: LIR_Opr klass() const { return in_opr(); } aoqi@0: LIR_Opr obj() const { return result_opr(); } aoqi@0: LIR_Opr tmp1() const { return _tmp1; } aoqi@0: LIR_Opr tmp2() const { return _tmp2; } aoqi@0: LIR_Opr tmp3() const { return _tmp3; } aoqi@0: LIR_Opr tmp4() const { return _tmp4; } aoqi@0: int header_size() const { return _hdr_size; } aoqi@0: int object_size() const { return _obj_size; } aoqi@0: bool init_check() const { return _init_check; } aoqi@0: CodeStub* stub() const { return _stub; } aoqi@0: aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_OpAllocObj * as_OpAllocObj () { return this; } aoqi@0: virtual void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: }; aoqi@1: #else aoqi@1: class LIR_OpAllocObj : public LIR_Op1 { aoqi@1: friend class LIR_OpVisitState; aoqi@1: aoqi@1: private: aoqi@1: LIR_Opr _tmp1; aoqi@1: LIR_Opr _tmp2; aoqi@1: LIR_Opr _tmp3; aoqi@1: LIR_Opr _tmp4; aoqi@1: LIR_Opr _tmp5; aoqi@1: LIR_Opr _tmp6; aoqi@1: int _hdr_size; aoqi@1: int _obj_size; aoqi@1: CodeStub* _stub; aoqi@1: bool _init_check; aoqi@1: aoqi@1: public: aoqi@1: LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result, aoqi@1: LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,LIR_Opr t5, LIR_Opr t6, aoqi@1: int hdr_size, int obj_size, bool init_check, CodeStub* stub) aoqi@1: : LIR_Op1(lir_alloc_object, klass, result) aoqi@1: , _tmp1(t1) aoqi@1: , _tmp2(t2) aoqi@1: , _tmp3(t3) aoqi@1: , _tmp4(t4) aoqi@1: , _tmp5(t5) aoqi@1: , _tmp6(t6) aoqi@1: , _hdr_size(hdr_size) aoqi@1: , _obj_size(obj_size) aoqi@1: , _init_check(init_check) aoqi@1: , _stub(stub) { } aoqi@1: aoqi@1: LIR_Opr klass() const { return in_opr(); } aoqi@1: LIR_Opr obj() const { return result_opr(); } aoqi@1: LIR_Opr tmp1() const { return _tmp1; } aoqi@1: LIR_Opr tmp2() const { return _tmp2; } aoqi@1: LIR_Opr tmp3() const { return _tmp3; } aoqi@1: LIR_Opr tmp4() const { return _tmp4; } aoqi@1: LIR_Opr tmp5() const { return _tmp5; } aoqi@1: LIR_Opr tmp6() const { return _tmp6; } aoqi@1: int header_size() const { return _hdr_size; } aoqi@1: int object_size() const { return _obj_size; } aoqi@1: bool init_check() const { return _init_check; } aoqi@1: CodeStub* stub() const { return _stub; } aoqi@1: aoqi@1: virtual void emit_code(LIR_Assembler* masm); aoqi@1: virtual LIR_OpAllocObj * as_OpAllocObj () { return this; } aoqi@1: virtual void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@1: }; aoqi@1: #endif aoqi@0: aoqi@0: // LIR_OpRoundFP aoqi@0: class LIR_OpRoundFP : public LIR_Op1 { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: private: aoqi@0: LIR_Opr _tmp; aoqi@0: aoqi@0: public: aoqi@0: LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) aoqi@0: : LIR_Op1(lir_roundfp, reg, result) aoqi@0: , _tmp(stack_loc_temp) {} aoqi@0: aoqi@0: LIR_Opr tmp() const { return _tmp; } aoqi@0: virtual LIR_OpRoundFP* as_OpRoundFP() { return this; } aoqi@0: void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: }; aoqi@0: aoqi@0: // LIR_OpTypeCheck aoqi@0: class LIR_OpTypeCheck: public LIR_Op { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: private: aoqi@0: LIR_Opr _object; aoqi@0: LIR_Opr _array; aoqi@0: ciKlass* _klass; aoqi@0: LIR_Opr _tmp1; aoqi@0: LIR_Opr _tmp2; aoqi@0: LIR_Opr _tmp3; aoqi@0: bool _fast_check; aoqi@0: CodeEmitInfo* _info_for_patch; aoqi@0: CodeEmitInfo* _info_for_exception; aoqi@0: CodeStub* _stub; aoqi@0: ciMethod* _profiled_method; aoqi@0: int _profiled_bci; aoqi@0: bool _should_profile; aoqi@0: aoqi@0: public: aoqi@0: LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, aoqi@0: LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, aoqi@0: CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub); aoqi@0: LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, aoqi@0: LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception); aoqi@0: aoqi@0: LIR_Opr object() const { return _object; } aoqi@0: LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; } aoqi@0: LIR_Opr tmp1() const { return _tmp1; } aoqi@0: LIR_Opr tmp2() const { return _tmp2; } aoqi@0: LIR_Opr tmp3() const { return _tmp3; } aoqi@0: ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; } aoqi@0: bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; } aoqi@0: CodeEmitInfo* info_for_patch() const { return _info_for_patch; } aoqi@0: CodeEmitInfo* info_for_exception() const { return _info_for_exception; } aoqi@0: CodeStub* stub() const { return _stub; } aoqi@0: aoqi@0: // MethodData* profiling aoqi@0: void set_profiled_method(ciMethod *method) { _profiled_method = method; } aoqi@0: void set_profiled_bci(int bci) { _profiled_bci = bci; } aoqi@0: void set_should_profile(bool b) { _should_profile = b; } aoqi@0: ciMethod* profiled_method() const { return _profiled_method; } aoqi@0: int profiled_bci() const { return _profiled_bci; } aoqi@0: bool should_profile() const { return _should_profile; } aoqi@0: aoqi@0: virtual bool is_patching() { return _info_for_patch != NULL; } aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; } aoqi@0: void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: }; aoqi@1: #ifndef MIPS64 aoqi@0: // LIR_Op2 aoqi@0: class LIR_Op2: public LIR_Op { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: int _fpu_stack_size; // for sin/cos implementation on Intel aoqi@0: aoqi@0: protected: aoqi@0: LIR_Opr _opr1; aoqi@0: LIR_Opr _opr2; aoqi@0: BasicType _type; aoqi@0: LIR_Opr _tmp1; aoqi@0: LIR_Opr _tmp2; aoqi@0: LIR_Opr _tmp3; aoqi@0: LIR_Opr _tmp4; aoqi@0: LIR_Opr _tmp5; aoqi@0: LIR_Condition _condition; aoqi@0: aoqi@0: void verify() const; aoqi@0: aoqi@0: public: aoqi@0: LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL) aoqi@0: : LIR_Op(code, LIR_OprFact::illegalOpr, info) aoqi@0: , _opr1(opr1) aoqi@0: , _opr2(opr2) aoqi@0: , _type(T_ILLEGAL) aoqi@0: , _condition(condition) aoqi@0: , _fpu_stack_size(0) aoqi@0: , _tmp1(LIR_OprFact::illegalOpr) aoqi@0: , _tmp2(LIR_OprFact::illegalOpr) aoqi@0: , _tmp3(LIR_OprFact::illegalOpr) aoqi@0: , _tmp4(LIR_OprFact::illegalOpr) aoqi@0: , _tmp5(LIR_OprFact::illegalOpr) { aoqi@0: assert(code == lir_cmp || code == lir_assert, "code check"); aoqi@0: } aoqi@0: aoqi@0: LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type) aoqi@0: : LIR_Op(code, result, NULL) aoqi@0: , _opr1(opr1) aoqi@0: , _opr2(opr2) aoqi@0: , _type(type) aoqi@0: , _condition(condition) aoqi@0: , _fpu_stack_size(0) aoqi@0: , _tmp1(LIR_OprFact::illegalOpr) aoqi@0: , _tmp2(LIR_OprFact::illegalOpr) aoqi@0: , _tmp3(LIR_OprFact::illegalOpr) aoqi@0: , _tmp4(LIR_OprFact::illegalOpr) aoqi@0: , _tmp5(LIR_OprFact::illegalOpr) { aoqi@0: assert(code == lir_cmove, "code check"); aoqi@0: assert(type != T_ILLEGAL, "cmove should have type"); aoqi@0: } aoqi@0: aoqi@0: LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr, aoqi@0: CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL) aoqi@0: : LIR_Op(code, result, info) aoqi@0: , _opr1(opr1) aoqi@0: , _opr2(opr2) aoqi@0: , _type(type) aoqi@0: , _condition(lir_cond_unknown) aoqi@0: , _fpu_stack_size(0) aoqi@0: , _tmp1(LIR_OprFact::illegalOpr) aoqi@0: , _tmp2(LIR_OprFact::illegalOpr) aoqi@0: , _tmp3(LIR_OprFact::illegalOpr) aoqi@0: , _tmp4(LIR_OprFact::illegalOpr) aoqi@0: , _tmp5(LIR_OprFact::illegalOpr) { aoqi@0: assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); aoqi@0: } aoqi@0: aoqi@0: LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, aoqi@0: LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr) aoqi@0: : LIR_Op(code, result, NULL) aoqi@0: , _opr1(opr1) aoqi@0: , _opr2(opr2) aoqi@0: , _type(T_ILLEGAL) aoqi@0: , _condition(lir_cond_unknown) aoqi@0: , _fpu_stack_size(0) aoqi@0: , _tmp1(tmp1) aoqi@0: , _tmp2(tmp2) aoqi@0: , _tmp3(tmp3) aoqi@0: , _tmp4(tmp4) aoqi@0: , _tmp5(tmp5) { aoqi@0: assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); aoqi@0: } aoqi@0: aoqi@0: LIR_Opr in_opr1() const { return _opr1; } aoqi@0: LIR_Opr in_opr2() const { return _opr2; } aoqi@0: BasicType type() const { return _type; } aoqi@0: LIR_Opr tmp1_opr() const { return _tmp1; } aoqi@0: LIR_Opr tmp2_opr() const { return _tmp2; } aoqi@0: LIR_Opr tmp3_opr() const { return _tmp3; } aoqi@0: LIR_Opr tmp4_opr() const { return _tmp4; } aoqi@0: LIR_Opr tmp5_opr() const { return _tmp5; } aoqi@0: LIR_Condition condition() const { aoqi@0: assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition; aoqi@0: } aoqi@0: void set_condition(LIR_Condition condition) { aoqi@0: assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition; aoqi@0: } aoqi@0: aoqi@0: void set_fpu_stack_size(int size) { _fpu_stack_size = size; } aoqi@0: int fpu_stack_size() const { return _fpu_stack_size; } aoqi@0: aoqi@0: void set_in_opr1(LIR_Opr opr) { _opr1 = opr; } aoqi@0: void set_in_opr2(LIR_Opr opr) { _opr2 = opr; } aoqi@0: aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_Op2* as_Op2() { return this; } aoqi@0: virtual void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: }; aoqi@1: #else aoqi@1: class LIR_Op2: public LIR_Op { aoqi@1: //friend class LIR_Optimizer; aoqi@1: friend class LIR_OpVisitState; aoqi@1: protected: aoqi@1: LIR_Opr _opr1; aoqi@1: LIR_Opr _opr2; aoqi@1: BasicType _type; aoqi@1: LIR_Opr _tmp1; aoqi@1: LIR_Opr _tmp2; aoqi@1: LIR_Opr _tmp3; aoqi@1: LIR_Opr _tmp4; aoqi@1: LIR_Opr _tmp5; aoqi@1: aoqi@1: virtual void verify() const; aoqi@1: public: aoqi@1: LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, aoqi@1: CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL) aoqi@1: : LIR_Op(code, LIR_OprFact::illegalOpr, info), aoqi@1: _opr1(opr1), _opr2(opr2), aoqi@1: _type(type), aoqi@1: _tmp1(LIR_OprFact::illegalOpr), aoqi@1: _tmp2(LIR_OprFact::illegalOpr), aoqi@1: _tmp3(LIR_OprFact::illegalOpr), aoqi@1: _tmp4(LIR_OprFact::illegalOpr), aoqi@1: _tmp5(LIR_OprFact::illegalOpr) { aoqi@1: } aoqi@1: aoqi@1: LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr, aoqi@1: CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL) aoqi@1: : LIR_Op(code, result, info), aoqi@1: _opr1(opr1), _opr2(opr2), aoqi@1: _type(type), aoqi@1: _tmp1(LIR_OprFact::illegalOpr), aoqi@1: _tmp2(LIR_OprFact::illegalOpr), aoqi@1: _tmp3(LIR_OprFact::illegalOpr), aoqi@1: _tmp4(LIR_OprFact::illegalOpr), aoqi@1: _tmp5(LIR_OprFact::illegalOpr) { aoqi@1: aoqi@1: assert(is_in_range(code, begin_op2, end_op2), "code check"); aoqi@1: } aoqi@1: aoqi@1: aoqi@1: LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr) aoqi@1: : LIR_Op(code, result, NULL), aoqi@1: _opr1(opr1), _opr2(opr2), aoqi@1: _type(T_ILLEGAL), aoqi@1: _tmp1(tmp1), aoqi@1: _tmp2(tmp2), aoqi@1: _tmp3(tmp3), aoqi@1: _tmp4(tmp4), aoqi@1: _tmp5(tmp5) { aoqi@1: assert(is_in_range(code, begin_op2, end_op2), "code check"); aoqi@1: } aoqi@1: aoqi@1: LIR_Opr in_opr1() const { return _opr1; } aoqi@1: LIR_Opr in_opr2() const { return _opr2; } aoqi@1: BasicType type() const { return _type; } aoqi@1: LIR_Opr tmp1_opr() const { return _tmp1; } aoqi@1: LIR_Opr tmp2_opr() const { return _tmp2; } aoqi@1: LIR_Opr tmp3_opr() const { return _tmp3; } aoqi@1: LIR_Opr tmp4_opr() const { return _tmp4; } aoqi@1: LIR_Opr tmp5_opr() const { return _tmp5; } aoqi@1: aoqi@1: aoqi@1: void set_in_opr1(LIR_Opr opr) { _opr1 = opr; } aoqi@1: void set_in_opr2(LIR_Opr opr) { _opr2 = opr; } aoqi@1: // where is the defination of LIR_AbstractAssembler?, 12/21,2006, jerome aoqi@1: //virtual void emit_code(LIR_AbstractAssembler* masm); aoqi@1: virtual void emit_code(LIR_Assembler* masm); aoqi@1: virtual LIR_Op2* as_Op2() { return this; } aoqi@1: aoqi@1: // virtual void print_instr() const PRODUCT_RETURN; aoqi@1: virtual void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@1: }; aoqi@1: aoqi@1: aoqi@1: class LIR_OpBranch: public LIR_Op2 { aoqi@1: friend class LIR_OpVisitState; aoqi@1: public: aoqi@1: aoqi@1: private: aoqi@1: LIR_Condition _cond; aoqi@1: BasicType _type; aoqi@1: Label* _label; aoqi@1: BlockBegin* _block; // if this is a branch to a block, this is the block aoqi@1: BlockBegin* _ublock; // if this is a float branch , this is the unorder block aoqi@1: CodeStub* _stub; // if this is a branch to a stub, this is the stub aoqi@1: aoqi@1: public: aoqi@1: // these are temporary constructors until we start using the conditional register aoqi@1: LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl) aoqi@1: : LIR_Op2(lir_branch, left, right, LIR_OprFact::illegalOpr, (CodeEmitInfo*)(NULL)), aoqi@1: _cond(cond), _label(lbl), _block(NULL), _ublock(NULL),_stub(NULL) aoqi@1: { aoqi@1: } aoqi@1: aoqi@1: LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block); aoqi@1: aoqi@1: LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, CodeStub* stub); aoqi@1: aoqi@1: //LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub); aoqi@1: aoqi@1: LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, aoqi@1: BlockBegin *block,BlockBegin *ublock); aoqi@1: aoqi@1: LIR_Condition cond() const { return _cond; } aoqi@1: BasicType type() const { return _type; } aoqi@1: LIR_Opr left() const { return in_opr1(); } aoqi@1: LIR_Opr right() const { return in_opr2(); } aoqi@1: Label* label() const { return _label; } aoqi@1: BlockBegin* block() const { return _block; } aoqi@1: BlockBegin* ublock() const { return _ublock; } aoqi@1: CodeStub* stub() const { return _stub; } aoqi@1: aoqi@1: aoqi@1: void change_block(BlockBegin* b); aoqi@1: void change_ublock(BlockBegin* b); aoqi@1: void negate_cond(); aoqi@1: aoqi@1: aoqi@1: // 12/21,06,jerome aoqi@1: //virtual void emit_code(LIR_AbstractAssembler* masm); aoqi@1: virtual void emit_code(LIR_Assembler* masm); aoqi@1: virtual LIR_OpBranch* as_OpBranch() { return this; } aoqi@1: //virtual void print_instr() const PRODUCT_RETURN; aoqi@1: virtual void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@1: aoqi@1: }; aoqi@1: #endif aoqi@1: aoqi@1: #ifndef MIPS64 aoqi@0: aoqi@0: class LIR_OpAllocArray : public LIR_Op { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: private: aoqi@0: LIR_Opr _klass; aoqi@0: LIR_Opr _len; aoqi@0: LIR_Opr _tmp1; aoqi@0: LIR_Opr _tmp2; aoqi@0: LIR_Opr _tmp3; aoqi@0: LIR_Opr _tmp4; aoqi@0: BasicType _type; aoqi@0: CodeStub* _stub; aoqi@0: aoqi@0: public: aoqi@0: LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub) aoqi@0: : LIR_Op(lir_alloc_array, result, NULL) aoqi@0: , _klass(klass) aoqi@0: , _len(len) aoqi@0: , _tmp1(t1) aoqi@0: , _tmp2(t2) aoqi@0: , _tmp3(t3) aoqi@0: , _tmp4(t4) aoqi@0: , _type(type) aoqi@0: , _stub(stub) {} aoqi@0: aoqi@0: LIR_Opr klass() const { return _klass; } aoqi@0: LIR_Opr len() const { return _len; } aoqi@0: LIR_Opr obj() const { return result_opr(); } aoqi@0: LIR_Opr tmp1() const { return _tmp1; } aoqi@0: LIR_Opr tmp2() const { return _tmp2; } aoqi@0: LIR_Opr tmp3() const { return _tmp3; } aoqi@0: LIR_Opr tmp4() const { return _tmp4; } aoqi@0: BasicType type() const { return _type; } aoqi@0: CodeStub* stub() const { return _stub; } aoqi@0: aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_OpAllocArray * as_OpAllocArray () { return this; } aoqi@0: virtual void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: }; aoqi@1: #else aoqi@1: class LIR_OpAllocArray : public LIR_Op { aoqi@1: friend class LIR_OpVisitState; aoqi@1: aoqi@1: private: aoqi@1: LIR_Opr _klass; aoqi@1: LIR_Opr _len; aoqi@1: LIR_Opr _tmp1; aoqi@1: LIR_Opr _tmp2; aoqi@1: LIR_Opr _tmp3; aoqi@1: LIR_Opr _tmp4; aoqi@1: LIR_Opr _tmp5; aoqi@1: BasicType _type; aoqi@1: CodeStub* _stub; aoqi@1: aoqi@1: public: aoqi@1: LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, BasicType type, CodeStub* stub) aoqi@1: : LIR_Op(lir_alloc_array, result, NULL) aoqi@1: , _klass(klass) aoqi@1: , _len(len) aoqi@1: , _tmp1(t1) aoqi@1: , _tmp2(t2) aoqi@1: , _tmp3(t3) aoqi@1: , _tmp4(t4) aoqi@1: , _tmp5(t5) aoqi@1: , _type(type) aoqi@1: , _stub(stub) {} aoqi@1: aoqi@1: LIR_Opr klass() const { return _klass; } aoqi@1: LIR_Opr len() const { return _len; } aoqi@1: LIR_Opr obj() const { return result_opr(); } aoqi@1: LIR_Opr tmp1() const { return _tmp1; } aoqi@1: LIR_Opr tmp2() const { return _tmp2; } aoqi@1: LIR_Opr tmp3() const { return _tmp3; } aoqi@1: LIR_Opr tmp4() const { return _tmp4; } aoqi@1: LIR_Opr tmp5() const { return _tmp5; } aoqi@1: BasicType type() const { return _type; } aoqi@1: CodeStub* stub() const { return _stub; } aoqi@1: aoqi@1: virtual void emit_code(LIR_Assembler* masm); aoqi@1: virtual LIR_OpAllocArray * as_OpAllocArray () { return this; } aoqi@1: virtual void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@1: }; aoqi@1: #endif aoqi@0: aoqi@0: aoqi@0: class LIR_Op3: public LIR_Op { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: private: aoqi@0: LIR_Opr _opr1; aoqi@0: LIR_Opr _opr2; aoqi@0: LIR_Opr _opr3; aoqi@0: public: aoqi@0: LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL) aoqi@0: : LIR_Op(code, result, info) aoqi@0: , _opr1(opr1) aoqi@0: , _opr2(opr2) aoqi@0: , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); } aoqi@0: LIR_Opr in_opr1() const { return _opr1; } aoqi@0: LIR_Opr in_opr2() const { return _opr2; } aoqi@0: LIR_Opr in_opr3() const { return _opr3; } aoqi@0: aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_Op3* as_Op3() { return this; } aoqi@0: virtual void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: //-------------------------------- aoqi@0: class LabelObj: public CompilationResourceObj { aoqi@0: private: aoqi@0: Label _label; aoqi@0: public: aoqi@0: LabelObj() {} aoqi@0: Label* label() { return &_label; } aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: class LIR_OpLock: public LIR_Op { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: private: aoqi@0: LIR_Opr _hdr; aoqi@0: LIR_Opr _obj; aoqi@0: LIR_Opr _lock; aoqi@0: LIR_Opr _scratch; aoqi@0: CodeStub* _stub; aoqi@0: public: aoqi@0: LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) aoqi@0: : LIR_Op(code, LIR_OprFact::illegalOpr, info) aoqi@0: , _hdr(hdr) aoqi@0: , _obj(obj) aoqi@0: , _lock(lock) aoqi@0: , _scratch(scratch) aoqi@0: , _stub(stub) {} aoqi@0: aoqi@0: LIR_Opr hdr_opr() const { return _hdr; } aoqi@0: LIR_Opr obj_opr() const { return _obj; } aoqi@0: LIR_Opr lock_opr() const { return _lock; } aoqi@0: LIR_Opr scratch_opr() const { return _scratch; } aoqi@0: CodeStub* stub() const { return _stub; } aoqi@0: aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_OpLock* as_OpLock() { return this; } aoqi@0: void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: class LIR_OpDelay: public LIR_Op { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: private: aoqi@0: LIR_Op* _op; aoqi@0: aoqi@0: public: aoqi@0: LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info): aoqi@0: LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info), aoqi@0: _op(op) { aoqi@0: assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops"); aoqi@0: } aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_OpDelay* as_OpDelay() { return this; } aoqi@0: void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: LIR_Op* delay_op() const { return _op; } aoqi@0: CodeEmitInfo* call_info() const { return info(); } aoqi@0: }; aoqi@0: aoqi@0: #ifdef ASSERT aoqi@0: // LIR_OpAssert aoqi@0: class LIR_OpAssert : public LIR_Op2 { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: private: aoqi@0: const char* _msg; aoqi@0: bool _halt; aoqi@0: aoqi@0: public: aoqi@0: LIR_OpAssert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) aoqi@0: : LIR_Op2(lir_assert, condition, opr1, opr2) aoqi@0: , _halt(halt) aoqi@0: , _msg(msg) { aoqi@0: } aoqi@0: aoqi@0: const char* msg() const { return _msg; } aoqi@0: bool halt() const { return _halt; } aoqi@0: aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_OpAssert* as_OpAssert() { return this; } aoqi@0: virtual void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: }; aoqi@0: #endif aoqi@0: aoqi@0: // LIR_OpCompareAndSwap aoqi@0: class LIR_OpCompareAndSwap : public LIR_Op { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: private: aoqi@0: LIR_Opr _addr; aoqi@0: LIR_Opr _cmp_value; aoqi@0: LIR_Opr _new_value; aoqi@0: LIR_Opr _tmp1; aoqi@0: LIR_Opr _tmp2; aoqi@0: aoqi@0: public: aoqi@0: LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, aoqi@0: LIR_Opr t1, LIR_Opr t2, LIR_Opr result) aoqi@0: : LIR_Op(code, result, NULL) // no result, no info aoqi@0: , _addr(addr) aoqi@0: , _cmp_value(cmp_value) aoqi@0: , _new_value(new_value) aoqi@0: , _tmp1(t1) aoqi@0: , _tmp2(t2) { } aoqi@0: aoqi@0: LIR_Opr addr() const { return _addr; } aoqi@0: LIR_Opr cmp_value() const { return _cmp_value; } aoqi@0: LIR_Opr new_value() const { return _new_value; } aoqi@0: LIR_Opr tmp1() const { return _tmp1; } aoqi@0: LIR_Opr tmp2() const { return _tmp2; } aoqi@0: aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; } aoqi@0: virtual void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: }; aoqi@0: aoqi@0: // LIR_OpProfileCall aoqi@0: class LIR_OpProfileCall : public LIR_Op { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: private: aoqi@0: ciMethod* _profiled_method; aoqi@0: int _profiled_bci; aoqi@0: ciMethod* _profiled_callee; aoqi@0: LIR_Opr _mdo; aoqi@0: LIR_Opr _recv; aoqi@0: LIR_Opr _tmp1; aoqi@0: ciKlass* _known_holder; aoqi@0: aoqi@0: public: aoqi@0: // Destroys recv aoqi@0: LIR_OpProfileCall(ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder) aoqi@0: : LIR_Op(lir_profile_call, LIR_OprFact::illegalOpr, NULL) // no result, no info aoqi@0: , _profiled_method(profiled_method) aoqi@0: , _profiled_bci(profiled_bci) aoqi@0: , _profiled_callee(profiled_callee) aoqi@0: , _mdo(mdo) aoqi@0: , _recv(recv) aoqi@0: , _tmp1(t1) aoqi@0: , _known_holder(known_holder) { } aoqi@0: aoqi@0: ciMethod* profiled_method() const { return _profiled_method; } aoqi@0: int profiled_bci() const { return _profiled_bci; } aoqi@0: ciMethod* profiled_callee() const { return _profiled_callee; } aoqi@0: LIR_Opr mdo() const { return _mdo; } aoqi@0: LIR_Opr recv() const { return _recv; } aoqi@0: LIR_Opr tmp1() const { return _tmp1; } aoqi@0: ciKlass* known_holder() const { return _known_holder; } aoqi@0: aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_OpProfileCall* as_OpProfileCall() { return this; } aoqi@0: virtual void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: }; aoqi@0: aoqi@0: // LIR_OpProfileType aoqi@0: class LIR_OpProfileType : public LIR_Op { aoqi@0: friend class LIR_OpVisitState; aoqi@0: aoqi@0: private: aoqi@0: LIR_Opr _mdp; aoqi@0: LIR_Opr _obj; aoqi@0: LIR_Opr _tmp; aoqi@0: ciKlass* _exact_klass; // non NULL if we know the klass statically (no need to load it from _obj) aoqi@0: intptr_t _current_klass; // what the profiling currently reports aoqi@0: bool _not_null; // true if we know statically that _obj cannot be null aoqi@0: bool _no_conflict; // true if we're profling parameters, _exact_klass is not NULL and we know aoqi@0: // _exact_klass it the only possible type for this parameter in any context. aoqi@0: aoqi@0: public: aoqi@0: // Destroys recv aoqi@0: LIR_OpProfileType(LIR_Opr mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict) aoqi@0: : LIR_Op(lir_profile_type, LIR_OprFact::illegalOpr, NULL) // no result, no info aoqi@0: , _mdp(mdp) aoqi@0: , _obj(obj) aoqi@0: , _exact_klass(exact_klass) aoqi@0: , _current_klass(current_klass) aoqi@0: , _tmp(tmp) aoqi@0: , _not_null(not_null) aoqi@0: , _no_conflict(no_conflict) { } aoqi@0: aoqi@0: LIR_Opr mdp() const { return _mdp; } aoqi@0: LIR_Opr obj() const { return _obj; } aoqi@0: LIR_Opr tmp() const { return _tmp; } aoqi@0: ciKlass* exact_klass() const { return _exact_klass; } aoqi@0: intptr_t current_klass() const { return _current_klass; } aoqi@0: bool not_null() const { return _not_null; } aoqi@0: bool no_conflict() const { return _no_conflict; } aoqi@0: aoqi@0: virtual void emit_code(LIR_Assembler* masm); aoqi@0: virtual LIR_OpProfileType* as_OpProfileType() { return this; } aoqi@0: virtual void print_instr(outputStream* out) const PRODUCT_RETURN; aoqi@0: }; aoqi@0: aoqi@0: class LIR_InsertionBuffer; aoqi@0: aoqi@0: //--------------------------------LIR_List--------------------------------------------------- aoqi@0: // Maintains a list of LIR instructions (one instance of LIR_List per basic block) aoqi@0: // The LIR instructions are appended by the LIR_List class itself; aoqi@0: // aoqi@0: // Notes: aoqi@0: // - all offsets are(should be) in bytes aoqi@0: // - local positions are specified with an offset, with offset 0 being local 0 aoqi@0: aoqi@0: class LIR_List: public CompilationResourceObj { aoqi@0: private: aoqi@0: LIR_OpList _operations; aoqi@0: aoqi@0: Compilation* _compilation; aoqi@0: #ifndef PRODUCT aoqi@0: BlockBegin* _block; aoqi@0: #endif aoqi@0: #ifdef ASSERT aoqi@0: const char * _file; aoqi@0: int _line; aoqi@0: #endif aoqi@0: aoqi@0: void append(LIR_Op* op) { aoqi@0: if (op->source() == NULL) aoqi@0: op->set_source(_compilation->current_instruction()); aoqi@0: #ifndef PRODUCT aoqi@0: if (PrintIRWithLIR) { aoqi@0: _compilation->maybe_print_current_instruction(); aoqi@0: op->print(); tty->cr(); aoqi@0: } aoqi@0: #endif // PRODUCT aoqi@0: aoqi@0: _operations.append(op); aoqi@0: aoqi@0: #ifdef ASSERT aoqi@0: op->verify(); aoqi@0: op->set_file_and_line(_file, _line); aoqi@0: _file = NULL; aoqi@0: _line = 0; aoqi@0: #endif aoqi@0: } aoqi@0: aoqi@0: public: aoqi@0: LIR_List(Compilation* compilation, BlockBegin* block = NULL); aoqi@0: aoqi@0: #ifdef ASSERT aoqi@0: void set_file_and_line(const char * file, int line); aoqi@0: #endif aoqi@0: aoqi@0: //---------- accessors --------------- aoqi@0: LIR_OpList* instructions_list() { return &_operations; } aoqi@0: int length() const { return _operations.length(); } aoqi@0: LIR_Op* at(int i) const { return _operations.at(i); } aoqi@0: aoqi@0: NOT_PRODUCT(BlockBegin* block() const { return _block; }); aoqi@0: aoqi@0: // insert LIR_Ops in buffer to right places in LIR_List aoqi@0: void append(LIR_InsertionBuffer* buffer); aoqi@0: aoqi@0: //---------- mutators --------------- aoqi@0: void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); } aoqi@0: void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); } aoqi@0: void remove_at(int i) { _operations.remove_at(i); } aoqi@0: aoqi@0: //---------- printing ------------- aoqi@0: void print_instructions() PRODUCT_RETURN; aoqi@0: aoqi@0: aoqi@0: //---------- instructions ------------- aoqi@0: void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, aoqi@0: address dest, LIR_OprList* arguments, aoqi@0: CodeEmitInfo* info) { aoqi@0: append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info)); aoqi@0: } aoqi@0: void call_static(ciMethod* method, LIR_Opr result, aoqi@0: address dest, LIR_OprList* arguments, CodeEmitInfo* info) { aoqi@0: append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info)); aoqi@0: } aoqi@0: void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, aoqi@0: address dest, LIR_OprList* arguments, CodeEmitInfo* info) { aoqi@0: append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info)); aoqi@0: } aoqi@0: void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, aoqi@0: intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) { aoqi@0: append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info)); aoqi@0: } aoqi@0: void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result, aoqi@0: address dest, LIR_OprList* arguments, CodeEmitInfo* info) { aoqi@0: append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info)); aoqi@0: } aoqi@0: aoqi@0: void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); } aoqi@0: void word_align() { append(new LIR_Op0(lir_word_align)); } aoqi@0: void membar() { append(new LIR_Op0(lir_membar)); } aoqi@0: void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); } aoqi@0: void membar_release() { append(new LIR_Op0(lir_membar_release)); } aoqi@0: void membar_loadload() { append(new LIR_Op0(lir_membar_loadload)); } aoqi@0: void membar_storestore() { append(new LIR_Op0(lir_membar_storestore)); } aoqi@0: void membar_loadstore() { append(new LIR_Op0(lir_membar_loadstore)); } aoqi@0: void membar_storeload() { append(new LIR_Op0(lir_membar_storeload)); } aoqi@0: aoqi@0: void nop() { append(new LIR_Op0(lir_nop)); } aoqi@0: void build_frame() { append(new LIR_Op0(lir_build_frame)); } aoqi@0: aoqi@0: void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); } aoqi@0: void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); } aoqi@0: aoqi@0: void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); } aoqi@0: aoqi@0: void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); } aoqi@0: void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); } aoqi@0: aoqi@0: // result is a stack location for old backend and vreg for UseLinearScan aoqi@0: // stack_loc_temp is an illegal register for old backend aoqi@0: void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); } aoqi@0: void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } aoqi@0: void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); } aoqi@0: void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } aoqi@0: void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } aoqi@0: void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); } aoqi@0: void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); } aoqi@0: void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { aoqi@0: if (UseCompressedOops) { aoqi@0: append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide)); aoqi@0: } else { aoqi@0: move(src, dst, info); aoqi@0: } aoqi@0: } aoqi@0: void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { aoqi@0: if (UseCompressedOops) { aoqi@0: append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide)); aoqi@0: } else { aoqi@0: move(src, dst, info); aoqi@0: } aoqi@0: } aoqi@0: void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); } aoqi@0: aoqi@0: void oop2reg (jobject o, LIR_Opr reg) { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); } aoqi@0: void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info); aoqi@0: aoqi@0: void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); } aoqi@0: void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info); aoqi@0: aoqi@0: void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); } aoqi@0: aoqi@0: void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); } aoqi@0: aoqi@0: #ifdef PPC aoqi@0: void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); } aoqi@0: #endif aoqi@0: void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); } aoqi@0: aoqi@0: void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); } aoqi@0: void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); } aoqi@0: void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); } aoqi@0: aoqi@0: void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); } aoqi@0: void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); } aoqi@0: aoqi@0: void null_check(LIR_Opr opr, CodeEmitInfo* info) { append(new LIR_Op1(lir_null_check, opr, info)); } aoqi@0: void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) { aoqi@0: append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info)); aoqi@0: } aoqi@0: void unwind_exception(LIR_Opr exceptionOop) { aoqi@0: append(new LIR_Op1(lir_unwind, exceptionOop)); aoqi@0: } aoqi@0: aoqi@0: void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { aoqi@0: append(new LIR_Op2(lir_compare_to, left, right, dst)); aoqi@0: } aoqi@0: aoqi@0: void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); } aoqi@0: void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); } aoqi@0: aoqi@1: #ifndef MIPS64 aoqi@0: void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) { aoqi@0: append(new LIR_Op2(lir_cmp, condition, left, right, info)); aoqi@0: } aoqi@0: void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) { aoqi@0: cmp(condition, left, LIR_OprFact::intConst(right), info); aoqi@0: } aoqi@0: aoqi@0: void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info); aoqi@0: void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info); aoqi@0: aoqi@0: void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { aoqi@0: append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type)); aoqi@0: } aoqi@0: aoqi@1: #else aoqi@1: void null_check_for_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, aoqi@1: CodeEmitInfo* info = NULL) { aoqi@1: append(new LIR_Op2(lir_null_check_for_branch, condition, left, right, info)); aoqi@1: } aoqi@1: aoqi@1: void null_check_for_branch(LIR_Condition condition, LIR_Opr left, int right, aoqi@1: CodeEmitInfo* info = NULL) { aoqi@1: append(new LIR_Op2(lir_null_check_for_branch, condition, left, LIR_OprFact::intConst(right), info)); aoqi@1: } aoqi@1: aoqi@1: void null_check_for_branch(LIR_Condition condition, LIR_Opr base, int disp, int c, aoqi@1: CodeEmitInfo* info) { aoqi@1: append(new LIR_Op2(lir_null_check_for_branch, condition, aoqi@1: LIR_OprFact::address(new LIR_Address(base, disp, T_INT)), aoqi@1: LIR_OprFact::intConst(c), aoqi@1: info, T_INT)); aoqi@1: } aoqi@1: aoqi@1: void null_check_branch(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, aoqi@1: CodeEmitInfo* info) { aoqi@1: append(new LIR_Op2(lir_null_check_for_branch, condition, aoqi@1: reg, aoqi@1: LIR_OprFact::address(addr), aoqi@1: info)); aoqi@1: } aoqi@1: aoqi@1: #endif aoqi@1: #ifndef MIPS64 aoqi@0: void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, aoqi@0: LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); aoqi@0: void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, aoqi@0: LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); aoqi@0: void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, aoqi@0: LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); aoqi@1: #else aoqi@1: void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2, LIR_Opr result); aoqi@1: void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2, LIR_Opr result); aoqi@1: void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2, LIR_Opr result); aoqi@1: #endif aoqi@0: aoqi@0: void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); } aoqi@0: void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); } aoqi@0: void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); } aoqi@0: void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); } aoqi@0: void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); } aoqi@0: void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); } aoqi@0: void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); } aoqi@0: void exp (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_exp , from, tmp1, to, tmp2, tmp3, tmp4, tmp5)); } aoqi@0: void pow (LIR_Opr arg1, LIR_Opr arg2, LIR_Opr res, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_pow, arg1, arg2, res, tmp1, tmp2, tmp3, tmp4, tmp5)); } aoqi@0: aoqi@0: void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); } aoqi@0: void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); } aoqi@0: void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); } aoqi@0: void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); } aoqi@0: void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); } aoqi@0: void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); } aoqi@0: void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); } aoqi@0: aoqi@0: void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); aoqi@0: void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); aoqi@0: aoqi@0: void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); aoqi@0: aoqi@0: void prefetch(LIR_Address* addr, bool is_store); aoqi@0: aoqi@0: void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); aoqi@0: void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); aoqi@0: void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); aoqi@0: void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); aoqi@0: void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); aoqi@0: aoqi@1: #ifdef MIPS64 aoqi@1: void frem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info = NULL); aoqi@1: #endif aoqi@1: aoqi@0: void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); aoqi@0: void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); aoqi@0: void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); aoqi@0: void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); aoqi@1: #ifndef MIPS64 aoqi@0: void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub); aoqi@0: void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub); aoqi@1: #else aoqi@1: void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, LIR_Opr t6,int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub); aoqi@1: void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, LIR_Opr t5,BasicType type, LIR_Opr klass, CodeStub* stub); aoqi@1: #endif aoqi@0: aoqi@0: // jump is an unconditional branch aoqi@0: void jump(BlockBegin* block) { aoqi@1: #ifndef MIPS64 aoqi@0: append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block)); aoqi@1: #else aoqi@1: append(new LIR_OpBranch(lir_cond_always, LIR_OprFact::illegalOpr,LIR_OprFact::illegalOpr,T_ILLEGAL, block)); aoqi@1: #endif aoqi@1: aoqi@0: } aoqi@0: void jump(CodeStub* stub) { aoqi@1: #ifndef MIPS64 aoqi@0: append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub)); aoqi@1: #else aoqi@1: append(new LIR_OpBranch(lir_cond_always, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr,T_ILLEGAL, stub)); aoqi@1: #endif aoqi@1: aoqi@0: } aoqi@1: #ifndef MIPS64 aoqi@0: void branch(LIR_Condition cond, BasicType type, Label* lbl) { append(new LIR_OpBranch(cond, type, lbl)); } aoqi@0: void branch(LIR_Condition cond, BasicType type, BlockBegin* block) { aoqi@0: assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); aoqi@0: append(new LIR_OpBranch(cond, type, block)); aoqi@0: } aoqi@0: void branch(LIR_Condition cond, BasicType type, CodeStub* stub) { aoqi@0: assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); aoqi@0: append(new LIR_OpBranch(cond, type, stub)); aoqi@0: } aoqi@0: void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) { aoqi@0: assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only"); aoqi@0: append(new LIR_OpBranch(cond, type, block, unordered)); aoqi@0: } aoqi@1: #else aoqi@1: void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl) { aoqi@1: append(new LIR_OpBranch(cond, left, right, lbl)); aoqi@1: } aoqi@1: aoqi@1: void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block) { aoqi@1: append(new LIR_OpBranch(cond, left, right, type, block)); aoqi@1: } aoqi@1: aoqi@1: void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, CodeStub* stub) { aoqi@1: append(new LIR_OpBranch(cond, left, right, type, stub)); aoqi@1: } aoqi@1: aoqi@1: void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, aoqi@1: BlockBegin* block, BlockBegin* unordered) { aoqi@1: append(new LIR_OpBranch(cond, left, right, type, block, unordered)); aoqi@1: } aoqi@1: aoqi@1: #endif aoqi@0: aoqi@0: void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); aoqi@0: void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); aoqi@0: void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); aoqi@0: aoqi@0: void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } aoqi@0: void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } aoqi@0: void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } aoqi@0: aoqi@0: void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); } aoqi@0: void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less); aoqi@0: aoqi@0: void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) { aoqi@0: append(new LIR_OpRTCall(routine, tmp, result, arguments)); aoqi@0: } aoqi@0: aoqi@0: void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result, aoqi@0: LIR_OprList* arguments, CodeEmitInfo* info) { aoqi@0: append(new LIR_OpRTCall(routine, tmp, result, arguments, info)); aoqi@0: } aoqi@0: aoqi@0: void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); } aoqi@0: void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub); aoqi@0: void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info); aoqi@0: aoqi@0: void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); } aoqi@0: void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); } aoqi@0: void breakpoint() { append(new LIR_Op0(lir_breakpoint)); } aoqi@0: aoqi@0: void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); } aoqi@0: aoqi@0: void update_crc32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) { append(new LIR_OpUpdateCRC32(crc, val, res)); } aoqi@0: aoqi@0: void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); } aoqi@0: aoqi@0: void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci); aoqi@0: void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci); aoqi@0: aoqi@0: void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, aoqi@0: LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, aoqi@0: CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, aoqi@0: ciMethod* profiled_method, int profiled_bci); aoqi@0: // MethodData* profiling aoqi@0: void profile_call(ciMethod* method, int bci, ciMethod* callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) { aoqi@0: append(new LIR_OpProfileCall(method, bci, callee, mdo, recv, t1, cha_klass)); aoqi@0: } aoqi@0: void profile_type(LIR_Address* mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict) { aoqi@0: append(new LIR_OpProfileType(LIR_OprFact::address(mdp), obj, exact_klass, current_klass, tmp, not_null, no_conflict)); aoqi@0: } aoqi@0: aoqi@0: void xadd(LIR_Opr src, LIR_Opr add, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xadd, src, add, res, tmp)); } aoqi@0: void xchg(LIR_Opr src, LIR_Opr set, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xchg, src, set, res, tmp)); } aoqi@0: #ifdef ASSERT aoqi@0: void lir_assert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) { append(new LIR_OpAssert(condition, opr1, opr2, msg, halt)); } aoqi@0: #endif aoqi@0: }; aoqi@0: aoqi@0: void print_LIR(BlockList* blocks); aoqi@0: aoqi@0: class LIR_InsertionBuffer : public CompilationResourceObj { aoqi@0: private: aoqi@0: LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized) aoqi@0: aoqi@0: // list of insertion points. index and count are stored alternately: aoqi@0: // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted aoqi@0: // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index aoqi@0: intStack _index_and_count; aoqi@0: aoqi@0: // the LIR_Ops to be inserted aoqi@0: LIR_OpList _ops; aoqi@0: aoqi@0: void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); } aoqi@0: void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); } aoqi@0: void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); } aoqi@0: aoqi@0: #ifdef ASSERT aoqi@0: void verify(); aoqi@0: #endif aoqi@0: public: aoqi@0: LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { } aoqi@0: aoqi@0: // must be called before using the insertion buffer aoqi@0: void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); } aoqi@0: bool initialized() const { return _lir != NULL; } aoqi@0: // called automatically when the buffer is appended to the LIR_List aoqi@0: void finish() { _lir = NULL; } aoqi@0: aoqi@0: // accessors aoqi@0: LIR_List* lir_list() const { return _lir; } aoqi@0: int number_of_insertion_points() const { return _index_and_count.length() >> 1; } aoqi@0: int index_at(int i) const { return _index_and_count.at((i << 1)); } aoqi@0: int count_at(int i) const { return _index_and_count.at((i << 1) + 1); } aoqi@0: aoqi@0: int number_of_ops() const { return _ops.length(); } aoqi@0: LIR_Op* op_at(int i) const { return _ops.at(i); } aoqi@0: aoqi@0: // append an instruction to the buffer aoqi@0: void append(int index, LIR_Op* op); aoqi@0: aoqi@0: // instruction aoqi@0: void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: // aoqi@0: // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way. aoqi@0: // Calling a LIR_Op's visit function with a LIR_OpVisitState causes aoqi@0: // information about the input, output and temporaries used by the aoqi@0: // op to be recorded. It also records whether the op has call semantics aoqi@0: // and also records all the CodeEmitInfos used by this op. aoqi@0: // aoqi@0: aoqi@0: aoqi@0: class LIR_OpVisitState: public StackObj { aoqi@0: public: aoqi@0: typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode; aoqi@0: aoqi@0: enum { aoqi@0: maxNumberOfOperands = 20, aoqi@0: maxNumberOfInfos = 4 aoqi@0: }; aoqi@0: aoqi@0: private: aoqi@0: LIR_Op* _op; aoqi@0: aoqi@0: // optimization: the operands and infos are not stored in a variable-length aoqi@0: // list, but in a fixed-size array to save time of size checks and resizing aoqi@0: int _oprs_len[numModes]; aoqi@0: LIR_Opr* _oprs_new[numModes][maxNumberOfOperands]; aoqi@0: int _info_len; aoqi@0: CodeEmitInfo* _info_new[maxNumberOfInfos]; aoqi@0: aoqi@0: bool _has_call; aoqi@0: bool _has_slow_case; aoqi@0: aoqi@0: aoqi@0: // only include register operands aoqi@0: // addresses are decomposed to the base and index registers aoqi@0: // constants and stack operands are ignored aoqi@0: void append(LIR_Opr& opr, OprMode mode) { aoqi@0: assert(opr->is_valid(), "should not call this otherwise"); aoqi@0: assert(mode >= 0 && mode < numModes, "bad mode"); aoqi@0: aoqi@0: if (opr->is_register()) { aoqi@0: assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); aoqi@0: _oprs_new[mode][_oprs_len[mode]++] = &opr; aoqi@0: aoqi@0: } else if (opr->is_pointer()) { aoqi@0: LIR_Address* address = opr->as_address_ptr(); aoqi@0: if (address != NULL) { aoqi@0: // special handling for addresses: add base and index register of the address aoqi@0: // both are always input operands or temp if we want to extend aoqi@0: // their liveness! aoqi@0: if (mode == outputMode) { aoqi@0: mode = inputMode; aoqi@0: } aoqi@0: assert (mode == inputMode || mode == tempMode, "input or temp only for addresses"); aoqi@0: if (address->_base->is_valid()) { aoqi@0: assert(address->_base->is_register(), "must be"); aoqi@0: assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); aoqi@0: _oprs_new[mode][_oprs_len[mode]++] = &address->_base; aoqi@0: } aoqi@0: if (address->_index->is_valid()) { aoqi@0: assert(address->_index->is_register(), "must be"); aoqi@0: assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); aoqi@0: _oprs_new[mode][_oprs_len[mode]++] = &address->_index; aoqi@0: } aoqi@0: aoqi@0: } else { aoqi@0: assert(opr->is_constant(), "constant operands are not processed"); aoqi@0: } aoqi@0: } else { aoqi@0: assert(opr->is_stack(), "stack operands are not processed"); aoqi@0: } aoqi@0: } aoqi@0: aoqi@0: void append(CodeEmitInfo* info) { aoqi@0: assert(info != NULL, "should not call this otherwise"); aoqi@0: assert(_info_len < maxNumberOfInfos, "array overflow"); aoqi@0: _info_new[_info_len++] = info; aoqi@0: } aoqi@0: aoqi@0: public: aoqi@0: LIR_OpVisitState() { reset(); } aoqi@0: aoqi@0: LIR_Op* op() const { return _op; } aoqi@0: void set_op(LIR_Op* op) { reset(); _op = op; } aoqi@0: aoqi@0: bool has_call() const { return _has_call; } aoqi@0: bool has_slow_case() const { return _has_slow_case; } aoqi@0: aoqi@0: void reset() { aoqi@0: _op = NULL; aoqi@0: _has_call = false; aoqi@0: _has_slow_case = false; aoqi@0: aoqi@0: _oprs_len[inputMode] = 0; aoqi@0: _oprs_len[tempMode] = 0; aoqi@0: _oprs_len[outputMode] = 0; aoqi@0: _info_len = 0; aoqi@0: } aoqi@0: aoqi@0: aoqi@0: int opr_count(OprMode mode) const { aoqi@0: assert(mode >= 0 && mode < numModes, "bad mode"); aoqi@0: return _oprs_len[mode]; aoqi@0: } aoqi@0: aoqi@0: LIR_Opr opr_at(OprMode mode, int index) const { aoqi@0: assert(mode >= 0 && mode < numModes, "bad mode"); aoqi@0: assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); aoqi@0: return *_oprs_new[mode][index]; aoqi@0: } aoqi@0: aoqi@0: void set_opr_at(OprMode mode, int index, LIR_Opr opr) const { aoqi@0: assert(mode >= 0 && mode < numModes, "bad mode"); aoqi@0: assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); aoqi@0: *_oprs_new[mode][index] = opr; aoqi@0: } aoqi@0: aoqi@0: int info_count() const { aoqi@0: return _info_len; aoqi@0: } aoqi@0: aoqi@0: CodeEmitInfo* info_at(int index) const { aoqi@0: assert(index < _info_len, "index out of bounds"); aoqi@0: return _info_new[index]; aoqi@0: } aoqi@0: aoqi@0: XHandlers* all_xhandler(); aoqi@0: aoqi@0: // collects all register operands of the instruction aoqi@0: void visit(LIR_Op* op); aoqi@0: aoqi@0: #ifdef ASSERT aoqi@0: // check that an operation has no operands aoqi@0: bool no_operands(LIR_Op* op); aoqi@0: #endif aoqi@0: aoqi@0: // LIR_Op visitor functions use these to fill in the state aoqi@0: void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); } aoqi@0: void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); } aoqi@0: void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); } aoqi@0: void do_info(CodeEmitInfo* info) { append(info); } aoqi@0: aoqi@0: void do_stub(CodeStub* stub); aoqi@0: void do_call() { _has_call = true; } aoqi@0: void do_slow_case() { _has_slow_case = true; } aoqi@0: void do_slow_case(CodeEmitInfo* info) { aoqi@0: _has_slow_case = true; aoqi@0: append(info); aoqi@0: } aoqi@0: }; aoqi@0: aoqi@0: aoqi@0: inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; }; aoqi@0: aoqi@0: #endif // SHARE_VM_C1_C1_LIR_HPP