aoqi@1: /* aoqi@1: * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. aoqi@1: * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. aoqi@1: * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. aoqi@1: * aoqi@1: * This code is free software; you can redistribute it and/or modify it aoqi@1: * under the terms of the GNU General Public License version 2 only, as aoqi@1: * published by the Free Software Foundation. aoqi@1: * aoqi@1: * This code is distributed in the hope that it will be useful, but WITHOUT aoqi@1: * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or aoqi@1: * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License aoqi@1: * version 2 for more details (a copy is included in the LICENSE file that aoqi@1: * accompanied this code). aoqi@1: * aoqi@1: * You should have received a copy of the GNU General Public License version aoqi@1: * 2 along with this work; if not, write to the Free Software Foundation, aoqi@1: * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. aoqi@1: * aoqi@1: * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA aoqi@1: * or visit www.oracle.com if you need additional information or have any aoqi@1: * questions. aoqi@1: * aoqi@1: */ aoqi@1: aoqi@1: #ifndef CPU_MIPS_VM_C1_FRAMEMAP_MIPS_HPP aoqi@1: #define CPU_MIPS_VM_C1_FRAMEMAP_MIPS_HPP aoqi@1: aoqi@1: // On i486/gs2 the frame looks as follows: aoqi@1: // aoqi@1: // +----------------+---------+----------------------------+----------------+----------- aoqi@1: // | size_arguments | 2 words | size_locals-size_arguments | _size_monitors | spilling . aoqi@1: // +----------------+---------+----------------------------+----------------+----------- aoqi@1: // aoqi@1: //12/21, 06, jerome aoqi@1: private: aoqi@1: aoqi@1: //static FloatRegister _fpu_regs [nof_fpu_regs]; aoqi@1: static FloatRegister _fpu_regs [32]; aoqi@1: aoqi@1: WordSize fp_offset_for_slot (int slot) const; aoqi@1: int local_to_slot (int local_name, bool is_two_word) const; aoqi@1: // NOTE : name consist of argument, local, spill, they are not continuous aoqi@1: WordSize fp_offset_for_name (int name, bool is_two_word, bool for_hi_word) const; aoqi@1: WordSize fp_offset_for_monitor_lock (int monitor_index) const; aoqi@1: WordSize fp_offset_for_monitor_object(int monitor_index) const; aoqi@1: bool location_for_fp_offset (WordSize word_offset_from_fp, aoqi@1: Location::Type loc_type, aoqi@1: Location* loc) const; aoqi@1: WordSize fp2sp_offset (WordSize fp_offset) const; aoqi@1: aoqi@1: aoqi@1: public: aoqi@1: static const int pd_c_runtime_reserved_arg_size; aoqi@1: enum { aoqi@1: nof_reg_args = 5, // registers t0,a0-a3 are available for parameter passing aoqi@1: first_available_sp_in_frame = 0, aoqi@1: //frame_pad_in_bytes = 8 aoqi@1: frame_pad_in_bytes = 2 * sizeof(intptr_t) aoqi@1: }; aoqi@1: aoqi@1: static LIR_Opr _zero_opr; aoqi@1: static LIR_Opr _at_opr; aoqi@1: static LIR_Opr _v0_opr; aoqi@1: static LIR_Opr _v1_opr; aoqi@1: static LIR_Opr _a0_opr; aoqi@1: static LIR_Opr _a1_opr; aoqi@1: static LIR_Opr _a2_opr; aoqi@1: static LIR_Opr _a3_opr; aoqi@1: static LIR_Opr _t0_opr; aoqi@1: static LIR_Opr _t1_opr; aoqi@1: static LIR_Opr _t2_opr; aoqi@1: static LIR_Opr _t3_opr; aoqi@1: #ifndef _LP64 aoqi@1: static LIR_Opr _t4_opr; aoqi@1: static LIR_Opr _t5_opr; aoqi@1: static LIR_Opr _t6_opr; aoqi@1: static LIR_Opr _t7_opr; aoqi@1: #else aoqi@1: static LIR_Opr _a4_opr; aoqi@1: static LIR_Opr _a5_opr; aoqi@1: static LIR_Opr _a6_opr; aoqi@1: static LIR_Opr _a7_opr; aoqi@1: #endif aoqi@1: static LIR_Opr _t8_opr; aoqi@1: static LIR_Opr _t9_opr; aoqi@1: static LIR_Opr _s0_opr; aoqi@1: static LIR_Opr _s1_opr; aoqi@1: static LIR_Opr _s2_opr; aoqi@1: static LIR_Opr _s3_opr; aoqi@1: static LIR_Opr _s4_opr; aoqi@1: static LIR_Opr _s5_opr; aoqi@1: static LIR_Opr _s6_opr; aoqi@1: static LIR_Opr _s7_opr; aoqi@1: static LIR_Opr _gp_opr; aoqi@1: static LIR_Opr _fp_opr; aoqi@1: static LIR_Opr _sp_opr; aoqi@1: static LIR_Opr _ra_opr; aoqi@1: static LIR_Opr _k0_opr; aoqi@1: static LIR_Opr _k1_opr; aoqi@1: aoqi@1: static LIR_Opr _f0_opr; aoqi@1: static LIR_Opr _f12_opr; aoqi@1: static LIR_Opr _f14_opr; aoqi@1: static LIR_Opr _d0_opr; aoqi@1: static LIR_Opr _d12_opr; aoqi@1: static LIR_Opr _d14_opr; aoqi@1: aoqi@1: static LIR_Opr _a0_a1_opr; aoqi@1: static LIR_Opr _a2_a3_opr; aoqi@1: static LIR_Opr _v0_v1_opr; aoqi@1: aoqi@1: aoqi@1: static LIR_Opr receiver_opr; aoqi@1: static LIR_Opr _zero_oop_opr; aoqi@1: static LIR_Opr _at_oop_opr; aoqi@1: static LIR_Opr _v0_oop_opr; aoqi@1: static LIR_Opr _v1_oop_opr; aoqi@1: static LIR_Opr _a0_oop_opr; aoqi@1: static LIR_Opr _a1_oop_opr; aoqi@1: static LIR_Opr _a2_oop_opr; aoqi@1: static LIR_Opr _a3_oop_opr; aoqi@1: static LIR_Opr _t0_oop_opr; aoqi@1: static LIR_Opr _t1_oop_opr; aoqi@1: static LIR_Opr _t2_oop_opr; aoqi@1: static LIR_Opr _t3_oop_opr; aoqi@1: #ifndef _LP64 aoqi@1: static LIR_Opr _t4_oop_opr; aoqi@1: static LIR_Opr _t5_oop_opr; aoqi@1: static LIR_Opr _t6_oop_opr; aoqi@1: static LIR_Opr _t7_oop_opr; aoqi@1: #else aoqi@1: static LIR_Opr _a4_oop_opr; aoqi@1: static LIR_Opr _a5_oop_opr; aoqi@1: static LIR_Opr _a6_oop_opr; aoqi@1: static LIR_Opr _a7_oop_opr; aoqi@1: #endif aoqi@1: static LIR_Opr _t8_oop_opr; aoqi@1: static LIR_Opr _t9_oop_opr; aoqi@1: static LIR_Opr _s0_oop_opr; aoqi@1: static LIR_Opr _s1_oop_opr; aoqi@1: static LIR_Opr _s2_oop_opr; aoqi@1: static LIR_Opr _s3_oop_opr; aoqi@1: static LIR_Opr _s4_oop_opr; aoqi@1: static LIR_Opr _s5_oop_opr; aoqi@1: static LIR_Opr _s6_oop_opr; aoqi@1: static LIR_Opr _s7_oop_opr; aoqi@1: static LIR_Opr _gp_oop_opr; aoqi@1: static LIR_Opr _fp_oop_opr; aoqi@1: static LIR_Opr _sp_oop_opr; aoqi@1: static LIR_Opr _ra_oop_opr; aoqi@1: static LIR_Opr _k0_oop_opr; aoqi@1: static LIR_Opr _k1_oop_opr; aoqi@1: aoqi@1: static LIR_Opr _f0_oop_opr; aoqi@1: static LIR_Opr _f12_oop_opr; aoqi@1: static LIR_Opr _f14_oop_opr; aoqi@1: static LIR_Opr _d0_oop_opr; aoqi@1: static LIR_Opr _d12_oop_opr; aoqi@1: static LIR_Opr _d14_oop_opr; aoqi@1: aoqi@1: static LIR_Opr _a0_a1_oop_opr; aoqi@1: static LIR_Opr _a2_a3_oop_opr; aoqi@1: static LIR_Opr _v0_v1_oop_opr; aoqi@1: aoqi@1: //FIXME, needed under 64-bit? by aoqi aoqi@1: static LIR_Opr _a0_a1_long_opr; aoqi@1: static LIR_Opr _a2_a3_long_opr; aoqi@1: static LIR_Opr _v0_v1_long_opr; aoqi@1: static LIR_Opr _f0_float_opr; aoqi@1: static LIR_Opr _f12_float_opr; aoqi@1: static LIR_Opr _f14_float_opr; aoqi@1: static LIR_Opr _d0_double_opr; aoqi@1: static LIR_Opr _d12_double_opr; aoqi@1: static LIR_Opr _d14_double_opr; aoqi@1: aoqi@1: aoqi@1: static LIR_Opr as_long_opr(Register r, Register r2){ aoqi@1: return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r2)); aoqi@1: } aoqi@1: aoqi@1: static LIR_Opr as_float_opr(FloatRegister r) { aoqi@1: return LIR_OprFact::single_fpu(r->encoding()); aoqi@1: } aoqi@1: aoqi@1: aoqi@1: static bool is_caller_save_register (LIR_Opr opr); aoqi@1: static bool is_caller_save_register (Register r); aoqi@1: aoqi@1: aoqi@1: // OptoReg name for spilled virtual FPU register n aoqi@1: //OptoReg::Name fpu_regname (int n); aoqi@1: aoqi@1: static VMReg fpu_regname (int n); aoqi@1: static Register first_register(); aoqi@1: static FloatRegister nr2floatreg (int rnr); aoqi@1: static int adjust_reg_range(int range) { aoqi@1: // Reduce the number of available regs (to free r12) in case of compressed oops aoqi@1: if (UseCompressedOops || UseCompressedClassPointers) return range - 1; aoqi@1: return range; aoqi@1: } aoqi@1: aoqi@1: static int nof_caller_save_cpu_regs() { return adjust_reg_range(pd_nof_caller_save_cpu_regs_frame_map); } aoqi@1: static int last_cpu_reg() { return adjust_reg_range(pd_last_cpu_reg); } aoqi@1: //static int last_byte_reg() { return adjust_reg_range(pd_last_byte_reg); } aoqi@1: aoqi@1: #endif // CPU_MIPS_VM_C1_FRAMEMAP_MIPS_HPP aoqi@1: