duke@435: /*
drchase@4585:  * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
duke@435:  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435:  *
duke@435:  * This code is free software; you can redistribute it and/or modify it
duke@435:  * under the terms of the GNU General Public License version 2 only, as
duke@435:  * published by the Free Software Foundation.
duke@435:  *
duke@435:  * This code is distributed in the hope that it will be useful, but WITHOUT
duke@435:  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435:  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
duke@435:  * version 2 for more details (a copy is included in the LICENSE file that
duke@435:  * accompanied this code).
duke@435:  *
duke@435:  * You should have received a copy of the GNU General Public License version
duke@435:  * 2 along with this work; if not, write to the Free Software Foundation,
duke@435:  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435:  *
trims@1907:  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907:  * or visit www.oracle.com if you need additional information or have any
trims@1907:  * questions.
duke@435:  *
duke@435:  */
duke@435: 
stefank@2314: #include "precompiled.hpp"
stefank@2314: #include "opto/compile.hpp"
stefank@2314: #include "opto/regmask.hpp"
stefank@2314: #ifdef TARGET_ARCH_MODEL_x86_32
stefank@2314: # include "adfiles/ad_x86_32.hpp"
stefank@2314: #endif
stefank@2314: #ifdef TARGET_ARCH_MODEL_x86_64
stefank@2314: # include "adfiles/ad_x86_64.hpp"
stefank@2314: #endif
stefank@2314: #ifdef TARGET_ARCH_MODEL_sparc
stefank@2314: # include "adfiles/ad_sparc.hpp"
stefank@2314: #endif
stefank@2314: #ifdef TARGET_ARCH_MODEL_zero
stefank@2314: # include "adfiles/ad_zero.hpp"
stefank@2314: #endif
bobv@2508: #ifdef TARGET_ARCH_MODEL_arm
bobv@2508: # include "adfiles/ad_arm.hpp"
bobv@2508: #endif
bobv@2508: #ifdef TARGET_ARCH_MODEL_ppc
bobv@2508: # include "adfiles/ad_ppc.hpp"
bobv@2508: #endif
duke@435: 
duke@435: #define RM_SIZE _RM_SIZE /* a constant private to the class RegMask */
duke@435: 
duke@435: //-------------Non-zero bit search methods used by RegMask---------------------
duke@435: // Find lowest 1, or return 32 if empty
duke@435: int find_lowest_bit( uint32 mask ) {
duke@435:   int n = 0;
duke@435:   if( (mask & 0xffff) == 0 ) {
duke@435:     mask >>= 16;
duke@435:     n += 16;
duke@435:   }
duke@435:   if( (mask & 0xff) == 0 ) {
duke@435:     mask >>= 8;
duke@435:     n += 8;
duke@435:   }
duke@435:   if( (mask & 0xf) == 0 ) {
duke@435:     mask >>= 4;
duke@435:     n += 4;
duke@435:   }
duke@435:   if( (mask & 0x3) == 0 ) {
duke@435:     mask >>= 2;
duke@435:     n += 2;
duke@435:   }
duke@435:   if( (mask & 0x1) == 0 ) {
duke@435:     mask >>= 1;
duke@435:      n += 1;
duke@435:   }
duke@435:   if( mask == 0 ) {
duke@435:     n = 32;
duke@435:   }
duke@435:   return n;
duke@435: }
duke@435: 
duke@435: // Find highest 1, or return 32 if empty
duke@435: int find_hihghest_bit( uint32 mask ) {
duke@435:   int n = 0;
duke@435:   if( mask > 0xffff ) {
duke@435:     mask >>= 16;
duke@435:     n += 16;
duke@435:   }
duke@435:   if( mask > 0xff ) {
duke@435:     mask >>= 8;
duke@435:     n += 8;
duke@435:   }
duke@435:   if( mask > 0xf ) {
duke@435:     mask >>= 4;
duke@435:     n += 4;
duke@435:   }
duke@435:   if( mask > 0x3 ) {
duke@435:     mask >>= 2;
duke@435:     n += 2;
duke@435:   }
duke@435:   if( mask > 0x1 ) {
duke@435:     mask >>= 1;
duke@435:     n += 1;
duke@435:   }
duke@435:   if( mask == 0 ) {
duke@435:     n = 32;
duke@435:   }
duke@435:   return n;
duke@435: }
duke@435: 
duke@435: //------------------------------dump-------------------------------------------
duke@435: 
duke@435: #ifndef PRODUCT
kvn@4478: void OptoReg::dump(int r, outputStream *st) {
kvn@4478:   switch (r) {
kvn@4478:   case Special: st->print("r---"); break;
kvn@4478:   case Bad:     st->print("rBAD"); break;
duke@435:   default:
kvn@4478:     if (r < _last_Mach_Reg) st->print(Matcher::regName[r]);
kvn@4478:     else st->print("rS%d",r);
duke@435:     break;
duke@435:   }
duke@435: }
duke@435: #endif
duke@435: 
duke@435: 
duke@435: //=============================================================================
duke@435: const RegMask RegMask::Empty(
duke@435: # define BODY(I) 0,
duke@435:   FORALL_BODY
duke@435: # undef BODY
duke@435:   0
duke@435: );
duke@435: 
kvn@3882: //=============================================================================
kvn@3882: bool RegMask::is_vector(uint ireg) {
kvn@3882:   return (ireg == Op_VecS || ireg == Op_VecD || ireg == Op_VecX || ireg == Op_VecY);
kvn@3882: }
kvn@3882: 
kvn@3882: int RegMask::num_registers(uint ireg) {
kvn@3882:     switch(ireg) {
kvn@3882:       case Op_VecY:
kvn@3882:         return 8;
kvn@3882:       case Op_VecX:
kvn@3882:         return 4;
kvn@3882:       case Op_VecD:
kvn@3882:       case Op_RegD:
kvn@3882:       case Op_RegL:
kvn@3882: #ifdef _LP64
kvn@3882:       case Op_RegP:
kvn@3882: #endif
kvn@3882:         return 2;
kvn@3882:     }
kvn@3882:     // Op_VecS and the rest ideal registers.
kvn@3882:     return 1;
kvn@3882: }
kvn@3882: 
duke@435: //------------------------------find_first_pair--------------------------------
duke@435: // Find the lowest-numbered register pair in the mask.  Return the
duke@435: // HIGHEST register number in the pair, or BAD if no pairs.
duke@435: OptoReg::Name RegMask::find_first_pair() const {
kvn@3882:   verify_pairs();
duke@435:   for( int i = 0; i < RM_SIZE; i++ ) {
duke@435:     if( _A[i] ) {               // Found some bits
duke@435:       int bit = _A[i] & -_A[i]; // Extract low bit
duke@435:       // Convert to bit number, return hi bit in pair
duke@435:       return OptoReg::Name((i<<_LogWordBits)+find_lowest_bit(bit)+1);
duke@435:     }
duke@435:   }
duke@435:   return OptoReg::Bad;
duke@435: }
duke@435: 
duke@435: //------------------------------ClearToPairs-----------------------------------
duke@435: // Clear out partial bits; leave only bit pairs
kvn@3882: void RegMask::clear_to_pairs() {
duke@435:   for( int i = 0; i < RM_SIZE; i++ ) {
duke@435:     int bits = _A[i];
duke@435:     bits &= ((bits & 0x55555555)<<1); // 1 hi-bit set for each pair
duke@435:     bits |= (bits>>1);          // Smear 1 hi-bit into a pair
duke@435:     _A[i] = bits;
duke@435:   }
kvn@3882:   verify_pairs();
duke@435: }
duke@435: 
duke@435: //------------------------------SmearToPairs-----------------------------------
duke@435: // Smear out partial bits; leave only bit pairs
kvn@3882: void RegMask::smear_to_pairs() {
duke@435:   for( int i = 0; i < RM_SIZE; i++ ) {
duke@435:     int bits = _A[i];
duke@435:     bits |= ((bits & 0x55555555)<<1); // Smear lo bit hi per pair
duke@435:     bits |= ((bits & 0xAAAAAAAA)>>1); // Smear hi bit lo per pair
duke@435:     _A[i] = bits;
duke@435:   }
kvn@3882:   verify_pairs();
duke@435: }
duke@435: 
duke@435: //------------------------------is_aligned_pairs-------------------------------
kvn@3882: bool RegMask::is_aligned_pairs() const {
duke@435:   // Assert that the register mask contains only bit pairs.
duke@435:   for( int i = 0; i < RM_SIZE; i++ ) {
duke@435:     int bits = _A[i];
duke@435:     while( bits ) {             // Check bits for pairing
duke@435:       int bit = bits & -bits;   // Extract low bit
duke@435:       // Low bit is not odd means its mis-aligned.
duke@435:       if( (bit & 0x55555555) == 0 ) return false;
duke@435:       bits -= bit;              // Remove bit from mask
duke@435:       // Check for aligned adjacent bit
duke@435:       if( (bits & (bit<<1)) == 0 ) return false;
duke@435:       bits -= (bit<<1);         // Remove other halve of pair
duke@435:     }
duke@435:   }
duke@435:   return true;
duke@435: }
duke@435: 
duke@435: //------------------------------is_bound1--------------------------------------
duke@435: // Return TRUE if the mask contains a single bit
duke@435: int RegMask::is_bound1() const {
duke@435:   if( is_AllStack() ) return false;
duke@435:   int bit = -1;                 // Set to hold the one bit allowed
duke@435:   for( int i = 0; i < RM_SIZE; i++ ) {
duke@435:     if( _A[i] ) {               // Found some bits
duke@435:       if( bit != -1 ) return false; // Already had bits, so fail
duke@435:       bit = _A[i] & -_A[i];     // Extract 1 bit from mask
duke@435:       if( bit != _A[i] ) return false; // Found many bits, so fail
duke@435:     }
duke@435:   }
duke@435:   // True for both the empty mask and for a single bit
duke@435:   return true;
duke@435: }
duke@435: 
duke@435: //------------------------------is_bound2--------------------------------------
duke@435: // Return TRUE if the mask contains an adjacent pair of bits and no other bits.
kvn@3882: int RegMask::is_bound_pair() const {
duke@435:   if( is_AllStack() ) return false;
duke@435: 
duke@435:   int bit = -1;                 // Set to hold the one bit allowed
duke@435:   for( int i = 0; i < RM_SIZE; i++ ) {
duke@435:     if( _A[i] ) {               // Found some bits
duke@435:       if( bit != -1 ) return false; // Already had bits, so fail
duke@435:       bit = _A[i] & -(_A[i]);   // Extract 1 bit from mask
duke@435:       if( (bit << 1) != 0 ) {   // Bit pair stays in same word?
duke@435:         if( (bit | (bit<<1)) != _A[i] )
duke@435:           return false;         // Require adjacent bit pair and no more bits
duke@435:       } else {                  // Else its a split-pair case
duke@435:         if( bit != _A[i] ) return false; // Found many bits, so fail
duke@435:         i++;                    // Skip iteration forward
drchase@4585:         if( i >= RM_SIZE || _A[i] != 1 )
drchase@4585:           return false; // Require 1 lo bit in next word
duke@435:       }
duke@435:     }
duke@435:   }
duke@435:   // True for both the empty mask and for a bit pair
duke@435:   return true;
duke@435: }
duke@435: 
kvn@3882: static int low_bits[3] = { 0x55555555, 0x11111111, 0x01010101 };
kvn@3882: //------------------------------find_first_set---------------------------------
kvn@3882: // Find the lowest-numbered register set in the mask.  Return the
kvn@3882: // HIGHEST register number in the set, or BAD if no sets.
kvn@3882: // Works also for size 1.
drchase@4585: OptoReg::Name RegMask::find_first_set(const int size) const {
kvn@3882:   verify_sets(size);
kvn@3882:   for (int i = 0; i < RM_SIZE; i++) {
kvn@3882:     if (_A[i]) {                // Found some bits
kvn@3882:       int bit = _A[i] & -_A[i]; // Extract low bit
kvn@3882:       // Convert to bit number, return hi bit in pair
kvn@3882:       return OptoReg::Name((i<<_LogWordBits)+find_lowest_bit(bit)+(size-1));
kvn@3882:     }
kvn@3882:   }
kvn@3882:   return OptoReg::Bad;
kvn@3882: }
kvn@3882: 
kvn@3882: //------------------------------clear_to_sets----------------------------------
kvn@3882: // Clear out partial bits; leave only aligned adjacent bit pairs
drchase@4585: void RegMask::clear_to_sets(const int size) {
kvn@3882:   if (size == 1) return;
kvn@3882:   assert(2 <= size && size <= 8, "update low bits table");
kvn@3882:   assert(is_power_of_2(size), "sanity");
kvn@3882:   int low_bits_mask = low_bits[size>>2];
kvn@3882:   for (int i = 0; i < RM_SIZE; i++) {
kvn@3882:     int bits = _A[i];
kvn@3882:     int sets = (bits & low_bits_mask);
kvn@3882:     for (int j = 1; j < size; j++) {
kvn@3882:       sets = (bits & (sets<<1)); // filter bits which produce whole sets
kvn@3882:     }
kvn@3882:     sets |= (sets>>1);           // Smear 1 hi-bit into a set
kvn@3882:     if (size > 2) {
kvn@3882:       sets |= (sets>>2);         // Smear 2 hi-bits into a set
kvn@3882:       if (size > 4) {
kvn@3882:         sets |= (sets>>4);       // Smear 4 hi-bits into a set
kvn@3882:       }
kvn@3882:     }
kvn@3882:     _A[i] = sets;
kvn@3882:   }
kvn@3882:   verify_sets(size);
kvn@3882: }
kvn@3882: 
kvn@3882: //------------------------------smear_to_sets----------------------------------
kvn@3882: // Smear out partial bits to aligned adjacent bit sets
drchase@4585: void RegMask::smear_to_sets(const int size) {
kvn@3882:   if (size == 1) return;
kvn@3882:   assert(2 <= size && size <= 8, "update low bits table");
kvn@3882:   assert(is_power_of_2(size), "sanity");
kvn@3882:   int low_bits_mask = low_bits[size>>2];
kvn@3882:   for (int i = 0; i < RM_SIZE; i++) {
kvn@3882:     int bits = _A[i];
kvn@3882:     int sets = 0;
kvn@3882:     for (int j = 0; j < size; j++) {
kvn@3882:       sets |= (bits & low_bits_mask);  // collect partial bits
kvn@3882:       bits  = bits>>1;
kvn@3882:     }
kvn@3882:     sets |= (sets<<1);           // Smear 1 lo-bit  into a set
kvn@3882:     if (size > 2) {
kvn@3882:       sets |= (sets<<2);         // Smear 2 lo-bits into a set
kvn@3882:       if (size > 4) {
kvn@3882:         sets |= (sets<<4);       // Smear 4 lo-bits into a set
kvn@3882:       }
kvn@3882:     }
kvn@3882:     _A[i] = sets;
kvn@3882:   }
kvn@3882:   verify_sets(size);
kvn@3882: }
kvn@3882: 
kvn@3882: //------------------------------is_aligned_set--------------------------------
drchase@4585: bool RegMask::is_aligned_sets(const int size) const {
kvn@3882:   if (size == 1) return true;
kvn@3882:   assert(2 <= size && size <= 8, "update low bits table");
kvn@3882:   assert(is_power_of_2(size), "sanity");
kvn@3882:   int low_bits_mask = low_bits[size>>2];
kvn@3882:   // Assert that the register mask contains only bit sets.
kvn@3882:   for (int i = 0; i < RM_SIZE; i++) {
kvn@3882:     int bits = _A[i];
kvn@3882:     while (bits) {              // Check bits for pairing
kvn@3882:       int bit = bits & -bits;   // Extract low bit
kvn@3882:       // Low bit is not odd means its mis-aligned.
kvn@3882:       if ((bit & low_bits_mask) == 0) return false;
kvn@3882:       // Do extra work since (bit << size) may overflow.
kvn@3882:       int hi_bit = bit << (size-1); // high bit
kvn@3882:       int set = hi_bit + ((hi_bit-1) & ~(bit-1));
kvn@3882:       // Check for aligned adjacent bits in this set
kvn@3882:       if ((bits & set) != set) return false;
kvn@3882:       bits -= set;  // Remove this set
kvn@3882:     }
kvn@3882:   }
kvn@3882:   return true;
kvn@3882: }
kvn@3882: 
kvn@3882: //------------------------------is_bound_set-----------------------------------
kvn@3882: // Return TRUE if the mask contains one adjacent set of bits and no other bits.
kvn@3882: // Works also for size 1.
drchase@4585: int RegMask::is_bound_set(const int size) const {
kvn@3882:   if( is_AllStack() ) return false;
kvn@3882:   assert(1 <= size && size <= 8, "update low bits table");
kvn@3882:   int bit = -1;                 // Set to hold the one bit allowed
kvn@3882:   for (int i = 0; i < RM_SIZE; i++) {
kvn@3882:     if (_A[i] ) {               // Found some bits
kvn@3882:       if (bit != -1)
kvn@3882:        return false;            // Already had bits, so fail
drchase@4585:       bit = _A[i] & -_A[i];     // Extract low bit from mask
kvn@3882:       int hi_bit = bit << (size-1); // high bit
kvn@3882:       if (hi_bit != 0) {        // Bit set stays in same word?
kvn@3882:         int set = hi_bit + ((hi_bit-1) & ~(bit-1));
kvn@3882:         if (set != _A[i])
kvn@3882:           return false;         // Require adjacent bit set and no more bits
kvn@3882:       } else {                  // Else its a split-set case
kvn@3882:         if (((-1) & ~(bit-1)) != _A[i])
kvn@3882:           return false;         // Found many bits, so fail
kvn@3882:         i++;                    // Skip iteration forward and check high part
kvn@3882:         // The lower 24 bits should be 0 since it is split case and size <= 8.
kvn@3882:         int set = bit>>24;
kvn@3882:         set = set & -set; // Remove sign extension.
kvn@3882:         set = (((set << size) - 1) >> 8);
drchase@4585:         if (i >= RM_SIZE || _A[i] != set)
drchase@4585:           return false; // Require expected low bits in next word
kvn@3882:       }
kvn@3882:     }
kvn@3882:   }
kvn@3882:   // True for both the empty mask and for a bit set
kvn@3882:   return true;
kvn@3882: }
kvn@3882: 
duke@435: //------------------------------is_UP------------------------------------------
duke@435: // UP means register only, Register plus stack, or stack only is DOWN
duke@435: bool RegMask::is_UP() const {
duke@435:   // Quick common case check for DOWN (any stack slot is legal)
duke@435:   if( is_AllStack() )
duke@435:     return false;
duke@435:   // Slower check for any stack bits set (also DOWN)
duke@435:   if( overlap(Matcher::STACK_ONLY_mask) )
duke@435:     return false;
duke@435:   // Not DOWN, so must be UP
duke@435:   return true;
duke@435: }
duke@435: 
duke@435: //------------------------------Size-------------------------------------------
duke@435: // Compute size of register mask in bits
duke@435: uint RegMask::Size() const {
duke@435:   extern uint8 bitsInByte[256];
duke@435:   uint sum = 0;
duke@435:   for( int i = 0; i < RM_SIZE; i++ )
duke@435:     sum +=
duke@435:       bitsInByte[(_A[i]>>24) & 0xff] +
duke@435:       bitsInByte[(_A[i]>>16) & 0xff] +
duke@435:       bitsInByte[(_A[i]>> 8) & 0xff] +
duke@435:       bitsInByte[ _A[i]      & 0xff];
duke@435:   return sum;
duke@435: }
duke@435: 
duke@435: #ifndef PRODUCT
duke@435: //------------------------------print------------------------------------------
kvn@4478: void RegMask::dump(outputStream *st) const {
kvn@4478:   st->print("[");
duke@435:   RegMask rm = *this;           // Structure copy into local temp
duke@435: 
duke@435:   OptoReg::Name start = rm.find_first_elem(); // Get a register
kvn@4478:   if (OptoReg::is_valid(start)) { // Check for empty mask
duke@435:     rm.Remove(start);           // Yank from mask
kvn@4478:     OptoReg::dump(start, st);   // Print register
duke@435:     OptoReg::Name last = start;
duke@435: 
duke@435:     // Now I have printed an initial register.
duke@435:     // Print adjacent registers as "rX-rZ" instead of "rX,rY,rZ".
duke@435:     // Begin looping over the remaining registers.
kvn@4478:     while (1) {                 //
duke@435:       OptoReg::Name reg = rm.find_first_elem(); // Get a register
kvn@4478:       if (!OptoReg::is_valid(reg))
duke@435:         break;                  // Empty mask, end loop
duke@435:       rm.Remove(reg);           // Yank from mask
duke@435: 
kvn@4478:       if (last+1 == reg) {      // See if they are adjacent
duke@435:         // Adjacent registers just collect into long runs, no printing.
duke@435:         last = reg;
duke@435:       } else {                  // Ending some kind of run
kvn@4478:         if (start == last) {    // 1-register run; no special printing
kvn@4478:         } else if (start+1 == last) {
kvn@4478:           st->print(",");       // 2-register run; print as "rX,rY"
kvn@4478:           OptoReg::dump(last, st);
duke@435:         } else {                // Multi-register run; print as "rX-rZ"
kvn@4478:           st->print("-");
kvn@4478:           OptoReg::dump(last, st);
duke@435:         }
kvn@4478:         st->print(",");         // Seperate start of new run
duke@435:         start = last = reg;     // Start a new register run
kvn@4478:         OptoReg::dump(start, st); // Print register
duke@435:       } // End of if ending a register run or not
duke@435:     } // End of while regmask not empty
duke@435: 
kvn@4478:     if (start == last) {        // 1-register run; no special printing
kvn@4478:     } else if (start+1 == last) {
kvn@4478:       st->print(",");           // 2-register run; print as "rX,rY"
kvn@4478:       OptoReg::dump(last, st);
duke@435:     } else {                    // Multi-register run; print as "rX-rZ"
kvn@4478:       st->print("-");
kvn@4478:       OptoReg::dump(last, st);
duke@435:     }
kvn@4478:     if (rm.is_AllStack()) st->print("...");
duke@435:   }
kvn@4478:   st->print("]");
duke@435: }
duke@435: #endif