duke@435: /*
xdono@631:  * Copyright 2005-2008 Sun Microsystems, Inc.  All Rights Reserved.
duke@435:  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435:  *
duke@435:  * This code is free software; you can redistribute it and/or modify it
duke@435:  * under the terms of the GNU General Public License version 2 only, as
duke@435:  * published by the Free Software Foundation.
duke@435:  *
duke@435:  * This code is distributed in the hope that it will be useful, but WITHOUT
duke@435:  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435:  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
duke@435:  * version 2 for more details (a copy is included in the LICENSE file that
duke@435:  * accompanied this code).
duke@435:  *
duke@435:  * You should have received a copy of the GNU General Public License version
duke@435:  * 2 along with this work; if not, write to the Free Software Foundation,
duke@435:  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435:  *
duke@435:  * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
duke@435:  * CA 95054 USA or visit www.sun.com if you need additional information or
duke@435:  * have any questions.
duke@435:  *
duke@435:  */
duke@435: 
duke@435: # include "incls/_precompiled.incl"
duke@435: # include "incls/_c1_LIRGenerator_x86.cpp.incl"
duke@435: 
duke@435: #ifdef ASSERT
duke@435: #define __ gen()->lir(__FILE__, __LINE__)->
duke@435: #else
duke@435: #define __ gen()->lir()->
duke@435: #endif
duke@435: 
duke@435: // Item will be loaded into a byte register; Intel only
duke@435: void LIRItem::load_byte_item() {
duke@435:   load_item();
duke@435:   LIR_Opr res = result();
duke@435: 
duke@435:   if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
duke@435:     // make sure that it is a byte register
duke@435:     assert(!value()->type()->is_float() && !value()->type()->is_double(),
duke@435:            "can't load floats in byte register");
duke@435:     LIR_Opr reg = _gen->rlock_byte(T_BYTE);
duke@435:     __ move(res, reg);
duke@435: 
duke@435:     _result = reg;
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRItem::load_nonconstant() {
duke@435:   LIR_Opr r = value()->operand();
duke@435:   if (r->is_constant()) {
duke@435:     _result = r;
duke@435:   } else {
duke@435:     load_item();
duke@435:   }
duke@435: }
duke@435: 
duke@435: //--------------------------------------------------------------
duke@435: //               LIRGenerator
duke@435: //--------------------------------------------------------------
duke@435: 
duke@435: 
duke@435: LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
duke@435: LIR_Opr LIRGenerator::exceptionPcOpr()  { return FrameMap::rdx_opr; }
duke@435: LIR_Opr LIRGenerator::divInOpr()        { return FrameMap::rax_opr; }
duke@435: LIR_Opr LIRGenerator::divOutOpr()       { return FrameMap::rax_opr; }
duke@435: LIR_Opr LIRGenerator::remOutOpr()       { return FrameMap::rdx_opr; }
duke@435: LIR_Opr LIRGenerator::shiftCountOpr()   { return FrameMap::rcx_opr; }
duke@435: LIR_Opr LIRGenerator::syncTempOpr()     { return FrameMap::rax_opr; }
duke@435: LIR_Opr LIRGenerator::getThreadTemp()   { return LIR_OprFact::illegalOpr; }
duke@435: 
duke@435: 
duke@435: LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
duke@435:   LIR_Opr opr;
duke@435:   switch (type->tag()) {
duke@435:     case intTag:     opr = FrameMap::rax_opr;          break;
duke@435:     case objectTag:  opr = FrameMap::rax_oop_opr;      break;
never@739:     case longTag:    opr = FrameMap::long0_opr;        break;
duke@435:     case floatTag:   opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr  : FrameMap::fpu0_float_opr;  break;
duke@435:     case doubleTag:  opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr;  break;
duke@435: 
duke@435:     case addressTag:
duke@435:     default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
duke@435:   }
duke@435: 
duke@435:   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
duke@435:   return opr;
duke@435: }
duke@435: 
duke@435: 
duke@435: LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
duke@435:   LIR_Opr reg = new_register(T_INT);
duke@435:   set_vreg_flag(reg, LIRGenerator::byte_reg);
duke@435:   return reg;
duke@435: }
duke@435: 
duke@435: 
duke@435: //--------- loading items into registers --------------------------------
duke@435: 
duke@435: 
duke@435: // i486 instructions can inline constants
duke@435: bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
duke@435:   if (type == T_SHORT || type == T_CHAR) {
duke@435:     // there is no immediate move of word values in asembler_i486.?pp
duke@435:     return false;
duke@435:   }
duke@435:   Constant* c = v->as_Constant();
duke@435:   if (c && c->state() == NULL) {
duke@435:     // constants of any type can be stored directly, except for
duke@435:     // unloaded object constants.
duke@435:     return true;
duke@435:   }
duke@435:   return false;
duke@435: }
duke@435: 
duke@435: 
duke@435: bool LIRGenerator::can_inline_as_constant(Value v) const {
never@739:   if (v->type()->tag() == longTag) return false;
duke@435:   return v->type()->tag() != objectTag ||
duke@435:     (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
duke@435: }
duke@435: 
duke@435: 
duke@435: bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
never@739:   if (c->type() == T_LONG) return false;
duke@435:   return c->type() != T_OBJECT || c->as_jobject() == NULL;
duke@435: }
duke@435: 
duke@435: 
duke@435: LIR_Opr LIRGenerator::safepoint_poll_register() {
duke@435:   return LIR_OprFact::illegalOpr;
duke@435: }
duke@435: 
duke@435: 
duke@435: LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
duke@435:                                             int shift, int disp, BasicType type) {
duke@435:   assert(base->is_register(), "must be");
duke@435:   if (index->is_constant()) {
duke@435:     return new LIR_Address(base,
duke@435:                            (index->as_constant_ptr()->as_jint() << shift) + disp,
duke@435:                            type);
duke@435:   } else {
duke@435:     return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
duke@435:                                               BasicType type, bool needs_card_mark) {
duke@435:   int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
duke@435: 
duke@435:   LIR_Address* addr;
duke@435:   if (index_opr->is_constant()) {
kvn@464:     int elem_size = type2aelembytes(type);
duke@435:     addr = new LIR_Address(array_opr,
duke@435:                            offset_in_bytes + index_opr->as_jint() * elem_size, type);
duke@435:   } else {
never@739: #ifdef _LP64
never@739:     if (index_opr->type() == T_INT) {
never@739:       LIR_Opr tmp = new_register(T_LONG);
never@739:       __ convert(Bytecodes::_i2l, index_opr, tmp);
never@739:       index_opr = tmp;
never@739:     }
never@739: #endif // _LP64
duke@435:     addr =  new LIR_Address(array_opr,
duke@435:                             index_opr,
duke@435:                             LIR_Address::scale(type),
duke@435:                             offset_in_bytes, type);
duke@435:   }
duke@435:   if (needs_card_mark) {
duke@435:     // This store will need a precise card mark, so go ahead and
duke@435:     // compute the full adddres instead of computing once for the
duke@435:     // store and again for the card mark.
never@739:     LIR_Opr tmp = new_pointer_register();
duke@435:     __ leal(LIR_OprFact::address(addr), tmp);
duke@435:     return new LIR_Address(tmp, 0, type);
duke@435:   } else {
duke@435:     return addr;
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::increment_counter(address counter, int step) {
never@739:   LIR_Opr pointer = new_pointer_register();
never@739:   __ move(LIR_OprFact::intptrConst(counter), pointer);
duke@435:   LIR_Address* addr = new LIR_Address(pointer, 0, T_INT);
duke@435:   increment_counter(addr, step);
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
duke@435:   __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
duke@435:   __ cmp_mem_int(condition, base, disp, c, info);
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
duke@435:   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
duke@435:   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
duke@435: }
duke@435: 
duke@435: 
duke@435: bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
duke@435:   if (tmp->is_valid()) {
duke@435:     if (is_power_of_2(c + 1)) {
duke@435:       __ move(left, tmp);
duke@435:       __ shift_left(left, log2_intptr(c + 1), left);
duke@435:       __ sub(left, tmp, result);
duke@435:       return true;
duke@435:     } else if (is_power_of_2(c - 1)) {
duke@435:       __ move(left, tmp);
duke@435:       __ shift_left(left, log2_intptr(c - 1), left);
duke@435:       __ add(left, tmp, result);
duke@435:       return true;
duke@435:     }
duke@435:   }
duke@435:   return false;
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
duke@435:   BasicType type = item->type();
duke@435:   __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
duke@435: }
duke@435: 
duke@435: //----------------------------------------------------------------------
duke@435: //             visitor functions
duke@435: //----------------------------------------------------------------------
duke@435: 
duke@435: 
duke@435: void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
duke@435:   assert(x->is_root(),"");
duke@435:   bool needs_range_check = true;
duke@435:   bool use_length = x->length() != NULL;
duke@435:   bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
duke@435:   bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
duke@435:                                          !get_jobject_constant(x->value())->is_null_object());
duke@435: 
duke@435:   LIRItem array(x->array(), this);
duke@435:   LIRItem index(x->index(), this);
duke@435:   LIRItem value(x->value(), this);
duke@435:   LIRItem length(this);
duke@435: 
duke@435:   array.load_item();
duke@435:   index.load_nonconstant();
duke@435: 
duke@435:   if (use_length) {
duke@435:     needs_range_check = x->compute_needs_range_check();
duke@435:     if (needs_range_check) {
duke@435:       length.set_instruction(x->length());
duke@435:       length.load_item();
duke@435:     }
duke@435:   }
duke@435:   if (needs_store_check) {
duke@435:     value.load_item();
duke@435:   } else {
duke@435:     value.load_for_store(x->elt_type());
duke@435:   }
duke@435: 
duke@435:   set_no_result(x);
duke@435: 
duke@435:   // the CodeEmitInfo must be duplicated for each different
duke@435:   // LIR-instruction because spilling can occur anywhere between two
duke@435:   // instructions and so the debug information must be different
duke@435:   CodeEmitInfo* range_check_info = state_for(x);
duke@435:   CodeEmitInfo* null_check_info = NULL;
duke@435:   if (x->needs_null_check()) {
duke@435:     null_check_info = new CodeEmitInfo(range_check_info);
duke@435:   }
duke@435: 
duke@435:   // emit array address setup early so it schedules better
duke@435:   LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
duke@435: 
duke@435:   if (GenerateRangeChecks && needs_range_check) {
duke@435:     if (use_length) {
duke@435:       __ cmp(lir_cond_belowEqual, length.result(), index.result());
duke@435:       __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
duke@435:     } else {
duke@435:       array_range_check(array.result(), index.result(), null_check_info, range_check_info);
duke@435:       // range_check also does the null check
duke@435:       null_check_info = NULL;
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   if (GenerateArrayStoreCheck && needs_store_check) {
duke@435:     LIR_Opr tmp1 = new_register(objectType);
duke@435:     LIR_Opr tmp2 = new_register(objectType);
duke@435:     LIR_Opr tmp3 = new_register(objectType);
duke@435: 
duke@435:     CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
duke@435:     __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info);
duke@435:   }
duke@435: 
duke@435:   if (obj_store) {
ysr@777:     // Needs GC write barriers.
ysr@777:     pre_barrier(LIR_OprFact::address(array_addr), false, NULL);
duke@435:     __ move(value.result(), array_addr, null_check_info);
duke@435:     // Seems to be a precise
duke@435:     post_barrier(LIR_OprFact::address(array_addr), value.result());
duke@435:   } else {
duke@435:     __ move(value.result(), array_addr, null_check_info);
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
duke@435:   assert(x->is_root(),"");
duke@435:   LIRItem obj(x->obj(), this);
duke@435:   obj.load_item();
duke@435: 
duke@435:   set_no_result(x);
duke@435: 
duke@435:   // "lock" stores the address of the monitor stack slot, so this is not an oop
duke@435:   LIR_Opr lock = new_register(T_INT);
duke@435:   // Need a scratch register for biased locking on x86
duke@435:   LIR_Opr scratch = LIR_OprFact::illegalOpr;
duke@435:   if (UseBiasedLocking) {
duke@435:     scratch = new_register(T_INT);
duke@435:   }
duke@435: 
duke@435:   CodeEmitInfo* info_for_exception = NULL;
duke@435:   if (x->needs_null_check()) {
duke@435:     info_for_exception = state_for(x, x->lock_stack_before());
duke@435:   }
duke@435:   // this CodeEmitInfo must not have the xhandlers because here the
duke@435:   // object is already locked (xhandlers expect object to be unlocked)
duke@435:   CodeEmitInfo* info = state_for(x, x->state(), true);
duke@435:   monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
duke@435:                         x->monitor_no(), info_for_exception, info);
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::do_MonitorExit(MonitorExit* x) {
duke@435:   assert(x->is_root(),"");
duke@435: 
duke@435:   LIRItem obj(x->obj(), this);
duke@435:   obj.dont_load_item();
duke@435: 
duke@435:   LIR_Opr lock = new_register(T_INT);
duke@435:   LIR_Opr obj_temp = new_register(T_INT);
duke@435:   set_no_result(x);
duke@435:   monitor_exit(obj_temp, lock, syncTempOpr(), x->monitor_no());
duke@435: }
duke@435: 
duke@435: 
duke@435: // _ineg, _lneg, _fneg, _dneg
duke@435: void LIRGenerator::do_NegateOp(NegateOp* x) {
duke@435:   LIRItem value(x->x(), this);
duke@435:   value.set_destroys_register();
duke@435:   value.load_item();
duke@435:   LIR_Opr reg = rlock(x);
duke@435:   __ negate(value.result(), reg);
duke@435: 
duke@435:   set_result(x, round_item(reg));
duke@435: }
duke@435: 
duke@435: 
duke@435: // for  _fadd, _fmul, _fsub, _fdiv, _frem
duke@435: //      _dadd, _dmul, _dsub, _ddiv, _drem
duke@435: void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
duke@435:   LIRItem left(x->x(),  this);
duke@435:   LIRItem right(x->y(), this);
duke@435:   LIRItem* left_arg  = &left;
duke@435:   LIRItem* right_arg = &right;
duke@435:   assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
duke@435:   bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
duke@435:   if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
duke@435:     left.load_item();
duke@435:   } else {
duke@435:     left.dont_load_item();
duke@435:   }
duke@435: 
duke@435:   // do not load right operand if it is a constant.  only 0 and 1 are
duke@435:   // loaded because there are special instructions for loading them
duke@435:   // without memory access (not needed for SSE2 instructions)
duke@435:   bool must_load_right = false;
duke@435:   if (right.is_constant()) {
duke@435:     LIR_Const* c = right.result()->as_constant_ptr();
duke@435:     assert(c != NULL, "invalid constant");
duke@435:     assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
duke@435: 
duke@435:     if (c->type() == T_FLOAT) {
duke@435:       must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
duke@435:     } else {
duke@435:       must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
duke@435:     }
duke@435:   }
duke@435: 
duke@435:   if (must_load_both) {
duke@435:     // frem and drem destroy also right operand, so move it to a new register
duke@435:     right.set_destroys_register();
duke@435:     right.load_item();
duke@435:   } else if (right.is_register() || must_load_right) {
duke@435:     right.load_item();
duke@435:   } else {
duke@435:     right.dont_load_item();
duke@435:   }
duke@435:   LIR_Opr reg = rlock(x);
duke@435:   LIR_Opr tmp = LIR_OprFact::illegalOpr;
duke@435:   if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
duke@435:     tmp = new_register(T_DOUBLE);
duke@435:   }
duke@435: 
duke@435:   if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
duke@435:     // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
duke@435:     LIR_Opr fpu0, fpu1;
duke@435:     if (x->op() == Bytecodes::_frem) {
duke@435:       fpu0 = LIR_OprFact::single_fpu(0);
duke@435:       fpu1 = LIR_OprFact::single_fpu(1);
duke@435:     } else {
duke@435:       fpu0 = LIR_OprFact::double_fpu(0);
duke@435:       fpu1 = LIR_OprFact::double_fpu(1);
duke@435:     }
duke@435:     __ move(right.result(), fpu1); // order of left and right operand is important!
duke@435:     __ move(left.result(), fpu0);
duke@435:     __ rem (fpu0, fpu1, fpu0);
duke@435:     __ move(fpu0, reg);
duke@435: 
duke@435:   } else {
duke@435:     arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
duke@435:   }
duke@435: 
duke@435:   set_result(x, round_item(reg));
duke@435: }
duke@435: 
duke@435: 
duke@435: // for  _ladd, _lmul, _lsub, _ldiv, _lrem
duke@435: void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
duke@435:   if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
duke@435:     // long division is implemented as a direct call into the runtime
duke@435:     LIRItem left(x->x(), this);
duke@435:     LIRItem right(x->y(), this);
duke@435: 
duke@435:     // the check for division by zero destroys the right operand
duke@435:     right.set_destroys_register();
duke@435: 
duke@435:     BasicTypeList signature(2);
duke@435:     signature.append(T_LONG);
duke@435:     signature.append(T_LONG);
duke@435:     CallingConvention* cc = frame_map()->c_calling_convention(&signature);
duke@435: 
duke@435:     // check for division by zero (destroys registers of right operand!)
duke@435:     CodeEmitInfo* info = state_for(x);
duke@435: 
duke@435:     const LIR_Opr result_reg = result_register_for(x->type());
duke@435:     left.load_item_force(cc->at(1));
duke@435:     right.load_item();
duke@435: 
duke@435:     __ move(right.result(), cc->at(0));
duke@435: 
duke@435:     __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
duke@435:     __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
duke@435: 
duke@435:     address entry;
duke@435:     switch (x->op()) {
duke@435:     case Bytecodes::_lrem:
duke@435:       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
duke@435:       break; // check if dividend is 0 is done elsewhere
duke@435:     case Bytecodes::_ldiv:
duke@435:       entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
duke@435:       break; // check if dividend is 0 is done elsewhere
duke@435:     case Bytecodes::_lmul:
duke@435:       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
duke@435:       break;
duke@435:     default:
duke@435:       ShouldNotReachHere();
duke@435:     }
duke@435: 
duke@435:     LIR_Opr result = rlock_result(x);
duke@435:     __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
duke@435:     __ move(result_reg, result);
duke@435:   } else if (x->op() == Bytecodes::_lmul) {
duke@435:     // missing test if instr is commutative and if we should swap
duke@435:     LIRItem left(x->x(), this);
duke@435:     LIRItem right(x->y(), this);
duke@435: 
duke@435:     // right register is destroyed by the long mul, so it must be
duke@435:     // copied to a new register.
duke@435:     right.set_destroys_register();
duke@435: 
duke@435:     left.load_item();
duke@435:     right.load_item();
duke@435: 
never@739:     LIR_Opr reg = FrameMap::long0_opr;
duke@435:     arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
duke@435:     LIR_Opr result = rlock_result(x);
duke@435:     __ move(reg, result);
duke@435:   } else {
duke@435:     // missing test if instr is commutative and if we should swap
duke@435:     LIRItem left(x->x(), this);
duke@435:     LIRItem right(x->y(), this);
duke@435: 
duke@435:     left.load_item();
twisti@1040:     // don't load constants to save register
duke@435:     right.load_nonconstant();
duke@435:     rlock_result(x);
duke@435:     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: 
duke@435: // for: _iadd, _imul, _isub, _idiv, _irem
duke@435: void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
duke@435:   if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
duke@435:     // The requirements for division and modulo
duke@435:     // input : rax,: dividend                         min_int
duke@435:     //         reg: divisor   (may not be rax,/rdx)   -1
duke@435:     //
duke@435:     // output: rax,: quotient  (= rax, idiv reg)       min_int
duke@435:     //         rdx: remainder (= rax, irem reg)       0
duke@435: 
duke@435:     // rax, and rdx will be destroyed
duke@435: 
duke@435:     // Note: does this invalidate the spec ???
duke@435:     LIRItem right(x->y(), this);
duke@435:     LIRItem left(x->x() , this);   // visit left second, so that the is_register test is valid
duke@435: 
duke@435:     // call state_for before load_item_force because state_for may
duke@435:     // force the evaluation of other instructions that are needed for
duke@435:     // correct debug info.  Otherwise the live range of the fix
duke@435:     // register might be too long.
duke@435:     CodeEmitInfo* info = state_for(x);
duke@435: 
duke@435:     left.load_item_force(divInOpr());
duke@435: 
duke@435:     right.load_item();
duke@435: 
duke@435:     LIR_Opr result = rlock_result(x);
duke@435:     LIR_Opr result_reg;
duke@435:     if (x->op() == Bytecodes::_idiv) {
duke@435:       result_reg = divOutOpr();
duke@435:     } else {
duke@435:       result_reg = remOutOpr();
duke@435:     }
duke@435: 
duke@435:     if (!ImplicitDiv0Checks) {
duke@435:       __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
duke@435:       __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
duke@435:     }
duke@435:     LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
duke@435:     if (x->op() == Bytecodes::_irem) {
duke@435:       __ irem(left.result(), right.result(), result_reg, tmp, info);
duke@435:     } else if (x->op() == Bytecodes::_idiv) {
duke@435:       __ idiv(left.result(), right.result(), result_reg, tmp, info);
duke@435:     } else {
duke@435:       ShouldNotReachHere();
duke@435:     }
duke@435: 
duke@435:     __ move(result_reg, result);
duke@435:   } else {
duke@435:     // missing test if instr is commutative and if we should swap
duke@435:     LIRItem left(x->x(),  this);
duke@435:     LIRItem right(x->y(), this);
duke@435:     LIRItem* left_arg = &left;
duke@435:     LIRItem* right_arg = &right;
duke@435:     if (x->is_commutative() && left.is_stack() && right.is_register()) {
duke@435:       // swap them if left is real stack (or cached) and right is real register(not cached)
duke@435:       left_arg = &right;
duke@435:       right_arg = &left;
duke@435:     }
duke@435: 
duke@435:     left_arg->load_item();
duke@435: 
duke@435:     // do not need to load right, as we can handle stack and constants
duke@435:     if (x->op() == Bytecodes::_imul ) {
duke@435:       // check if we can use shift instead
duke@435:       bool use_constant = false;
duke@435:       bool use_tmp = false;
duke@435:       if (right_arg->is_constant()) {
duke@435:         int iconst = right_arg->get_jint_constant();
duke@435:         if (iconst > 0) {
duke@435:           if (is_power_of_2(iconst)) {
duke@435:             use_constant = true;
duke@435:           } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
duke@435:             use_constant = true;
duke@435:             use_tmp = true;
duke@435:           }
duke@435:         }
duke@435:       }
duke@435:       if (use_constant) {
duke@435:         right_arg->dont_load_item();
duke@435:       } else {
duke@435:         right_arg->load_item();
duke@435:       }
duke@435:       LIR_Opr tmp = LIR_OprFact::illegalOpr;
duke@435:       if (use_tmp) {
duke@435:         tmp = new_register(T_INT);
duke@435:       }
duke@435:       rlock_result(x);
duke@435: 
duke@435:       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
duke@435:     } else {
duke@435:       right_arg->dont_load_item();
duke@435:       rlock_result(x);
duke@435:       LIR_Opr tmp = LIR_OprFact::illegalOpr;
duke@435:       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
duke@435:     }
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
duke@435:   // when an operand with use count 1 is the left operand, then it is
duke@435:   // likely that no move for 2-operand-LIR-form is necessary
duke@435:   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
duke@435:     x->swap_operands();
duke@435:   }
duke@435: 
duke@435:   ValueTag tag = x->type()->tag();
duke@435:   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
duke@435:   switch (tag) {
duke@435:     case floatTag:
duke@435:     case doubleTag:  do_ArithmeticOp_FPU(x);  return;
duke@435:     case longTag:    do_ArithmeticOp_Long(x); return;
duke@435:     case intTag:     do_ArithmeticOp_Int(x);  return;
duke@435:   }
duke@435:   ShouldNotReachHere();
duke@435: }
duke@435: 
duke@435: 
duke@435: // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
duke@435: void LIRGenerator::do_ShiftOp(ShiftOp* x) {
duke@435:   // count must always be in rcx
duke@435:   LIRItem value(x->x(), this);
duke@435:   LIRItem count(x->y(), this);
duke@435: 
duke@435:   ValueTag elemType = x->type()->tag();
duke@435:   bool must_load_count = !count.is_constant() || elemType == longTag;
duke@435:   if (must_load_count) {
duke@435:     // count for long must be in register
duke@435:     count.load_item_force(shiftCountOpr());
duke@435:   } else {
duke@435:     count.dont_load_item();
duke@435:   }
duke@435:   value.load_item();
duke@435:   LIR_Opr reg = rlock_result(x);
duke@435: 
duke@435:   shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
duke@435: }
duke@435: 
duke@435: 
duke@435: // _iand, _land, _ior, _lor, _ixor, _lxor
duke@435: void LIRGenerator::do_LogicOp(LogicOp* x) {
duke@435:   // when an operand with use count 1 is the left operand, then it is
duke@435:   // likely that no move for 2-operand-LIR-form is necessary
duke@435:   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
duke@435:     x->swap_operands();
duke@435:   }
duke@435: 
duke@435:   LIRItem left(x->x(), this);
duke@435:   LIRItem right(x->y(), this);
duke@435: 
duke@435:   left.load_item();
duke@435:   right.load_nonconstant();
duke@435:   LIR_Opr reg = rlock_result(x);
duke@435: 
duke@435:   logic_op(x->op(), reg, left.result(), right.result());
duke@435: }
duke@435: 
duke@435: 
duke@435: 
duke@435: // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
duke@435: void LIRGenerator::do_CompareOp(CompareOp* x) {
duke@435:   LIRItem left(x->x(), this);
duke@435:   LIRItem right(x->y(), this);
duke@435:   ValueTag tag = x->x()->type()->tag();
duke@435:   if (tag == longTag) {
duke@435:     left.set_destroys_register();
duke@435:   }
duke@435:   left.load_item();
duke@435:   right.load_item();
duke@435:   LIR_Opr reg = rlock_result(x);
duke@435: 
duke@435:   if (x->x()->type()->is_float_kind()) {
duke@435:     Bytecodes::Code code = x->op();
duke@435:     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
duke@435:   } else if (x->x()->type()->tag() == longTag) {
duke@435:     __ lcmp2int(left.result(), right.result(), reg);
duke@435:   } else {
duke@435:     Unimplemented();
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::do_AttemptUpdate(Intrinsic* x) {
duke@435:   assert(x->number_of_arguments() == 3, "wrong type");
duke@435:   LIRItem obj       (x->argument_at(0), this);  // AtomicLong object
duke@435:   LIRItem cmp_value (x->argument_at(1), this);  // value to compare with field
duke@435:   LIRItem new_value (x->argument_at(2), this);  // replace field with new_value if it matches cmp_value
duke@435: 
duke@435:   // compare value must be in rdx,eax (hi,lo); may be destroyed by cmpxchg8 instruction
never@739:   cmp_value.load_item_force(FrameMap::long0_opr);
duke@435: 
duke@435:   // new value must be in rcx,ebx (hi,lo)
never@739:   new_value.load_item_force(FrameMap::long1_opr);
duke@435: 
duke@435:   // object pointer register is overwritten with field address
duke@435:   obj.load_item();
duke@435: 
duke@435:   // generate compare-and-swap; produces zero condition if swap occurs
duke@435:   int value_offset = sun_misc_AtomicLongCSImpl::value_offset();
duke@435:   LIR_Opr addr = obj.result();
duke@435:   __ add(addr, LIR_OprFact::intConst(value_offset), addr);
duke@435:   LIR_Opr t1 = LIR_OprFact::illegalOpr;  // no temp needed
duke@435:   LIR_Opr t2 = LIR_OprFact::illegalOpr;  // no temp needed
duke@435:   __ cas_long(addr, cmp_value.result(), new_value.result(), t1, t2);
duke@435: 
duke@435:   // generate conditional move of boolean result
duke@435:   LIR_Opr result = rlock_result(x);
duke@435:   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
duke@435:   assert(x->number_of_arguments() == 4, "wrong type");
duke@435:   LIRItem obj   (x->argument_at(0), this);  // object
duke@435:   LIRItem offset(x->argument_at(1), this);  // offset of field
duke@435:   LIRItem cmp   (x->argument_at(2), this);  // value to compare with field
duke@435:   LIRItem val   (x->argument_at(3), this);  // replace field with val if matches cmp
duke@435: 
duke@435:   assert(obj.type()->tag() == objectTag, "invalid type");
never@739: 
never@739:   // In 64bit the type can be long, sparc doesn't have this assert
never@739:   // assert(offset.type()->tag() == intTag, "invalid type");
never@739: 
duke@435:   assert(cmp.type()->tag() == type->tag(), "invalid type");
duke@435:   assert(val.type()->tag() == type->tag(), "invalid type");
duke@435: 
duke@435:   // get address of field
duke@435:   obj.load_item();
duke@435:   offset.load_nonconstant();
duke@435: 
duke@435:   if (type == objectType) {
duke@435:     cmp.load_item_force(FrameMap::rax_oop_opr);
duke@435:     val.load_item();
duke@435:   } else if (type == intType) {
duke@435:     cmp.load_item_force(FrameMap::rax_opr);
duke@435:     val.load_item();
duke@435:   } else if (type == longType) {
never@739:     cmp.load_item_force(FrameMap::long0_opr);
never@739:     val.load_item_force(FrameMap::long1_opr);
duke@435:   } else {
duke@435:     ShouldNotReachHere();
duke@435:   }
duke@435: 
duke@435:   LIR_Opr addr = new_pointer_register();
duke@435:   __ move(obj.result(), addr);
duke@435:   __ add(addr, offset.result(), addr);
duke@435: 
ysr@777:   if (type == objectType) {  // Write-barrier needed for Object fields.
ysr@777:     // Do the pre-write barrier, if any.
ysr@777:     pre_barrier(addr, false, NULL);
ysr@777:   }
duke@435: 
duke@435:   LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
duke@435:   if (type == objectType)
duke@435:     __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
duke@435:   else if (type == intType)
duke@435:     __ cas_int(addr, cmp.result(), val.result(), ill, ill);
duke@435:   else if (type == longType)
duke@435:     __ cas_long(addr, cmp.result(), val.result(), ill, ill);
duke@435:   else {
duke@435:     ShouldNotReachHere();
duke@435:   }
duke@435: 
duke@435:   // generate conditional move of boolean result
duke@435:   LIR_Opr result = rlock_result(x);
duke@435:   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
duke@435:   if (type == objectType) {   // Write-barrier needed for Object fields.
duke@435:     // Seems to be precise
duke@435:     post_barrier(addr, val.result());
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
duke@435:   assert(x->number_of_arguments() == 1, "wrong type");
duke@435:   LIRItem value(x->argument_at(0), this);
duke@435: 
duke@435:   bool use_fpu = false;
duke@435:   if (UseSSE >= 2) {
duke@435:     switch(x->id()) {
duke@435:       case vmIntrinsics::_dsin:
duke@435:       case vmIntrinsics::_dcos:
duke@435:       case vmIntrinsics::_dtan:
duke@435:       case vmIntrinsics::_dlog:
duke@435:       case vmIntrinsics::_dlog10:
duke@435:         use_fpu = true;
duke@435:     }
duke@435:   } else {
duke@435:     value.set_destroys_register();
duke@435:   }
duke@435: 
duke@435:   value.load_item();
duke@435: 
duke@435:   LIR_Opr calc_input = value.result();
duke@435:   LIR_Opr calc_result = rlock_result(x);
duke@435: 
duke@435:   // sin and cos need two free fpu stack slots, so register two temporary operands
duke@435:   LIR_Opr tmp1 = FrameMap::caller_save_fpu_reg_at(0);
duke@435:   LIR_Opr tmp2 = FrameMap::caller_save_fpu_reg_at(1);
duke@435: 
duke@435:   if (use_fpu) {
duke@435:     LIR_Opr tmp = FrameMap::fpu0_double_opr;
duke@435:     __ move(calc_input, tmp);
duke@435: 
duke@435:     calc_input = tmp;
duke@435:     calc_result = tmp;
duke@435:     tmp1 = FrameMap::caller_save_fpu_reg_at(1);
duke@435:     tmp2 = FrameMap::caller_save_fpu_reg_at(2);
duke@435:   }
duke@435: 
duke@435:   switch(x->id()) {
duke@435:     case vmIntrinsics::_dabs:   __ abs  (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
duke@435:     case vmIntrinsics::_dsqrt:  __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
duke@435:     case vmIntrinsics::_dsin:   __ sin  (calc_input, calc_result, tmp1, tmp2);              break;
duke@435:     case vmIntrinsics::_dcos:   __ cos  (calc_input, calc_result, tmp1, tmp2);              break;
duke@435:     case vmIntrinsics::_dtan:   __ tan  (calc_input, calc_result, tmp1, tmp2);              break;
never@1388:     case vmIntrinsics::_dlog:   __ log  (calc_input, calc_result, tmp1);                    break;
never@1388:     case vmIntrinsics::_dlog10: __ log10(calc_input, calc_result, tmp1);                    break;
duke@435:     default:                    ShouldNotReachHere();
duke@435:   }
duke@435: 
duke@435:   if (use_fpu) {
duke@435:     __ move(calc_result, x->operand());
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
duke@435:   assert(x->number_of_arguments() == 5, "wrong type");
duke@435:   LIRItem src(x->argument_at(0), this);
duke@435:   LIRItem src_pos(x->argument_at(1), this);
duke@435:   LIRItem dst(x->argument_at(2), this);
duke@435:   LIRItem dst_pos(x->argument_at(3), this);
duke@435:   LIRItem length(x->argument_at(4), this);
duke@435: 
duke@435:   // operands for arraycopy must use fixed registers, otherwise
duke@435:   // LinearScan will fail allocation (because arraycopy always needs a
duke@435:   // call)
never@739: 
never@739: #ifndef _LP64
duke@435:   src.load_item_force     (FrameMap::rcx_oop_opr);
duke@435:   src_pos.load_item_force (FrameMap::rdx_opr);
duke@435:   dst.load_item_force     (FrameMap::rax_oop_opr);
duke@435:   dst_pos.load_item_force (FrameMap::rbx_opr);
duke@435:   length.load_item_force  (FrameMap::rdi_opr);
duke@435:   LIR_Opr tmp =           (FrameMap::rsi_opr);
never@739: #else
never@739: 
never@739:   // The java calling convention will give us enough registers
never@739:   // so that on the stub side the args will be perfect already.
never@739:   // On the other slow/special case side we call C and the arg
never@739:   // positions are not similar enough to pick one as the best.
never@739:   // Also because the java calling convention is a "shifted" version
never@739:   // of the C convention we can process the java args trivially into C
never@739:   // args without worry of overwriting during the xfer
never@739: 
never@739:   src.load_item_force     (FrameMap::as_oop_opr(j_rarg0));
never@739:   src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
never@739:   dst.load_item_force     (FrameMap::as_oop_opr(j_rarg2));
never@739:   dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
never@739:   length.load_item_force  (FrameMap::as_opr(j_rarg4));
never@739: 
never@739:   LIR_Opr tmp =           FrameMap::as_opr(j_rarg5);
never@739: #endif // LP64
never@739: 
duke@435:   set_no_result(x);
duke@435: 
duke@435:   int flags;
duke@435:   ciArrayKlass* expected_type;
duke@435:   arraycopy_helper(x, &flags, &expected_type);
duke@435: 
duke@435:   CodeEmitInfo* info = state_for(x, x->state()); // we may want to have stack (deoptimization?)
duke@435:   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
duke@435: }
duke@435: 
duke@435: 
duke@435: // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
duke@435: // _i2b, _i2c, _i2s
duke@435: LIR_Opr fixed_register_for(BasicType type) {
duke@435:   switch (type) {
duke@435:     case T_FLOAT:  return FrameMap::fpu0_float_opr;
duke@435:     case T_DOUBLE: return FrameMap::fpu0_double_opr;
duke@435:     case T_INT:    return FrameMap::rax_opr;
never@739:     case T_LONG:   return FrameMap::long0_opr;
duke@435:     default:       ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LIRGenerator::do_Convert(Convert* x) {
duke@435:   // flags that vary for the different operations and different SSE-settings
duke@435:   bool fixed_input, fixed_result, round_result, needs_stub;
duke@435: 
duke@435:   switch (x->op()) {
duke@435:     case Bytecodes::_i2l: // fall through
duke@435:     case Bytecodes::_l2i: // fall through
duke@435:     case Bytecodes::_i2b: // fall through
duke@435:     case Bytecodes::_i2c: // fall through
duke@435:     case Bytecodes::_i2s: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
duke@435: 
duke@435:     case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false;       round_result = false;      needs_stub = false; break;
duke@435:     case Bytecodes::_d2f: fixed_input = false;       fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
duke@435:     case Bytecodes::_i2f: fixed_input = false;       fixed_result = false;       round_result = UseSSE < 1; needs_stub = false; break;
duke@435:     case Bytecodes::_i2d: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
duke@435:     case Bytecodes::_f2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
duke@435:     case Bytecodes::_d2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
duke@435:     case Bytecodes::_l2f: fixed_input = false;       fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
duke@435:     case Bytecodes::_l2d: fixed_input = false;       fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
duke@435:     case Bytecodes::_f2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
duke@435:     case Bytecodes::_d2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
duke@435:     default: ShouldNotReachHere();
duke@435:   }
duke@435: 
duke@435:   LIRItem value(x->value(), this);
duke@435:   value.load_item();
duke@435:   LIR_Opr input = value.result();
duke@435:   LIR_Opr result = rlock(x);
duke@435: 
duke@435:   // arguments of lir_convert
duke@435:   LIR_Opr conv_input = input;
duke@435:   LIR_Opr conv_result = result;
duke@435:   ConversionStub* stub = NULL;
duke@435: 
duke@435:   if (fixed_input) {
duke@435:     conv_input = fixed_register_for(input->type());
duke@435:     __ move(input, conv_input);
duke@435:   }
duke@435: 
duke@435:   assert(fixed_result == false || round_result == false, "cannot set both");
duke@435:   if (fixed_result) {
duke@435:     conv_result = fixed_register_for(result->type());
duke@435:   } else if (round_result) {
duke@435:     result = new_register(result->type());
duke@435:     set_vreg_flag(result, must_start_in_memory);
duke@435:   }
duke@435: 
duke@435:   if (needs_stub) {
duke@435:     stub = new ConversionStub(x->op(), conv_input, conv_result);
duke@435:   }
duke@435: 
duke@435:   __ convert(x->op(), conv_input, conv_result, stub);
duke@435: 
duke@435:   if (result != conv_result) {
duke@435:     __ move(conv_result, result);
duke@435:   }
duke@435: 
duke@435:   assert(result->is_virtual(), "result must be virtual register");
duke@435:   set_result(x, result);
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::do_NewInstance(NewInstance* x) {
duke@435:   if (PrintNotLoaded && !x->klass()->is_loaded()) {
duke@435:     tty->print_cr("   ###class not loaded at new bci %d", x->bci());
duke@435:   }
duke@435:   CodeEmitInfo* info = state_for(x, x->state());
duke@435:   LIR_Opr reg = result_register_for(x->type());
duke@435:   LIR_Opr klass_reg = new_register(objectType);
duke@435:   new_instance(reg, x->klass(),
duke@435:                        FrameMap::rcx_oop_opr,
duke@435:                        FrameMap::rdi_oop_opr,
duke@435:                        FrameMap::rsi_oop_opr,
duke@435:                        LIR_OprFact::illegalOpr,
duke@435:                        FrameMap::rdx_oop_opr, info);
duke@435:   LIR_Opr result = rlock_result(x);
duke@435:   __ move(reg, result);
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
duke@435:   CodeEmitInfo* info = state_for(x, x->state());
duke@435: 
duke@435:   LIRItem length(x->length(), this);
duke@435:   length.load_item_force(FrameMap::rbx_opr);
duke@435: 
duke@435:   LIR_Opr reg = result_register_for(x->type());
duke@435:   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
duke@435:   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
duke@435:   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
duke@435:   LIR_Opr tmp4 = reg;
duke@435:   LIR_Opr klass_reg = FrameMap::rdx_oop_opr;
duke@435:   LIR_Opr len = length.result();
duke@435:   BasicType elem_type = x->elt_type();
duke@435: 
jrose@1424:   __ oop2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
duke@435: 
duke@435:   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
duke@435:   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
duke@435: 
duke@435:   LIR_Opr result = rlock_result(x);
duke@435:   __ move(reg, result);
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
duke@435:   LIRItem length(x->length(), this);
duke@435:   // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
duke@435:   // and therefore provide the state before the parameters have been consumed
duke@435:   CodeEmitInfo* patching_info = NULL;
duke@435:   if (!x->klass()->is_loaded() || PatchALot) {
duke@435:     patching_info =  state_for(x, x->state_before());
duke@435:   }
duke@435: 
duke@435:   CodeEmitInfo* info = state_for(x, x->state());
duke@435: 
duke@435:   const LIR_Opr reg = result_register_for(x->type());
duke@435:   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
duke@435:   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
duke@435:   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
duke@435:   LIR_Opr tmp4 = reg;
duke@435:   LIR_Opr klass_reg = FrameMap::rdx_oop_opr;
duke@435: 
duke@435:   length.load_item_force(FrameMap::rbx_opr);
duke@435:   LIR_Opr len = length.result();
duke@435: 
duke@435:   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
duke@435:   ciObject* obj = (ciObject*) ciObjArrayKlass::make(x->klass());
duke@435:   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
duke@435:     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
duke@435:   }
duke@435:   jobject2reg_with_patching(klass_reg, obj, patching_info);
duke@435:   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
duke@435: 
duke@435:   LIR_Opr result = rlock_result(x);
duke@435:   __ move(reg, result);
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
duke@435:   Values* dims = x->dims();
duke@435:   int i = dims->length();
duke@435:   LIRItemList* items = new LIRItemList(dims->length(), NULL);
duke@435:   while (i-- > 0) {
duke@435:     LIRItem* size = new LIRItem(dims->at(i), this);
duke@435:     items->at_put(i, size);
duke@435:   }
duke@435: 
never@1368:   // Evaluate state_for early since it may emit code.
duke@435:   CodeEmitInfo* patching_info = NULL;
duke@435:   if (!x->klass()->is_loaded() || PatchALot) {
duke@435:     patching_info = state_for(x, x->state_before());
duke@435: 
duke@435:     // cannot re-use same xhandlers for multiple CodeEmitInfos, so
never@1368:     // clone all handlers.  This is handled transparently in other
never@1368:     // places by the CodeEmitInfo cloning logic but is handled
never@1368:     // specially here because a stub isn't being used.
duke@435:     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
duke@435:   }
duke@435:   CodeEmitInfo* info = state_for(x, x->state());
duke@435: 
duke@435:   i = dims->length();
duke@435:   while (i-- > 0) {
duke@435:     LIRItem* size = items->at(i);
duke@435:     size->load_nonconstant();
duke@435: 
duke@435:     store_stack_parameter(size->result(), in_ByteSize(i*4));
duke@435:   }
duke@435: 
duke@435:   LIR_Opr reg = result_register_for(x->type());
duke@435:   jobject2reg_with_patching(reg, x->klass(), patching_info);
duke@435: 
duke@435:   LIR_Opr rank = FrameMap::rbx_opr;
duke@435:   __ move(LIR_OprFact::intConst(x->rank()), rank);
duke@435:   LIR_Opr varargs = FrameMap::rcx_opr;
duke@435:   __ move(FrameMap::rsp_opr, varargs);
duke@435:   LIR_OprList* args = new LIR_OprList(3);
duke@435:   args->append(reg);
duke@435:   args->append(rank);
duke@435:   args->append(varargs);
duke@435:   __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
duke@435:                   LIR_OprFact::illegalOpr,
duke@435:                   reg, args, info);
duke@435: 
duke@435:   LIR_Opr result = rlock_result(x);
duke@435:   __ move(reg, result);
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::do_BlockBegin(BlockBegin* x) {
duke@435:   // nothing to do for now
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::do_CheckCast(CheckCast* x) {
duke@435:   LIRItem obj(x->obj(), this);
duke@435: 
duke@435:   CodeEmitInfo* patching_info = NULL;
duke@435:   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
duke@435:     // must do this before locking the destination register as an oop register,
duke@435:     // and before the obj is loaded (the latter is for deoptimization)
duke@435:     patching_info = state_for(x, x->state_before());
duke@435:   }
duke@435:   obj.load_item();
duke@435: 
duke@435:   // info for exceptions
duke@435:   CodeEmitInfo* info_for_exception = state_for(x, x->state()->copy_locks());
duke@435: 
duke@435:   CodeStub* stub;
duke@435:   if (x->is_incompatible_class_change_check()) {
duke@435:     assert(patching_info == NULL, "can't patch this");
duke@435:     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
duke@435:   } else {
duke@435:     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
duke@435:   }
duke@435:   LIR_Opr reg = rlock_result(x);
duke@435:   __ checkcast(reg, obj.result(), x->klass(),
duke@435:                new_register(objectType), new_register(objectType),
duke@435:                !x->klass()->is_loaded() ? new_register(objectType) : LIR_OprFact::illegalOpr,
duke@435:                x->direct_compare(), info_for_exception, patching_info, stub,
duke@435:                x->profiled_method(), x->profiled_bci());
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::do_InstanceOf(InstanceOf* x) {
duke@435:   LIRItem obj(x->obj(), this);
duke@435: 
duke@435:   // result and test object may not be in same register
duke@435:   LIR_Opr reg = rlock_result(x);
duke@435:   CodeEmitInfo* patching_info = NULL;
duke@435:   if ((!x->klass()->is_loaded() || PatchALot)) {
duke@435:     // must do this before locking the destination register as an oop register
duke@435:     patching_info = state_for(x, x->state_before());
duke@435:   }
duke@435:   obj.load_item();
duke@435:   LIR_Opr tmp = new_register(objectType);
duke@435:   __ instanceof(reg, obj.result(), x->klass(),
duke@435:                 tmp, new_register(objectType), LIR_OprFact::illegalOpr,
duke@435:                 x->direct_compare(), patching_info);
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::do_If(If* x) {
duke@435:   assert(x->number_of_sux() == 2, "inconsistency");
duke@435:   ValueTag tag = x->x()->type()->tag();
duke@435:   bool is_safepoint = x->is_safepoint();
duke@435: 
duke@435:   If::Condition cond = x->cond();
duke@435: 
duke@435:   LIRItem xitem(x->x(), this);
duke@435:   LIRItem yitem(x->y(), this);
duke@435:   LIRItem* xin = &xitem;
duke@435:   LIRItem* yin = &yitem;
duke@435: 
duke@435:   if (tag == longTag) {
duke@435:     // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
duke@435:     // mirror for other conditions
duke@435:     if (cond == If::gtr || cond == If::leq) {
duke@435:       cond = Instruction::mirror(cond);
duke@435:       xin = &yitem;
duke@435:       yin = &xitem;
duke@435:     }
duke@435:     xin->set_destroys_register();
duke@435:   }
duke@435:   xin->load_item();
duke@435:   if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
duke@435:     // inline long zero
duke@435:     yin->dont_load_item();
duke@435:   } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
duke@435:     // longs cannot handle constants at right side
duke@435:     yin->load_item();
duke@435:   } else {
duke@435:     yin->dont_load_item();
duke@435:   }
duke@435: 
duke@435:   // add safepoint before generating condition code so it can be recomputed
duke@435:   if (x->is_safepoint()) {
duke@435:     // increment backedge counter if needed
duke@435:     increment_backedge_counter(state_for(x, x->state_before()));
duke@435: 
duke@435:     __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before()));
duke@435:   }
duke@435:   set_no_result(x);
duke@435: 
duke@435:   LIR_Opr left = xin->result();
duke@435:   LIR_Opr right = yin->result();
duke@435:   __ cmp(lir_cond(cond), left, right);
duke@435:   profile_branch(x, cond);
duke@435:   move_to_phi(x->state());
duke@435:   if (x->x()->type()->is_float_kind()) {
duke@435:     __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
duke@435:   } else {
duke@435:     __ branch(lir_cond(cond), right->type(), x->tsux());
duke@435:   }
duke@435:   assert(x->default_sux() == x->fsux(), "wrong destination above");
duke@435:   __ jump(x->default_sux());
duke@435: }
duke@435: 
duke@435: 
duke@435: LIR_Opr LIRGenerator::getThreadPointer() {
never@739: #ifdef _LP64
never@739:   return FrameMap::as_pointer_opr(r15_thread);
never@739: #else
duke@435:   LIR_Opr result = new_register(T_INT);
duke@435:   __ get_thread(result);
duke@435:   return result;
never@739: #endif //
duke@435: }
duke@435: 
duke@435: void LIRGenerator::trace_block_entry(BlockBegin* block) {
duke@435:   store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
duke@435:   LIR_OprList* args = new LIR_OprList();
duke@435:   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
duke@435:   __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
duke@435:                                         CodeEmitInfo* info) {
duke@435:   if (address->type() == T_LONG) {
duke@435:     address = new LIR_Address(address->base(),
duke@435:                               address->index(), address->scale(),
duke@435:                               address->disp(), T_DOUBLE);
duke@435:     // Transfer the value atomically by using FP moves.  This means
duke@435:     // the value has to be moved between CPU and FPU registers.  It
duke@435:     // always has to be moved through spill slot since there's no
duke@435:     // quick way to pack the value into an SSE register.
duke@435:     LIR_Opr temp_double = new_register(T_DOUBLE);
duke@435:     LIR_Opr spill = new_register(T_LONG);
duke@435:     set_vreg_flag(spill, must_start_in_memory);
duke@435:     __ move(value, spill);
duke@435:     __ volatile_move(spill, temp_double, T_LONG);
duke@435:     __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
duke@435:   } else {
duke@435:     __ store(value, address, info);
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: 
duke@435: void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
duke@435:                                        CodeEmitInfo* info) {
duke@435:   if (address->type() == T_LONG) {
duke@435:     address = new LIR_Address(address->base(),
duke@435:                               address->index(), address->scale(),
duke@435:                               address->disp(), T_DOUBLE);
duke@435:     // Transfer the value atomically by using FP moves.  This means
duke@435:     // the value has to be moved between CPU and FPU registers.  In
duke@435:     // SSE0 and SSE1 mode it has to be moved through spill slot but in
duke@435:     // SSE2+ mode it can be moved directly.
duke@435:     LIR_Opr temp_double = new_register(T_DOUBLE);
duke@435:     __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
duke@435:     __ volatile_move(temp_double, result, T_LONG);
duke@435:     if (UseSSE < 2) {
duke@435:       // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
duke@435:       set_vreg_flag(result, must_start_in_memory);
duke@435:     }
duke@435:   } else {
duke@435:     __ load(address, result, info);
duke@435:   }
duke@435: }
duke@435: 
duke@435: void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
duke@435:                                      BasicType type, bool is_volatile) {
duke@435:   if (is_volatile && type == T_LONG) {
duke@435:     LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
duke@435:     LIR_Opr tmp = new_register(T_DOUBLE);
duke@435:     __ load(addr, tmp);
duke@435:     LIR_Opr spill = new_register(T_LONG);
duke@435:     set_vreg_flag(spill, must_start_in_memory);
duke@435:     __ move(tmp, spill);
duke@435:     __ move(spill, dst);
duke@435:   } else {
duke@435:     LIR_Address* addr = new LIR_Address(src, offset, type);
duke@435:     __ load(addr, dst);
duke@435:   }
duke@435: }
duke@435: 
duke@435: 
duke@435: void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
duke@435:                                      BasicType type, bool is_volatile) {
duke@435:   if (is_volatile && type == T_LONG) {
duke@435:     LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
duke@435:     LIR_Opr tmp = new_register(T_DOUBLE);
duke@435:     LIR_Opr spill = new_register(T_DOUBLE);
duke@435:     set_vreg_flag(spill, must_start_in_memory);
duke@435:     __ move(data, spill);
duke@435:     __ move(spill, tmp);
duke@435:     __ move(tmp, addr);
duke@435:   } else {
duke@435:     LIR_Address* addr = new LIR_Address(src, offset, type);
duke@435:     bool is_obj = (type == T_ARRAY || type == T_OBJECT);
duke@435:     if (is_obj) {
ysr@777:       // Do the pre-write barrier, if any.
ysr@777:       pre_barrier(LIR_OprFact::address(addr), false, NULL);
duke@435:       __ move(data, addr);
duke@435:       assert(src->is_register(), "must be register");
duke@435:       // Seems to be a precise address
duke@435:       post_barrier(LIR_OprFact::address(addr), data);
duke@435:     } else {
duke@435:       __ move(data, addr);
duke@435:     }
duke@435:   }
duke@435: }