duke@435: //
trims@1907: // Copyright (c) 1999, 2006, Oracle and/or its affiliates. All rights reserved.
duke@435: // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435: //
duke@435: // This code is free software; you can redistribute it and/or modify it
duke@435: // under the terms of the GNU General Public License version 2 only, as
duke@435: // published by the Free Software Foundation.
duke@435: //
duke@435: // This code is distributed in the hope that it will be useful, but WITHOUT
duke@435: // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435: // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
duke@435: // version 2 for more details (a copy is included in the LICENSE file that
duke@435: // accompanied this code).
duke@435: //
duke@435: // You should have received a copy of the GNU General Public License version
duke@435: // 2 along with this work; if not, write to the Free Software Foundation,
duke@435: // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435: //
trims@1907: // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907: // or visit www.oracle.com if you need additional information or have any
trims@1907: // questions.
duke@435: //
duke@435: //
duke@435: 
duke@435: // X86 Win32 Architecture Description File
duke@435: 
duke@435: //----------OS-DEPENDENT ENCODING BLOCK-----------------------------------------------------
duke@435: // This block specifies the encoding classes used by the compiler to output
duke@435: // byte streams.  Encoding classes generate functions which are called by
duke@435: // Machine Instruction Nodes in order to generate the bit encoding of the
duke@435: // instruction.  Operands specify their base encoding interface with the
duke@435: // interface keyword.  There are currently supported four interfaces,
duke@435: // REG_INTER, CONST_INTER, MEMORY_INTER, & COND_INTER.  REG_INTER causes an
duke@435: // operand to generate a function which returns its register number when
duke@435: // queried.   CONST_INTER causes an operand to generate a function which
duke@435: // returns the value of the constant when queried.  MEMORY_INTER causes an
duke@435: // operand to generate four functions which return the Base Register, the
duke@435: // Index Register, the Scale Value, and the Offset Value of the operand when
duke@435: // queried.  COND_INTER causes an operand to generate six functions which
duke@435: // return the encoding code (ie - encoding bits for the instruction)
duke@435: // associated with each basic boolean condition for a conditional instruction.
duke@435: // Instructions specify two basic values for encoding.  They use the
duke@435: // ins_encode keyword to specify their encoding class (which must be one of
duke@435: // the class names specified in the encoding block), and they use the
duke@435: // opcode keyword to specify, in order, their primary, secondary, and
duke@435: // tertiary opcode.  Only the opcode sections which a particular instruction
duke@435: // needs for encoding need to be specified.
duke@435: encode %{
duke@435:   // Build emit functions for each basic byte or larger field in the intel
duke@435:   // encoding scheme (opcode, rm, sib, immediate), and call them from C++
duke@435:   // code in the enc_class source block.  Emit functions will live in the
duke@435:   // main source block for now.  In future, we can generalize this by
duke@435:   // adding a syntax that specifies the sizes of fields in an order,
duke@435:   // so that the adlc can build the emit functions automagically
duke@435: 
duke@435:   enc_class tlsencode (eRegP dst, eRegP src) %{
duke@435:     emit_rm(cbuf, 0x2, $dst$$reg, $src$$reg);
duke@435:     emit_d32(cbuf, ThreadLocalStorage::get_thread_ptr_offset() );
duke@435:   %}
duke@435: 
duke@435:   enc_class call_epilog %{
duke@435:     if( VerifyStackAtCalls ) {
duke@435:       // Check that stack depth is unchanged: find majik cookie on stack
duke@435:       int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP,-3*VMRegImpl::slots_per_word));
duke@435:       if(framesize >= 128) {
duke@435:         emit_opcode(cbuf, 0x81); // cmp [esp+0],0xbadb1ood
duke@435:         emit_d8(cbuf,0xBC);
duke@435:         emit_d8(cbuf,0x24);
duke@435:         emit_d32(cbuf,framesize); // Find majik cookie from ESP
duke@435:         emit_d32(cbuf, 0xbadb100d);
duke@435:       }
duke@435:       else {
duke@435:         emit_opcode(cbuf, 0x81); // cmp [esp+0],0xbadb1ood
duke@435:         emit_d8(cbuf,0x7C);
duke@435:         emit_d8(cbuf,0x24);
duke@435:         emit_d8(cbuf,framesize); // Find majik cookie from ESP
duke@435:         emit_d32(cbuf, 0xbadb100d);
duke@435:       }
duke@435:       // jmp EQ around INT3
duke@435:       emit_opcode(cbuf,0x74);
duke@435:       emit_d8(cbuf,1);
duke@435:       // Die if stack mismatch
duke@435:       emit_opcode(cbuf,0xCC);
duke@435:     }
duke@435:   %}
duke@435: 
duke@435: %}
duke@435: 
duke@435: // INSTRUCTIONS -- Platform dependent
duke@435: 
duke@435: 
duke@435: //----------OS and Locking Instructions----------------------------------------
duke@435: 
duke@435: // The prefix of this name is KNOWN by the ADLC and cannot be changed.
duke@435: instruct tlsLoadP_prefixLoadP(eRegP t1) %{
duke@435:   effect(DEF t1);
duke@435: 
duke@435:   format %{ "MOV    $t1,FS:[0x00] "%}
duke@435:   opcode(0x8B, 0x64);
duke@435:   ins_encode(OpcS, OpcP, conmemref(t1));
duke@435:   ins_pipe( ialu_reg_fat );
duke@435: %}
duke@435: 
duke@435: // This name is KNOWN by the ADLC and cannot be changed.
duke@435: // The ADLC forces a 'TypeRawPtr::BOTTOM' output type
duke@435: // for this guy.
duke@435: // %%% Should do this with a clause like:  bottom_type(TypeRawPtr::BOTTOM);
duke@435: instruct tlsLoadP(eRegP dst, eRegP t1) %{
duke@435:   effect(DEF dst, USE t1);
duke@435: 
duke@435:   format %{ "MOV    $dst,[$t1 + TLS::thread_ptr_offset()]" %}
duke@435:   opcode(0x8B);
duke@435:   ins_encode(OpcP, tlsencode(dst, t1));
duke@435:   ins_pipe( ialu_reg_reg_fat );
duke@435: %}
duke@435: 
duke@435: instruct TLS(eRegP dst) %{
duke@435:   match(Set dst (ThreadLocal));
duke@435:   expand %{
duke@435:     eRegP t1;
duke@435:     tlsLoadP_prefixLoadP(t1);
duke@435:     tlsLoadP(dst, t1);
duke@435:   %}
duke@435: %}
duke@435: 
duke@435: // Die now
duke@435: instruct ShouldNotReachHere( )
duke@435: %{
duke@435:   match(Halt);
duke@435:   // Use the following format syntax
duke@435:   format %{ "INT3   ; ShouldNotReachHere" %}
duke@435:   opcode(0xCC);
duke@435:   ins_encode(OpcP);
duke@435:   ins_pipe( pipe_slow );
duke@435: %}
duke@435: 
duke@435: //
duke@435: // Platform dependent source
duke@435: //
duke@435: source %{
duke@435: 
duke@435: // emit an interrupt that is caught by the debugger
duke@435: void emit_break(CodeBuffer &cbuf) {
duke@435:   *(cbuf.code_end()) = (unsigned char)(0xcc);
duke@435:   cbuf.set_code_end(cbuf.code_end() + 1);
duke@435: }
duke@435: 
duke@435: void MachBreakpointNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
duke@435:   emit_break(cbuf);
duke@435: }
duke@435: 
duke@435: 
duke@435: uint MachBreakpointNode::size(PhaseRegAlloc *ra_) const {
duke@435:   return 1;
duke@435: }
duke@435: 
duke@435: 
duke@435: %}