duke@435: /* trims@1907: * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. duke@435: * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. duke@435: * duke@435: * This code is free software; you can redistribute it and/or modify it duke@435: * under the terms of the GNU General Public License version 2 only, as duke@435: * published by the Free Software Foundation. duke@435: * duke@435: * This code is distributed in the hope that it will be useful, but WITHOUT duke@435: * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or duke@435: * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License duke@435: * version 2 for more details (a copy is included in the LICENSE file that duke@435: * accompanied this code). duke@435: * duke@435: * You should have received a copy of the GNU General Public License version duke@435: * 2 along with this work; if not, write to the Free Software Foundation, duke@435: * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. duke@435: * trims@1907: * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA trims@1907: * or visit www.oracle.com if you need additional information or have any trims@1907: * questions. duke@435: * duke@435: */ duke@435: duke@435: #include "incls/_precompiled.incl" duke@435: #include "incls/_c1_Runtime1_x86.cpp.incl" duke@435: duke@435: duke@435: // Implementation of StubAssembler duke@435: duke@435: int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, int args_size) { duke@435: // setup registers never@739: const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions) duke@435: assert(!(oop_result1->is_valid() || oop_result2->is_valid()) || oop_result1 != oop_result2, "registers must be different"); duke@435: assert(oop_result1 != thread && oop_result2 != thread, "registers must be different"); duke@435: assert(args_size >= 0, "illegal args_size"); duke@435: never@739: #ifdef _LP64 never@739: mov(c_rarg0, thread); never@739: set_num_rt_args(0); // Nothing on stack never@739: #else duke@435: set_num_rt_args(1 + args_size); duke@435: duke@435: // push java thread (becomes first argument of C function) duke@435: get_thread(thread); never@739: push(thread); never@739: #endif // _LP64 duke@435: duke@435: set_last_Java_frame(thread, noreg, rbp, NULL); never@739: duke@435: // do the call duke@435: call(RuntimeAddress(entry)); duke@435: int call_offset = offset(); duke@435: // verify callee-saved register duke@435: #ifdef ASSERT duke@435: guarantee(thread != rax, "change this code"); never@739: push(rax); duke@435: { Label L; duke@435: get_thread(rax); never@739: cmpptr(thread, rax); duke@435: jcc(Assembler::equal, L); duke@435: int3(); duke@435: stop("StubAssembler::call_RT: rdi not callee saved?"); duke@435: bind(L); duke@435: } never@739: pop(rax); duke@435: #endif duke@435: reset_last_Java_frame(thread, true, false); duke@435: duke@435: // discard thread and arguments never@739: NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord)); duke@435: duke@435: // check for pending exceptions duke@435: { Label L; never@739: cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); duke@435: jcc(Assembler::equal, L); duke@435: // exception pending => remove activation and forward to exception handler never@739: movptr(rax, Address(thread, Thread::pending_exception_offset())); duke@435: // make sure that the vm_results are cleared duke@435: if (oop_result1->is_valid()) { xlu@947: movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); duke@435: } duke@435: if (oop_result2->is_valid()) { xlu@947: movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); duke@435: } duke@435: if (frame_size() == no_frame_size) { duke@435: leave(); duke@435: jump(RuntimeAddress(StubRoutines::forward_exception_entry())); duke@435: } else if (_stub_id == Runtime1::forward_exception_id) { duke@435: should_not_reach_here(); duke@435: } else { duke@435: jump(RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id))); duke@435: } duke@435: bind(L); duke@435: } duke@435: // get oop results if there are any and reset the values in the thread duke@435: if (oop_result1->is_valid()) { never@739: movptr(oop_result1, Address(thread, JavaThread::vm_result_offset())); xlu@947: movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); duke@435: verify_oop(oop_result1); duke@435: } duke@435: if (oop_result2->is_valid()) { never@739: movptr(oop_result2, Address(thread, JavaThread::vm_result_2_offset())); xlu@947: movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); duke@435: verify_oop(oop_result2); duke@435: } duke@435: return call_offset; duke@435: } duke@435: duke@435: duke@435: int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1) { never@739: #ifdef _LP64 never@739: mov(c_rarg1, arg1); never@739: #else never@739: push(arg1); never@739: #endif // _LP64 duke@435: return call_RT(oop_result1, oop_result2, entry, 1); duke@435: } duke@435: duke@435: duke@435: int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2) { never@739: #ifdef _LP64 never@739: if (c_rarg1 == arg2) { never@739: if (c_rarg2 == arg1) { never@739: xchgq(arg1, arg2); never@739: } else { never@739: mov(c_rarg2, arg2); never@739: mov(c_rarg1, arg1); never@739: } never@739: } else { never@739: mov(c_rarg1, arg1); never@739: mov(c_rarg2, arg2); never@739: } never@739: #else never@739: push(arg2); never@739: push(arg1); never@739: #endif // _LP64 duke@435: return call_RT(oop_result1, oop_result2, entry, 2); duke@435: } duke@435: duke@435: duke@435: int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3) { never@739: #ifdef _LP64 never@739: // if there is any conflict use the stack never@739: if (arg1 == c_rarg2 || arg1 == c_rarg3 || never@739: arg2 == c_rarg1 || arg1 == c_rarg3 || never@739: arg3 == c_rarg1 || arg1 == c_rarg2) { never@739: push(arg3); never@739: push(arg2); never@739: push(arg1); never@739: pop(c_rarg1); never@739: pop(c_rarg2); never@739: pop(c_rarg3); never@739: } else { never@739: mov(c_rarg1, arg1); never@739: mov(c_rarg2, arg2); never@739: mov(c_rarg3, arg3); never@739: } never@739: #else never@739: push(arg3); never@739: push(arg2); never@739: push(arg1); never@739: #endif // _LP64 duke@435: return call_RT(oop_result1, oop_result2, entry, 3); duke@435: } duke@435: duke@435: duke@435: // Implementation of StubFrame duke@435: duke@435: class StubFrame: public StackObj { duke@435: private: duke@435: StubAssembler* _sasm; duke@435: duke@435: public: duke@435: StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments); duke@435: void load_argument(int offset_in_words, Register reg); duke@435: duke@435: ~StubFrame(); duke@435: }; duke@435: duke@435: duke@435: #define __ _sasm-> duke@435: duke@435: StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) { duke@435: _sasm = sasm; duke@435: __ set_info(name, must_gc_arguments); duke@435: __ enter(); duke@435: } duke@435: duke@435: // load parameters that were stored with LIR_Assembler::store_parameter duke@435: // Note: offsets for store_parameter and load_argument must match duke@435: void StubFrame::load_argument(int offset_in_words, Register reg) { duke@435: // rbp, + 0: link duke@435: // + 1: return address duke@435: // + 2: argument with offset 0 duke@435: // + 3: argument with offset 1 duke@435: // + 4: ... duke@435: never@739: __ movptr(reg, Address(rbp, (offset_in_words + 2) * BytesPerWord)); duke@435: } duke@435: duke@435: duke@435: StubFrame::~StubFrame() { duke@435: __ leave(); duke@435: __ ret(0); duke@435: } duke@435: duke@435: #undef __ duke@435: duke@435: duke@435: // Implementation of Runtime1 duke@435: duke@435: #define __ sasm-> duke@435: never@739: const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2; never@739: const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2; duke@435: duke@435: // Stack layout for saving/restoring all the registers needed during a runtime duke@435: // call (this includes deoptimization) duke@435: // Note: note that users of this frame may well have arguments to some runtime duke@435: // while these values are on the stack. These positions neglect those arguments duke@435: // but the code in save_live_registers will take the argument count into duke@435: // account. duke@435: // never@739: #ifdef _LP64 never@739: #define SLOT2(x) x, never@739: #define SLOT_PER_WORD 2 never@739: #else never@739: #define SLOT2(x) never@739: #define SLOT_PER_WORD 1 never@739: #endif // _LP64 never@739: duke@435: enum reg_save_layout { never@739: // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that never@739: // happen and will assert if the stack size we create is misaligned never@739: #ifdef _LP64 never@739: align_dummy_0, align_dummy_1, never@739: #endif // _LP64 never@739: dummy1, SLOT2(dummy1H) // 0, 4 never@739: dummy2, SLOT2(dummy2H) // 8, 12 duke@435: // Two temps to be used as needed by users of save/restore callee registers never@739: temp_2_off, SLOT2(temp_2H_off) // 16, 20 never@739: temp_1_off, SLOT2(temp_1H_off) // 24, 28 never@739: xmm_regs_as_doubles_off, // 32 never@739: float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots, // 160 never@739: fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots, // 224 never@739: // fpu_state_end_off is exclusive never@739: fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD), // 352 never@739: marker = fpu_state_end_off, SLOT2(markerH) // 352, 356 never@739: extra_space_offset, // 360 never@739: #ifdef _LP64 never@739: r15_off = extra_space_offset, r15H_off, // 360, 364 never@739: r14_off, r14H_off, // 368, 372 never@739: r13_off, r13H_off, // 376, 380 never@739: r12_off, r12H_off, // 384, 388 never@739: r11_off, r11H_off, // 392, 396 never@739: r10_off, r10H_off, // 400, 404 never@739: r9_off, r9H_off, // 408, 412 never@739: r8_off, r8H_off, // 416, 420 never@739: rdi_off, rdiH_off, // 424, 428 never@739: #else duke@435: rdi_off = extra_space_offset, never@739: #endif // _LP64 never@739: rsi_off, SLOT2(rsiH_off) // 432, 436 never@739: rbp_off, SLOT2(rbpH_off) // 440, 444 never@739: rsp_off, SLOT2(rspH_off) // 448, 452 never@739: rbx_off, SLOT2(rbxH_off) // 456, 460 never@739: rdx_off, SLOT2(rdxH_off) // 464, 468 never@739: rcx_off, SLOT2(rcxH_off) // 472, 476 never@739: rax_off, SLOT2(raxH_off) // 480, 484 never@739: saved_rbp_off, SLOT2(saved_rbpH_off) // 488, 492 never@739: return_off, SLOT2(returnH_off) // 496, 500 never@739: reg_save_frame_size, // As noted: neglects any parameters to runtime // 504 never@739: never@739: #ifdef _WIN64 never@739: c_rarg0_off = rcx_off, never@739: #else never@739: c_rarg0_off = rdi_off, never@739: #endif // WIN64 duke@435: duke@435: // equates duke@435: duke@435: // illegal instruction handler duke@435: continue_dest_off = temp_1_off, duke@435: duke@435: // deoptimization equates duke@435: fp0_off = float_regs_as_doubles_off, // slot for java float/double return value duke@435: xmm0_off = xmm_regs_as_doubles_off, // slot for java float/double return value duke@435: deopt_type = temp_2_off, // slot for type of deopt in progress duke@435: ret_type = temp_1_off // slot for return type duke@435: }; duke@435: duke@435: duke@435: duke@435: // Save off registers which might be killed by calls into the runtime. duke@435: // Tries to smart of about FP registers. In particular we separate duke@435: // saving and describing the FPU registers for deoptimization since we duke@435: // have to save the FPU registers twice if we describe them and on P4 duke@435: // saving FPU registers which don't contain anything appears duke@435: // expensive. The deopt blob is the only thing which needs to duke@435: // describe FPU registers. In all other cases it should be sufficient duke@435: // to simply save their current value. duke@435: duke@435: static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args, duke@435: bool save_fpu_registers = true) { never@739: never@739: // In 64bit all the args are in regs so there are no additional stack slots never@739: LP64_ONLY(num_rt_args = 0); never@739: LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");) never@739: int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread never@739: sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word ); duke@435: duke@435: // record saved value locations in an OopMap duke@435: // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread never@739: OopMap* map = new OopMap(frame_size_in_slots, 0); duke@435: map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg()); duke@435: map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg()); duke@435: map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg()); duke@435: map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg()); duke@435: map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg()); duke@435: map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg()); never@739: #ifdef _LP64 never@739: map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args), r8->as_VMReg()); never@739: map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args), r9->as_VMReg()); never@739: map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg()); never@739: map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg()); never@739: map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg()); never@739: map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg()); never@739: map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg()); never@739: map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg()); never@739: never@739: // This is stupid but needed. never@739: map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next()); never@739: map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next()); never@739: map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next()); never@739: map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next()); never@739: map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next()); never@739: map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next()); never@739: never@739: map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args), r8->as_VMReg()->next()); never@739: map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args), r9->as_VMReg()->next()); never@739: map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next()); never@739: map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next()); never@739: map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next()); never@739: map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next()); never@739: map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next()); never@739: map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next()); never@739: #endif // _LP64 duke@435: duke@435: if (save_fpu_registers) { duke@435: if (UseSSE < 2) { duke@435: int fpu_off = float_regs_as_doubles_off; duke@435: for (int n = 0; n < FrameMap::nof_fpu_regs; n++) { duke@435: VMReg fpu_name_0 = FrameMap::fpu_regname(n); duke@435: map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + num_rt_args), fpu_name_0); duke@435: // %%% This is really a waste but we'll keep things as they were for now duke@435: if (true) { duke@435: map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next()); duke@435: } duke@435: fpu_off += 2; duke@435: } duke@435: assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots"); duke@435: } duke@435: duke@435: if (UseSSE >= 2) { duke@435: int xmm_off = xmm_regs_as_doubles_off; duke@435: for (int n = 0; n < FrameMap::nof_xmm_regs; n++) { duke@435: VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg(); duke@435: map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0); duke@435: // %%% This is really a waste but we'll keep things as they were for now duke@435: if (true) { duke@435: map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next()); duke@435: } duke@435: xmm_off += 2; duke@435: } duke@435: assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers"); duke@435: duke@435: } else if (UseSSE == 1) { duke@435: int xmm_off = xmm_regs_as_doubles_off; duke@435: for (int n = 0; n < FrameMap::nof_xmm_regs; n++) { duke@435: VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg(); duke@435: map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0); duke@435: xmm_off += 2; duke@435: } duke@435: assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers"); duke@435: } duke@435: } duke@435: duke@435: return map; duke@435: } duke@435: duke@435: static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args, duke@435: bool save_fpu_registers = true) { duke@435: __ block_comment("save_live_registers"); duke@435: never@739: // 64bit passes the args in regs to the c++ runtime never@739: int frame_size_in_slots = reg_save_frame_size NOT_LP64(+ num_rt_args); // args + thread duke@435: // frame_size = round_to(frame_size, 4); never@739: sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word ); duke@435: never@739: __ pusha(); // integer registers duke@435: duke@435: // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset"); duke@435: // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset"); duke@435: never@739: __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size); duke@435: duke@435: #ifdef ASSERT never@739: __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef); duke@435: #endif duke@435: duke@435: if (save_fpu_registers) { duke@435: if (UseSSE < 2) { duke@435: // save FPU stack never@739: __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); duke@435: __ fwait(); duke@435: duke@435: #ifdef ASSERT duke@435: Label ok; never@739: __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std()); duke@435: __ jccb(Assembler::equal, ok); duke@435: __ stop("corrupted control word detected"); duke@435: __ bind(ok); duke@435: #endif duke@435: duke@435: // Reset the control word to guard against exceptions being unmasked duke@435: // since fstp_d can cause FPU stack underflow exceptions. Write it duke@435: // into the on stack copy and then reload that to make sure that the duke@435: // current and future values are correct. never@739: __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std()); never@739: __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); duke@435: duke@435: // Save the FPU registers in de-opt-able form never@739: __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); never@739: __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); never@739: __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); never@739: __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); never@739: __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); never@739: __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); never@739: __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); never@739: __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); duke@435: } duke@435: duke@435: if (UseSSE >= 2) { duke@435: // save XMM registers duke@435: // XMM registers can contain float or double values, but this is not known here, duke@435: // so always save them as doubles. duke@435: // note that float values are _not_ converted automatically, so for float values duke@435: // the second word contains only garbage data. never@739: __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0); never@739: __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1); never@739: __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2); never@739: __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3); never@739: __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4); never@739: __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5); never@739: __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6); never@739: __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7); never@739: #ifdef _LP64 never@739: __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64), xmm8); never@739: __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72), xmm9); never@739: __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80), xmm10); never@739: __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88), xmm11); never@739: __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96), xmm12); never@739: __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104), xmm13); never@739: __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112), xmm14); never@739: __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120), xmm15); never@739: #endif // _LP64 duke@435: } else if (UseSSE == 1) { duke@435: // save XMM registers as float because double not supported without SSE2 never@739: __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0); never@739: __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1); never@739: __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2); never@739: __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3); never@739: __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4); never@739: __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5); never@739: __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6); never@739: __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7); duke@435: } duke@435: } duke@435: duke@435: // FPU stack must be empty now duke@435: __ verify_FPU(0, "save_live_registers"); duke@435: duke@435: return generate_oop_map(sasm, num_rt_args, save_fpu_registers); duke@435: } duke@435: duke@435: duke@435: static void restore_fpu(StubAssembler* sasm, bool restore_fpu_registers = true) { duke@435: if (restore_fpu_registers) { duke@435: if (UseSSE >= 2) { duke@435: // restore XMM registers never@739: __ movdbl(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); never@739: __ movdbl(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); never@739: __ movdbl(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); never@739: __ movdbl(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); never@739: __ movdbl(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); never@739: __ movdbl(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); never@739: __ movdbl(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); never@739: __ movdbl(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); never@739: #ifdef _LP64 never@739: __ movdbl(xmm8, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64)); never@739: __ movdbl(xmm9, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72)); never@739: __ movdbl(xmm10, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80)); never@739: __ movdbl(xmm11, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88)); never@739: __ movdbl(xmm12, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96)); never@739: __ movdbl(xmm13, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104)); never@739: __ movdbl(xmm14, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112)); never@739: __ movdbl(xmm15, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120)); never@739: #endif // _LP64 duke@435: } else if (UseSSE == 1) { duke@435: // restore XMM registers never@739: __ movflt(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); never@739: __ movflt(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); never@739: __ movflt(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); never@739: __ movflt(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); never@739: __ movflt(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); never@739: __ movflt(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); never@739: __ movflt(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); never@739: __ movflt(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); duke@435: } duke@435: duke@435: if (UseSSE < 2) { never@739: __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); duke@435: } else { duke@435: // check that FPU stack is really empty duke@435: __ verify_FPU(0, "restore_live_registers"); duke@435: } duke@435: duke@435: } else { duke@435: // check that FPU stack is really empty duke@435: __ verify_FPU(0, "restore_live_registers"); duke@435: } duke@435: duke@435: #ifdef ASSERT duke@435: { duke@435: Label ok; never@739: __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef); duke@435: __ jcc(Assembler::equal, ok); duke@435: __ stop("bad offsets in frame"); duke@435: __ bind(ok); duke@435: } never@739: #endif // ASSERT duke@435: never@739: __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size); duke@435: } duke@435: duke@435: duke@435: static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) { duke@435: __ block_comment("restore_live_registers"); duke@435: duke@435: restore_fpu(sasm, restore_fpu_registers); never@739: __ popa(); duke@435: } duke@435: duke@435: duke@435: static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) { duke@435: __ block_comment("restore_live_registers_except_rax"); duke@435: duke@435: restore_fpu(sasm, restore_fpu_registers); duke@435: never@739: #ifdef _LP64 never@739: __ movptr(r15, Address(rsp, 0)); never@739: __ movptr(r14, Address(rsp, wordSize)); never@739: __ movptr(r13, Address(rsp, 2 * wordSize)); never@739: __ movptr(r12, Address(rsp, 3 * wordSize)); never@739: __ movptr(r11, Address(rsp, 4 * wordSize)); never@739: __ movptr(r10, Address(rsp, 5 * wordSize)); never@739: __ movptr(r9, Address(rsp, 6 * wordSize)); never@739: __ movptr(r8, Address(rsp, 7 * wordSize)); never@739: __ movptr(rdi, Address(rsp, 8 * wordSize)); never@739: __ movptr(rsi, Address(rsp, 9 * wordSize)); never@739: __ movptr(rbp, Address(rsp, 10 * wordSize)); never@739: // skip rsp never@739: __ movptr(rbx, Address(rsp, 12 * wordSize)); never@739: __ movptr(rdx, Address(rsp, 13 * wordSize)); never@739: __ movptr(rcx, Address(rsp, 14 * wordSize)); never@739: never@739: __ addptr(rsp, 16 * wordSize); never@739: #else never@739: never@739: __ pop(rdi); never@739: __ pop(rsi); never@739: __ pop(rbp); never@739: __ pop(rbx); // skip this value never@739: __ pop(rbx); never@739: __ pop(rdx); never@739: __ pop(rcx); never@739: __ addptr(rsp, BytesPerWord); never@739: #endif // _LP64 duke@435: } duke@435: duke@435: duke@435: void Runtime1::initialize_pd() { duke@435: // nothing to do duke@435: } duke@435: duke@435: duke@435: // target: the entry point of the method that creates and posts the exception oop duke@435: // has_argument: true if the exception needs an argument (passed on stack because registers must be preserved) duke@435: duke@435: OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) { duke@435: // preserve all registers duke@435: int num_rt_args = has_argument ? 2 : 1; duke@435: OopMap* oop_map = save_live_registers(sasm, num_rt_args); duke@435: duke@435: // now all registers are saved and can be used freely duke@435: // verify that no old value is used accidentally duke@435: __ invalidate_registers(true, true, true, true, true, true); duke@435: duke@435: // registers used by this stub duke@435: const Register temp_reg = rbx; duke@435: duke@435: // load argument for exception that is passed as an argument into the stub duke@435: if (has_argument) { never@739: #ifdef _LP64 never@739: __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord)); never@739: #else never@739: __ movptr(temp_reg, Address(rbp, 2*BytesPerWord)); never@739: __ push(temp_reg); never@739: #endif // _LP64 duke@435: } duke@435: int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1); duke@435: duke@435: OopMapSet* oop_maps = new OopMapSet(); duke@435: oop_maps->add_gc_map(call_offset, oop_map); duke@435: duke@435: __ stop("should not reach here"); duke@435: duke@435: return oop_maps; duke@435: } duke@435: duke@435: duke@435: void Runtime1::generate_handle_exception(StubAssembler *sasm, OopMapSet* oop_maps, OopMap* oop_map, bool save_fpu_registers) { duke@435: // incoming parameters duke@435: const Register exception_oop = rax; duke@435: const Register exception_pc = rdx; duke@435: // other registers used in this stub duke@435: const Register real_return_addr = rbx; never@739: const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); duke@435: duke@435: __ block_comment("generate_handle_exception"); duke@435: duke@435: #ifdef TIERED duke@435: // C2 can leave the fpu stack dirty duke@435: if (UseSSE < 2 ) { duke@435: __ empty_FPU_stack(); duke@435: } duke@435: #endif // TIERED duke@435: duke@435: // verify that only rax, and rdx is valid at this time duke@435: __ invalidate_registers(false, true, true, false, true, true); duke@435: // verify that rax, contains a valid exception duke@435: __ verify_not_null_oop(exception_oop); duke@435: duke@435: // load address of JavaThread object for thread-local data never@739: NOT_LP64(__ get_thread(thread);) duke@435: duke@435: #ifdef ASSERT duke@435: // check that fields in JavaThread for exception oop and issuing pc are duke@435: // empty before writing to them duke@435: Label oop_empty; never@739: __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD); duke@435: __ jcc(Assembler::equal, oop_empty); duke@435: __ stop("exception oop already set"); duke@435: __ bind(oop_empty); duke@435: duke@435: Label pc_empty; never@739: __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); duke@435: __ jcc(Assembler::equal, pc_empty); duke@435: __ stop("exception pc already set"); duke@435: __ bind(pc_empty); duke@435: #endif duke@435: duke@435: // save exception oop and issuing pc into JavaThread duke@435: // (exception handler will load it from here) never@739: __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop); never@739: __ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc); duke@435: duke@435: // save real return address (pc that called this stub) never@739: __ movptr(real_return_addr, Address(rbp, 1*BytesPerWord)); never@739: __ movptr(Address(rsp, temp_1_off * VMRegImpl::stack_slot_size), real_return_addr); duke@435: duke@435: // patch throwing pc into return address (has bci & oop map) never@739: __ movptr(Address(rbp, 1*BytesPerWord), exception_pc); duke@435: duke@435: // compute the exception handler. duke@435: // the exception oop and the throwing pc are read from the fields in JavaThread duke@435: int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc)); duke@435: oop_maps->add_gc_map(call_offset, oop_map); duke@435: twisti@1730: // rax,: handler address duke@435: // will be the deopt blob if nmethod was deoptimized while we looked up duke@435: // handler regardless of whether handler existed in the nmethod. duke@435: duke@435: // only rax, is valid at this time, all other registers have been destroyed by the runtime call duke@435: __ invalidate_registers(false, true, true, true, true, true); duke@435: twisti@1730: #ifdef ASSERT duke@435: // Do we have an exception handler in the nmethod? duke@435: Label done; never@739: __ testptr(rax, rax); twisti@1730: __ jcc(Assembler::notZero, done); twisti@1730: __ stop("no handler found"); twisti@1730: __ bind(done); twisti@1730: #endif duke@435: duke@435: // exception handler found duke@435: // patch the return address -> the stub will directly return to the exception handler never@739: __ movptr(Address(rbp, 1*BytesPerWord), rax); duke@435: duke@435: // restore registers duke@435: restore_live_registers(sasm, save_fpu_registers); duke@435: duke@435: // return to exception handler duke@435: __ leave(); duke@435: __ ret(0); duke@435: duke@435: } duke@435: duke@435: duke@435: void Runtime1::generate_unwind_exception(StubAssembler *sasm) { duke@435: // incoming parameters duke@435: const Register exception_oop = rax; twisti@1730: // callee-saved copy of exception_oop during runtime call twisti@1730: const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14); duke@435: // other registers used in this stub duke@435: const Register exception_pc = rdx; duke@435: const Register handler_addr = rbx; never@739: const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); duke@435: duke@435: // verify that only rax, is valid at this time duke@435: __ invalidate_registers(false, true, true, true, true, true); duke@435: duke@435: #ifdef ASSERT duke@435: // check that fields in JavaThread for exception oop and issuing pc are empty never@739: NOT_LP64(__ get_thread(thread);) duke@435: Label oop_empty; never@739: __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0); duke@435: __ jcc(Assembler::equal, oop_empty); duke@435: __ stop("exception oop must be empty"); duke@435: __ bind(oop_empty); duke@435: duke@435: Label pc_empty; never@739: __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); duke@435: __ jcc(Assembler::equal, pc_empty); duke@435: __ stop("exception pc must be empty"); duke@435: __ bind(pc_empty); duke@435: #endif duke@435: duke@435: // clear the FPU stack in case any FPU results are left behind duke@435: __ empty_FPU_stack(); duke@435: twisti@1730: // save exception_oop in callee-saved register to preserve it during runtime calls twisti@1730: __ verify_not_null_oop(exception_oop); twisti@1730: __ movptr(exception_oop_callee_saved, exception_oop); twisti@1730: twisti@1730: NOT_LP64(__ get_thread(thread);) twisti@1730: // Get return address (is on top of stack after leave). never@739: __ movptr(exception_pc, Address(rsp, 0)); duke@435: twisti@1730: // search the exception handler address of the caller (using the return address) twisti@1730: __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc); twisti@1730: // rax: exception handler address of the caller duke@435: twisti@1730: // Only RAX and RSI are valid at this time, all other registers have been destroyed by the call. twisti@1730: __ invalidate_registers(false, true, true, true, false, true); duke@435: duke@435: // move result of call into correct register never@739: __ movptr(handler_addr, rax); duke@435: twisti@1730: // Restore exception oop to RAX (required convention of exception handler). twisti@1730: __ movptr(exception_oop, exception_oop_callee_saved); duke@435: twisti@1730: // verify that there is really a valid exception in rax twisti@1730: __ verify_not_null_oop(exception_oop); duke@435: duke@435: // get throwing pc (= return address). duke@435: // rdx has been destroyed by the call, so it must be set again duke@435: // the pop is also necessary to simulate the effect of a ret(0) never@739: __ pop(exception_pc); duke@435: twisti@1730: // Restore SP from BP if the exception PC is a MethodHandle call site. twisti@1730: NOT_LP64(__ get_thread(thread);) twisti@1803: __ cmpl(Address(thread, JavaThread::is_method_handle_return_offset()), 0); twisti@1919: __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); duke@435: duke@435: // continue at exception handler (return address removed) duke@435: // note: do *not* remove arguments when unwinding the duke@435: // activation since the caller assumes having duke@435: // all arguments on the stack when entering the duke@435: // runtime to determine the exception handler duke@435: // (GC happens at call site with arguments!) twisti@1730: // rax: exception oop duke@435: // rdx: throwing pc twisti@1730: // rbx: exception handler duke@435: __ jmp(handler_addr); duke@435: } duke@435: duke@435: duke@435: OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) { duke@435: // use the maximum number of runtime-arguments here because it is difficult to duke@435: // distinguish each RT-Call. duke@435: // Note: This number affects also the RT-Call in generate_handle_exception because duke@435: // the oop-map is shared for all calls. duke@435: const int num_rt_args = 2; // thread + dummy duke@435: duke@435: DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); duke@435: assert(deopt_blob != NULL, "deoptimization blob must have been created"); duke@435: duke@435: OopMap* oop_map = save_live_registers(sasm, num_rt_args); duke@435: never@739: #ifdef _LP64 never@739: const Register thread = r15_thread; never@739: // No need to worry about dummy never@739: __ mov(c_rarg0, thread); never@739: #else never@739: __ push(rax); // push dummy duke@435: duke@435: const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions) duke@435: // push java thread (becomes first argument of C function) duke@435: __ get_thread(thread); never@739: __ push(thread); never@739: #endif // _LP64 duke@435: __ set_last_Java_frame(thread, noreg, rbp, NULL); duke@435: // do the call duke@435: __ call(RuntimeAddress(target)); duke@435: OopMapSet* oop_maps = new OopMapSet(); duke@435: oop_maps->add_gc_map(__ offset(), oop_map); duke@435: // verify callee-saved register duke@435: #ifdef ASSERT duke@435: guarantee(thread != rax, "change this code"); never@739: __ push(rax); duke@435: { Label L; duke@435: __ get_thread(rax); never@739: __ cmpptr(thread, rax); duke@435: __ jcc(Assembler::equal, L); never@739: __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?"); duke@435: __ bind(L); duke@435: } never@739: __ pop(rax); duke@435: #endif duke@435: __ reset_last_Java_frame(thread, true, false); never@739: #ifndef _LP64 never@739: __ pop(rcx); // discard thread arg never@739: __ pop(rcx); // discard dummy never@739: #endif // _LP64 duke@435: duke@435: // check for pending exceptions duke@435: { Label L; never@739: __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); duke@435: __ jcc(Assembler::equal, L); duke@435: // exception pending => remove activation and forward to exception handler duke@435: never@739: __ testptr(rax, rax); // have we deoptimized? duke@435: __ jump_cc(Assembler::equal, duke@435: RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id))); duke@435: duke@435: // the deopt blob expects exceptions in the special fields of duke@435: // JavaThread, so copy and clear pending exception. duke@435: duke@435: // load and clear pending exception never@739: __ movptr(rax, Address(thread, Thread::pending_exception_offset())); xlu@947: __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); duke@435: duke@435: // check that there is really a valid exception duke@435: __ verify_not_null_oop(rax); duke@435: duke@435: // load throwing pc: this is the return address of the stub never@739: __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size)); duke@435: duke@435: #ifdef ASSERT duke@435: // check that fields in JavaThread for exception oop and issuing pc are empty duke@435: Label oop_empty; never@739: __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); duke@435: __ jcc(Assembler::equal, oop_empty); duke@435: __ stop("exception oop must be empty"); duke@435: __ bind(oop_empty); duke@435: duke@435: Label pc_empty; never@739: __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); duke@435: __ jcc(Assembler::equal, pc_empty); duke@435: __ stop("exception pc must be empty"); duke@435: __ bind(pc_empty); duke@435: #endif duke@435: duke@435: // store exception oop and throwing pc to JavaThread never@739: __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax); never@739: __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx); duke@435: duke@435: restore_live_registers(sasm); duke@435: duke@435: __ leave(); never@739: __ addptr(rsp, BytesPerWord); // remove return address from stack duke@435: duke@435: // Forward the exception directly to deopt blob. We can blow no duke@435: // registers and must leave throwing pc on the stack. A patch may duke@435: // have values live in registers so the entry point with the duke@435: // exception in tls. duke@435: __ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls())); duke@435: duke@435: __ bind(L); duke@435: } duke@435: duke@435: duke@435: // Runtime will return true if the nmethod has been deoptimized during duke@435: // the patching process. In that case we must do a deopt reexecute instead. duke@435: duke@435: Label reexecuteEntry, cont; duke@435: never@739: __ testptr(rax, rax); // have we deoptimized? duke@435: __ jcc(Assembler::equal, cont); // no duke@435: duke@435: // Will reexecute. Proper return address is already on the stack we just restore duke@435: // registers, pop all of our frame but the return address and jump to the deopt blob duke@435: restore_live_registers(sasm); duke@435: __ leave(); duke@435: __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution())); duke@435: duke@435: __ bind(cont); duke@435: restore_live_registers(sasm); duke@435: __ leave(); duke@435: __ ret(0); duke@435: duke@435: return oop_maps; duke@435: duke@435: } duke@435: duke@435: duke@435: OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) { duke@435: duke@435: // for better readability duke@435: const bool must_gc_arguments = true; duke@435: const bool dont_gc_arguments = false; duke@435: duke@435: // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu duke@435: bool save_fpu_registers = true; duke@435: duke@435: // stub code & info for the different stubs duke@435: OopMapSet* oop_maps = NULL; duke@435: switch (id) { duke@435: case forward_exception_id: duke@435: { duke@435: // we're handling an exception in the context of a compiled duke@435: // frame. The registers have been saved in the standard duke@435: // places. Perform an exception lookup in the caller and duke@435: // dispatch to the handler if found. Otherwise unwind and duke@435: // dispatch to the callers exception handler. duke@435: never@739: const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); duke@435: const Register exception_oop = rax; duke@435: const Register exception_pc = rdx; duke@435: duke@435: // load pending exception oop into rax, never@739: __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset())); duke@435: // clear pending exception xlu@947: __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); duke@435: duke@435: // load issuing PC (the return address for this stub) into rdx never@739: __ movptr(exception_pc, Address(rbp, 1*BytesPerWord)); duke@435: duke@435: // make sure that the vm_results are cleared (may be unnecessary) xlu@947: __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); xlu@947: __ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); duke@435: duke@435: // verify that that there is really a valid exception in rax, duke@435: __ verify_not_null_oop(exception_oop); duke@435: duke@435: duke@435: oop_maps = new OopMapSet(); duke@435: OopMap* oop_map = generate_oop_map(sasm, 1); duke@435: generate_handle_exception(sasm, oop_maps, oop_map); duke@435: __ stop("should not reach here"); duke@435: } duke@435: break; duke@435: duke@435: case new_instance_id: duke@435: case fast_new_instance_id: duke@435: case fast_new_instance_init_check_id: duke@435: { duke@435: Register klass = rdx; // Incoming duke@435: Register obj = rax; // Result duke@435: duke@435: if (id == new_instance_id) { duke@435: __ set_info("new_instance", dont_gc_arguments); duke@435: } else if (id == fast_new_instance_id) { duke@435: __ set_info("fast new_instance", dont_gc_arguments); duke@435: } else { duke@435: assert(id == fast_new_instance_init_check_id, "bad StubID"); duke@435: __ set_info("fast new_instance init check", dont_gc_arguments); duke@435: } duke@435: duke@435: if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) && duke@435: UseTLAB && FastTLABRefill) { duke@435: Label slow_path; duke@435: Register obj_size = rcx; duke@435: Register t1 = rbx; duke@435: Register t2 = rsi; duke@435: assert_different_registers(klass, obj, obj_size, t1, t2); duke@435: never@739: __ push(rdi); never@739: __ push(rbx); duke@435: duke@435: if (id == fast_new_instance_init_check_id) { duke@435: // make sure the klass is initialized duke@435: __ cmpl(Address(klass, instanceKlass::init_state_offset_in_bytes() + sizeof(oopDesc)), instanceKlass::fully_initialized); duke@435: __ jcc(Assembler::notEqual, slow_path); duke@435: } duke@435: duke@435: #ifdef ASSERT duke@435: // assert object can be fast path allocated duke@435: { duke@435: Label ok, not_ok; duke@435: __ movl(obj_size, Address(klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc))); duke@435: __ cmpl(obj_size, 0); // make sure it's an instance (LH > 0) duke@435: __ jcc(Assembler::lessEqual, not_ok); duke@435: __ testl(obj_size, Klass::_lh_instance_slow_path_bit); duke@435: __ jcc(Assembler::zero, ok); duke@435: __ bind(not_ok); duke@435: __ stop("assert(can be fast path allocated)"); duke@435: __ should_not_reach_here(); duke@435: __ bind(ok); duke@435: } duke@435: #endif // ASSERT duke@435: duke@435: // if we got here then the TLAB allocation failed, so try duke@435: // refilling the TLAB or allocating directly from eden. duke@435: Label retry_tlab, try_eden; duke@435: __ tlab_refill(retry_tlab, try_eden, slow_path); // does not destroy rdx (klass) duke@435: duke@435: __ bind(retry_tlab); duke@435: never@739: // get the instance size (size is postive so movl is fine for 64bit) duke@435: __ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); duke@435: __ tlab_allocate(obj, obj_size, 0, t1, t2, slow_path); duke@435: __ initialize_object(obj, klass, obj_size, 0, t1, t2); duke@435: __ verify_oop(obj); never@739: __ pop(rbx); never@739: __ pop(rdi); duke@435: __ ret(0); duke@435: duke@435: __ bind(try_eden); never@739: // get the instance size (size is postive so movl is fine for 64bit) duke@435: __ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); duke@435: __ eden_allocate(obj, obj_size, 0, t1, slow_path); duke@435: __ initialize_object(obj, klass, obj_size, 0, t1, t2); duke@435: __ verify_oop(obj); never@739: __ pop(rbx); never@739: __ pop(rdi); duke@435: __ ret(0); duke@435: duke@435: __ bind(slow_path); never@739: __ pop(rbx); never@739: __ pop(rdi); duke@435: } duke@435: duke@435: __ enter(); duke@435: OopMap* map = save_live_registers(sasm, 2); duke@435: int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass); duke@435: oop_maps = new OopMapSet(); duke@435: oop_maps->add_gc_map(call_offset, map); duke@435: restore_live_registers_except_rax(sasm); duke@435: __ verify_oop(obj); duke@435: __ leave(); duke@435: __ ret(0); duke@435: duke@435: // rax,: new instance duke@435: } duke@435: duke@435: break; duke@435: duke@435: #ifdef TIERED duke@435: case counter_overflow_id: duke@435: { duke@435: Register bci = rax; duke@435: __ enter(); duke@435: OopMap* map = save_live_registers(sasm, 2); duke@435: // Retrieve bci duke@435: __ movl(bci, Address(rbp, 2*BytesPerWord)); duke@435: int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci); duke@435: oop_maps = new OopMapSet(); duke@435: oop_maps->add_gc_map(call_offset, map); duke@435: restore_live_registers(sasm); duke@435: __ leave(); duke@435: __ ret(0); duke@435: } duke@435: break; duke@435: #endif // TIERED duke@435: duke@435: case new_type_array_id: duke@435: case new_object_array_id: duke@435: { duke@435: Register length = rbx; // Incoming duke@435: Register klass = rdx; // Incoming duke@435: Register obj = rax; // Result duke@435: duke@435: if (id == new_type_array_id) { duke@435: __ set_info("new_type_array", dont_gc_arguments); duke@435: } else { duke@435: __ set_info("new_object_array", dont_gc_arguments); duke@435: } duke@435: duke@435: #ifdef ASSERT duke@435: // assert object type is really an array of the proper kind duke@435: { duke@435: Label ok; duke@435: Register t0 = obj; duke@435: __ movl(t0, Address(klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc))); duke@435: __ sarl(t0, Klass::_lh_array_tag_shift); duke@435: int tag = ((id == new_type_array_id) duke@435: ? Klass::_lh_array_tag_type_value duke@435: : Klass::_lh_array_tag_obj_value); duke@435: __ cmpl(t0, tag); duke@435: __ jcc(Assembler::equal, ok); duke@435: __ stop("assert(is an array klass)"); duke@435: __ should_not_reach_here(); duke@435: __ bind(ok); duke@435: } duke@435: #endif // ASSERT duke@435: duke@435: if (UseTLAB && FastTLABRefill) { duke@435: Register arr_size = rsi; duke@435: Register t1 = rcx; // must be rcx for use as shift count duke@435: Register t2 = rdi; duke@435: Label slow_path; duke@435: assert_different_registers(length, klass, obj, arr_size, t1, t2); duke@435: duke@435: // check that array length is small enough for fast path. duke@435: __ cmpl(length, C1_MacroAssembler::max_array_allocation_length); duke@435: __ jcc(Assembler::above, slow_path); duke@435: duke@435: // if we got here then the TLAB allocation failed, so try duke@435: // refilling the TLAB or allocating directly from eden. duke@435: Label retry_tlab, try_eden; duke@435: __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves rbx, & rdx duke@435: duke@435: __ bind(retry_tlab); duke@435: duke@435: // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) never@739: // since size is postive movl does right thing on 64bit duke@435: __ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); never@739: // since size is postive movl does right thing on 64bit duke@435: __ movl(arr_size, length); duke@435: assert(t1 == rcx, "fixed register usage"); never@739: __ shlptr(arr_size /* by t1=rcx, mod 32 */); never@739: __ shrptr(t1, Klass::_lh_header_size_shift); never@739: __ andptr(t1, Klass::_lh_header_size_mask); never@739: __ addptr(arr_size, t1); never@739: __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up never@739: __ andptr(arr_size, ~MinObjAlignmentInBytesMask); duke@435: duke@435: __ tlab_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size duke@435: duke@435: __ initialize_header(obj, klass, length, t1, t2); duke@435: __ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte))); duke@435: assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); duke@435: assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); never@739: __ andptr(t1, Klass::_lh_header_size_mask); never@739: __ subptr(arr_size, t1); // body length never@739: __ addptr(t1, obj); // body start duke@435: __ initialize_body(t1, arr_size, 0, t2); duke@435: __ verify_oop(obj); duke@435: __ ret(0); duke@435: duke@435: __ bind(try_eden); duke@435: // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) never@739: // since size is postive movl does right thing on 64bit duke@435: __ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); never@739: // since size is postive movl does right thing on 64bit duke@435: __ movl(arr_size, length); duke@435: assert(t1 == rcx, "fixed register usage"); never@739: __ shlptr(arr_size /* by t1=rcx, mod 32 */); never@739: __ shrptr(t1, Klass::_lh_header_size_shift); never@739: __ andptr(t1, Klass::_lh_header_size_mask); never@739: __ addptr(arr_size, t1); never@739: __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up never@739: __ andptr(arr_size, ~MinObjAlignmentInBytesMask); duke@435: duke@435: __ eden_allocate(obj, arr_size, 0, t1, slow_path); // preserves arr_size duke@435: duke@435: __ initialize_header(obj, klass, length, t1, t2); duke@435: __ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte))); duke@435: assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); duke@435: assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); never@739: __ andptr(t1, Klass::_lh_header_size_mask); never@739: __ subptr(arr_size, t1); // body length never@739: __ addptr(t1, obj); // body start duke@435: __ initialize_body(t1, arr_size, 0, t2); duke@435: __ verify_oop(obj); duke@435: __ ret(0); duke@435: duke@435: __ bind(slow_path); duke@435: } duke@435: duke@435: __ enter(); duke@435: OopMap* map = save_live_registers(sasm, 3); duke@435: int call_offset; duke@435: if (id == new_type_array_id) { duke@435: call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length); duke@435: } else { duke@435: call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length); duke@435: } duke@435: duke@435: oop_maps = new OopMapSet(); duke@435: oop_maps->add_gc_map(call_offset, map); duke@435: restore_live_registers_except_rax(sasm); duke@435: duke@435: __ verify_oop(obj); duke@435: __ leave(); duke@435: __ ret(0); duke@435: duke@435: // rax,: new array duke@435: } duke@435: break; duke@435: duke@435: case new_multi_array_id: duke@435: { StubFrame f(sasm, "new_multi_array", dont_gc_arguments); duke@435: // rax,: klass duke@435: // rbx,: rank duke@435: // rcx: address of 1st dimension duke@435: OopMap* map = save_live_registers(sasm, 4); duke@435: int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx); duke@435: duke@435: oop_maps = new OopMapSet(); duke@435: oop_maps->add_gc_map(call_offset, map); duke@435: restore_live_registers_except_rax(sasm); duke@435: duke@435: // rax,: new multi array duke@435: __ verify_oop(rax); duke@435: } duke@435: break; duke@435: duke@435: case register_finalizer_id: duke@435: { duke@435: __ set_info("register_finalizer", dont_gc_arguments); duke@435: never@739: // This is called via call_runtime so the arguments never@739: // will be place in C abi locations never@739: never@739: #ifdef _LP64 never@739: __ verify_oop(c_rarg0); never@739: __ mov(rax, c_rarg0); never@739: #else duke@435: // The object is passed on the stack and we haven't pushed a duke@435: // frame yet so it's one work away from top of stack. never@739: __ movptr(rax, Address(rsp, 1 * BytesPerWord)); duke@435: __ verify_oop(rax); never@739: #endif // _LP64 duke@435: duke@435: // load the klass and check the has finalizer flag duke@435: Label register_finalizer; duke@435: Register t = rsi; never@739: __ movptr(t, Address(rax, oopDesc::klass_offset_in_bytes())); duke@435: __ movl(t, Address(t, Klass::access_flags_offset_in_bytes() + sizeof(oopDesc))); duke@435: __ testl(t, JVM_ACC_HAS_FINALIZER); duke@435: __ jcc(Assembler::notZero, register_finalizer); duke@435: __ ret(0); duke@435: duke@435: __ bind(register_finalizer); duke@435: __ enter(); duke@435: OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */); duke@435: int call_offset = __ call_RT(noreg, noreg, duke@435: CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax); duke@435: oop_maps = new OopMapSet(); duke@435: oop_maps->add_gc_map(call_offset, oop_map); duke@435: duke@435: // Now restore all the live registers duke@435: restore_live_registers(sasm); duke@435: duke@435: __ leave(); duke@435: __ ret(0); duke@435: } duke@435: break; duke@435: duke@435: case throw_range_check_failed_id: duke@435: { StubFrame f(sasm, "range_check_failed", dont_gc_arguments); duke@435: oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true); duke@435: } duke@435: break; duke@435: duke@435: case throw_index_exception_id: duke@435: { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments); duke@435: oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true); duke@435: } duke@435: break; duke@435: duke@435: case throw_div0_exception_id: duke@435: { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments); duke@435: oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false); duke@435: } duke@435: break; duke@435: duke@435: case throw_null_pointer_exception_id: duke@435: { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments); duke@435: oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false); duke@435: } duke@435: break; duke@435: duke@435: case handle_exception_nofpu_id: duke@435: save_fpu_registers = false; duke@435: // fall through duke@435: case handle_exception_id: duke@435: { StubFrame f(sasm, "handle_exception", dont_gc_arguments); duke@435: oop_maps = new OopMapSet(); duke@435: OopMap* oop_map = save_live_registers(sasm, 1, save_fpu_registers); duke@435: generate_handle_exception(sasm, oop_maps, oop_map, save_fpu_registers); duke@435: } duke@435: break; duke@435: duke@435: case unwind_exception_id: duke@435: { __ set_info("unwind_exception", dont_gc_arguments); duke@435: // note: no stubframe since we are about to leave the current duke@435: // activation and we are calling a leaf VM function only. duke@435: generate_unwind_exception(sasm); duke@435: } duke@435: break; duke@435: duke@435: case throw_array_store_exception_id: duke@435: { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments); duke@435: // tos + 0: link duke@435: // + 1: return address duke@435: oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), false); duke@435: } duke@435: break; duke@435: duke@435: case throw_class_cast_exception_id: duke@435: { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments); duke@435: oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true); duke@435: } duke@435: break; duke@435: duke@435: case throw_incompatible_class_change_error_id: duke@435: { StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments); duke@435: oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false); duke@435: } duke@435: break; duke@435: duke@435: case slow_subtype_check_id: duke@435: { jrose@1079: // Typical calling sequence: jrose@1079: // __ push(klass_RInfo); // object klass or other subclass jrose@1079: // __ push(sup_k_RInfo); // array element klass or other superclass jrose@1079: // __ call(slow_subtype_check); jrose@1079: // Note that the subclass is pushed first, and is therefore deepest. jrose@1079: // Previous versions of this code reversed the names 'sub' and 'super'. jrose@1079: // This was operationally harmless but made the code unreadable. duke@435: enum layout { never@739: rax_off, SLOT2(raxH_off) never@739: rcx_off, SLOT2(rcxH_off) never@739: rsi_off, SLOT2(rsiH_off) never@739: rdi_off, SLOT2(rdiH_off) never@739: // saved_rbp_off, SLOT2(saved_rbpH_off) never@739: return_off, SLOT2(returnH_off) jrose@1079: sup_k_off, SLOT2(sup_kH_off) jrose@1079: klass_off, SLOT2(superH_off) jrose@1079: framesize, jrose@1079: result_off = klass_off // deepest argument is also the return value duke@435: }; duke@435: duke@435: __ set_info("slow_subtype_check", dont_gc_arguments); never@739: __ push(rdi); never@739: __ push(rsi); never@739: __ push(rcx); never@739: __ push(rax); duke@435: never@739: // This is called by pushing args and not with C abi jrose@1079: __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass jrose@1079: __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass duke@435: duke@435: Label miss; jrose@1079: __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, NULL, &miss); jrose@1079: jrose@1079: // fallthrough on success: jrose@1079: __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result never@739: __ pop(rax); never@739: __ pop(rcx); never@739: __ pop(rsi); never@739: __ pop(rdi); duke@435: __ ret(0); duke@435: duke@435: __ bind(miss); jrose@1079: __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result never@739: __ pop(rax); never@739: __ pop(rcx); never@739: __ pop(rsi); never@739: __ pop(rdi); duke@435: __ ret(0); duke@435: } duke@435: break; duke@435: duke@435: case monitorenter_nofpu_id: duke@435: save_fpu_registers = false; duke@435: // fall through duke@435: case monitorenter_id: duke@435: { duke@435: StubFrame f(sasm, "monitorenter", dont_gc_arguments); duke@435: OopMap* map = save_live_registers(sasm, 3, save_fpu_registers); duke@435: never@739: // Called with store_parameter and not C abi never@739: duke@435: f.load_argument(1, rax); // rax,: object duke@435: f.load_argument(0, rbx); // rbx,: lock address duke@435: duke@435: int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx); duke@435: duke@435: oop_maps = new OopMapSet(); duke@435: oop_maps->add_gc_map(call_offset, map); duke@435: restore_live_registers(sasm, save_fpu_registers); duke@435: } duke@435: break; duke@435: duke@435: case monitorexit_nofpu_id: duke@435: save_fpu_registers = false; duke@435: // fall through duke@435: case monitorexit_id: duke@435: { duke@435: StubFrame f(sasm, "monitorexit", dont_gc_arguments); duke@435: OopMap* map = save_live_registers(sasm, 2, save_fpu_registers); duke@435: never@739: // Called with store_parameter and not C abi never@739: duke@435: f.load_argument(0, rax); // rax,: lock address duke@435: duke@435: // note: really a leaf routine but must setup last java sp duke@435: // => use call_RT for now (speed can be improved by duke@435: // doing last java sp setup manually) duke@435: int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax); duke@435: duke@435: oop_maps = new OopMapSet(); duke@435: oop_maps->add_gc_map(call_offset, map); duke@435: restore_live_registers(sasm, save_fpu_registers); duke@435: duke@435: } duke@435: break; duke@435: duke@435: case access_field_patching_id: duke@435: { StubFrame f(sasm, "access_field_patching", dont_gc_arguments); duke@435: // we should set up register map duke@435: oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching)); duke@435: } duke@435: break; duke@435: duke@435: case load_klass_patching_id: duke@435: { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments); duke@435: // we should set up register map duke@435: oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching)); duke@435: } duke@435: break; duke@435: duke@435: case jvmti_exception_throw_id: duke@435: { // rax,: exception oop duke@435: StubFrame f(sasm, "jvmti_exception_throw", dont_gc_arguments); duke@435: // Preserve all registers across this potentially blocking call duke@435: const int num_rt_args = 2; // thread, exception oop duke@435: OopMap* map = save_live_registers(sasm, num_rt_args); duke@435: int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, Runtime1::post_jvmti_exception_throw), rax); duke@435: oop_maps = new OopMapSet(); duke@435: oop_maps->add_gc_map(call_offset, map); duke@435: restore_live_registers(sasm); duke@435: } duke@435: break; duke@435: duke@435: case dtrace_object_alloc_id: duke@435: { // rax,: object duke@435: StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments); duke@435: // we can't gc here so skip the oopmap but make sure that all duke@435: // the live registers get saved. duke@435: save_live_registers(sasm, 1); duke@435: never@739: __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax)); duke@435: __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc))); never@739: NOT_LP64(__ pop(rax)); duke@435: duke@435: restore_live_registers(sasm); duke@435: } duke@435: break; duke@435: duke@435: case fpu2long_stub_id: duke@435: { duke@435: // rax, and rdx are destroyed, but should be free since the result is returned there duke@435: // preserve rsi,ecx never@739: __ push(rsi); never@739: __ push(rcx); never@739: LP64_ONLY(__ push(rdx);) duke@435: duke@435: // check for NaN duke@435: Label return0, do_return, return_min_jlong, do_convert; duke@435: never@739: Address value_high_word(rsp, wordSize + 4); never@739: Address value_low_word(rsp, wordSize); never@739: Address result_high_word(rsp, 3*wordSize + 4); never@739: Address result_low_word(rsp, 3*wordSize); duke@435: never@739: __ subptr(rsp, 32); // more than enough on 32bit duke@435: __ fst_d(value_low_word); duke@435: __ movl(rax, value_high_word); duke@435: __ andl(rax, 0x7ff00000); duke@435: __ cmpl(rax, 0x7ff00000); duke@435: __ jcc(Assembler::notEqual, do_convert); duke@435: __ movl(rax, value_high_word); duke@435: __ andl(rax, 0xfffff); duke@435: __ orl(rax, value_low_word); duke@435: __ jcc(Assembler::notZero, return0); duke@435: duke@435: __ bind(do_convert); duke@435: __ fnstcw(Address(rsp, 0)); never@739: __ movzwl(rax, Address(rsp, 0)); duke@435: __ orl(rax, 0xc00); duke@435: __ movw(Address(rsp, 2), rax); duke@435: __ fldcw(Address(rsp, 2)); duke@435: __ fwait(); duke@435: __ fistp_d(result_low_word); duke@435: __ fldcw(Address(rsp, 0)); duke@435: __ fwait(); never@739: // This gets the entire long in rax on 64bit never@739: __ movptr(rax, result_low_word); never@739: // testing of high bits duke@435: __ movl(rdx, result_high_word); never@739: __ mov(rcx, rax); duke@435: // What the heck is the point of the next instruction??? duke@435: __ xorl(rcx, 0x0); duke@435: __ movl(rsi, 0x80000000); duke@435: __ xorl(rsi, rdx); duke@435: __ orl(rcx, rsi); duke@435: __ jcc(Assembler::notEqual, do_return); duke@435: __ fldz(); duke@435: __ fcomp_d(value_low_word); duke@435: __ fnstsw_ax(); never@739: #ifdef _LP64 never@739: __ testl(rax, 0x4100); // ZF & CF == 0 never@739: __ jcc(Assembler::equal, return_min_jlong); never@739: #else duke@435: __ sahf(); duke@435: __ jcc(Assembler::above, return_min_jlong); never@739: #endif // _LP64 duke@435: // return max_jlong never@739: #ifndef _LP64 duke@435: __ movl(rdx, 0x7fffffff); duke@435: __ movl(rax, 0xffffffff); never@739: #else never@739: __ mov64(rax, CONST64(0x7fffffffffffffff)); never@739: #endif // _LP64 duke@435: __ jmp(do_return); duke@435: duke@435: __ bind(return_min_jlong); never@739: #ifndef _LP64 duke@435: __ movl(rdx, 0x80000000); duke@435: __ xorl(rax, rax); never@739: #else never@739: __ mov64(rax, CONST64(0x8000000000000000)); never@739: #endif // _LP64 duke@435: __ jmp(do_return); duke@435: duke@435: __ bind(return0); duke@435: __ fpop(); never@739: #ifndef _LP64 never@739: __ xorptr(rdx,rdx); never@739: __ xorptr(rax,rax); never@739: #else never@739: __ xorptr(rax, rax); never@739: #endif // _LP64 duke@435: duke@435: __ bind(do_return); never@739: __ addptr(rsp, 32); never@739: LP64_ONLY(__ pop(rdx);) never@739: __ pop(rcx); never@739: __ pop(rsi); duke@435: __ ret(0); duke@435: } duke@435: break; duke@435: ysr@777: #ifndef SERIALGC ysr@777: case g1_pre_barrier_slow_id: ysr@777: { ysr@777: StubFrame f(sasm, "g1_pre_barrier", dont_gc_arguments); ysr@777: // arg0 : previous value of memory ysr@777: ysr@777: BarrierSet* bs = Universe::heap()->barrier_set(); ysr@777: if (bs->kind() != BarrierSet::G1SATBCTLogging) { apetrusenko@797: __ movptr(rax, (int)id); ysr@777: __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax); ysr@777: __ should_not_reach_here(); ysr@777: break; ysr@777: } apetrusenko@797: __ push(rax); apetrusenko@797: __ push(rdx); ysr@777: ysr@777: const Register pre_val = rax; apetrusenko@797: const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); ysr@777: const Register tmp = rdx; ysr@777: apetrusenko@797: NOT_LP64(__ get_thread(thread);) ysr@777: ysr@777: Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() + ysr@777: PtrQueue::byte_offset_of_active())); ysr@777: ysr@777: Address queue_index(thread, in_bytes(JavaThread::satb_mark_queue_offset() + ysr@777: PtrQueue::byte_offset_of_index())); ysr@777: Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() + ysr@777: PtrQueue::byte_offset_of_buf())); ysr@777: ysr@777: ysr@777: Label done; ysr@777: Label runtime; ysr@777: ysr@777: // Can we store original value in the thread's buffer? ysr@777: apetrusenko@797: #ifdef _LP64 iveresov@1927: __ movslq(tmp, queue_index); apetrusenko@797: __ cmpq(tmp, 0); apetrusenko@797: #else ysr@777: __ cmpl(queue_index, 0); apetrusenko@797: #endif ysr@777: __ jcc(Assembler::equal, runtime); apetrusenko@797: #ifdef _LP64 apetrusenko@797: __ subq(tmp, wordSize); apetrusenko@797: __ movl(queue_index, tmp); apetrusenko@797: __ addq(tmp, buffer); apetrusenko@797: #else ysr@777: __ subl(queue_index, wordSize); ysr@777: __ movl(tmp, buffer); ysr@777: __ addl(tmp, queue_index); apetrusenko@797: #endif apetrusenko@797: ysr@777: // prev_val (rax) ysr@777: f.load_argument(0, pre_val); apetrusenko@797: __ movptr(Address(tmp, 0), pre_val); ysr@777: __ jmp(done); ysr@777: ysr@777: __ bind(runtime); iveresov@1927: __ push(rcx); iveresov@1927: #ifdef _LP64 iveresov@1927: __ push(r8); iveresov@1927: __ push(r9); iveresov@1927: __ push(r10); iveresov@1927: __ push(r11); iveresov@1927: # ifndef _WIN64 iveresov@1927: __ push(rdi); iveresov@1927: __ push(rsi); iveresov@1927: # endif iveresov@1927: #endif ysr@777: // load the pre-value ysr@777: f.load_argument(0, rcx); ysr@777: __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), rcx, thread); iveresov@1927: #ifdef _LP64 iveresov@1927: # ifndef _WIN64 iveresov@1927: __ pop(rsi); iveresov@1927: __ pop(rdi); iveresov@1927: # endif iveresov@1927: __ pop(r11); iveresov@1927: __ pop(r10); iveresov@1927: __ pop(r9); iveresov@1927: __ pop(r8); iveresov@1927: #endif apetrusenko@797: __ pop(rcx); iveresov@1927: __ bind(done); ysr@777: apetrusenko@797: __ pop(rdx); apetrusenko@797: __ pop(rax); ysr@777: } ysr@777: break; ysr@777: ysr@777: case g1_post_barrier_slow_id: ysr@777: { ysr@777: StubFrame f(sasm, "g1_post_barrier", dont_gc_arguments); ysr@777: ysr@777: ysr@777: // arg0: store_address ysr@777: Address store_addr(rbp, 2*BytesPerWord); ysr@777: ysr@777: BarrierSet* bs = Universe::heap()->barrier_set(); ysr@777: CardTableModRefBS* ct = (CardTableModRefBS*)bs; ysr@777: Label done; ysr@777: Label runtime; ysr@777: ysr@777: // At this point we know new_value is non-NULL and the new_value crosses regsion. ysr@777: // Must check to see if card is already dirty ysr@777: apetrusenko@797: const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); ysr@777: ysr@777: Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() + ysr@777: PtrQueue::byte_offset_of_index())); ysr@777: Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() + ysr@777: PtrQueue::byte_offset_of_buf())); ysr@777: apetrusenko@797: __ push(rax); iveresov@1927: __ push(rcx); ysr@777: apetrusenko@797: NOT_LP64(__ get_thread(thread);) apetrusenko@797: ExternalAddress cardtable((address)ct->byte_map_base); ysr@777: assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); ysr@777: iveresov@1927: const Register card_addr = rcx; apetrusenko@797: #ifdef _LP64 apetrusenko@797: const Register tmp = rscratch1; apetrusenko@797: f.load_argument(0, card_addr); apetrusenko@797: __ shrq(card_addr, CardTableModRefBS::card_shift); apetrusenko@797: __ lea(tmp, cardtable); apetrusenko@797: // get the address of the card apetrusenko@797: __ addq(card_addr, tmp); apetrusenko@797: #else iveresov@1927: const Register card_index = rcx; apetrusenko@797: f.load_argument(0, card_index); apetrusenko@797: __ shrl(card_index, CardTableModRefBS::card_shift); apetrusenko@797: ysr@777: Address index(noreg, card_index, Address::times_1); ysr@777: __ leal(card_addr, __ as_Address(ArrayAddress(cardtable, index))); apetrusenko@797: #endif apetrusenko@797: ysr@777: __ cmpb(Address(card_addr, 0), 0); ysr@777: __ jcc(Assembler::equal, done); ysr@777: ysr@777: // storing region crossing non-NULL, card is clean. ysr@777: // dirty card and log. ysr@777: ysr@777: __ movb(Address(card_addr, 0), 0); ysr@777: ysr@777: __ cmpl(queue_index, 0); ysr@777: __ jcc(Assembler::equal, runtime); ysr@777: __ subl(queue_index, wordSize); ysr@777: ysr@777: const Register buffer_addr = rbx; apetrusenko@797: __ push(rbx); ysr@777: apetrusenko@797: __ movptr(buffer_addr, buffer); apetrusenko@797: apetrusenko@797: #ifdef _LP64 apetrusenko@797: __ movslq(rscratch1, queue_index); apetrusenko@797: __ addptr(buffer_addr, rscratch1); apetrusenko@797: #else apetrusenko@797: __ addptr(buffer_addr, queue_index); apetrusenko@797: #endif apetrusenko@797: __ movptr(Address(buffer_addr, 0), card_addr); apetrusenko@797: apetrusenko@797: __ pop(rbx); ysr@777: __ jmp(done); ysr@777: ysr@777: __ bind(runtime); iveresov@1927: __ push(rdx); iveresov@1927: #ifdef _LP64 iveresov@1927: __ push(r8); iveresov@1927: __ push(r9); iveresov@1927: __ push(r10); iveresov@1927: __ push(r11); iveresov@1927: # ifndef _WIN64 iveresov@1927: __ push(rdi); iveresov@1927: __ push(rsi); iveresov@1927: # endif iveresov@1927: #endif ysr@777: __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread); iveresov@1927: #ifdef _LP64 iveresov@1927: # ifndef _WIN64 iveresov@1927: __ pop(rsi); iveresov@1927: __ pop(rdi); iveresov@1927: # endif iveresov@1927: __ pop(r11); iveresov@1927: __ pop(r10); iveresov@1927: __ pop(r9); iveresov@1927: __ pop(r8); iveresov@1927: #endif iveresov@1927: __ pop(rdx); iveresov@1927: __ bind(done); ysr@777: iveresov@1927: __ pop(rcx); apetrusenko@797: __ pop(rax); ysr@777: ysr@777: } ysr@777: break; ysr@777: #endif // !SERIALGC ysr@777: duke@435: default: duke@435: { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments); never@739: __ movptr(rax, (int)id); duke@435: __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax); duke@435: __ should_not_reach_here(); duke@435: } duke@435: break; duke@435: } duke@435: return oop_maps; duke@435: } duke@435: duke@435: #undef __ bobv@2036: bobv@2036: const char *Runtime1::pd_name_for_address(address entry) { bobv@2036: return ""; bobv@2036: }